3527results about "Testing circuits" patented technology

Method and apparatus for providing a leak detection circuit for data monitoring and management system using the guard trace of a glucose sensor by applying a leak detection test signal to determine whether a leakage current is present is provided. The leak detection circuit may includes an interface circuit such as a capacitor coupled to the guard trace to detect the leakage current when the leak detection test signal is applied to the guard trace, such that the user or patient using the data monitoring and management system such as glucose monitoring systems may be promptly and accurately notified of a failed sensor, and to alert the user to replace the sensor.

Method and apparatus are disclosed for analyzing defect data produced in testing a semiconductor chip from a logic design. In various embodiments, input for processing is a first inspection data set that identifies a first set of physical locations that are associated with defects detected during fabrication of the chip. Also input is a second test data set that includes one or more identifiers associated with failing circuitry in the chip. A second set of physical locations is determined from the one or more identifiers of failing circuitry, hierarchical relationships between blocks of the design, and placement information associated with the blocks. Each of the one or more identifiers is associated with at least one of the blocks. Correspondences are identified between physical locations in the first inspection data set and the second set of physical locations.

The present invention provides a semiconductor processing device (800) including a tool (802) having one or more sensors, a primary data communication port (804) and a secondary data communication port (806). A sensor data acquisition subsystem (808) acquires sensor data from the tool via the secondary port (806). The data acquisition subsystem (808) acquires MES operation messages via the primary port (804). Sensor data are communicated to a sensor processing unit (828) of a sensor data processing subsystem (810). The sensor processing unit (828) processes and analyzes the sensor data. Additionally, the processing unit (828) can be adapted for making product or processing related decisions, for example activating an alarm if the process is not operating within control limits. In another embodiment, the present invention provides a method and apparatus for processing data from a wafer fab facility (1000) including a plurality of tools (1004–1010) each having a primary data communication port (1012–1018) and a secondary data communication port (1042–1048).

A home control system using galvanic skin responses and heart rate information and a method thereof. Whether a user is awake is judged using a galvanic skin response sensor, and the extent of stress of a user is determined using the user's heart rate, thereby extracting a user's emotional state and sleeping state. Furthermore, based on these, various systems in the home network of a user are controlled according to the user's emotional state and sleeping state. In addition, those control results are stored in a database so as to create the optimum control conditions.

Some embodiments of the invention may operate to measure a first output performance metric value associated with a current operation frequency of a processor, to set a trial operation frequency of the processor, and to measure a second output performance metric value associated with the trial operation frequency. If the measured performance variation is less than a specified acceptable performance variation, the trial operation frequency may be selected as a subsequent determined operation frequency.

A magnetic field sensor includes built in self-test circuits that allow a self-test of most of, or all of, the circuitry of the magnetic field sensor, including self-test of a magnetic field sensing element used within the magnetic field sensor, while the magnetic field sensor is functioning in normal operation.

A monitoring system for a communications network includes a set of components for transmitting and receiving data signals over the communications network. Each component includes a built-in self-test system for performing tests within the component and outputting corresponding test results. Each self-test system is configured to non-invasively determine waveform characteristics of the data signals. The system includes a set of processors. Each processor is coupled to a subset of the set of components, and is configured to evaluate the test results output by the components coupled to the processor. Each processor is configured to detect and predict faults in the communications network based on the evaluation of the test results.

An apparatus for testing the life of a leakage current protection device having a leakage current detection circuit. In one embodiment, the apparatus a trip mechanism state generator, a fault alarm generator, a ground fault simulation unit. In operation, the ground fault simulation unit generates a simulated ground fault signal during every positive half-wave of an AC power, the simulated ground fault signal is detected by the leakage current detection circuit, the leakage current detection circuit responsively generates a signal to turn a switching device into its conductive state so as to allow a current to pass therethrough, the passed current is converted into a DC voltage in accordance with a trip mechanism state generated by the trip mechanism state generator, the fault alarm circuit receives and analyzes the DC voltage and indicates whether a fault exists in the leakage current protection device.

A fault detection apparatus according to an embodiment is provided with a measurement unit, a memory unit, a control unit, and a display unit. The measurement unit measures a first time period taken until a reflection signal reflected on a fault of a test apparatus is received after a first signal is transmitted to the test apparatus. The memory unit includes a CAD data unit having CAD data of the test apparatus, and a model data unit to store model data indicating a relation between the first time period and a predicted conduction distance of the first signal according to the CAD data. The control unit calculates a range of a test object selected in the test apparatus based on the CAD data, calculates the predicted conduction distance from the first time period based on the model data, and specifies a position of a fault of the test apparatus which is separated by the predicted conduction distance from the measurement unit in the range of the test object. The display unit displays the position of the fault in the CAD data.

A method and system for calibrating a light emitting device display is provided. The display includes a plurality of pixel circuits, each having a light emitting device. The system for the calibration monitors current drawn from a row of the display array, and generates a correction parameter to correct brightness level of the light emitting device.

System and method for online configuration of a device for a measurement system. The user accesses a server with a client computer over a network and specifies a task. If the user lacks the hardware to perform the task, hardware specifications are sent to a manufacturer, who sends the hardware to the user. The hardware may be re-configurable hardware (a programmable hardware element or processor/memory based device). Software products (programs and/or data) for configuring measurement system hardware (and/or software) to perform the task may be sent to the user. The hardware may be configured automatically or by the user. The software products may include programs usable by the measurement system to perform the task, configuration information for configuring the client computer or other measurement device, and/or hardware configuration program(s) for configuring a programmable hardware element. Thus, hardware and/or software specific to the user's application are be provided to the user.

A method and apparatus for adaptively adjusting the operating voltage of an integrated circuit in response to tester-to-system variations, worst-case testing techniques, process variations, temperature variations, or reliability wearout mechanisms. The minimum operating voltage of an integrated circuit is determined either during external testing of the integrated circuit or during built-in-self-testing. The minimum operating voltage is transmitted to a variable voltage regulator where it is used to set the output of the regulator. The output of the regulator supplies the integrated circuit with its operating voltage. This technique enables tailoring of the operating voltage of integrated circuits on a part-by-part basis which results in power consumption optimization by adapting operating voltage in response to tester-to-system variations, worst-case testing techniques, process variations, temperature variations or reliability wearout mechanisms. Alternatively, the invention enables adaptive adjustment of the operating frequency of an integrated circuit. The invention enables system designers to adaptively optimize either system performance or power consumption on a part-by-part basis in response to tester-to-system variations, worst-case testing techniques, process variations, temperature variations or reliability wearout mechanisms.

The present invention is directed to a method and system for automatic calibration of an acoustic system. The acoustic system may include a source A/V device, calibration computing device, and multiple rendering devices. The calibration system may include a calibration component attached to each rendering device and a source calibration module. The calibration component on each rendering device includes a microphone. The source calibration module includes distance and optional angle calculation tools for automatically determining a distance between the rendering device and a specified reference point upon return of the test signal from the calibration component.

A method and system for detecting and locating a single-phase ground fault on a low current grounded power-distribution network, comprising: respectively testing and picking up the voltage signals and current signals at multiple positions on each phase feeder (61), and determining the corresponding transient voltage signals and transient current signals according to the extraction of the voltage signals and the current signals (62); when the change in the transient voltage signals and the transient current signals exceeds a preset threshold (63), synchronously picking up the voltage signals and current signals at multiple positions on a three-phase feeder (64); calculating corresponding zero-sequence voltages and zero-sequence currents according to the voltage signals and current signals synchronously picked up at multiple positions on the three-phase feeder (65), and then extracting the steady-state signal and transient signal of the zero-sequence voltage and zero-sequence current at each position on the three-phase feeder (66); and determining a specific fault location on a faulty line according to the steady-state signal and the transient signal (67). The method effectively detects and displays a single-phase ground fault on a low current grounded power-distribution network.

The present invention is a system and method of facilitating automatic generation of the source code in a convenient and efficient manner. In one embodiment of the present invention, a programmable system on a chip (PSoC) boot file generation method is utilized to create a boot file. A boot template file is created comprising special symbolic variable names that point to configuration registers within a programmable system on a chip (PSoC). User module selections are received with delineation of preferred configurations and functions associated with components of said programmable system on a chip (PSoC). Application files are automatically generated based upon user selections of PSoC configurations and functions. The special symbolic variable names are substituted or replaced with actual configuration register names. In one embodiment, a present invention programmable system on a chip (PSOC) boot file generation method also facilitates providing interrupt processing routines to the appropriate vector.

The present invention is directed to a circuit and method for self-testing a protection device for use in an AC power distribution system. The device is configured to be coupled between an AC power distribution system and at least one load. The method includes the step of introducing a simulated ground neutral fault during a first predetermined half cycle half cycle of the AC power. An attempt is made to detect the introduced simulated grounded neutral fault during the first predetermined half cycle half cycle. A fault condition is signaled if the introduced simulated grounded neutral fault is not detected within a predetermined period of time.

A leakage detection circuit for an electric vehicle includes a battery pack, first and second leakage detection switches, a controller, a leakage detection resistor, a voltage detector, and a calculator. The first and second leakage detection switches are connected to the high and low voltage sides of the battery pack, respectively. The battery pack includes a plurality of batteries that are connected in series. The midpoint of the leakage detection resistor is connected to the ground via the first and second leakage detection switches. The controller alternately turns the first and second leakage detection switches ON. Thus, the voltage detector detects leakage voltage values that are generated in the leakage detection resistor. The controller turns the first and second leakage detection switches ON and OFF, respectively, to detect a first leakage voltage value of the leakage voltage values. On the other hand, the controller turning the first and second leakage detection switches OFF and ON, respectively, to detect a second leakage voltage value of the leakage voltage values. Consequently, the calculator detects leakage based on the first and second leakage voltage values.

A method, apparatus, article of manufacture, and a memory structure for generating a test code for an automatic procedure is disclosed. The method comprises the steps of defining a source file having a plurality of tags associated with a member of a library of executable code objects defining a set of instructions for performing a portion of the automatic test procedure, generating a test plan in a conventional language from the source file, and generating an automated test code for the automated test procedure from the source file. In one embodiment, a test index identifying system elements tested by the test code is generated and incorporated into the test plan, allowing the user to verify that all desired system elements are exercised by the automated test code. The article of manufacture comprises a data storage device tangibly embodying instructions to perform the method steps described above. The apparatus comprises means for defining a source file having a plurality of tags, wherein each tag is associated with a member of a library of executable code objects defining a set of instructions for performing a portion of an automatic test procedure, means for generating a test plan in a conversational language from the source file, and means for generating an automated test code for the automatic test procedure from the source file.

An arc fault detector for detecting electric power lines includes a sensor for sensing the derivative of the current on the electric power line, a converter circuit for converting the derivative of the line current into first and second signals, the first signal responsive to positive step transitions of arc fault current, and the second signal responsive to negative step transitions of arc current, and a temporal detector for signaling the presence of an arc fault when one of the first and second signals follows the other within a predetermined time, or window, and in which a sequence of one of the signals following the other signal occurs in a second predetermined interval of time.

A ground fault detector and detection method for a vehicle that can determine the cause of the occurrence of a ground fault after detecting the presence of the ground fault. The output terminal of a high-voltage battery is connected to one side of a coupling capacitor. In operation, a pulse signal is applied to a measurement point on the other side of the coupling capacitor, and the voltage generated at that point is detected. Whether the high-voltage battery or the electrical equipment units are grounded is determined. To determine the cause of the ground fault, the oscillation frequency of the square-wave pulse signal is changed and applied to the measurement point. From the change in voltage amplitude detected, it is determined whether the cause of the ground fault is a resistive or a capacitive ground fault, according to the change in the impedance of the battery or the units.