Double-sided TOPCon battery based on front selective doping and preparation method thereof

Abstract

The invention relates to the technical field of solar cells, in particular to a double-sided TOPCon cell based on front selective doping and a preparation method thereof.The cell comprises an N-type silicon wafer, and the silicon wafer comprises a front face and a back face which are opposite to each other; the front surface is divided into a contact region and a non-contact region, and the contact region is sequentially provided with a front tunneling oxide layer, a boron-doped polycrystalline silicon layer, a first passivation layer and a front electrode from inside to outside; a boron diffusion layer and a second passivation layer are sequentially arranged in the non-contact region from inside to outside; the first passivation layer comprises an aluminum oxide layer and a silicon nitride layer which are sequentially arranged from inside to outside, and the second passivation layer comprises a silicon oxide layer, an aluminum oxide layer and a silicon nitride layer which are sequentially arranged from inside to outside; and a back tunneling oxide layer, a phosphorus-doped polycrystalline silicon layer, a back passivation layer and a back electrode are sequentially arranged on the back of the silicon wafer. A laser silicon oxide + aluminum oxide + silicon nitride composite passivation structure is adopted in the non-contact area, the weighted reflectivity is controlled within 5%, and collaborative improvement of optical and electrical properties is achieved.

Description

Technical Field

[0001] The present invention relates to the technical field of solar cells, and particularly relates to a bifacial TOPCon cell based on front selective doping and a preparation method thereof. Background Art

[0002] With the continuous progress of photovoltaic technology, improving the efficiency of solar cells has become a key research goal. Traditional single-sided cells usually have the problem of relatively low efficiency. Especially when the light illumination conditions are insufficient or the angle is not ideal, the unutilized light cannot be fully converted into electrical energy. The bifacial TOPCon (Tunnel Oxide Passivated Contact) cell optimizes the front and back structures, enabling it to not only receive light from the front but also utilize the reflected light, thereby improving the overall photoelectric conversion efficiency. To further enhance the performance of the bifacial TOPCon cell, selective doping technologies (such as selective emitter SE) play an important role in the cell preparation process.

[0003] In selective doping technologies, common treatment methods include laser method, reverse etching method, and printing boron source single-step diffusion method, etc. The laser method is to use laser energy to secondarily push the doping source in boron silicate glass (BSG) to form a heavily doped region, while the non-laser region forms a lightly doped region. The reverse etching method is to print an organic material mask identical to the front grid pattern on the heavily diffused wafer as an etching barrier layer, and then use an etching solution to etch the heavily diffused region outside the mask to form a shallow junction. The printing boron source single-step diffusion method is to screen-print the boron source and perform diffusion through high-temperature heating to form heavy doping at the positions in contact with the grid lines and light doping at other positions.

[0004] These methods optimize the charge collection performance of the front and back of the cell by adjusting the doping concentration in different regions, thereby effectively improving the photoelectric conversion efficiency. However, the difficulty lies in the coordination of front and back doping. The preparation of a bifacial TOPCon cell requires precise doping treatment for both the front and back. Due to the differences in the cell structures and material properties of the front and back, how to ensure the coordination of doping concentration and doping method while maintaining the high efficiency of both sides of the cell is an important technical challenge. And compared with traditional single-sided cells, the bifacial TOPCon cell requires more complex process steps during preparation. For example, when forming the tunneling oxide layer (TOx) and phosphorus-doped polysilicon layer on the back, it must not affect the front structure and ensure the compatibility of the cell structures on both sides, which requires precise control of the doping process. Especially during the selective doping process, how to combine the special requirements of the bifacial cell to minimize the impact of each process step while improving the overall efficiency of the cell.

[0005] The information disclosed in this background section is only intended to deepen the understanding of the overall background of the present invention and should not be regarded as an admission or an implication in any form that this information constitutes the prior art known to those skilled in the art. Summary of the Invention

[0006] The main object of the present invention is to provide a double-sided TOPCon cell based on front-side selective doping and its preparation method, aiming to combine the double-sided TOPCon cell with front-side selective doping to achieve the synergistic optimization of passivation and optics in the front non-contact region, the gradient doping optimization in the front contact region, and systematically solve the bottlenecks in passivation efficiency, optical loss, and process complexity of traditional TOPCon cells.

[0007] To achieve the above object, the technical solution adopted by the present invention is: A double-sided TOPCon cell based on front-side selective doping, comprising an N-type silicon wafer, and the silicon wafer includes opposite front and back sides; The front side is divided into a contact region and a non-contact region. The contact region, from inside to outside, is successively a front tunneling oxide layer, a boron-doped polysilicon layer, a first passivation layer, and a front electrode; the non-contact region, from inside to outside, is successively a boron diffusion layer and a second passivation layer; The first passivation layer includes an alumina layer and a silicon nitride layer arranged successively from inside to outside, and the second passivation layer includes a silicon oxide layer, an alumina layer, and a silicon nitride layer arranged successively from inside to outside; The back side, from inside to outside, is successively a back tunneling oxide layer, a phosphorus-doped polysilicon layer, a back passivation layer, and a back electrode.

[0008] The present invention introduces ultrathin silicon oxide as a passivation layer on the surface of the boron-doped layer in the front non-contact region, which is passivated in combination with the alumina layer and the silicon nitride layer, and laser-oxidized silicon is used as an interface passivation layer; alumina provides fixed negative charges to inhibit surface recombination; silicon nitride realizes antireflection and protection, and through the stack layer, high-efficiency passivation and optical optimization in the non-contact region are achieved.

[0009] Further, the surface of the non-contact region has a nano-textured surface to enhance light trapping, and the surface of the contact region is a polished surface, which increases the contact area between the metal electrode and the silicon substrate, reduces the contact resistance, and the atomically flat surface reduces the scattering of carriers at the interface, improving the fill factor (FF). The present invention realizes the combined setting of "superconductivity in the contact region + super light absorption in the non-contact region" by precisely controlling the micro-topography of different functional regions, improving the balance of optoelectronic performance.

[0010] Further preferably, the surface roughness (Ra) of the polished silicon in the contact region is ≤1 nm, and the reflectivity of the textured surface in the non-contact region is ≤10%.

[0011] Further, the boron concentration in the boron-doped polysilicon layer shows an exponentially increasing distribution from the inside to the outside. The boron concentration on the side of the boron-doped polysilicon layer close to the front tunneling oxide layer is 1×10 19 ~5×10 19 atoms / cm 3 , and the boron concentration on the side close to the first silicon nitride passivation layer is 5×10 20 ~1×10 21 atoms / cm 3 . The low-concentration region near the interface can reduce the band offset at the tunneling oxide layer interface and lower the interface recombination rate. The high-concentration region on the surface forms an excellent ohmic contact, and the surface Fermi level is closer to the valence band, improving the hole collection efficiency.

[0012] Further, the thickness of the boron-doped polysilicon layer in the contact region is 50~300 nm. The grain size on the side of the boron-doped polysilicon layer close to the front tunneling oxide layer is 5~20 nm, and the grain size on the side close to the first silicon nitride passivation layer is 30~80 nm. The small-grain region (5~20 nm) increases the grain boundary density and promotes hydrogen passivation sites. The large-grain region (30~80 nm) reduces grain boundary scattering and improves the electron mobility. The present invention realizes precise control through dynamic LPCVD doping and is perfectly compatible with the laser-oxidized silicon passivation layer.

[0013] Further, the silicon oxide layer in the second passivation layer includes a laser mask layer or a composite layer of a laser mask layer and a tunneling oxide layer, and the thickness of the silicon oxide layer is 1~5 nm. The laser mask layer is formed by laser-induced oxidation or laser-assisted deposition. It can not only act as a protective layer to prevent p-poly doping during annealing but also remain as a functional passivation layer. This non-contact processing avoids the contamination and damage caused by traditional mask processes. Combined with the alkali washing process, the remaining thickness can be precisely controlled, ensuring excellent chemical passivation effects while not hindering carrier tunneling.

[0014] Further, the refractive index difference between the laser mask layer and the front tunneling oxide layer is ≤0.005. Through the precise coordinated control of laser process parameters (energy density 0.3~0.5 J / cm 2 , O 2 partial pressure 10~50 Pa) and the ALD deposition temperature (300±5 °C), it is ensured that the two silicon oxide layers have the same stoichiometry (O / Si≈2.0) and density (>2.2 g / cm 3 ). The weighted reflectivity of the second passivation layer is ≤5% (wavelength 300~1200 nm), and the interface state density Dit≤5×10 10 eV -1 cm -2 . The extremely low interface defects not only significantly reduce the surface recombination rate but also make the fixed negative charge distribution in the alumina layer more uniform.

[0015] Specifically, in order to ensure that the deposition of the poly structure on the front side does not affect the non-contact area and enables it to be removed in subsequent steps, it is usually necessary to retain BSG here. The difficulty of the present invention is to add silicon oxide only in the front non-contact area without affecting the contact area. Specifically, there is no BSG in the front non-contact area when depositing poly on the front side, and the laser mask and the tunneling oxide layer together serve as the barrier layer for the non-contact area during the deposition of poly in the front contact area. It can be used as a protective layer to prevent p-poly doping during annealing and be retained as a functional passivation layer in subsequent steps.

[0016] Further, the alumina and silicon nitride in the second passivation layer are generated synchronously with the first passivation layer. The thickness of the alumina is 1 - 3 nm, the thickness of the silicon nitride is 70 - 100 nm, and the refractive index of the silicon nitride is 1.9 - 2.0. Through the synergistic process of atomic layer deposition (ALD) and plasma-enhanced chemical vapor deposition (PECVD), the alumina and silicon nitride can be continuously deposited in the same equipment cavity, eliminating the risk of interface contamination in the traditional step-by-step process. The precise control of the ultra-thin alumina layer ensures the acquisition of a high density of fixed negative charges. At the same time, the silicon nitride layer with a refractive index of 1.9 - 2.0 achieves the balance of the optimal antireflection effect and the hydrogen passivation function by precisely regulating the SiH 4 / NH 3 flow ratio (1:3 - 1:5), ensuring that the weighted reflectivity of the second passivation layer ≤ 5%.

[0017] Further, the thickness of the phosphorus-doped polysilicon layer is 40 - 100 nm. In the phosphorus-doped polysilicon layer, the phosphorus concentration increases linearly from the inside to the outside. The phosphorus concentration near the back tunneling oxide layer is 5×10 19 ~1×10 20 atoms / cm 3 , and the outer phosphorus concentration is 8×10 20 ~1×10 21 atoms / cm 3 . An electron transport channel is constructed on the back through the linearly increasing phosphorus concentration distribution: the lower doping concentration near the tunneling oxide layer effectively reduces the interface barrier, and at the same time significantly reduces the damage of phosphorus diffusion to the tunneling oxide layer, while the high-concentration doping on the surface layer forms a perfect ohmic contact, reducing the contact resistance. The gradient doping suppresses the lattice distortion caused by high-concentration phosphorus, reduces the stress of the polysilicon layer, and improves the film adhesion.

[0018] Further, the back passivation layer is alumina and silicon nitride, and the thickness of the back passivation layer is 70 - 100 nm, and the refractive index is 1.9 - 2.0.

[0019] Further, the gate line width of the front electrode is 15 - 30 μm, and the gate line width of the back electrode is 20 - 40 μm.

[0020] The second object of the present invention is to provide a preparation method of a double-sided TOPCon cell based on front-side selective doping, which has the same technical effects.

[0021] In order to achieve the above object, the technical solution adopted by the present invention is as follows: A preparation method of a double-sided TOPCon cell based on front-side selective doping, comprising the following steps: S1: Surface treatment of the N-type silicon wafer and double-sided texturing; S2: Boron diffusion is carried out on the front side of the silicon wafer after the texturing surface is prepared; at this time, the front side is textured silicon + boron diffusion layer + BSG, the back side is textured silicon, and it also includes the lateral diffusion generated during the front-side boron diffusion. S3: Laser patterning is carried out on the front side to define the contact area and the non-contact area; specifically, BSG modification is carried out to loosen or remove the BSG in the contact area. At this time, the front side is divided into the contact area and the non-contact area, where the non-contact area includes textured silicon + boron diffusion layer + BSG, and the contact area includes textured silicon + boron diffusion layer (or + residual BSG), and the back side remains unchanged. S4: Pickling is used to remove the lateral diffusion on the back side and around, as well as the BSG in the front-side contact area; at this time, the lateral diffusion generated during the boron diffusion in the S2 step on the back side is removed by pickling, the back side is textured silicon, the residual BSG in the front-side contact area is removed by pickling, the contact area includes textured silicon + boron diffusion layer, and the BSG in the front-side non-contact area remains to provide protection, and the non-contact area remains unchanged. S5: Polishing is carried out on the back side and the front-side contact area, and the front-side contact area is polished to the silicon wafer; at this time, the back side is a polished surface, the front-side contact area is bare silicon, and the front-side non-contact area remains unchanged. S6: Laser or pickling is used to remove the BSG in the front-side non-contact area, and a laser mask is prepared on the non-contact area; at this time, both the back side and the front-side contact area remain unchanged, and the front-side non-contact area includes textured silicon + boron diffusion layer + laser mask. S7: SiOx, p-poly, and mask oxide layer are sequentially deposited on the front side; at this time, the front-side contact area is SiOx + p-poly + mask oxide layer, the front-side non-contact area is textured silicon + boron diffusion layer + laser mask + SiOx + p-poly + mask oxide layer, the back side is a polished surface, and it also includes the overplating generated during the front-side deposition. S8: Pickling is used to remove the BSG on the back side and around, and alkali washing is used to remove the SiOx / p-poly overplating on the back side and around; at this time, the mask oxide layer, p-poly, and SiOx on the back side and around are sequentially removed, presenting a polished surface of bare silicon, and the front side remains unchanged. S9: Deposit SiOx, n-poly, and mask oxide layer on the back surface in sequence; at this time, the back surface is SiOx + n-poly + mask oxide layer, the front contact area is SiOx + p-poly + mask oxide layer, the front non-contact area is textured silicon + boron diffusion layer + laser mask + SiOx + p-poly + mask oxide layer, and it also includes the overplating generated during the back surface deposition; S10: Remove the phosphosilicate glass (PSG) on the front surface and around it by pickling, and remove the SiOx / n-poly overplating on the front surface and around it by alkali washing; at this time, the overplating (SiOx + n-poly + mask oxide layer) generated on the front surface during the back surface deposition is all removed, the front contact area is SiOx + p-poly + mask oxide layer, the front non-contact area is textured silicon + boron diffusion layer + laser mask + SiOx + p-poly + mask oxide layer, and the back surface remains unchanged; S11: Remove the BSG in the front non-contact area by laser, remove the p-poly deposition in the front non-contact area by alkali washing, remove the BSG and PSG on the front and back surfaces by pickling, and retain the silicon oxide with a thickness of ≥1 nm in the front non-contact area; at this time, the back surface is SiOx + n-poly, the front contact area is SiOx + p-poly, the front non-contact area is textured silicon + boron diffusion layer + laser mask + SiOx or textured silicon + boron diffusion layer + laser mask, where both the laser mask and SiOx are silicon oxide, and the silicon oxide with a thickness of ≥1 nm retained in this step serves as the silicon oxide layer of the second passivation layer, that is, a textured silicon + boron diffusion layer + silicon oxide structure is formed in the front non-contact area in this step; S12: Deposit aluminum oxide and silicon nitride on both sides in sequence and perform hydrogen plasma treatment; at this time, the back surface is SiOx + n-poly + aluminum oxide + silicon nitride, the front contact area is SiOx + p-poly + aluminum oxide + silicon nitride, and the front non-contact area is textured silicon + boron diffusion layer + silicon oxide + aluminum oxide + silicon nitride; S13: Perform screen printing, sintering, and test sorting. At this time, the back surface is SiOx + n-poly + silicon nitride + back electrode, the front contact area is SiOx + p-poly + aluminum oxide + silicon nitride + front electrode, and the front non-contact area is textured silicon + boron diffusion layer + silicon oxide + aluminum oxide + silicon nitride.

[0022] Preferably, in step S1, an N-type silicon wafer with a resistivity of 0.5-2 Ω·cm and a minority carrier lifetime > 10 ms is used. After removing the damage, texturing is carried out to form a surface light-trapping pyramid structure. The texturing solution is prepared by mixing KOH and an additive in a volume ratio of 4-10:1. The additive contains isopropanol and a surfactant. Specifically, the N-type silicon wafer is subjected to anisotropic etching on both sides at 75-85 °C for about 4-6 min, and the silicon wafer thinning amount is controlled at 0.1-0.3 g. The surface metal contamination is removed by ultrasonic-assisted cleaning, and finally a uniform pyramid texture structure is formed. The pyramid height is 0.5-2 μm, and the coverage rate ≥ 95%.

[0023] Preferably, in step S2, a tube diffusion furnace is used, with BBr 3 as the boron source, and doping drive-in and oxidation are carried out at 850-1100 °C, with an oxygen flow rate of 1.5 L / min and a time of 30 min. The BSG thickness is controlled at 90-150 nm, the doping sheet resistance is controlled at 200-400 ohm / sq, the junction depth is 0.2-0.5 μm, and the peak concentration of boron atoms is 1×10 18 ~1×10 19 atoms / cm 3 .

[0024] Preferably, in step S3, a green skin / green sodium / purple skin / purple sodium laser is used to modify the BSG, and the BSG in the contact area is loosened or removed. The laser area is the grid line printing area, and 80-200 μm is removed from this area by laser, while the non-laser area is retained.

[0025] Preferably, in step S4, a chain cleaner with an HF concentration volume ratio of 30%-50% is used to remove the BSG layer on the back and sides, and a tank-type HF dip (2%-15%) is used to clean and remove the residual BSG in the front contact area.

[0026] Preferably, in step S5, the etching solution used for back polishing is prepared by mixing KOH and an additive in a volume ratio of 6-10:1. The polishing temperature is maintained at 75-85 °C for about 3-8 min, and the thinning amount is controlled at 0.1-0.3 g, and the Ra roughness is reduced to 0.3-0.5 nm. The front contact area is subjected to fixed-point etching with HF / HNO 3 (1:3) mixed acid for 30 s to remove the BSG and the boron diffusion layer in this area, and the Ra of the bare silicon surface < 1 nm.

[0027] In this step, the contact surface is directly polished to the silicon wafer. The cleaning window is wider and the controllability is higher, which can make the silicon wafer surface present a more pure and flat state, conducive to forming a good metal-semiconductor contact, reducing the contact resistance, thereby improving the fill factor and conversion efficiency of the battery, and avoiding the increase in contact resistance caused by the possible boron diffusion layer in the contact area during subsequent metallization and other processes. And it can effectively reduce the recombination of carriers, improve the collection efficiency of carriers, and then enhance the photovoltaic conversion performance of the battery.

[0028] Preferably, in step S6, the BSG in the non-contact area is selectively removed to expose the underlying p+-doped silicon surface. Then, a silicon oxide (SiO 2 ) laser mask is prepared to protect the non-contact area from overplating during subsequent deposition processes and serve as part of the passivation layer.

[0029] Specifically, pulsed nanosecond laser is used to selectively remove the BSG in the non-contact area while minimizing the thermal affected zone to prevent lattice damage on the silicon surface. After removing the BSG in the non-contact area, the underlying high-concentration boron diffusion layer is exposed, providing a low-recombination interface for the subsequent passivation layer. The silicon surface after laser treatment is quickly rinsed with dilute HF (1% - 2%) to remove laser oxidation residues and ensure the interface cleanliness for subsequent SiO 2 deposition. Or the same pickling solution as in step S4 is used to pickle and remove the BSG in the non-contact area after polishing to better protect the textured surface of the non-contact area.

[0030] Then, ultraviolet laser with a wavelength of 266 nm is used in situ to induce silicon surface oxidation in an O 2 atmosphere of 10 - 50 Pa to grow an ultrathin SiO 2 layer with a thickness of 1 - 4 nm. The energy density is 0.3 - 0.5 J / cm 2 , the scanning speed is 10 - 50 mm / s, and the thickness fluctuation is ±0.2 nm. Through precise control of laser parameters, the stoichiometric ratio (O / Si ≈ 2.0) and thickness uniformity of SiO 2 are ensured.

[0031] Preferably, in step S7, when depositing SiOx on the front side, SiOx grows in the entire area of the contact area and the non-contact area. The silicon oxide in the contact area serves as the front tunneling oxide layer, and the silicon oxide in the non-contact area is superimposed with the laser mask in step S6 as the silicon oxide passivation layer to prevent p-poly doping from affecting the boron diffusion layer in the non-contact area.

[0032] Preferably, in step S7, the gradient deposition of the boron-doped polysilicon layer is achieved by dynamically adjusting the boron source flow rate in the LPCVD reaction chamber. Specifically, BBr is dynamically adjusted in the LPCVD reaction chamber 3Flow rate (10 - 100 sccm), deposit p-poly with a thickness of 50 - 300 nm at 600 °C. Subsequently, anneal at 850 - 950 °C, and the grain size increases from 5 nm (near silicon oxide) to 80 nm (surface), with a boron concentration gradient of 1×10 19 ~8×10 20 atoms / cm 3 , the deposition thickness of SiOx is 1 - 2 nm, the deposition thickness of p-poly is 50 - 300 nm, and the outer layer mask oxide is BSG with a thickness of 10 - 100 nm.

[0033] Preferably, in step S8, use a chain cleaner with an HF concentration by volume of 30% - 50% to remove the BSG layer on the back and sides. Use an alkaline solution (KOH: additive = 6 - 10:1) for etching and polishing to remove the SiOx / p-poly overplating on the back and around.

[0034] Preferably, in step S9, deposit SiOx, n-poly, and mask oxide layer on the back in sequence; use the method of LPCVD + phosphorus diffusion or PECVD + annealing to prepare the back structure. The back structure is a conventional single-layer SiOx / n-poly structure. Among them, the thickness of SiOx is 1 - 2 nm, the thickness of n-poly is 40 - 100 nm, and the peak concentration of effective phosphorus atoms is 1 - 8×10 20 atoms / cm 3 , and the inflection point concentration is 5 - 9×10 18 atoms / cm 3 .

[0035] Preferably, in step S10, use a chain cleaner with an HF concentration by volume of 5% - 30% to remove the PSG layer on the front and sides, and use alkali washing to remove the n-poly overplating on the non-contact area of the front and sides.

[0036] Preferably, in step S11, use laser to remove the BSG in the non-contact area of the front, use alkali washing to remove the p-poly deposition in the non-contact area of the front, the alkali washing solution is a 5% - 10% potassium hydroxide (KOH) solution, the cleaning time is 30 - 60 s, use acid washing to remove the BSG and PSG on the front and back, and retain silicon oxide with a thickness of ≥1 nm in the non-contact area of the front; the thickness of the SiOx retained in step S11 is 1 - 4 nm.

[0037] Preferably, in step S12, the deposition thickness of alumina is 1 - 3 nm, the deposition thickness of silicon nitride on the front is 70 - 100 nm, the deposition thickness of silicon nitride on the back is 70 - 100 nm, the refractive index is 1.9 - 2.0, the hydrogen plasma treatment mainly treats the front, the temperature is 350 - 450 °C, and the treatment time is 5 - 15 min.

[0038] Preferably, in step S13, the peak sintering temperature of the silver paste for screen-printing the electrode is 800 - 850 °C.

[0039] Advantages of the present invention: (1) For the non-contact area of the battery prepared by the present invention, a "laser-oxidized silicon + ALD Al 2 O 3 + SiNx" composite passivation structure is adopted, realizing the synergistic improvement of optical and electrical properties. Laser-oxidized silicon serves as the bottom passivation interface, and its denseness and the fixed negative charges of alumina jointly inhibit surface recombination. After adding the upper-layer SiNx, the weighted reflectivity is controlled within 5%. Compared with traditional single passivation, the present invention achieves an efficiency gain of ≥ 1.0% (absolute value) through refractive index matching and ultra-thin layer control, and is also compatible with the requirements of double-sided power generation at the same time.

[0040] (2) The suede structure is retained in the front non-contact area of the present invention. Combining with the low-reflection characteristics of the composite passivation layer, efficient absorption of incident light is achieved; while the polished surface in the contact area is conducive to forming a good metal-semiconductor contact, reducing the contact resistance, thereby improving the fill factor and conversion efficiency of the battery, and avoiding the situation where the contact resistance increases due to the possible boron diffusion layer in the contact area during subsequent metallization and other processes. And it can effectively reduce the recombination of carriers, improve the collection efficiency of carriers, and further enhance the optoelectronic conversion performance of the battery.

[0041] (3) Through the synergistic application of laser-induced oxidation and atomic layer deposition technologies, precise control of the passivation layers in the non-contact area and the contact area is achieved. The thickness co-design of the ultra-thin silicon oxide layer (laser mask) generated in step S6 and the tunneling oxide layer ensures the p-poly doping in the front non-contact area during annealing, and it is also retained as part of the passivation layer through the alkali washing in step S11. In this application, the refractive index difference between the tunneling oxide layer and the laser-oxidized silicon is strictly controlled to be ≤ 0.005, effectively reducing the interface light reflection. In addition, the laser thermal damage is repaired through hydrogen plasma treatment, reducing the interface state density, and significantly improving the passivation quality and mass production compatibility. Description of the Drawings

[0042] In order to more clearly illustrate the technical solutions in the embodiments of the present invention or the prior art, the following will briefly introduce the drawings required for use in the description of the embodiments or the prior art. Obviously, the drawings described below are only some embodiments recorded in the present invention. For those of ordinary skill in the art, other drawings can also be obtained based on these drawings without creative efforts.

[0043] Figure 1 It is a schematic diagram of the battery structure in Embodiment 1 of the present invention; Figure 2 is Figure 1 a partial enlarged view of area A in Figure 3 is a flowchart for preparing the battery structure in Embodiment 1 of the present invention; Reference numerals: 01, N-type silicon wafer; 10, front side; 11, contact area; 12, non-contact area; 13, front tunneling oxide layer; 14, boron-doped polysilicon layer; 15, silicon oxide layer; 16, front aluminum oxide layer; 17, front silicon nitride layer; 18, front electrode; 19, boron diffusion layer; 20, back side; 21, back tunneling oxide layer; 22, phosphorus-doped polysilicon layer; 23, back aluminum oxide layer; 24, back silicon nitride layer; 25, back electrode. Detailed implementation manners

[0044] To further elaborate on the technical means and effects adopted by the present invention to achieve the intended invention purpose, a double-sided TOPCon battery based on front-side selective doping and its preparation method according to the present invention will be described in detail below in terms of its specific implementation manners, features, and effects.

[0045] In the embodiments of the present invention, the sources of commercially available materials are as follows: ; Embodiment 1: As Figure 1 and Figure 2 shown, a double-sided TOPCon battery based on front-side selective doping includes an N-type silicon wafer 01, and the N-type silicon wafer 01 includes a relative front side 10 and a back side 20; The front side 10 is divided into a contact area 11 and a non-contact area 12. The contact area 11, from the inside to the outside, is successively a front tunneling oxide layer 13, a boron-doped polysilicon layer 14, a first passivation layer, and a front electrode 18; the non-contact area 12, from the inside to the outside, is successively a boron diffusion layer 19 and a second passivation layer; The first passivation layer includes a front aluminum oxide layer 16 and a front silicon nitride layer 17 which are successively arranged from the inside to the outside, and the second passivation layer includes a silicon oxide layer 15, a front aluminum oxide layer 16, and a front silicon nitride layer 17 which are successively arranged from the inside to the outside; The back side 20 is successively a back tunneling oxide layer 21, a phosphorus-doped polysilicon layer 22, a back aluminum oxide layer 23, a back silicon nitride layer 24, and a back electrode 25.

[0046] The surface of the non-contact area 12 has a nano-textured surface structure, and the reflectivity of the textured surface structure ≤ 10%. The surface of the contact area 11 is a polished surface, and the Ra of the polished surface ≤ 1 nm.

[0047] The silicon oxide layer in the second passivation layer is a composite layer including a laser mask layer and a tunneling oxide layer, and the thickness of the silicon oxide layer is 3 nm. The laser mask layer is formed by laser-induced oxidation or laser-assisted deposition. The refractive index difference between the laser mask layer and the front tunneling oxide layer is ≤ 0.005. The weighted reflectivity of the second passivation layer is ≤ 5% (wavelength 300 - 1200 nm), and the interface state density Dit is ≤ 5×10 10 eV -1 cm -2 。

[0048] Such as Figure 3 , a preparation method of a double-sided TOPCon battery based on front selective doping, comprising the following steps: S1. Use an N-type silicon wafer with a resistivity of 0.5 - 2 Ω·cm and a minority carrier lifetime > 10 ms. After removing the damage, texture it to form a pyramid structure for surface light trapping. The texturing solution is prepared by mixing KOH and an additive in a volume ratio of 6:1. The additive contains isopropanol and a surfactant. Specifically, perform anisotropic etching on both sides of the N-type silicon wafer at 80 °C for 5 min, and control the silicon wafer thinning amount at 0.2 g. Remove surface metal contamination through ultrasonic-assisted cleaning, and finally form a uniform pyramid texture structure. The pyramid height is 0.1 μm, and the coverage rate is ≥ 95%.

[0049] S2. Use a tube diffusion furnace, with BBr 3 as the boron source, perform doping push and oxidation at 1050 °C, with an oxygen flow rate of 1.5 L / min and a time of 30 min. Control the BSG thickness at 120 nm, the doping sheet resistance at 350 ohm / sq, the junction depth at 0.3 μm, and the peak concentration of boron atoms at 3×10 18 atoms / cm 3 。

[0050] S3. Use a green laser to modify the BSG, loosen or remove the BSG in the contact area. The laser area is the grid line printing area, and 100 μm is removed from this area by laser, while the non-laser area is retained.

[0051] S4. Use a chain cleaner with a HF concentration volume ratio of 40% to remove the BSG layer on the back and sides, and use a tank-type HF dip (4%) to clean and remove the residual BSG in the front contact area.

[0052] S5. The etching solution used for back polishing is prepared by mixing KOH and an additive in a volume ratio of 7:1. Maintain the polishing temperature at 80 °C for 5 min, control the thinning amount at 0.15 g, and reduce the Ra roughness to 0.5 nm. Use HF / HNO 3 (1:3) mixed acid for fixed-point etching in the front contact area, with an etching time of 30 s, to remove the BSG and the boron diffusion layer in this area.

[0053] S6. Remove the BSG in the non-contact area by pickling to expose the underlying p+-doped silicon surface. Then prepare a silicon oxide (SiO 2 ) laser mask to protect the non-contact area from overplating during subsequent deposition processes and serve as part of the passivation layer.

[0054] S7. When depositing SiOx on the front side, SiOx grows over the entire contact area and non-contact area. The silicon oxide in the contact area serves as the front tunneling oxide layer, and the silicon oxide in the non-contact area is stacked with the laser mask in step S6 to form the silicon oxide passivation layer. The gradient deposition of the boron-doped polysilicon layer is achieved by dynamically adjusting the boron source flow rate in the LPCVD reaction chamber. Specifically, dynamically adjust the BBr 3 flow rate (10 - 100 sccm) in the LPCVD reaction chamber, and deposit a 150 nm thick p-poly at 600 °C. Subsequently, anneal at 910 °C, and the grain size increases from 5 nm (near the silicon oxide) to 80 nm (surface), and the peak concentration of effective boron atoms is 5×10 20 atoms / cm 3 . The deposition thickness of SiOx is 1.5 nm, the deposition thickness of p-poly is 150 nm, and the outer layer mask oxide layer is 80 nm thick BSG.

[0055] S8. Use a chain cleaner with a 40% HF concentration by volume to remove the BSG layer on the back and sides. Use an alkaline solution (KOH: additive = 8:1) to etch and polish to remove the overplating of SiOx / p-poly on the back and around.

[0056] S9. Deposit SiOx, n-poly, and mask oxide layer on the back in sequence; prepare the back structure by LPCVD + phosphorus diffusion. The back structure is a conventional single-layer SiOx / n-poly structure. Among them, the thickness of SiOx is 1.5 nm, the thickness of n-poly is 60 nm, and the peak concentration of effective phosphorus atoms is 3×10 20 atoms / cm 3 , and the inflection point concentration is 8×10 18 atoms / cm 3 .

[0057] S10. Use a chain cleaner with a 15% HF concentration by volume to remove the PSG layer on the front and sides, and use alkaline cleaning to remove the overplating of n-poly on the front non-contact area and sides.

[0058] S11. The front side is modified with a green laser for BSG, removing the BSG in the non-contact area, and alkali washing to remove the p-poly deposition in the non-contact area on the front side. The alkali washing solution is 5% KOH solution, and the washing time is 30 - 60 s. Immerse and pickle with 10% concentration of HF to remove BSG and PSG on the front and back sides, and retain silicon oxide with a thickness of ≥1 nm in the non-contact area on the front side; the thickness of the SiOx retained in step S11 is 3 nm.

[0059] S12. Use the ALD method to passivate both sides with alumina, the thickness of the alumina is 3 nm, the deposition thickness of silicon nitride is 80 nm, the temperature of hydrogen plasma treatment is 400 °C, and the treatment time is 10 min.

[0060] S13. Screen-print the main / auxiliary grid lines on the front / back sides, sinter to form an ohmic contact, use light injection to improve passivation and light decay, and use LECO laser to enhance the passivation contact performance.

[0061] Comparative Example 1 A double-sided TOPCon cell based on front-side selective doping, including an N-type silicon wafer, and the silicon wafer includes opposite front and back sides; The front side is divided into a contact area and a non-contact area. The contact area, from inside to outside, is successively a front-side tunneling oxide layer, a boron-doped polysilicon layer, an alumina layer, a silicon nitride layer, and a front-side electrode; the non-contact area, from inside to outside, is successively a boron diffusion layer, a front-side alumina layer, and a front-side silicon nitride layer; The back side of the silicon wafer is successively a back-side tunneling oxide layer, a phosphorus-doped polysilicon layer, a back-side alumina layer, a back-side silicon nitride layer, and a back-side electrode. The surface of the non-contact area has a nano-textured surface structure, and the reflectivity of the textured surface structure is ≤10%. The surface of the contact area is a polished surface, and the Ra of the polished surface is ≤1 nm.

[0062] A preparation method of a double-sided TOPCon cell based on front-side selective doping, including the following steps: S1. Use an N-type silicon wafer with a resistivity of 0.5 - 2 Ω·cm and a minority carrier lifetime >10 ms. After removing the damage, perform texturing to form a pyramid structure for surface light trapping. The texturing solution is prepared by mixing KOH and an additive in a volume ratio of 6:1. The additive contains isopropyl alcohol and a surfactant. Specifically, perform anisotropic etching on both sides of the N-type silicon wafer at 80 °C for 5 min, and control the silicon wafer thinning amount at 0.2 g. Remove surface metal contamination through ultrasonic-assisted cleaning, and finally form a uniform pyramid textured surface structure. The height of the pyramid is 0.1 μm, and the coverage rate is ≥95%.

[0063] S2. Use a tube diffusion furnace with BBr 3Using boron source, doping drive and oxidation were carried out at 1050 °C, with an oxygen flow rate of 1.5 L / min and a time of 30 min. The BSG thickness was controlled at 120 nm, the doping sheet resistance was controlled at 350 ohm / sq, the junction depth was 0.3 μm, and the peak concentration of boron atoms was 3×10 18 atoms / cm 3 .

[0064] S3. Use a green laser to modify BSG, making the BSG in the contact area loose or removed. The laser area is the grid line printing area, and 100 μm is removed from this area by laser, while the non-laser area is retained.

[0065] S4. Use a chain cleaner with a HF concentration of 40% by volume to remove the BSG layer on the back and sides, and use a tank-type HF dip (4%) to clean and remove the residual BSG in the front contact area.

[0066] S5. The etching solution used for back polishing is prepared by mixing KOH and additives in a volume ratio of 7:1. The polishing temperature is maintained at 80 °C, the time is 5 min, the thinning amount is controlled at 0.15 g, and the Ra roughness is reduced to 0.5 nm. The front contact area uses HF / HNO 3 (1:3) mixed acid fixed-point etching, with an etching time of 30 s, to remove the BSG and the boron diffusion layer in this area.

[0067] S6. The gradient deposition of the boron-doped polysilicon layer is achieved by dynamically adjusting the boron source flow rate in the LPCVD reaction chamber. Specifically, the BBr 3 flow rate (10 - 100 sccm) is dynamically adjusted in the LPCVD reaction chamber, and a p-poly with a thickness of 150 nm is deposited at 600 °C. Subsequently, annealing is carried out at 910 °C, and the grain size increases from 5 nm to 80 nm. The peak concentration of effective boron atoms is 5×10 20 atoms / cm 3 , the deposition thickness of SiOx is 1.5 nm, the deposition thickness of p-poly is 150 nm, and the outer layer mask oxide layer is BSG with a thickness of 80 nm.

[0068] S7. Use a chain cleaner with a HF concentration of 40% by volume to remove the BSG layer on the back and sides. Use an alkaline solution (KOH:additive = 8:1) to etch and polish to remove the SiOx / p-poly overplating on the back and around.

[0069] S8. Deposit SiOx, n-poly, and mask oxide layer on the back in sequence; use the LPCVD + phosphorus diffusion method to prepare the back structure. The back structure is a conventional single-layer SiOx / n-poly structure. Among them, the thickness of SiOx is 1.5 nm, the thickness of n-poly is 60 nm, and the peak concentration of effective phosphorus atoms is 3×1020 atoms / cm 3 and the inflection point concentration is 8×10 18 atoms / cm 3 .

[0070] S9. Use a chain cleaning machine with a HF concentration volume ratio of 15% to remove the PSG layer on the front and sides, and use alkali cleaning to remove the n-poly overplating on the non-contact area of the front and sides.

[0071] S10. Use a green laser on the front for BSG modification to remove the BSG in the non-contact area, and use alkali cleaning to remove the p-poly deposition in the non-contact area of the front. The alkali cleaning solution is a 5% potassium hydroxide (KOH) solution, and the cleaning time is 30 - 60 s. Immerse and pickle with 0% concentration of HF to remove the BSG and PSG on the front and back. S11. Use the ALD method to prepare alumina passivation on both sides. The thickness of the alumina is 3 nm, the deposition thickness of the silicon nitride is 80 nm, and the refractive index is 1.95.

[0072] S12. Screen-print the main / auxiliary grid lines on the front / back, sinter to form an ohmic contact, use light injection to improve passivation and light-induced degradation, and use LECO laser to enhance the passivation contact performance.

[0073] Battery performance test results Characterize the blue film structure of the examples, that is, test before preparing the electrode. The performance test results are shown in Table 1: This data is the blue film data of the battery structure, and this data can reflect that the scheme is feasible.

[0074] Table 1 Example Voc [mV] FF [%] Eta [%] Conventional TOPCon cell structure - - - Example 1 10 1.2 0.65 Comparative Example 1 3 0.16 0.18 From the above data, it can be seen that the difference between Example 1 of this application and Comparative Example 1 is that this application sets a silicon oxide layer in the non-contact area, while Comparative Example 1 does not. That is, the passivation of the non-contact area of this application includes a silicon oxide layer, an alumina layer, and a silicon nitride layer, while Comparative Example 1 only has an alumina layer and a silicon nitride layer. Laser-oxidized silicon serves as the bottom passivation interface, and its denseness and the fixed negative charges of alumina jointly inhibit surface recombination. The retained textured structure in the non-contact area, combined with the low reflection characteristics of the composite passivation layer, realizes the efficient absorption of incident light. And the polished surface in the contact area is conducive to forming a good metal-semiconductor contact, reducing the contact resistance, thereby improving the fill factor and conversion efficiency of the battery, and avoiding the increase in contact resistance caused by the possible boron diffusion layer in the contact area during subsequent metallization and other processes. And it can effectively reduce the recombination of carriers, improve the collection efficiency of carriers, and thus improve the photoelectric conversion performance of the battery.

[0075] Therefore, the experimental results of this application are better than those of Comparative Example 1. However, it is obvious that the data of Comparative Example 1 are better than those of conventional TOPCon, which also reflects that bifacial cells are superior to single-sided cells.

[0076] Those skilled in the art should understand that the present invention is not limited by the above embodiments. What is described in the above embodiments and the specification is only to illustrate the principle of the present invention. Without departing from the spirit and scope of the present invention, the present invention will have various changes and improvements, and these changes and improvements all fall within the scope of the present invention claimed. The scope of the present invention claimed is defined by the appended claims and their equivalents.

Claims

1. A double-sided TOPCon cell based on front selective doping, characterized in that: An N-type silicon wafer is included, wherein the silicon wafer includes a front side and a back side opposite to each other; The front side is divided into a contact area and a non-contact area, and the contact area is composed of a front tunneling oxide layer, a boron-doped polysilicon layer, a first passivation layer, and a front electrode from the inside to the outside. The non-contact area is composed of a boron diffusion layer and a second passivation layer from inside to outside; The first passivation layer includes an aluminum oxide layer and a silicon nitride layer arranged in sequence from the inside to the outside, and the second passivation layer includes a silicon oxide layer, an aluminum oxide layer and a silicon nitride layer arranged in sequence from the inside to the outside; The back side of the silicon wafer is sequentially provided with a back tunneling oxide layer, a phosphorus-doped polysilicon layer, a back passivation layer and a back electrode.

2. A double-sided TOPCon cell based on front selective doping according to claim 1, characterized in that: The surface of the non-contact area has a nano-suede structure, and the surface of the contact area is a polished surface.

3. A double-sided TOPCon cell based on front selective doping according to claim 2, characterized in that: The silicon oxide layer in the second passivation layer includes a laser mask layer or a composite layer of a laser mask layer and a tunneling oxide layer, and the thickness of the silicon oxide layer is 1-4 nm.

4. A double-sided TOPCon cell based on front selective doping according to claim 3, characterized in that: The refractive index difference between the laser mask layer and the front tunneling oxide layer is ≤0.

005.

5. A double-sided TOPCon cell based on front selective doping according to claim 4, characterized in that: The weighted reflectivity of the second passivation layer is ≤5%.

6. A double-sided TOPCon cell based on front selective doping according to claim 2, characterized in that: The boron concentration of the boron-doped polysilicon layer increases exponentially from the inside to the outside, and the boron concentration of the boron-doped polysilicon layer close to the front tunnel oxide layer is 1×10 19 ~5×10 19 atoms / cm 3 The boron concentration near the first silicon nitride passivation layer is 5×10 20 ~1×10 21 atoms / cm 3 .

7. A double-sided TOPCon cell based on front selective doping according to claim 6, characterized in that: The grain size of the boron-doped polysilicon layer on a side close to the front tunneling oxide layer is 5-20 nm, and the grain size of the boron-doped polysilicon layer on a side close to the first silicon nitride passivation layer is 30-80 nm.

8. A double-sided TOPCon cell based on front selective doping according to claim 1, characterized in that: The phosphorus concentration in the phosphorus-doped polysilicon layer increases linearly from the inside to the outside, and the phosphorus concentration near the back tunnel oxide layer is 5×10 19 ~1×10 20 atoms / cm 3 , the outer phosphorus concentration is 8×10 20 ~1×10 21 atoms / cm 3 .

9. The method for preparing a double-sided TOPCon cell based on front selective doping according to claim 1, characterized in that: The steps include: S1: N-type silicon wafer surface treatment and double-sided texturing; S2: Boron diffusion is performed on the front side of the silicon wafer after the textured surface is prepared; S3: Laser patterning the front surface to define the contact area and the non-contact area; S4: Pickling to remove BSG on the back and surrounding areas, as well as the front contact area; S5: polishing the back and front contact areas, wherein the front contact area is polished to the silicon wafer; S6: removing the BSG in the front non-contact area and preparing a laser mask on the non-contact area; S7: depositing SiOx, p-poly, and mask oxide layers in sequence on the front side; S8: acid pickling to remove BSG on the back and around, and alkali pickling to remove SiOx / p-poly plating on the back and around; S9: depositing SiOx, n-poly, and mask oxide layers on the back side in sequence; S10: Pickling to remove PSG on the front and surrounding areas, and alkali washing to remove SiOx / n-poly plating on the front and surrounding areas; S11: laser removal of BSG in the front non-contact area, alkaline washing to remove p-poly deposition in the front non-contact area, acid washing to remove BSG and PSG on the front and back sides, and retaining silicon oxide with a thickness of ≥1nm in the front non-contact area; S12: depositing aluminum oxide and silicon nitride on both sides in sequence, and performing hydrogen plasma treatment; S13: screen printing, sintering and test sorting.

10. The method for preparing a double-sided TOPCon cell based on front selective doping according to claim 9, characterized in that: In step S7, when SiOx is deposited on the front side, SiOx grows in the entire contact area and the non-contact area. The silicon oxide in the contact area serves as a front tunneling oxide layer, and the silicon oxide in the non-contact area is superimposed on the laser mask in step S6 as a silicon oxide passivation layer.

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