Phototransistor with gate medium photosensitive interlayer

Abstract

The invention relates to a phototransistor with a gate dielectric photosensitive interlayer, and belongs to the technical field of electronic devices. The gate medium photosensitive interlayer is composed of an insulated gate medium A, an insulated gate medium B and a photosensitive layer, the photosensitive layer is located between the insulated gate medium A and the insulated gate medium B, and the photosensitive layer is not in direct contact with a gate and a channel layer in the phototransistor through the insulated gate medium A and the insulated gate medium B. By applying voltage between the grid electrode and the channel layer, the electric field intensity in the gate dielectric photosensitive interlayer can be changed, and the purposes of changing the carrier concentration of the channel, regulating and controlling the conductivity of the channel and achieving the photoelectric response of the photoelectric transistor are achieved. Through the gate dielectric photosensitive sandwich structure, materials can be flexibly selected to prepare the transistor, and the performance is regulated and controlled; meanwhile, the photosensitive layer is not subjected to the pinning effect of the channel and the grid electrode, the electric field intensity of the photosensitive layer is larger, the regulation and control range of an energy band is larger, and higher photoresponsivity and wider photoresponse dynamic range are achieved.

Description

Technical Field

[0001] The present invention belongs to the technical field of electronic devices and relates to a phototransistor with a gate dielectric photosensitive sandwich layer. Background Art

[0002] As a kind of optoelectronic device, a phototransistor can convert an optical signal into an electrical signal response and has wide applications in the fields of optical signal detection, optical communication, and optoelectronic control. According to its structure, a phototransistor is divided into a field-effect phototransistor and a bipolar phototransistor. The performance of a field-effect phototransistor can be regulated not only by applying a gate voltage but also by light irradiation. For a field-effect phototransistor with a channel simultaneously serving as a light absorption layer, since the carrier concentration in the channel layer needs to be effectively regulated by the gate electric field, this limits its thickness, which is not conducive to improving its light absorption rate for light irradiation, and thus affects the light responsivity of the phototransistor.

[0003] To improve the light response performance of a phototransistor, existing technical solutions include directly depositing a photosensitive layer with a higher thickness and light absorption ability, such as a halide perovskite layer, PbS quantum dots, etc., on the channel or gate dielectric of the phototransistor. By using the separation and transfer of photo-generated carriers or the capture and release of trapped defect states in this photosensitive layer, through the optical gating effect, the light absorption rate is increased and the performance of the phototransistor is regulated.

[0004] However, in the current solutions of directly depositing a photosensitive layer on the channel or gate dielectric of a phototransistor, the separation and transfer of photo-generated carriers or the capture and release of trapped defect states strongly depend on the doping, space charge distribution, electric dipole, and energy band alignment state at the interface between the channel material and the photosensitive layer. This limits the flexibility and controllability of the preparation of the phototransistor. At the same time, since in these solutions, the deposited photosensitive layer is in direct contact with the gate metal electrode or the channel with a high density of states, the Fermi level of the photosensitive layer is pinned on this side, limiting the electric field strength in the photosensitive layer and the range of its energy band regulation under light irradiation, and reducing the light responsivity and light response range of the phototransistor. Summary of the Invention

[0005] In view of this, the purpose of the present invention is to provide a phototransistor with a gate dielectric photosensitive sandwich layer. By preparing a structure in which the photosensitive layer is sandwiched by the gate dielectric layer, it is allowed to flexibly select photosensitive layers, channel layers, and gate electrode materials with various bandgaps and electron affinities to prepare the phototransistor and regulate its performance. At the same time, since there is no pinning effect of the channel and the gate electrode on the photosensitive layer, the electric field strength in the photosensitive layer is greater, the regulation range of the energy band is larger, and it has a higher light responsivity and a wider light response dynamic range.

[0006] To achieve the above purpose, the present invention provides the following technical solutions:

[0007] An optoelectronic transistor with a gate dielectric photosensitive sandwich layer, the optoelectronic transistor having a gate dielectric photosensitive sandwich layer composed of an insulating gate dielectric A, an insulating gate dielectric B, and a photosensitive layer, wherein the photosensitive layer is located between the insulating gate dielectric A and the insulating gate dielectric B, and the photosensitive layer is not in direct contact with the gate and the channel layer in the optoelectronic transistor through the insulating gate dielectric A and the insulating gate dielectric B. And by applying a voltage between the gate and the channel layer, the electric field strength in the insulating gate dielectric layer A / photosensitive layer / insulating gate dielectric layer B can be changed. When the photosensitive layer absorbs light, the generated photo-generated electron-hole pairs will be separated under the action of the drift electric field in the photosensitive layer, and drift to the side close to the insulating gate dielectric layer A and the insulating gate dielectric layer B respectively, reducing the magnitude of the drift electric field in the photosensitive layer, and further changing the electric field strength distribution in the insulating gate dielectric layer A / photosensitive layer / insulating gate dielectric layer B, so as to achieve the purpose of changing the channel carrier concentration, regulating the channel conductance, and realizing the optoelectronic response of the optoelectronic transistor.

[0008] Furthermore, the optoelectronic transistor further includes a drain and a source. Among them, the channel layer is located above the substrate, and the drain and the source are located above the substrate and distributed on both sides of the channel layer; the gate dielectric photosensitive sandwich layer is located on the surface of the channel layer, and the gate is located on the surface of the gate dielectric photosensitive sandwich layer. The optoelectronic transistor further includes an insulating gate dielectric C and a back gate located between the channel layer and the substrate, the back gate is located on the surface of the substrate, and the insulating gate dielectric C is located on the surface of the substrate and covers the back gate.

[0009] Among them, at least one of the gate or the substrate is transparent or semi-transparent to ensure that the incident light energy can reach the photosensitive layer.

[0010] In another preferred embodiment of the present invention, the gate is located on the surface of the substrate; the gate dielectric photosensitive sandwich layer is located on the surface of the substrate, and one of the gate dielectric insulating layers covers the gate; the channel layer is located on the surface of the gate dielectric photosensitive sandwich layer, and the source and the drain are located on the surface of the gate dielectric photosensitive sandwich layer and distributed on both sides of the channel layer. The optoelectronic transistor further includes an insulating gate dielectric C and a top gate stacked in sequence on the surface of the channel layer.

[0011] Among them, at least one of the top gate or the substrate is transparent or semi-transparent to ensure that the incident light energy can reach the photosensitive layer.

[0012] In the optoelectronic transistor proposed by the present invention, the substrate material includes but is not limited to glass, quartz, sapphire, SiO2 / Si substrate, PET, PI, or a semiconductor material that is inverse to the channel, etc.

[0013] The channel material includes but is not limited to semiconductors and semi-metal materials such as silicon, germanium, GaAs, GaN, graphene, carbon nanotubes, MoS2, WSe2, black phosphorus, etc.

[0014] The source and drain materials can be metals, doped semiconductors, such as Ti, Al, Ni, Au, Cr, ITO, FTO, heavily doped polysilicon.

[0015] The insulating gate dielectric materials include but are not limited to inorganic and organic insulators such as aluminum oxide, silicon dioxide, silicon nitride, aluminum nitride, PMMA, Teflon, CYTOP, etc. or their composite layers. Among them, the insulating gate dielectric A and the insulating gate dielectric B can be the same insulator or different insulators.

[0016] The photosensitive layer should have a high light absorption rate, long carrier lifetime and long diffusion length. Its materials can be halide perovskites such as CsPbBr3, CsPbI3, MAPbI3, MAPbBr3, FAPbI3, and semiconductor materials such as PbS, PbI2, GaAs, Si, etc. or their heterojunction composite layers.

[0017] The gate materials can be metals, doped semiconductor materials, such as Ti, Al, Ni, Au, Cr, ITO, FTO, heavily doped polysilicon, etc.

[0018] The beneficial effects of the present invention are as follows: In the phototransistor proposed by the present invention, since the photosensitive layer is isolated by the insulating gate dielectric and does not directly contact the channel and the gate electrode, the following beneficial effects are obtained:

[0019] 1) By isolating the photosensitive layer through the insulating gate dielectric, the photosensitive layer in the phototransistor does not directly contact the channel and the gate electrode. Therefore, when fabricating the phototransistor, it is not necessary to consider the fine energy band alignment between the photosensitive layer and the channel and the gate electrode, which can improve the selection flexibility of the photosensitive material and the channel material during the fabrication process of the phototransistor and can improve the controllability of the fabrication process of the phototransistor.

[0020] 2) Since the photosensitive layer does not directly contact the gate electrode or the channel, the Fermi level of the photosensitive layer is prevented from being pinned on the gate electrode or channel side. Thus, the Fermi level of the photosensitive layer is not affected by the high-density carriers in the channel and the gate electrode, which helps to flexibly regulate the drift electric field in the photosensitive layer and regulate the performance of the phototransistor. In addition, since the Fermi level of the photosensitive layer is not pinned by the high-density carriers in the channel and the gate electrode, the drift electric field strength in the photosensitive layer is increased, and thus the light responsivity and the intensity dynamic range of the light response of the phototransistor can be improved.

[0021] Other advantages, objectives and features of the present invention will be described to some extent in the subsequent specification, and to some extent, will be obvious to those skilled in the art based on the study of the following text, or can be taught from the practice of the present invention. The objectives and other advantages of the present invention can be achieved and obtained through the following specification. Description of the Drawings

[0022] In order to make the objectives, technical solutions, and advantages of the present invention clearer, the present invention will be described in detail and preferably below in conjunction with the accompanying drawings, where:

[0023] Figure 1 It is a schematic diagram of the optoelectronic transistor structure for Embodiment 1;

[0024] Figure 2 It is a schematic diagram of the optoelectronic transistor structure for Embodiment 2;

[0025] Figure 3 It is a schematic diagram of the optoelectronic transistor structure for Embodiment 3;

[0026] Figure 4 It is a schematic diagram of the optoelectronic transistor structure for Embodiment 4;

[0027] Figure 5 It is a schematic diagram of the optoelectronic transistor structure for Embodiment 5;

[0028] Figure 6 (a) and Figure 6 (b) are respectively the drift electric field directions of the sensitization interlayer of the optoelectronic transistor in Embodiment 5 under different top gate voltages;

[0029] Figure 7 (a) and Figure 7 (b) are the channel current response curve graphs of optoelectronic transistors with different structures under 500 nm wavelength laser illumination and different top gate voltages;

[0030] Figure 7 (c) is the channel current response bar graph of optoelectronic transistors with different structures under 500 nm wavelength laser illumination and different top gate voltages. Specific Embodiments

[0031] The following illustrates the embodiments of the present invention through specific specific examples. Those skilled in the art can easily understand the other advantages and effects of the present invention from the content disclosed in this specification. The present invention can also be implemented or applied through other different specific embodiments. The details in this specification can also be modified or changed based on different viewpoints and applications without departing from the spirit of the present invention. It should be noted that the diagrams provided in the following embodiments only illustrate the basic concept of the present invention schematically. Without conflict, the following embodiments and the features in the embodiments can be combined with each other.

[0032] Among them, the accompanying drawings are only for illustrative purposes, showing only schematic diagrams, not physical diagrams, and should not be construed as limiting the present invention; in order to better illustrate the embodiments of the present invention, some components in the accompanying drawings will be omitted, enlarged, or reduced, which does not represent the size of the actual product; for those skilled in the art, it is understandable that some well-known structures and their descriptions in the accompanying drawings may be omitted.

[0033] In the drawings of the embodiments of the present invention, the same or similar reference numerals correspond to the same or similar components; in the description of the present invention, it should be understood that if there are terms such as "upper", "lower", "left", "right", "front", "rear", etc. indicating the orientation or positional relationship, they are based on the orientation or positional relationship shown in the drawings. This is only for the convenience of describing the present invention and simplifying the description, rather than indicating or implying that the device or element referred to must have a specific orientation, be constructed and operated in a specific orientation. Therefore, the terms describing the positional relationship in the drawings are only for illustrative purposes and cannot be construed as a limitation of the present invention. For those of ordinary skill in the art, the specific meanings of the above terms can be understood according to specific circumstances.

[0034] The basic structure of the phototransistor proposed by the present invention includes a source electrode, a drain electrode, a gate electrode, a channel layer, an insulating gate dielectric layer A, an insulating gate dielectric layer B, and a photosensitive layer. The channel layer is between the source electrode and the drain electrode, enabling the source electrode and the drain electrode to conduct electricity through the channel layer. The insulating gate dielectric layer A, the photosensitive layer, and the insulating gate dielectric layer B are stacked in sequence, and the whole constitutes a gate dielectric with a photosensitive sandwich structure, which is isolated between the gate electrode and the channel layer.

[0035] The design key point of the phototransistor proposed by the present invention is that the photosensitive layer does not directly contact the gate electrode or the channel layer, but is separated from the gate electrode or the channel layer by two insulating gate dielectric layers, forming a gate dielectric layer with a photosensitive sandwich structure of insulating gate dielectric layer A / photosensitive layer / insulating gate dielectric layer B, which is isolated between the gate electrode and the channel layer. By applying a voltage between the gate electrode and the channel layer, the electric field strength in the insulating gate dielectric layer A / photosensitive layer / insulating gate dielectric layer B can be changed. When the photosensitive layer absorbs light, the generated photo-generated electron-hole pairs will be separated under the action of the drift electric field in the photosensitive layer, and drift to the side close to the insulating gate dielectric layer A and the insulating gate dielectric layer B respectively, reducing the magnitude of the drift electric field in the photosensitive layer, further changing the electric field strength distribution in the insulating gate dielectric layer A / photosensitive layer / insulating gate dielectric layer B, and achieving the purpose of changing the channel carrier concentration, regulating the channel conductance, and realizing the photoelectric response of the phototransistor.

[0036] Embodiment 1

[0037] As Figure 1 shown, the phototransistor provided in this embodiment is fabricated on a substrate. A channel layer is formed on the surface of the substrate, and a drain electrode and a source electrode are respectively formed on both sides of the channel layer on the surface of the substrate, and the drain electrode and the source electrode are in direct contact to form a conductive channel of drain-channel-source.

[0038] An insulating gate dielectric B is formed on the surface of the channel layer, and a photosensitive layer, an insulating gate dielectric A, and a gate electrode are sequentially stacked on the surface of the insulating gate dielectric B. Among them, the photosensitive layer should have a high light absorption rate, a long carrier lifetime, and a long diffusion length. In addition, at least one of the top gate and the bottom substrate should be transparent or translucent to ensure that incident light can pass through and irradiate the photosensitive layer.

[0039] It should be noted that there are various choices for the material of the substrate. However, when the semiconductor material is selected as the substrate material, a semiconductor material with an opposite conductivity type to that of the channel layer should be used.

[0040] Embodiment 2

[0041] The phototransistor provided in this embodiment is as Figure 2 shown, and it includes a substrate, a gate electrode, an insulating gate dielectric A, an insulating gate dielectric B, a photosensitive layer, a source electrode, a drain electrode, and a channel layer. Among them, the gate electrode is formed on the surface of the substrate, the insulating gate dielectric A is formed on the surface of the substrate and covers the gate electrode; the photosensitive layer and the insulating gate dielectric B are sequentially stacked on the surface of the insulating gate dielectric A.

[0042] A channel layer is formed on the surface of the insulating gate dielectric B, and a drain electrode and a source electrode are respectively formed on both sides of the channel layer on the surface of the insulating gate dielectric B, and the drain electrode and the source electrode are in direct contact to form a conductive channel of drain-channel-source.

[0043] Embodiment 3

[0044] The phototransistor provided in this embodiment is as Figure 3 shown, and it has a device structure and material requirements similar to those of the phototransistor in Embodiment 1. Different from the phototransistor described in Embodiment 1, in this embodiment, an insulating gate dielectric C and a back gate are further formed between the substrate and the drain-channel-source conductive channel, and the insulating gate dielectric C covers the back gate.

[0045] In the phototransistor provided in this embodiment, in addition to controlling the electric field of the photosensitive sandwich layer through the top gate, the carrier concentration in the channel can be additionally electrically regulated by applying voltages between the back gate, the insulating gate dielectric C, and the channel layer.

[0046] Embodiment 4

[0047] The phototransistor provided in this embodiment is as Figure 4 shown, and it has a device structure and material requirements similar to those of the phototransistor in Embodiment 2. Different from the phototransistor described in Embodiment 2, in this embodiment, an insulating gate dielectric C and a top gate are sequentially stacked above the drain-channel-source conductive channel.

[0048] In the phototransistor provided in this embodiment, in addition to controlling the electric field of the photosensitive interlayer through the back gate, a voltage can be applied between the top gate, the insulating gate dielectric C, and the channel layer, thereby electrically regulating the channel carrier concentration.

[0049] Example 5

[0050] This embodiment provides a preparation method of the phototransistor described in Example 3. As Figure 5 shown, the preparation process described in this embodiment includes:

[0051] (1) Use an n-type heavily doped silicon wafer as the substrate and also use it as the back gate.

[0052] (2) After cleaning the silicon wafer, deposit 20 nm thick aluminum oxide on its upper surface by atomic layer deposition as the back gate dielectric, that is, the insulating gate dielectric C.

[0053] (3) After activating the substrate by oxygen plasma or ozone treatment, soak it in an APTES: isopropanol solution for 30 min. After rinsing and drying with isopropanol, then soak it in a semiconducting purified CNT dispersion solution for 1 h. After taking it out and rinsing and drying with isopropanol, obtain a CNT film as the channel layer.

[0054] (4) After photolithography and development, electron beam evaporate 5 nm / 50 nm thick Ni / Au on the CNT film. After stripping the photoresist, it serves as the source and drain electrodes.

[0055] (5) After photolithography, development, oxygen plasma etching, and stripping the photoresist, etch away the redundant CNT outside the channel to isolate the independent phototransistor channel.

[0056] (6) Deposit 10 nm thick aluminum oxide on the channel surface by atomic layer deposition as the insulating gate dielectric B.

[0057] (7) In the glove box, spin-coat by the anti-solvent method and then heat-anneal to prepare MAPbI3 as the photosensitive layer, and then deposit 10 nm aluminum oxide by atomic layer deposition as the insulating gate dielectric A, and finally obtain the gate dielectric with the MAPbI3 photosensitized interlayer.

[0058] (8) After photolithography, development, magnetron sputtering ITO, and stripping the photoresist, obtain the ITO transparent top gate electrode.

[0059] (9) After photolithography, development, wet etching, and stripping the photoresist, obtain the contact vias for the source, drain, and back gate.

[0060] As Figure 6 shown, it is the space charge distribution of the phototransistor in this embodiment after illumination. The back gate voltage is -8 V, and the top gate voltages are +4 V and -4 V respectively. From Figure 6It can be seen that under different voltages, the sensitized interlayer made of perovskite has drift electric field directions in different directions, resulting in the accumulation of photo-generated electrons and holes on both sides of the perovskite layer after separation. The separated electrons and holes can recombine through perovskite grain boundaries, etc., causing the phototransistor to return to its initial state after illumination.

[0061] As Figure 7 shown, it is the channel current response of the phototransistor of this embodiment under the illumination of a 500nm wavelength laser, where the source-drain voltage difference is 0.1V. As a performance comparison, under the condition of keeping the total gate dielectric and the thickness of the perovskite sensitization layer unchanged, the responses of phototransistors with perovskite directly in contact with the channel layer and perovskite directly in contact with the gate electrode were compared. From Figure 7 it can be seen that the phototransistor with perovskite as the photosensitive interlayer of the gate dielectric has a larger photocurrent response under both weak light and strong light illumination, indicating better photosensitivity and a wider dynamic range of the light response.

[0062] Finally, it should be noted that the above embodiments are only used to illustrate the technical solutions of the present invention and not to limit them. Although the present invention has been described in detail with reference to the preferred embodiments, those of ordinary skill in the art should understand that the technical solutions of the present invention can be modified or equivalently replaced without departing from the purpose and scope of the present technical solution, and they should all be covered within the scope of the claims of the present invention.

Claims

1. A phototransistor having a gate dielectric photosensitive interlayer, characterized in that: The phototransistor has a gate dielectric photosensitive interlayer composed of an insulating gate dielectric A, an insulating gate dielectric B and a photosensitive layer, wherein the photosensitive layer is located between the insulating gate dielectric A and the insulating gate dielectric B, and the insulating gate dielectric A and the insulating gate dielectric B prevent the photosensitive layer from directly contacting the gate and the channel layer in the phototransistor; the gate dielectric photosensitive interlayer, the gate and the channel layer are stacked above the substrate in a vertical direction.

2. The phototransistor according to claim 1, characterized in that The phototransistor also includes a drain and a source; the channel layer is located above the substrate, the drain and the source are located above the substrate and distributed on both sides of the channel layer; the gate dielectric photosensitive interlayer is located on the surface of the channel layer, and the gate is located on the surface of the gate dielectric photosensitive interlayer.

3. The phototransistor according to claim 2, characterized in that The phototransistor further comprises an insulating gate dielectric C and a back gate located between the channel layer and the substrate. The back gate is located on the surface of the substrate. The insulating gate dielectric C is located on the surface of the substrate and covers the back gate.

4. The phototransistor according to claim 2 or 3, characterized in that: At least one of the gate or the substrate is transparent or semi-transparent to ensure that incident light can reach the photosensitive layer.

5. The phototransistor according to claim 1, characterized in that The phototransistor also includes a drain and a source; the gate is located on the surface of the substrate, the gate dielectric photosensitive interlayer is located on the surface of the substrate and covers the gate; the channel layer is located on the surface of the gate dielectric photosensitive interlayer, the source and drain are located on the surface of the gate dielectric photosensitive interlayer and are distributed on both sides of the channel layer.

6. The phototransistor according to claim 5, characterized in that The phototransistor further comprises an insulating gate medium C and a top gate which are sequentially stacked on the surface of the channel layer.

7. The phototransistor according to claim 5, characterized in that At least one of the top gate or the substrate is transparent or semi-transparent to ensure that incident light can reach the photosensitive layer.

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