Method for finding a signal in a frequency range and ultra-wideband receiver

Abstract

Methods and apparatus for finding signals in a frequency range include converting an analog input signal to a digital domain using an analog-to-digital converter to create a digital input signal. A first fast Fourier transform (FFT) converts the digital input signal to a frequency input signal, which is binned based on frequency and a threshold to create a binary filter. The digital input signal (from the analog-to-digital converter) is classified into bins (e.g., using the Chinese remainder theorem), and then converted to a frequency intermediate signal by a second FFT. The frequency intermediate signal is classified into bins and multiplied using the binary filter to create an output frequency signal.

Description

[0001] Cross-reference to related applications

[0002] This application claims the benefit of U.S. Provisional Patent Application Serial No. 63 / 399,055, filed August 18, 2022, entitled “SMART FFT MEASUREMENT FORRECONFIGURABLE SENSOR USING A WIDEBAND DIGITAL RECEIVER”, the disclosure of which is incorporated herein by reference. Background Technology

[0003] Various aspects of the present invention generally relate to the Fast Fourier Transform, and more particularly to a Smart Fast Fourier Transform for use in a broadband receiver.

[0004] Ultra-wideband (UWB) is a radio technology that allows for short-range, high-bandwidth communication across a large portion of the radio spectrum using very low energy levels. UWB has a long history of applications in non-cooperative radar imaging. More recent applications target sensor data collection, precise localization, and tracking.

[0005] A key difference between conventional radio transmission and UWB is that conventional systems transmit information by altering the power level, frequency, and / or phase of a sine wave. UWB transmission transmits information by generating radio energy at specific time intervals and occupying a large bandwidth, thus enabling pulse position or time modulation. Information can also be modulated on UWB signals (pulses) by encoding the polarity of the pulses, their amplitude, and / or by using quadrature pulses. UWB pulses can be transmitted intermittently at relatively low pulse rates to support time or position modulation, but they can also be transmitted at rates up to the reciprocal of the UWB pulse bandwidth. Summary of the Invention

[0006] According to aspects of this disclosure, a process for finding a signal within a frequency range includes converting an analog input signal to the digital domain using an analog-to-digital converter (ADC) to create a digital input signal. A first Fast Fourier Transform (FFT) converts the digital input signal into a frequency input signal, which is binned based on frequency and a threshold to create a binary filter. The digital input signal (from the ADC) is binned (e.g., using the Chinese Remainder Theorem), and then converted into a frequency intermediate signal by a second FFT. The frequency intermediate signal is binned and multiplied using the binary filter to create an output frequency signal.

[0007] According to another aspect of this disclosure, an apparatus (e.g., a receiver) for finding signals within a frequency range includes using an analog-to-digital converter to convert an analog input signal to the digital domain to create a digital input signal. A first Fast Fourier Transform (FFT) converts the digital input signal into a frequency input signal, which is binned based on frequency and a threshold to create a binary filter. The digital input signal (from the analog-to-digital converter) is binned (e.g., using the Chinese Remainder Theorem), and then converted into a frequency intermediate signal by a second FFT. The frequency intermediate signal is binned and multiplied using the binary filter to create an output frequency signal. Attached Figure Description

[0008] Figure 1 This is a block diagram of an ultra-wideband receiver according to aspects of this disclosure;

[0009] Figure 2 This is a flowchart of a process for detecting a signal in an ultra-wideband signal according to aspects of this disclosure;

[0010] Figure 3 It is a visual representation of the bucketing process using the Chinese Remainder Theorem according to aspects of this disclosure;

[0011] Figure 4 This is a block diagram of an ultra-wideband receiver according to aspects of this disclosure;

[0012] Figure 5A It is a frequency diagram of the intelligent fast Fourier transform (SFFT) according to aspects of this disclosure.

[0013] Figure 5B It is a frequency diagram of the fast Fourier transform according to aspects of this disclosure.

[0014] Figure 5C It is the spectrum of the SFFT binary filter according to aspects of this disclosure.

[0015] Figure 6A The frequency plot of the Fast Fourier Transform (FFT) of three signals is shown according to aspects of this disclosure.

[0016] Figure 6B It is a frequency diagram after bucketing according to aspects of this disclosure.

[0017] Figure 7 It is a block diagram of a computing system that can be used in the processes and apparatus disclosed herein, based on aspects of this disclosure. Detailed Implementation

[0018] According to aspects of this disclosure, an intelligent fast Fourier transform (SFFT) is described that, among other things, allows an ultra-wideband (UWB) receiver to rapidly detect multiple signals within the UWB. Therefore, UWB provides low-power execution with fine-grained timing objectives and high throughput. To achieve this, UWB transmits short bursts of data at short intervals without interfering with other existing long-range communication frameworks.

[0019] Furthermore, the SFFT embodiments discussed herein can be used in other applications such as transmitter and receiver mobile networks (e.g., 5G), other network protocols, DNA sequencing, molecular amplification, astronomical observation of various radio objects using satellite and ground antennas, arithmetic logic units for processors, neuromorphic networks, neural networks, etc. Essentially, any application requiring other cross-correlation calculations that transform from the original domain to the frequency domain and / or vice versa can utilize the SFFT process embodiments described herein.

[0020] Figure 1 A UWB receiver 100 according to aspects of this disclosure is illustrated. The UWB receiver 100 includes an analog-to-digital converter (ADC) 102 for converting an analog input signal (e.g., a UWB signal) to the digital domain to create a digital input signal. The sampling rate of the ADC 102 should be at least twice the highest correlated frequency in the received signal. For example, if an analog signal including correlated frequencies of 40-1240 MHz in the time domain is received, a 2.56 GHz 12-bit ADC can be used to convert the analog input signal to a digital input signal.

[0021] The ADC 102 is fed to both the window function 104 and the first FFT 106. The first FFT 106 converts the digital input signal into a frequency input signal and uses a threshold to classify the frequency input signal into a bin to create a binary filter 108.

[0022] Window function 104 distributes the digital input signal over time into several registers (e.g., eight 12-bit registers, where the output of one of the eight 12-bit registers feeds to the subsequent 12-bit registers). For example, a 32768-point window function can store eight samples of 4096 bits of data (e.g., the output of the aforementioned 12-bit ADC) over time and shift that data through eight samples (e.g., 4096 bits of data from register_3 are shifted to register_4, register_4 is shifted to register_5, and so on).

[0023] Window function 104 is fed to first classifier 110, which classifies the digital input signal from window function 104 into containers. For example, the Chinese Remainder Theorem can be used in this classification process (bucketing process). For example, twelve consecutive digitized information focal points are stored in containers with four information focal points.

[0024] The second FFT 112 (having the same number of points as the first FFT 106) converts the classified digital input signal into an intermediate frequency signal. For example, if the first FFT 106 is a 4096-point FFT, then the second FFT 112 is a 4096-point FFT. The first FFT 106 and the second FFT 112 can be implemented in hardware (e.g., a field-programmable gate array, an application-specific integrated circuit, etc.), in software running on a processor (e.g., a graphics processing unit, other processor), or both.

[0025] The output of the second FFT 112 is fed to the second classifier 114, which classifies the intermediate frequency signal (i.e. the output of the second FFT) into a specified bin.

[0026] The intermediate frequency signal of the bin is multiplied by a binary filter (via multiplier 116) to find the output signal, which is then corrected in error correction 118. The output signal is then passed through an ultra-wideband frequency detector 120 to detect the signal of interest in the received ultra-wideband signal.

[0027] Figure 2 The diagram illustrates a flowchart of process 200 for detecting a signal in an ultra-wideband signal. At 202, an analog-to-digital converter is used to convert the received analog input signal to the digital domain (thus creating a digital input signal). At 204, a first FFT converts the digital input signal into a frequency input signal. In several embodiments, as discussed above, a window function is also used to window the digital input signal. The FFT can be implemented in hardware (e.g., a field-programmable gate array, an application-specific integrated circuit, etc.), software running on a processor (e.g., a graphics processing unit, other processors), or both.

[0028] At position 206, the frequency input signal is binned based on frequency and threshold to create a binary filter.

[0029] At 208, the digital input signal from step 202 (which, as discussed above, may be windowed) is sorted into containers. For example, the Chinese Remainder Theorem can be used to assign the digital input signal to containers. At 210, a number of points equal to the number of points from the first FFT are collected from the containers, and at 212, the collected points are passed through a second FFT to convert the digital input signal into a frequency intermediate signal. For example, if the FFT is 4096 points, 4096 blocks of data are used. At 214, the frequency intermediate signal is sorted into bins, and at 216, it is multiplied using the binary filter from step 206, which creates an output signal that can be further corrected.

[0030] Therefore, process 200 generates a signal that indicates the signal and frequency carried by those frequencies from the ultra-wideband signal. This process 200 can be used for Figure 1 In receivers used for military applications, etc. In some embodiments, the first FFT and the second FFT are part of an FFT system that includes two FFTs. In various embodiments, the first FFT and the second FFT are part of an FFT system that includes one FFT, such that the first FFT and the second FFT are the same FFT.

[0031] In ultra-wideband (UWB) signals, the computationally intensive FFT activity presents challenges in preparing for processing millions of data points. Applying Meager FFT requires different focuses of the SFFT algorithm, while Smart FFT requires a loop.

[0032] A key capability of advanced broadband beneficiaries is the identification of extremely weak, distinct signals with high frequency accuracy and uniqueness. In any case, extending the FFT length from 256 focal points to 4096 should be possible. Many receivers use a 256-point FFT length for signal locations. In the ongoing history, several algorithms for signal detection have been proposed. Proposed in nuclear degradation receptors. Again, configurable receivers can identify various signals before having different data arrangements. However, existing algorithms or systems are not sufficiently suited for accurately distinguishing numerous signals. Furthermore, they offer low processing and transmission speeds, making them extremely inefficient for accurate signal detection. Currently, the development of GPUs, recommended as a speed-up device in applications such as DNA sequencing, digital receivers, image processing algorithms, astrophysics, communication systems, and many more, has prompted consideration of using GPUs for this work. In this paper, a Smart Ingenious FFT (SFFT) method using only a database is proposed. Consider a Tesla K40a GPU for execution. The FFT in the GPU is performed by NVIDIA using the CuFFT library.

[0033] Ultra-wideband (UWB) is not the conventional narrowband radio; it is a long-range advanced communication framework that uses short intervals. Given the large volume of signal data transmitted, UWB ensures low-power execution with high throughput and fine-grained timing objectives at short intervals without interfering with other existing long-range communication frameworks.

[0034] Beneficiaries include wideband low-noise amplifiers (LNAs), wide-tuning systems, range bandpass filters (BPFs), and double-balanced channels. It also includes a Gilbert blender for down-tuning the RF signal to a quadrature zero IF.

[0035] The core of the SFFT algorithm is the implementation of FFT electronic data. FFT is a key part of the flag processing method. Formal descriptions of the Fast Fourier Transform can be found in many articles and books. To further... Electronic data is grouped and Fourier transform is generated. The length of the FFT represents the magnitude of the change (N). The relationship is as follows:

[0036]

[0037] Where k ranges from 0 to N-1, It is digitized spatiotemporal information, and The changed frequency range data is displayed. The following explains how... Figure 4 Each block of the SFFT shown.

[0038] A. FFT binary filter: Extracts test information from the front end of the computer collector from the 2.56 GHz ADC sampler in 12.8 μs. Paired channels consist of 1s and 0s.

[0039] B. Bucketing: The Chinese Remainder Theorem is incorporated into the bucketing process. For example, 12 consecutive digitized information foci are stored in one bucket, and the container has 4 information foci. In this way, the set consists of {1, 6, 11, and 4}, which is labeled as follows: Figure 3 middle.

[0040] C. SFFT Binary Filter: The undersampled set is processed using a 4,096-point Fast Fourier Transform. For the initiator, any frequency receiver at the edge is an identified signal. Next, nearby spike receiver containers are removed from the SFFT channel.

[0041] Single signal detection

[0042] Due to the binning, the signal frequencies are correlated. A technique for reconstructing the area values ​​of a 4,096 FFT is then included. Compared to the master FFT, the modified range demonstrates a sufficient estimate of the recurrence of the canisters. The difference in richness (60-50=15dB) between the FFT and SFFT continues into the subsequent phase of recurrence error correction.

[0043] Experimental results (UWB)

[0044] To reduce power consumption in a simple analog-to-digital conversion framework, an analog preprocessing stage is introduced before the asynchronous converter to identify the information esteem value that generally needs to be changed for a given application. Since the information esteem value is previously unknown, the simple preprocessing triggers the asynchronous converter to perform an example, and the timing of the automatic converter measures the time interval between samples. By changing only the required information esteem value, this framework can save significant power in both the change stage and the down-the-signal stage. Accurate signal detection requires a high degree of separation between noise and signal quality. Although frequencies not on the digital receiver can be precisely distinguished due to the limitations of the Fourier transform, frequency error assessment is crucial. A replay was performed where the input frequency increased to 1 MHz from 40 MHz to 1240 MHz. The side plot also additionally shows the change in sufficiency distinction as the frequency increases. The sufficiency of distinction is 0 when the information frequency is in the integer container. For frequency errors of ±0.125 MHz and ±0.25 MHz, the relative sufficiency contrasts are approximately 12.5 dB and 15 dB, respectively. The FFT cannot separate two signals that are close to each other. The SFFT-based collector can accurately distinguish two signals with very small frequency partitions (1 frequency tank) and no power. The signal quality is 19 dB below the commotion floor.

[0045] Consider two close information signals, one reliable and the other weak. The reliable signal has an SNR of 11 dB at 187.653125 MHz (canister 300.234); the weak signal has an SNR of 19 dB at 188.903125 MHz (container 302.234).

[0046] Figure 5AThis indicates the difficulty in identifying the input signal from the FFT. As indicated in the first part of the SFFT pseudonym, there are, in any case, nine separate containers for an undersampling rate of 9. It was observed that after dynamic cycling, the detected signals were 187.222255 MHz (container 299.5556) and 188.611125 MHz (container 301.7778), with frequency errors of 0.424 MHz and 0.28512 MHz, respectively. The error for a widely distinguishable 10 dB signal at 188.611125 MHz decreased by 0.125 MHz to 0.16012 MHz. This model shows a dual-signal information range of 30 dB, two receiver partitions, and an undersampling rate of 9 ({32,768 / 4096}+1). Furthermore, as Figure 5C As shown, parallel channels were created in the appropriate areas. Figure 5B It is an FFT spectrum.

[0047] The proposed SFFT-based receiver was validated using five synchronization information signals, with almost one frequency container separated. The reported frequency error was found to be less than 0.625 MHz (one frequency receiver), with the five signal information ranges from 30 dB. The SFFT frequency receiver, identified frequency, and identified frequency error were reported, distinguishing the SNR. In this case, the most reliable (grounded) signal had an 11 dB SNR, while the most vulnerable signal had a -19 dB SNR, and the other three signals had a -15 dB SNR. Figure 6A As shown, three signals were observed using a standard FFT. The sufficiency of subsequent frequencies is much smaller, and the power of the FFT is concentrated within the main lobe of the strong signal. In this way, the FFT cannot distinguish between two low-quality frequencies that are close to a reliable signal. However, as... Figure 6B As shown, after binning, all five frequencies are clearly separated by their amplitudes.

[0048] It's worth remembering that the dynamic loop problem is significantly smaller than any receiver algorithm. Hardware engineers measured a runtime of 0.175 ms. The computational constraint was a 4096 FFT activity that took 0.11 ms on a Tesla K40c GPU.

[0049] As discussed above, SFFT implementations can be used in any application that requires transformation from one domain to another (e.g., frequency) domain or other cross-correlation calculations. For example, in DNA sequencing, correlation processing of DNA sequencing can be performed using conventional FFT or Discrete Fourier Transform (DFT) in log-linear complexity (O(n log n)). Therefore, Fourier transforms (e.g., SFFT implementations disclosed herein) can be used for DNA sequencing.

[0050] refer to Figure 7 A block diagram of a data processing system (i.e., a computer system) according to the present invention is depicted. The data processing system 700 may include a symmetric multiprocessor (SMP) system or other configurations including multiple processors 710 connected to a system bus 730. Alternatively, a single processor 710 may be employed. Local memory 720 is also connected to the system bus 730. An I / O bus bridge 740 is connected to the system bus 730 and provides an interface to an I / O bus 750. The I / O bus may be used to support one or more buses and corresponding devices, such as memory 760, removable media memory 770, input / output devices (I / O devices) 780, network adapters 790, etc. Network adapters may also be coupled to the system to enable the data processing system to be coupled to other data processing systems or remote printers or storage devices via an intermediate private or public network.

[0051] Devices such as graphics adapters, memory, and computer-usable storage media on which computer-usable program code is implemented may also be connected to the I / O bus. Computer-usable program code can be executed to implement any aspect of the invention, for example, any aspect of any of the methods and / or system components described herein.

[0052] As will be understood by those skilled in the art, aspects of this disclosure can be implemented as systems, methods, or computer program products. Therefore, aspects of this disclosure can take the form of entirely hardware embodiments, entirely software embodiments (including firmware, resident software, microcode, etc.), or embodiments combining software and hardware aspects, which are generally referred to herein as “circuit,” “module,” or “system.” Furthermore, aspects of this disclosure can take the form of computer program products included in one or more computer-readable storage media, on which computer-readable program code is included.

[0053] Any combination of one or more computer-readable media may be used. A computer-readable medium can be a computer-readable signal medium or a computer-readable storage medium. A computer-readable storage medium can be, for example, but not limited to, electronic, magnetic, optical, electromagnetic, infrared, or semiconductor systems, apparatuses, or devices, or any suitable combination of the foregoing. More specific examples (a non-exhaustive list) of computer-readable storage media will include the following: electrical connections having one or more wires, portable computer disks, hard disks, random access memory (RAM), read-only memory (ROM), erasable programmable read-only memory (EPROM), flash memory, optical fiber, portable optical disc read-only memory (CD-ROM), optical storage devices, magnetic storage devices, or any suitable combination of the foregoing. In the context of this document, a computer-readable storage medium can be any tangible medium that may contain or store a program for use by or in conjunction with an instruction execution system, apparatus, or device. Computer storage media do not include propagating signals.

[0054] Computer-readable signal media may include propagated data signals containing computer-readable program code, for example, in baseband or as part of a carrier wave. Such propagated signals may take any of a variety of forms, including, but not limited to, electromagnetic, optical, or any suitable combination thereof. A computer-readable signal medium may be any computer-readable medium that is not a computer-readable storage medium and may communicate, propagate, or transmit programs for use by or in conjunction with an instruction execution system, apparatus, or device.

[0055] The program code contained on the computer-readable medium may be transmitted using any suitable medium, including but not limited to wireless, wired, fiber optic cable, RF, or any suitable combination thereof.

[0056] Computer program code used to perform the operations of aspects of this disclosure may be written in any combination of one or more programming languages, including object-oriented programming languages ​​such as Java, Smalltalk, C++, etc., and traditional procedural programming languages ​​such as the "C" programming language or similar programming languages. The program code may execute entirely on the user's computer, partially on the user's computer, as a standalone software package, partially on the user's computer and partially on a remote computer, or entirely on a remote computer or server. In the latter case, the remote computer may be connected to the user's computer via any type of network, including a local area network (LAN) or a wide area network (WAN), or may be connected to an external computer (e.g., through the network of an internet service provider).

[0057] This document describes aspects of the disclosure with reference to flowchart illustrations and / or block diagrams of methods, apparatus (systems), and computer program products according to embodiments of the disclosure. It will be understood that each block of the flowchart illustrations and / or block diagrams, and combinations of blocks in the flowchart illustrations and / or block diagrams, can be implemented by computer program instructions. These computer program instructions can be provided to other programmable data processing apparatus or a processor of a general-purpose computer or special-purpose computer to produce a machine, such that the instructions, which execute via the processor of the other programmable data processing apparatus or computer, create means for implementing the functions / actions specified in one or more blocks of the flowchart illustrations and / or block diagrams.

[0058] These computer program instructions may also be stored in a computer-readable medium that can instruct a computer, other programmable data processing apparatus or other device to operate in a particular manner, such that the instructions stored in the computer-readable medium produce an article of writing comprising instructions that implement the functions / actions specified in one or more blocks of a flowchart and / or block diagram.

[0059] Computer program instructions may also be loaded onto a computer, other programmable data processing apparatus or other device to perform a series of operational steps on the computer, other programmable apparatus or other device, thereby producing a computer-implemented process, such that the instructions, which execute on the computer or other programmable apparatus, provide a process for implementing the function / action specified in one or more blocks of a flowchart and / or block diagram.

[0060] The flowcharts and block diagrams in the figures illustrate the architecture, functionality, and operation of possible implementations of systems, methods, and computer program products according to various embodiments of the present disclosure. In this regard, each block in a flowchart or block diagram may represent a module, segment, or portion of code, including one or more executable instructions for implementing one or more specified logical functions. It should also be noted that in some alternative implementations, the functions indicated in the blocks may not appear in the order shown in the figures. For example, depending on the functions involved, two blocks shown consecutively may actually be executed substantially simultaneously, or these blocks may sometimes be executed in reverse order. It will also be noted that each block in the block diagrams and / or flowcharts, and combinations of blocks in the block diagrams and / or flowcharts, may be implemented by a hardware-based dedicated system that performs the specified functions or actions, or by a combination of dedicated hardware and computer instructions.

[0061] The terminology used herein is for the purpose of describing particular embodiments only and is not intended to limit the invention. Unless the context clearly indicates otherwise, the singular forms “a / an” and “the” as used herein are intended to include the plural forms as well. It will also be understood that when the terms “comprising” and / or “including” are used in this specification, the presence of the stated feature, integral, step, operation, element, and / or component is specified, but the presence or addition of one or more other features, integrals, steps, operations, elements, components, and / or groups thereof is not excluded.

[0062] All the means or steps in the following claims, plus the corresponding structures, materials, actions, and equivalents of the functional elements, are intended to include, in combination with other claimed elements as specifically claimed, any structures, materials, or actions that perform the function. The description in this disclosure is for illustrative and descriptive purposes only and is not intended to be exhaustive or to limit the invention to the forms disclosed. Many modifications and variations will be apparent to those skilled in the art without departing from the scope and spirit of the invention. The aspects of this disclosure were chosen and described in order to best explain the principles and practical application of the invention and to enable others skilled in the art to understand the various embodiments of the invention, as well as various modifications suitable for the particular intended use.

Claims

1. A method for finding a signal within a frequency range, the method comprising: The digital input signal is converted into a frequency input signal using a first Fast Fourier Transform (FFT) with multiple points; The frequency input signal is binned into bins based on frequency and threshold to create a binary filter; The Chinese Remainder Theorem is used to classify the digital input signals into containers; Collect a number of points from the container equal to the number of points from the first FFT; The digital input signal is converted into a frequency intermediate signal using a second FFT, the second FFT having the same number of points as the first FFT; The intermediate frequency signals are sorted into boxes; Using the binary filter to select the box of interest within the bin to create an output frequency signal from the box of interest, wherein using the binary filter to select the box of interest within the bin to create an output frequency signal from the box of interest includes multiplying the intermediate frequency signals classified into the bin with the binary filter by a multiplier to create the output frequency signal.

2. The method according to claim 1, wherein, Using the binary filter to select the box of interest in the bin to create an output frequency signal from the box of interest also includes an error correction algorithm.

3. The method according to claim 1, wherein the first FFT and the second FFT are implemented by a graphics processing unit.

4. The method of claim 1, wherein the first FFT and the second FFT are implemented in hardware.

5. The method of claim 4, wherein the second FFT is the first FFT.

6. The method according to claim 1, further comprising: An analog-to-digital converter is used to convert the analog input signal to the digital domain to create the digital input signal.

7. The method according to claim 1, further comprising: The deoxyribonucleic acid (DNA) sequencing data is retrieved as the digital input signal.

8. The method according to claim 1, further comprising: Receive digital input from a neural network.

9. The method according to claim 1, further comprising: Receive analog signals from the communication network; as well as An analog-to-digital converter is used to convert the analog input signal to the digital domain to create the digital input signal.

10. An ultra-wideband receiver, comprising: An analog-to-digital converter that converts an analog input signal into a digital input signal; as well as A processor, coupled to the analog-to-digital converter, wherein the processor performs: The digital input signal is converted into a frequency input signal using a first Fast Fourier Transform (FFT) with multiple points. The frequency input signal is binned into bins based on frequency and threshold to create a binary filter. The Chinese Remainder Theorem is used to classify the digital input signals into containers. Collect a number of points from the container equal to the number of points from the first FFT. The digital input signal is converted into an intermediate frequency signal using a second FFT, the second FFT having the same number of points as the first FFT. The intermediate frequency signals are sorted into boxes. Using the binary filter to select the box of interest within the bin to create an output frequency signal from the box of interest, wherein using the binary filter to select the box of interest within the bin to create an output frequency signal from the box of interest includes multiplying the intermediate frequency signals classified into the bin with the binary filter by a multiplier to create the output frequency signal.

11. The ultra-wideband receiver of claim 10, wherein using the binary filter to select the box of interest in the box to create an output frequency signal from the box of interest further includes an error correction algorithm.

12. The ultra-wideband receiver of claim 10, wherein the processor is a graphics processing unit.

13. An ultra-wideband receiver, comprising: An analog-to-digital converter that converts an analog input signal into a digital input signal; A processor, the processor being coupled to the analog-to-digital converter; A Fast Fourier Transform (FFT) system implemented in hardware, wherein the FFT system includes a first FFT and a second FFT; in: The first FFT includes multiple points and converts the digital input signal into a frequency input signal; The processor: The frequency input signal is binned into bins based on frequency and threshold to create a binary filter. The Chinese Remainder Theorem is used to classify the digital input signals into containers. Collect a number of points from the container equal to the number of points from the first FFT; The second FFT converts the digital input signal into a frequency intermediate signal; and The processor also: The intermediate frequency signals are sorted into boxes. Using the binary filter to select the box of interest within the bin to create an output frequency signal from the box of interest, wherein using the binary filter to select the box of interest within the bin to create an output frequency signal from the box of interest includes multiplying the intermediate frequency signals classified into the bin with the binary filter by a multiplier to create the output frequency signal.

14. The ultra-wideband receiver of claim 13, wherein using the binary filter to select the box of interest in the box to create an output frequency signal from the box of interest further includes an error correction algorithm.

15. The ultra-wideband receiver of claim 13, wherein the processor is a graphics processing unit.

16. The ultra-wideband receiver of claim 13, wherein the first FFT and the second FFT are the same FFT.

17. The ultra-wideband receiver of claim 13, wherein the first FFT and the second FFT are two FFTs.

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