Low power and fast wake-up bandgap voltage reference circuit

Abstract

The low-power quick wake-up band-gap reference voltage circuit works in three stages: a sleep stage, a wake-up stage and a steady-state stage. The circuit enters a wake-up upon receiving an enable signal that causes a single trigger timer to generate a transition enable signal pulse having a predetermined period. In a wake-up phase, the boost circuit arrangement is connected to a bandgap voltage reference circuit arrangement comprising an operational amplifier, the boost circuit arrangement being operable under the control of a transition enable signal, connecting one or more of the one or more boost circuits to a bandgap voltage reference. Thus, during a transient wake-up phase, more current is consumed to accelerate the response of the circuit. Upon completion of the wake-up phase, the boost circuit arrangement is turned off under the control of the conversion enable signal, and the circuit operates in a low power mode as long as the enable signal is activated.

Description

Technical Field

[0001] The present disclosure generally relates to the field of analog integrated circuits, and more particularly to bandgap voltage reference circuits widely used in very large scale integration (VLSI) chips. More specifically, such circuits serve as stable and accurate reference voltage sources with minimal dependence on process variations, power supply voltage fluctuations, and temperature variations (PVT variations). Background Art

[0002] Bandgap reference voltage circuits are fundamental analog building blocks widely used in very large scale integration (VLSI) chip designs. These circuits are responsible for generating a reference voltage that remains relatively constant under various operating conditions, making them indispensable for ensuring the accurate functioning of analog and mixed-signal devices in integrated circuits. The reference voltage provided by the bandgap circuit is typically used as a basis for generating various other analog by-products, including reference voltages and bias currents, which have widespread applications throughout the chip.

[0003] A significant challenge associated with traditional bandgap circuits is their slow wake-up time, which is the time required for these circuits to fully operate and stabilize after power-up. In most analog and mixed-signal chip designs, the bandgap circuit is the first module to be enabled during chip wake-up, and other analog and / or mixed-signal modules typically remain in a waiting state until the bandgap circuit is fully operational and stable.

[0004] The wake-up time of the bandgap circuit is closely related to its power consumption. Generally, a faster wake-up time requires higher power consumption, which may conflict with the strict power budgets that must be adhered to in many applications, especially during steady-state operation. Therefore, designers often face the challenge of optimizing the wake-up time while keeping the power consumption within an acceptable range.

[0005] The wake-up time and power consumption of traditional bandgap circuits are directly related, presenting a challenge to designers seeking a balance between fast wake-up time and efficient steady-state power consumption. Achieving a fast wake-up time typically involves sacrificing power efficiency throughout the entire operating time of the bandgap voltage reference circuit, which can be problematic in applications with strict power constraints. On the other hand, low-power implementations result in long transition times, which is the time it takes for the voltage of the circuit to change from its inactive value to its desired level.

[0006] In view of the foregoing challenges and limitations associated with traditional bandgap voltage reference circuits, there is a need for innovative methods that enable the design of bandgap circuits with improved wake-up times while maintaining power consumption within acceptable limits. Summary of the Invention

[0007] An overview of several example embodiments of the present disclosure is as follows. This overview is provided to facilitate a basic understanding of these embodiments by the reader and does not fully define the scope of the present disclosure. This overview is not an extensive review of all contemplated embodiments and is neither intended to identify key or critical elements of all embodiments nor to depict the scope of any or all aspects. Its sole purpose is to present some concepts of one or more embodiments in a simplified form as a prelude to the more detailed description presented later. For convenience, the term "some embodiments" or "certain embodiments" may be used herein to refer to a single embodiment or multiple embodiments of the present disclosure.

[0008] Certain embodiments disclosed herein include a low-power fast wake-up bandgap reference voltage circuit, comprising: a one-shot timer that generates a conversion enable signal pulse of a predetermined time period upon receiving an enable signal; a bandgap voltage reference circuit device including an operational amplifier communicatively connected to the one-shot timer, a current mirror circuit device, a plurality of compensation capacitors, and a plurality of resistors, wherein the bandgap voltage reference circuit device is adapted to operate at a sleep power consumption level or a steady-state power consumption level when a reference voltage is provided after activating the enable signal, wherein the steady-state power consumption is higher than the sleep power consumption; and a boost circuit device communicatively connected to the bandgap voltage reference circuit device and also communicatively connected to the one-shot timer, wherein the boost circuit device includes one or more boost circuits, and the boost circuit device causes one or more of the one or more boost circuits to be connected to the bandgap voltage reference when the one-shot conversion enable signal is activated, and one or more of the one or more boost circuits operate at a wake-up power consumption level higher than the steady-state power consumption level together with other circuits of the bandgap voltage reference circuit device, wherein the low-power fast wake-up bandgap reference voltage circuit is configured for fast wake-up at the wake-up power consumption level, and wherein the low-power fast wake-up bandgap reference voltage circuit operates at the steady-state power consumption level when the one-shot conversion enable signal that causes the boost circuit device to disconnect is activated.

[0009] Certain embodiments disclosed herein also include a method of operating a low-power fast wake-up bandgap reference voltage circuit, including: the low-power fast wake-up bandgap reference voltage circuit operating at a sleep power consumption level; receiving an enable signal by the low-power fast wake-up bandgap reference voltage circuit; providing wake-up power to the low-power fast wake-up bandgap reference voltage circuit when the enable signal is received; generating a pulse signal with a first pulse width when the enable signal is received; connecting a boost circuit device of the low-power fast wake-up bandgap reference voltage circuit under the control of the pulse and within the duration of the first pulse width, the boost circuit device including one or more boost circuits, the one or more boost circuits causing the low-power fast wake-up bandgap reference voltage circuit to operate at a wake-up power consumption level higher than the steady-state power consumption level; and disconnecting the boost circuit device under the control of the pulse signal, such that the low-power fast wake-up bandgap reference voltage circuit consumes power at a steady-state power consumption level lower than the wake-up power consumption and higher than the sleep power consumption. BRIEF DESCRIPTION OF THE DRAWINGS

[0010] The subject matter disclosed herein is particularly pointed out and distinctly claimed in the claims at the end of the specification. The foregoing and other objects, features, and advantages of the disclosed embodiments will become apparent from the following detailed description taken in conjunction with the accompanying drawings.

[0011] Figure 1 Shows the configuration of a conventional bandgap circuit;

[0012] Figure 2A is a schematic diagram of a low-power and fast wake-up bandgap reference voltage circuit according to an embodiment;

[0013] Figure 2B is a detailed schematic diagram of a low-power and fast wake-up bandgap reference voltage circuit according to an embodiment;

[0014] Figure 2C is a timing diagram of the wake-up activation of a low-power and fast wake-up bandgap reference voltage circuit according to an embodiment;

[0015] Figure 3 is a circuit diagram of an enhanced operational amplifier of a low-power and fast wake-up bandgap reference voltage circuit according to an embodiment;

[0016] Figure 4 is a compensation circuit for a low-power and fast wake-up bandgap reference voltage circuit according to an embodiment;

[0017] Figure 5 is an analog diagram of the output voltage of a conventional bandgap reference voltage circuit relative to a low-power and fast wake-up bandgap reference voltage circuit according to an embodiment;

[0018] Figure 6Simulation diagram of the conversion cycle of a compensation circuit with and without an output voltage of a low-power and fast-wakeup bandgap reference voltage circuit according to an embodiment;

[0019] Figure 7 It is a flowchart of the operation of a low-power and fast-wakeup bandgap reference voltage circuit according to an embodiment. Detailed implementation manners

[0020] It is important to note that the embodiments disclosed herein are merely examples of many advantageous uses of the innovative teachings herein. Generally, statements in the specification of this application do not necessarily limit any different claims. In addition, some statements may apply to some inventive features but not to others. Generally, unless otherwise stated, without loss of generality, a singular element may be plural and vice versa. In the drawings, the same reference numerals refer to the same components in several views.

[0021] Similar to Figure 1 The conventional bandgap circuit shown generally includes several key devices, which include bipolar transistors 110-1 and 110-2, an operational amplifier 120 including a differential first stage 122 and an amplification second stage 124, compensation capacitors 140-1 and 140-2, a current mirror composed of p-channel metal oxide semiconductor (MOS) devices 150-1 and 150-2, and polycrystalline resistors 130-1, 130-2, and 130-3. These devices work together to generate a stable voltage reference 160, which exhibits bandgap voltage characteristics, allowing it to be minimally affected by process parameter variations (especially process corners, fast-fast, slow-slow, slow-fast, and fast-slow, supply voltage, and temperature).

[0022] The wake-up time of the bandgap circuit is mainly determined by the bandwidth of the analog closed-loop system within the circuit. Basically, the bandwidth measures the ability of the operational amplifier to respond to an input signal within a specified frequency range. This closed-loop system is affected by the bandwidth of the operational amplifier 120 and the size of the compensation capacitor 140 used to stabilize the system. The bandwidth of the operational amplifier 120 defines how quickly the circuit 100 can respond to the activation of an enable signal (not shown), which wakes up the circuit 100, while the size of the compensation capacitor 140 affects the stability and transient response of the circuit. That is, the ability of the operational amplifier 120 to respond quickly to a changing input voltage (referred to as the slew rate) is related to the bandwidth. Higher slew rates generally correspond to higher bandwidth capabilities.

[0023] The low-power fast wake-up bandgap reference voltage circuit operates in three stages: a sleep stage, a wake-up stage, and a steady-state stage. The circuit wakes up after receiving an enable signal, which causes a one-shot timer to generate a conversion enable signal pulse with a predetermined period that is significantly shorter and negligible (e.g., less than 10%) when compared to the wake-up time required by the low-power fast wake-up bandgap reference voltage circuit. During the wake-up stage, a boost circuit device is connected to a bandgap voltage reference circuit device including an operational amplifier, and the boost circuit device can operate under the control of the conversion enable signal to connect one or more of one or more boost circuits to the bandgap voltage reference. Thus, during the short wake-up stage, more current is consumed to accelerate the circuit's response and increase the bandwidth of the operational amplifier. When the wake-up stage is completed, the boost circuit device is disconnected under the control of the conversion enable signal, and the circuit operates in a low-power mode as long as the enable signal is active.

[0024] Figure 2A FIG. depicts an exemplary schematic diagram of a low-power and fast wake-up bandgap reference voltage circuit 200A according to an embodiment. When the voltage reference circuit needs to operate in a low-power consumption mode during steady-state operation, there is a significant challenge to overcome, that is, the slow response time before the voltage reference stabilizes to its required operating voltage. In many applications, this is not desirable, so the low-power and fast wake-up bandgap reference voltage circuit 200A provides a solution to this problem by handling the transient period (i.e., the period until the circuit wakes up, which is different from the steady-state period), and during the steady-state period, the circuit provides a reference voltage. Generally, the voltage reference circuit is not activated until an enable signal (e.g., enable signal 230) is provided. In Figure 2C and the related text, the operation of the enable signal 230 is shown and discussed.

[0025] The low-power and fast wake-up bandgap reference voltage circuit 200A includes a one-shot timer 210 and an enhanced bandgap core 220. The bandgap core 220 includes a boost circuit device 222 and a bandgap voltage reference circuit 224. The one-shot timer 210 is configured to generate a conversion enable signal 240 in response to receiving an activation signal, the enable signal 230. The one-shot conversion enable signal 240 in response to the enable signal 230 is shown and discussed in Figure 2C and the related text.

[0026] The boost circuit device 222 communicatively connected to the bandgap voltage reference circuit 224 is connected to the bandgap voltage reference circuit 224 under the control of the conversion enable signal 240, thereby changing the response characteristics of the bandgap voltage reference circuit 224. Specifically, as further explained herein, the boost circuit device 222 accelerates the response time of the bandgap voltage reference circuit 224 during the activation of the conversion enable signal 240. This allows the bandgap voltage reference circuit 224 to output VREF 250 serves as a stable output voltage with a fast wake-up time without degrading the low-power performance of the low-power and fast-wake-up bandgap reference voltage circuit 200A in the steady state (i.e., after the single-shot conversion enable signal 240 has been deactivated). For acceleration purposes, different sub-circuits can be used, such as, but not limited to, a power supply and a network including passive devices such as resistors and capacitors.

[0027] Those skilled in the art will readily understand that although the description discusses connecting the boost circuit during the active period of the conversion enable signal 240, it is possible not to connect the circuit during this period but rather to disconnect other circuits. A person of ordinary skill in the art should also understand that although high-level active signals 230 and 240 are described, low-level active signals can also be used without departing from the scope of the disclosed embodiments. In yet another embodiment, the single-shot timer 210 can be programmable, i.e., defining the time span during which the conversion enable signal 240 is active.

[0028] Figure 2B is an example detailed schematic diagram of a low-power and fast-wake-up bandgap reference voltage circuit 200B according to an embodiment. Specifically, it shows the type of boost circuit that can include a boost circuit device 222. For example, but not limited to, the power supply 222-1 is controlled by the conversion enable signal 240. During steady-state operation, the power supply 222-1 is inactive. However, during the active state of the conversion enable signal 240, current is provided to enhance the performance of, for example, the operational amplifier 120, resulting in a faster conversion time. This means that the bandgap reference voltage circuit 200B will reach the desired operating reference voltage faster than if such a boost were not available. Those skilled in the art will understand that in an embodiment, the amount of current provided by the power supply 222-1 is programmable.

[0029] The boost circuit device 222 can also include a passive boost circuit device, such as a capacitor 222-2. Under the control of the conversion enable signal 240, the capacitor 222-2 can be connected or disconnected from the circuit including the low-power and fast-wake-up bandgap reference voltage circuit 200B, for example, under the control of a switch 222-3. By connecting or disconnecting this passive circuit, the response characteristics of the low-power and fast-wake-up bandgap reference voltage circuit 200B change. According to the disclosed embodiments, it allows for a fast wake-up when the conversion enable signal 240 is active, at the cost of additional power consumption in the steady state, while when the conversion enable signal 240 is not active, the low-power and fast-wake-up bandgap reference voltage circuit 200B operates in a low-power mode.

[0030] Figure 2C is an example timing diagram 200C of the wake-up activation of a low-power and fast-wake-up bandgap reference voltage circuit according to an embodiment. For simplicity, useFigure 2A and Figure 2B reference numbers. At time t1, the enable signal 230 changes 232 from its inactive state to its active state. The enable signal 230 is provided to the one-shot timer 210, and as a result, a pulse is generated at t2, where the transition enable signal 240 changes 242 from its inactive state to its active state for a predetermined period t SLEW . At the predetermined period t SLEW after, the transition enable signal 240 changes 244 from its active state back to its inactive state at t3. In the example embodiment, t SLEW can have a range between 1 μs (microsecond) and 3 μs. However, this range should not be regarded as a limitation on the disclosed embodiments, and other predetermined periods of t SLEW can be used without departing from the scope of the disclosed embodiments. Those of ordinary skill in the art will readily understand that although high-level active signals are used in this description, low-level active signals can also be used without departing from the scope of the disclosed embodiments. In one embodiment, the time increment between t1 and t2 can be constant, while in another embodiment, it can be programmable, i.e., it can be easily changed. In yet another embodiment, the time increment for determining t SLEW between t2 and t3 can be constant, while in another embodiment, t SLEW can be programmable.

[0031] During the transition phase, due to the control effect of the boost circuit of the boost circuit device 222, the speed of the low-power and fast-wake-up bandgap reference voltage circuit 200A or 200B is increased. The power supply (such as power supply 222-1) provides additional current to the loop amplifier (such as operational amplifier 120), which expands the bandwidth of the amplifier. Certain passive capacitors (such as capacitor 222-2) can be connected or disconnected for accelerating the performance improvement necessary for waking up the low-power and fast-wake-up bandgap reference voltage circuit 200A or 200B. In the embodiments further described herein, in order to suppress the oscillation caused by the high current level during boosting, additional filter capacitors are connected or disconnected, where the high current level can reach two or three times the current in the steady-state mode. Generally speaking, as a result of the described solution, the wake-up time is significantly improved. Although the total current consumption of the low-power and fast-wake-up bandgap reference voltage circuit 200A or 200B rises during t SLEW , this is a compromise to support the required wake-up time and the low-power consumption requirement for steady-state operation.

[0032] Figure 3 is an example circuit diagram of an enhanced operational amplifier 300 of a low-power and fast-wake-up bandgap reference voltage circuit according to an embodiment. The power is supplied by V DD340 and ground (GND) 350 are provided to operational amplifier 300. The core of operational amplifier 300 includes power supply 311 and transistors 312, 313, 314, 315, 316, 317, 318, and 319. In an embodiment, each metal-oxide-semiconductor field-effect transistor (MOSFET) has an n-channel or a p-channel, as appropriate, and is further shown in Figure 3 Transistors (312, 313, 314, 315, 316, 317, 318, and 319) form a conventional operational transconductance amplifier (OTA).

[0033] According to this embodiment, to enhance the performance of the OTA, a power supply 322 is added, which supplies additional current to the circuit during period t SLEW . This addition is accomplished by connecting power supply 322 through a switch 321 controlled by a conversion enable signal 240. The current is provided through MOSFETs 323 and 324 that are substantially in parallel with MOSFETs 312 and 313, respectively. MOSFETs 323 and 324 also receive V IN- and V IN+ , just like their respective MOSFETs 312 and 313.

[0034] During t SLEW , MOSFETs 331, 332, 337, and 338 are in parallel with MOSFETs 316, 318, 317, and 319, respectively. This helps to carry excess current at the output device for the purpose of enhancing operational amplifier 300. It further avoids signal clipping and supports a faster response loop. To control this, switches 333, 334, 335, and 336 connect or disconnect MOSFETs 331, 332, 337, and 338, respectively, each under the control of the conversion enable signal 240.

[0035] Figure 4An example compensation circuit 400 for a low-power and fast-wakeup bandgap reference voltage circuit (e.g., 200A or 200B) according to an embodiment. Under the control of switch 430, a network of passive devices can change the characteristics it presents between network ports 440 and 450. Switch 430 opens or closes under the control of a conversion enable signal 240. The passive device network 400 includes a resistor 414 connected in series with a capacitor 424 and continuously connected between ports 440 and 450. The passive device network 400 further includes a resistor 412 connected in series with a capacitor 422 and switch 430. When closed, switch 430 connects the resistor 412 and capacitor 422 between port 440 and port 450, and disconnects them when open. As may be required, one or more compensation circuits 400 can be used to reduce the wakeup time of a low-power and fast-wakeup bandgap reference voltage circuit (e.g., 200A or 200B) and suppress oscillations that occur during t SLEW as further explained herein. Other compensation circuit topologies can be used to provide a prescribed benefit for each wakeup cycle and steady-state cycle of a low-power and fast-wakeup bandgap reference voltage circuit (e.g., 200A or 200B).

[0036] Figure 5 is an analog graph 500 of the output voltage of a standard bandgap reference voltage circuit relative to a low-power and fast-wakeup bandgap reference voltage circuit according to an embodiment. A standard bandgap reference voltage circuit refers to a conventional configuration of a bandgap reference voltage circuit. The horizontal axis 510 represents time, while the vertical axes 520 and 530 represent the output voltages of a prior art bandgap reference voltage circuit (curves 540 and 550) and a low-power and fast-wakeup bandgap reference voltage circuit (curve 560), respectively. The graph curves 540 and 550 of the standard circuit show that it takes 350 μs from the enable signal activated at time t = 10 ns (nanoseconds) until the faster standard circuit reaches the desired 400 mV. For the slower standard circuit, it takes at least 580 μs before reaching the required 400 mV. In an embodiment, V DD (e.g., at t = 0 ns) is connected to the enhanced operational amplifier 300, and then the enable signal is applied at t = 10 ns. Thus, according to the disclosed embodiment, the sequence of first powering the enhanced operational amplifier 300 occurs, then the enable signal 230 is activated, and wakeup acceleration begins.

[0037] For each original circuit configured to generate simulations of curves 540 and 560, the response of the low-power and fast-wakeup bandgap reference voltage circuit (e.g., 200A or 200B disclosed herein) provides a significant improvement. As shown by arrows 562 and 564, the conversion times of the circuits shown in graphs 540 and 550 reach the desired output voltage 560 of 400 mV within a few microseconds, respectively, or are improved by two orders of magnitude in wake-up time compared to standard circuits of the prior art.

[0038] Figure 6 is a simulation diagram 600 of the conversion cycles of the output voltage of the low-power and fast-wakeup bandgap reference voltage circuit with and without the 650 compensation circuit according to an embodiment. The horizontal axis 610 represents time and extends to approximately 6 μs. In contrast, Figure 5 the time axis 510 extends approximately 800 μs. The vertical axes 620, 630, and 640 represent the enable signal 230, the conversion enable signal 240, and the output voltage of the low-power and fast-wakeup bandgap reference voltage circuit 660, respectively. At t = 10 ns, the enable signal 230 changes from its inactive state to its active state. As a result, the one-shot timer 210 responds with a pulse of the conversion enable signal 240, which changes from its inactive state to its active state and remains for 2 μs before returning to its inactive state.

[0039] Curve 650 shows certain oscillations during t SLEW which stop when the conversion enable signal 240 deactivates. To suppress these oscillations, a suppression passive network such as, but not limited to, Figure 4 shown can be used to connect a filter to the output of the OTA at V OUT 360 and / or any other compensation network within the enhanced operational amplifier 300. As shown by curve 660, the wake-up time of the suppression circuit is minimized (less than 1 μs) compared to the non-suppression circuit, where the suppression circuit provides improved performance over the non-suppression circuit.

[0040] Figure 7 is an example flowchart 700 depicting the operation of the low-power and fast-wakeup bandgap reference voltage circuit according to an embodiment. Flowchart 700 describes the operations that occur to obtain a low-power and fast-wakeup bandgap reference voltage circuit (e.g., 200A or 200B), starting to operate from the application of the initial power supply voltage V DD activating the conversion enable signal 240 through a one-shot timer (e.g., one-shot timer 210) when the enable signal 230 is applied, connecting the boost circuit means (e.g., boost circuit means 222), and disconnecting the boost circuit means 222 when the conversion enable signal returns to its inactive state.

[0041] At S710, a low-power and fast-wakeup bandgap reference voltage circuit (e.g., 200A or 200B) receives an enable signal (e.g., enable signal 230). In an embodiment, prior to S710, V DD may be provided to certain devices related to the steady-state operation of the low-power and fast-wakeup bandgap reference voltage circuit.

[0042] At S720, in response to receiving the enable signal, a power supply (e.g., V DD 340) is applied to the devices of the low-power and fast-wakeup bandgap reference voltage circuit (e.g., 200A or 200B).

[0043] At S730, a pulse with a predetermined activation time t SLEW is generated by a one-shot timer (e.g., one-shot timer 210). This pulse is a conversion enable signal (e.g., conversion enable signal 240).

[0044] At S740, under the control of the pulse generated at S730, a boost circuit device (e.g., boost circuit device 222) connects (or disconnects as required) the core OTA. As further explained herein, the boost circuit device is designed to improve the wake-up response time of the low-power and fast-wakeup bandgap reference voltage circuit (e.g., 200A or 200B).

[0045] At S750, it is checked whether the pulse is still in its active state. If so, S750 is continued, i.e., it continues to wait for the duration of the pulse (i.e., the pulse width measured in time units) with the boost circuit device remaining connected (or disconnected as required); otherwise, S760 is continued.

[0046] At S760, when the pulse returns to its non-active state, the boost circuit device (or connection as required) that was previously connected (or disconnected) to improve the wake-up performance of the low-power and fast-wakeup bandgap reference voltage circuit (e.g., 200A or 200B) is disconnected.

[0047] It should be understood that once the enable signal (e.g., enable signal 230) returns to its non-active state, V REF 250 is no longer valid, and the low-power and fast-wakeup bandgap reference voltage circuit is turned off, thus consuming zero current. That is, when the enable signal returns to its non-active state, any reference voltage provided by the low-power and fast-wakeup bandgap reference voltage circuit is interrupted and is no longer valid. In addition, when the enable signal returns to its non-active state, any bias current of the low-power and fast-wakeup bandgap reference voltage circuit is interrupted.

[0048] In an embodiment, a low-power fast wake-up bandgap reference voltage circuit includes: a one-shot timer that generates a conversion enable signal pulse of a predetermined time period when receiving an enable signal; a bandgap voltage reference circuit device including an operational amplifier, a current mirror circuit device, a plurality of compensation capacitors, and a plurality of resistors communicatively connected to the one-shot timer, wherein when a reference voltage is provided after activating the enable signal, the bandgap voltage reference circuit device is adapted to operate at a sleep power consumption level or a steady-state power consumption level, wherein the steady-state power consumption is higher than the sleep power consumption; and a boost circuit device communicatively connected to the bandgap voltage reference circuit device and also communicatively connected to the one-shot timer, wherein the boost circuit device includes one or more boost circuits, and the boost circuit device causes one or more of the one or more boost circuits to be connected to the bandgap voltage reference when the one-shot conversion enable signal is activated, and one or more of the one or more boost circuits operate at a wake-up power consumption level higher than the steady-state power consumption level together with other circuits of the bandgap voltage reference circuit device.

[0049] In its embodiment, the low-power fast wake-up bandgap reference voltage circuit is configured for fast wake-up at the wake-up power consumption level, and when the one-shot conversion enable signal that causes the boost circuit device to disconnect is deactivated, the low-power fast wake-up bandgap reference voltage circuit operates at the steady-state power consumption level.

[0050] In another embodiment, a working method of the low-power fast wake-up bandgap reference voltage circuit includes: the low-power fast wake-up bandgap reference voltage circuit operates at the sleep power consumption level; the low-power fast wake-up bandgap reference voltage circuit receives an enable signal; when receiving the enable signal, wake-up power is provided to the low-power fast wake-up bandgap reference voltage circuit; when receiving the enable signal, a pulse signal with a first pulse width is generated; under the control of the pulse and within the duration of the first pulse width, the boost circuit device of the low-power fast wake-up bandgap reference voltage circuit is connected, the boost circuit device includes one or more boost circuits, and the one or more boost circuits cause the low-power fast wake-up bandgap reference voltage circuit to operate at a wake-up power consumption level higher than the steady-state power consumption level; and the boost circuit device is disconnected under the control of the pulse signal, so that the low-power fast wake-up bandgap reference voltage circuit consumes power at a steady-state power consumption level lower than the wake-up power consumption and higher than the sleep power consumption.

[0051] All of the examples and conditional language recited herein are for pedagogical purposes to assist the reader in understanding the principles of the disclosed embodiments and the concepts contributed by the inventor to the art, and should not be construed as limited to these specifically recited examples and conditions. Further, all statements herein reciting principles, aspects, and embodiments of the disclosed embodiments and their specific examples are intended to cover both structural and functional equivalents thereof. Additionally, it is intended that such equivalents include both currently known equivalents and equivalents developed in the future, i.e., any elements developed that perform the same function regardless of structure.

[0052] It should be understood that any reference herein to an element using terms such as "first", "second", etc. generally does not limit the number or order of those elements. Rather, these terms are generally used herein as a convenient method of distinguishing between two or more elements or instances of an element. Thus, a reference to a first element and a second element does not mean that only two elements may be used there, or that the first element must in some way precede the second element. Further, unless otherwise specified, a group of elements includes one or more elements.

[0053] As used herein, the phrase "at least one" followed by a list of items means that any of the listed items can be used individually, or any combination of two or more of the listed items can be used. For example, if a system is described as including "at least one of A, B, and C", the system can include only A; only B; only C; 2A; 2B; 2C; 3A; a combination of A and B; a combination of B and C; a combination of A and C; a combination of A, B, and C; a combination of 2A and C; a combination of A, 3B, and 2C; and so on.

Claims

1. A low-power fast wake-up bandgap reference voltage circuit, comprising: a one-shot timer, which generates a conversion enable signal of a predetermined time period upon receiving an enable signal; a bandgap voltage reference circuit arrangement comprising an operational amplifier communicatively coupled to the one-shot timer, a current mirror circuit arrangement, a plurality of compensation capacitors, and a plurality of resistors, wherein when providing a reference voltage after activating the enable signal, the bandgap voltage reference circuit arrangement is adapted to operate at a sleep power consumption level or a steady-state power consumption level, wherein the steady-state power consumption level is higher than the sleep power consumption level; as well as a boost circuit arrangement communicatively coupled to the bandgap voltage reference circuit arrangement and further communicatively coupled to the one-shot timer, wherein the boost circuit arrangement includes one or more boost circuits that, when the one-shot conversion enable signal is activated, cause one or more of the one or more boost circuits to be coupled to the bandgap voltage reference circuit arrangement, the one or more of the one or more boost circuits operating with other circuits of the bandgap voltage reference circuit arrangement at a wake-up power consumption level that is higher than the steady-state power consumption level; wherein the low power fast wake-up bandgap reference voltage circuit is configured for fast wake-up at the wake-up power consumption level, and Wherein when the one-shot conversion enable signal that disconnects the boost circuit device is deactivated, the low-power fast wake-up bandgap reference voltage circuit operates at a steady-state power consumption level.

2. The circuit of claim 1, wherein the predetermined time period is programmable. 3 . The circuit of claim 1 , wherein the predetermined time period ranges between 1 μs and 3 μs.

4. The circuit of claim 1, wherein the circuitry of the one or more boost circuits includes a power supply activated by the conversion enable signal.

5. The circuit of claim 1 , wherein the circuitry of the one or more voltage boost circuits includes one or more transistors that, when connected to the bandgap voltage reference circuit device, accept excess current when the conversion enable signal pulse is activated.

6. The circuit of claim 1, wherein the circuitry of the one or more voltage boost circuits includes a filter to suppress oscillations of the reference voltage when the conversion enable signal pulse is active.

7. A method for rapidly waking up a bandgap reference voltage circuit with low power, comprising: The low power fast wake-up bandgap reference voltage circuit operates at a sleep power consumption level; The low-power fast wake-up bandgap reference voltage circuit receives an enable signal; When receiving the enable signal, providing wake-up power to the low-power fast wake-up bandgap reference voltage circuit; When receiving the enable signal, generating a pulse signal with a first pulse width; Under the control of the pulse signal and within the duration of the first pulse width, a boost circuit device of the low-power fast wake-up bandgap reference voltage circuit is connected, the boost circuit device comprising one or more boost circuits, the one or more boost circuits enabling the low-power fast wake-up bandgap reference voltage circuit to operate at a wake-up power consumption level higher than a steady-state power consumption level; and The boost circuit device is turned off under control of the pulse signal so that the low power fast wake-up bandgap reference voltage circuit consumes power at the steady-state power consumption level, which is lower than the wake-up power consumption level and higher than the sleep power consumption level. The method according to claim 7 , wherein the pulse signal is a conversion enable signal.

9. The method of claim 7, wherein the first pulse width is programmable.

10. The method of claim 7, wherein the first pulse width is between 1 μs and 3 μs.

11. The method of claim 7, wherein generating the pulse signal is performed by a one-shot timer.

12. The method of claim 7, wherein circuitry of the one or more boost circuits includes a power supply activated by the enable signal.

13. The method of claim 7, wherein the circuitry of the one or more voltage boost circuits includes one or more transistors that, when connected to the wake-up bandgap reference voltage circuit, accept excess current when the enable signal is activated.

14. The method of claim 7, wherein the circuitry of the one or more boost circuits includes a filter to suppress oscillations of the low power fast wake-up bandgap reference voltage when the enable signal pulse is active.

15. The method according to claim 7, further comprising: When the enable signal returns to the inactive state, at least the reference voltage is interrupted.

16. The method according to claim 7, further comprising: When the enable signal returns to an inactive state, at least the bias current is interrupted.

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