Decoding method and device, electronic equipment and storage medium

By introducing first-in, first-out queues into the LDPC decoder, the decoding process is optimized, and the problems of long decoding time and invalid updates in the existing technology are solved, and a faster decoding process is achieved.

CN120179451APending Publication Date: 2025-06-20SHANDONG YUNHAI GUOCHUANG CLOUD COMPUTING EQUIP IND INNOVATION CENT CO LTD
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Patent Information

Application Number
CN202510237602.7
Authority / Receiving Office
CN · China
Patent Type
Applications(China)
Current Assignee / Owner
Filing Date
2025-02-28
Publication Date
2025-06-20

AI Technical Summary

Technical Problem

In the prior art, the LDPC decoder needs to run two rounds when updating information per layer, resulting in a longer decoding time; in addition, there are more invalid updates, which further extends the decoding time.

Method used

The first-in, first-out queue is introduced into the decoder, the second calculated information is first stored in the queue, and after the calculation of the non-zero block information is completed, the information in the queue is retrieved and the information in the next layer is updated in parallel.

Benefits of technology

By optimizing the decoding process, the idleness of computing resources is reduced, the number of invalid updates is reduced, and the effect of speeding up the decoding speed and shortening the decoding time is achieved.

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Abstract

The invention discloses a decoding method and device, electronic equipment and a storage medium, and relates to the technical field of data storage, and the decoding method comprises the steps: adding a first-in-first-out queue in a decoder, storing second information obtained through calculation in the first-in-first-out queue, waiting for the second information of a variable node corresponding to one layer of non-zero block information to be calculated, and storing the second information in the first-in-first-out queue after the second information of the variable node corresponding to one layer of non-zero block information is calculated; second information of the current layer in the first-in first-out queue is taken out, and the reliability of the variable node corresponding to the non-zero block information of the current layer is calculated. Extracting the second information of the current layer in the first-in first-out queue, calculating the reliability of the variable node corresponding to the non-zero block information of the current layer, and calculating the second information of the next layer in parallel, according to the invention, the problems of long decoding time caused by idle operation resources in related technologies and long decoding time caused by more invalid updates in the related technologies are solved, and the technical effects of accelerating the decoding speed and shortening the decoding time are achieved.
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Description

Technical Field

[0001] The present application relates to the technical field of data storage, and in particular, to a decoding method, apparatus, electronic device, and storage medium. Background Art

[0002] Due to its decoding characteristics approaching the Shannon limit and low algorithm complexity, the Low Density Parity Check (LDPC) code is widely used in solid-state storage controllers. The LDPC decoder depends on the parity-check matrix for decoding, where the rows and columns of the parity-check matrix correspond to check nodes and variable nodes respectively. In related technologies, the layered normalized min-sum algorithm is a commonly used decoding method, which decodes by hierarchically dividing the parity-check matrix and calculating and updating the information passed and received by variable nodes and the reliability of variable nodes layer by layer.

[0003] However, when decoding using a layered normalized min-sum algorithm in related technologies, the update of information for each layer requires two rounds of operation to obtain, resulting in a long decoding time. When decoding using another layered normalized min-sum algorithm, there are many invalid updates, and the decoding time is also long. Summary of the Invention

[0004] The present application provides a decoding method, apparatus, electronic device, and storage medium, so as to at least solve the problem in related technologies that the decoding time is long because the update of information for each layer requires two rounds of operation to obtain, and the decoding time is long because there are many invalid updates.

[0005] The present application provides a decoding method, including:

[0006] Receiving a codeword to be decoded;

[0007] For any bit in the codeword to be decoded, determining the initial reliability and initial first information of the variable node corresponding to the bit;

[0008] Based on the position information of non-zero blocks in the parity-check matrix, generating a target check array with non-zero block information as elements, and the storage order of non-zero block information in the target check array is the decoding order, and the decoding order satisfies no conflict in the decoding process;

[0009] Sequentially reading the non-zero block information in the target check array, determining the non-zero block information of the current layer, based on the non-zero block information of the current layer, determining the target variable nodes corresponding to the non-zero block information of the current layer, determining the second information of the target variable nodes based on the reliability and first information of the target variable nodes, and storing the second information in a first-in-first-out queue;

[0010] Steps of concurrently executing obtaining second information of a target variable node from a first-in-first-out queue, updating first information and reliability of the target variable node based on the second information, and starting determination of second information of a target variable node corresponding to non-zero block information of a next layer;

[0011] When the reliability of a variable node corresponding to any bit is updated, determine a target codeword to be decoded, check the target codeword to be decoded, and if the check passes, stop decoding and output a decoding result.

[0012] This application also provides a decoding device, including:

[0013] A receiving module, configured to receive a codeword to be decoded;

[0014] A determining module, configured to determine initial reliability and initial first information of a variable node corresponding to a bit for any bit in the codeword to be decoded;

[0015] A generating module, configured to generate a target check array with non-zero block information as elements based on position information of non-zero blocks in a check matrix, where the storage order of the non-zero block information in the target check array is a decoding order, and the decoding order satisfies no conflict in the decoding process;

[0016] A reading module, configured to sequentially read non-zero block information in the target check array, determine non-zero block information of a current layer, determine a target variable node corresponding to the non-zero block information of the current layer based on the non-zero block information of the current layer, determine second information of the target variable node based on the reliability and first information of the target variable node, and store the second information into a first-in-first-out queue;

[0017] A concurrent execution module, configured to concurrently execute steps of obtaining second information of a target variable node from a first-in-first-out queue, updating first information and reliability of the target variable node based on the second information, and starting determination of second information of a target variable node corresponding to non-zero block information of a next layer;

[0018] A checking module, configured to when the reliability of a variable node corresponding to any bit is updated, determine a target codeword to be decoded, check the target codeword to be decoded, and if the check passes, stop decoding and output a decoding result.

[0019] This application also provides an electronic device, including: a memory, configured to store a computer program; a processor, configured to implement steps of any of the above decoding methods when executing the computer program.

[0020] This application also provides a computer-readable storage medium, where a computer program is stored in the computer-readable storage medium, and the computer program, when executed by a processor, implements steps of any of the above decoding methods.

[0021] The present application also provides a computer program product, including a computer program, which implements the steps of any of the above decoding methods when executed by a processor.

[0022] Through the present application, since a first-in-first-out queue is added to the decoder, the calculated second information is first stored in the first-in-first-out queue. After the second information of the variable nodes corresponding to the non-zero blocks of one layer is calculated, the second information of the current layer in the first-in-first-out queue is taken out, and the reliability of the variable nodes corresponding to the non-zero block information of the current layer is calculated. While taking out the second information of the current layer in the first-in-first-out queue and calculating the reliability of the variable nodes corresponding to the non-zero block information of the current layer, the second information of the next layer is calculated in parallel, which solves the problems of long decoding time caused by idle computing resources in the related art and long decoding time caused by many invalid updates in the related art, and achieves the technical effect of accelerating the decoding speed and shortening the decoding time. BRIEF DESCRIPTION OF THE DRAWINGS

[0023] To more clearly illustrate the embodiments of the present application, the drawings required for use in the embodiments will be briefly introduced below. Obviously, the drawings in the following description are only some embodiments of the present application. For those of ordinary skill in the art, other drawings can be obtained based on these drawings without creative efforts.

[0024] Figure 1 It is a schematic flowchart of a decoding method provided by an embodiment of the present application;

[0025] Figure 2 It is a schematic diagram of a parity check matrix provided by an embodiment of the present application;

[0026] Figure 3 It is a schematic flowchart of another decoding method provided by an embodiment of the present application;

[0027] Figure 4 It is a schematic diagram of an initial parity check array provided by an embodiment of the present application;

[0028] Figure 5 It is a schematic diagram of the non-zero block calculation order after the calculation timing of the parity check matrix with non-zero block conflict problems is adjusted provided by an embodiment of the present application;

[0029] Figure 6 It is a schematic diagram of the decoding timing provided by an embodiment of the present application;

[0030] Figure 7 It is an architecture diagram of a decoding system provided by an embodiment of the present application;

[0031] Figure 8 It is a structural block diagram of a decoding device provided by an embodiment of the present application;

[0032] Figure 9 This is a schematic diagram of the hardware structure of an electronic device provided by an embodiment of the present application. Detailed implementation manners

[0033] Next, the technical solutions in the embodiments of the present application will be clearly and completely described in conjunction with the accompanying drawings in the embodiments of the present application. Obviously, the described embodiments are only a part of the embodiments of the present application, rather than all the embodiments. Based on the embodiments in the present application, all other embodiments obtained by those of ordinary skill in the art without creative efforts shall fall within the protection scope of the present application.

[0034] It should be noted that in the description of the present application, the terms "include", "comprise" or any other variation thereof are intended to cover a non-exclusive inclusion, such that a process, method, article or device including a series of elements includes not only those elements but also other elements not expressly listed, or elements inherent to such process, method, article or device. The terms "first", "second", etc. in the present application are used to distinguish similar objects and are not used to describe a specific order or sequence.

[0035] To enable those skilled in the art of the present technology to better understand the solution of the present application, the present application will be further described in detail below in conjunction with the accompanying drawings and specific implementation manners.

[0036] LDPC is widely used in solid state drive (SSD) controllers due to its decoding characteristics approaching the Shannon limit, low algorithm complexity, large throughput, and excellent error correction ability in the scenarios of large codewords and high code rates. The LDPC decoder depends on the parity-check matrix (H matrix) for decoding. The matrix elements of the parity-check matrix are composed of 0 and 1. The number of columns of the parity-check matrix is equal to the length of the codeword. One column corresponds to a variable node, that is, one bit in the codeword. The number of rows of the parity-check matrix corresponds to the number of parity-check equations. One row corresponds to a parity-check node, that is, one parity-check equation. The non-zero elements (i.e., 1) in one row of the parity-check matrix indicate which variable nodes participate in the parity-check equation corresponding to that row.

[0037] Checking the codeword means determining the check result according to the product of the codeword and the parity-check matrix. If the check result is all 0, the decoding is passed, indicating that all parity-check equations are passed and the codeword is correct. That is to say, the meaning that one row of the parity-check matrix represents a parity-check equation is that the codeword corresponding to the non-zero elements in one row of the parity-check matrix is selected and exclusive OR is performed one by one. If the result is 0, it means that this parity-check equation passes.

[0038] In the related art, various algorithms derived from the min-sum algorithm are used in LDPC decoders. Among them, the layered normalized min-sum algorithm is more commonly used in the field of solid-state storage. The characteristic of this layered normalized min-sum algorithm is that the parity-check matrix is divided into multiple layers by rows and can be calculated layer by layer. The calculation of the next layer can only be started after the calculation of each layer is completed until the update of the parity-check matrix is completed. It can be understood that the calculation within each layer is performed by columns, and the order of column-wise calculation within the layer does not affect the calculation result.

[0039] A layered normalized min-sum algorithm in the related art is as follows:

[0040] Define the non-zero block of the H matrix as the minimum unit of layered calculation. Divide the non-zero elements of each layer into multiple blocks and calculate one non-zero block each time. Define Lq as the information passed from the variable node to the check node, Lr as the information passed from the check node to the variable node, and LQ as the reliability of the variable node.

[0041] Each calculation needs to update the three values of Lq, Lr, and LQ. Use (o) to represent the old value before update and (n) to represent the new value after update.

[0042] The in-layer calculation of layered decoding is divided into three steps:

[0043] Lq = LQ(o) - Lr(o) (1)

[0044] Lr(n) = α·Π n\j sgn(Lq)·min n\j |Lq| (2)

[0045] LQ(n) = Lq + Lr(n) (3)

[0046] Among them, in formula (2), the update method of Lr is that after the update of Lq in the current layer is completed, obtain the minimum value min n\j |Lq| of the absolute values of all Lq except the current column, and obtain the product Π n\j sgn(Lq) of the sign values of all Lq except the current column. Based on the minimum value of the absolute values of all Lq except the current column and the product of the sign values of all Lq except the current column, determine the updated Lr. α is the normalization factor.

[0047] It can be seen that when calculating in the order of (1) → (2) → (3), for the information update of each layer, two rounds of operations are required to complete. In the first round, Lq of each column in the current layer is updated. After completion, the minimum value, the second minimum value, and the sign value of all Lq in the current layer can be obtained. In the second round, Lr and LQ required for each column are calculated. This method results in a longer decoding time. Since different calculation modules are used for the calculation of Lq and LQ, half of the computing resources will be idle for half of the time, and the number of operation cycles for a single layer is twice the number of non-zero blocks in the H matrix.

[0048] Another hierarchical normalization min-sum algorithm in the related art adjusts the calculation order of the three steps in the intra-layer calculation of hierarchical decoding to (2) → (3) → (1), with (1) calculated last. After calculating Lq of each layer, the minimum value and the second minimum value of Lq of each layer are temporarily stored and used when updating the corresponding Lr next time. After adjusting to this calculation order, if there is no non-zero block conflict at the same position between the upper layer and the lower layer, the three steps can be calculated in parallel, and the number of operation cycles for a single layer is roughly the same as the number of non-zero blocks in the H matrix. For the problem of non-zero block conflict between the upper and lower layers, since the calculation order by column within the layer does not affect the final calculation result, the non-zero block conflict problem between the upper and lower layers can be solved by adjusting the calculation order of non-zero blocks.

[0049] However, the update of LQ after the update of Lq is the effective update. Due to the adjustment of the calculation order, the new value of LQ cannot be updated according to the value of Lq in the current layer, resulting in more invalid updates at the initial stage of calculation, increasing the actual number of iterations and the decoding time. In addition, storing the minimum value and the second minimum value of Lq of each layer in a Static Random Access Memory (SRAM) requires a large amount of data and needs to be read again when calculating each non-zero block of the H matrix, which will increase power consumption, and continuously occupying a large SRAM is also not conducive to parallel expansion.

[0050] In view of the above problems, an embodiment of the present application provides a decoding method, apparatus, electronic device, and storage medium. The method adds a first-in-first-out queue to the decoder, stores the information of the variable nodes calculated and passed to the check nodes in the first-in-first-out queue, and waits until the second information of the variable nodes corresponding to a non-zero block of information in one layer is calculated. Then, the second information of the current layer in the first-in-first-out queue is taken out to calculate the reliability of the variable nodes corresponding to the non-zero block of information in the current layer. While taking out the second information of the current layer in the first-in-first-out queue to calculate the reliability of the variable nodes corresponding to the non-zero block of information in the current layer, the second information of the next layer is calculated in parallel. By adopting the order of (1)→(2)→(3), after adding the first-in-first-out queue, the decoding process is optimized, solving the problems in the related art that for the information update of each layer, two rounds of operations are required to complete, resulting in a long decoding time and idle operation resources, and also solving the problem in the related art that there is ineffective update, resulting in an increase in the actual number of iterations and a long decoding time. The technical effect of making the number of operation cycles in a single layer approximately the same as the number of non-zero blocks in the H matrix and accelerating the decoding speed is achieved.

[0051] Moreover, the minimum value and the second minimum value of Lq in the present application are used layer by layer, and there is no serial use. Compared with the related art, it is not necessary to frequently read a large SRAM, which is beneficial to parallel expansion and has low power consumption.

[0052] The following specific embodiments can be combined with each other, and the same or similar concepts or processes may not be repeated in some embodiments.

[0053] An embodiment of the present application provides a decoding method, which is applied to an LDPC decoder. Figure 1 It is a flowchart of the decoding method provided by the embodiment of the present application, as Figure 1 shown. The process includes the following steps:

[0054] Step S101, receive the codeword to be decoded.

[0055] Among them, the received codeword to be decoded may be affected by noise interference or have errors. Therefore, it is necessary to decode the codeword to be decoded to restore the correct codeword. The codeword to be decoded is stored based on the encoding rules of the LDPC code.

[0056] Step S102, for any bit in the codeword to be decoded, determine the initial reliability and the initial first information of the variable node corresponding to the bit.

[0057] Among them, as described above, any bit in the codeword to be decoded corresponds to a variable node. According to the bit, determine the initial reliability and the initial first information of the variable node corresponding to the bit, and then obtain the initial reliability and the initial first information of multiple variable nodes corresponding to the codeword to be decoded.

[0058] The first information is the information Lr passed from the aforementioned check node to the variable node. The initial first information sets the value of Lr to 0.

[0059] Step S103: Based on the position information of the non-zero blocks in the parity-check matrix, generate a target parity-check array with the non-zero block information as elements. The storage order of the non-zero block information in the target parity-check array is the decoding order, and the decoding order satisfies no conflict in the decoding process.

[0060] Wherein, Figure 2 is a schematic diagram of a parity-check matrix provided by an embodiment of the present application. As Figure 2 shown, the first row is the row number, the first column is the column number, and the rest is the parity-check matrix. The grids marked with numbers in the parity-check matrix represent the non-zero blocks in the parity-check matrix, and the blank grids represent the all-zero blocks in the parity-check matrix, which are not stored in actual use. The numbers in the non-zero blocks represent their numbers, and the subsequent use of non-zero block 1 represents Figure 2 the non-zero block numbered 1 in

[0061] The parity-check matrix is stored by column. For example, Figure 1 in the parity-check matrix, the first column stores three non-zero blocks: non-zero block 1, non-zero block 5, and non-zero block 19. The second column stores two non-zero blocks: non-zero block 6 and non-zero block 10, and so on.

[0062] In this embodiment, according to the position information of the non-zero blocks in the parity-check matrix, the storage order of the non-zero block information in the target parity-check array is determined, and then a target parity-check array with the non-zero block information as elements is generated.

[0063] It can be understood that no conflict in the decoding process means that no non-zero block conflict problem will occur when decoding according to the storage order of the non-zero block information in the target parity-check array. For multiple non-zero blocks with the same corresponding variable nodes, the calculation timing of the reliability of the variable node corresponding to the non-zero block with the earlier row information should be prior to the calculation timing of the second information of the variable node corresponding to the non-zero block with the later row information. If the calculation timing of the reliability of the variable node corresponding to the non-zero block with the earlier row information is later than the calculation timing of the second information of the variable node corresponding to the non-zero block with the later row information, a non-zero block conflict problem will occur.

[0064] Step S104: Sequentially read the non-zero block information in the target parity-check array, determine the non-zero block information of the current layer, based on the non-zero block information of the current layer, determine the target variable nodes corresponding to the non-zero block information of the current layer, determine the second information of the target variable nodes based on the reliability of the target variable nodes and the first information, and store the second information in the first-in first-out queue.

[0065] Among them, by sequentially reading the non-zero block information in the target check group, when the layer information of a non-zero block information read for the first time indicates that the non-zero block corresponding to the non-zero block information is the last non-zero block of the layer, determine that the non-zero block information is the end-of-layer non-zero block information, and determine that the end-of-layer non-zero block information and the non-zero block information whose storage order is before the storage order of the end-of-layer non-zero block information are the non-zero block information of the first layer.

[0066] After that, every time the layer information of a non-zero block information read indicates that the non-zero block corresponding to the non-zero block information is the last non-zero block of the layer, determine that the end-of-layer non-zero block information and the non-zero block information whose storage order is before the storage order of the end-of-layer non-zero block information and after the storage order of the previous end-of-layer non-zero block information are the non-zero block information of this layer.

[0067] Among them, every time a non-zero block information is read, according to the column information in the non-zero block information, determine the target variable node corresponding to the non-zero block information, based on the reliability of the target variable node and the first information, determine the second information of the target variable node, and store the second information in the first-in first-out queue. The second information is the information Lq passed from the variable node to the check node.

[0068] Step S105, execute in parallel the steps of obtaining the second information of the target variable node from the first-in first-out queue, updating the first information and reliability of the target variable node based on the second information, and starting the determination of the second information of the target variable node corresponding to the non-zero block information of the next layer.

[0069] Among them, after all the second information of the target variable nodes corresponding to the non-zero block information of the current layer is stored in the first-in first-out queue, execute in parallel the steps of obtaining the second information of the target variable node from the first-in first-out queue, updating the first information and reliability of the target variable node based on the second information, and starting the determination of the second information of the target variable node corresponding to the non-zero block information of the next layer. Among them, the step of starting the determination of the second information of the target variable node corresponding to the non-zero block information of the next layer is to take the next layer as the current layer, execute to determine the non-zero block information of the current layer, based on the non-zero block information of the current layer, determine the target variable node corresponding to the non-zero block information of the current layer, based on the reliability of the target variable node and the first information, determine the second information of the target variable node, and store the second information in the first-in first-out queue.

[0070] That is to say, after the Lq calculation of the current layer is completed, the LQ calculation of the current layer will be started. At this time, the calculation logic part of Lq can directly start the Lq calculation of the next layer, that is, the LQ calculation of the current layer and the Lq calculation of the next layer are carried out synchronously.

[0071] It can be understood that to update the first information and reliability of the target variable node based on the second information, it is necessary to first update the first information of the target variable node based on the second information, and then update the reliability of the target variable node based on the second information of the target variable node and the updated first information.

[0072] Step S106: When the reliability of the variable node corresponding to any bit is updated, determine the target codeword to be decoded, check the target codeword to be decoded. If the check passes, stop decoding and output the decoding result.

[0073] Among them, when the reliability of the variable node corresponding to any bit is updated, that is, every time the calculation of an LQ is completed, the step of determining the target codeword to be decoded and checking the target codeword to be decoded is started. If the check passes, stop decoding and output the decoding result. It can be understood that if the target codeword to be decoded passes the check, the decoding result is the target codeword to be decoded.

[0074] When the reliability of the variable node corresponding to any bit is updated, determine whether it is necessary to update the bit in the codeword to be decoded according to the current reliability of the variable node corresponding to any bit. If it is necessary to update the bit in the codeword to be decoded, determine the bit to be updated, update the codeword to be decoded based on the bit to be updated, and determine the updated codeword to be decoded as the target codeword to be decoded. If there is no need to update the bit in the codeword to be decoded, determine the codeword to be decoded as the target codeword to be decoded.

[0075] It can be understood that checking the target codeword to be decoded means checking the target codeword to be decoded based on the parity-check matrix. If all the check results are 0, the check passes.

[0076] If the check passes, continue decoding until the check passes or the maximum number of iterations is reached, where the maximum number of iterations is set by the technical personnel.

[0077] In the decoding method provided by the embodiments of the present application, since a first-in first-out queue is added to the decoder, the calculated second information is first stored in the first-in first-out queue. After the second information of the variable nodes corresponding to the non-zero block information of one layer is calculated, the second information of the current layer in the first-in first-out queue is taken out to calculate the reliability of the variable nodes corresponding to the non-zero block information of the current layer. While taking out the second information of the current layer in the first-in first-out queue to calculate the reliability of the variable nodes corresponding to the non-zero block information of the current layer, the second information of the next layer is calculated in parallel, solving the problems of long decoding time caused by idle computing resources in the related technology and long decoding time caused by many invalid updates in the related technology, and achieving the technical effect of accelerating the decoding speed and shortening the decoding time.

[0078] An embodiment of the present application provides a decoding method, which is applied to an LDPC decoder. Figure 3 It is a flowchart of the decoding method provided by the embodiment of the present application. As Figure 3 shown, the process includes the following steps:

[0079] Step S301: Receive the codeword to be decoded. For details, please refer to Figure 1 step S101 of the embodiment shown, which will not be elaborated here.

[0080] Step S302: For any bit in the codeword to be decoded, determine the initial reliability and the initial first information of the variable node corresponding to the bit. For details, please refer to Figure 1 step S102 of the embodiment shown, which will not be elaborated here.

[0081] Step S303: Based on the position information of the non-zero blocks in the parity-check matrix, generate a target parity-check array with non-zero block information as elements. The storage order of the non-zero block information in the target parity-check array is the decoding order, and the decoding order satisfies no conflict in the decoding process. For details, please refer to Figure 1 step S103 of the embodiment shown, which will not be elaborated here.

[0082] Step S304: Sequentially read the non-zero block information in the target parity-check array, determine the non-zero block information of the current layer, based on the non-zero block information of the current layer, determine the target variable nodes corresponding to the non-zero block information of the current layer, based on the reliability and the first information of the target variable nodes, determine the second information of the target variable nodes, and store the second information in a first-in-first-out queue. For details, please refer to Figure 1 step S104 of the embodiment shown, which will not be elaborated here.

[0083] Step S305: Parallelly execute the steps of obtaining the second information of the target variable nodes from the first-in-first-out queue and updating the first information and reliability of the target variable nodes based on the second information, and the step of starting to determine the second information of the target variable nodes corresponding to the non-zero block information of the next layer.

[0084] Specifically, the above step S305 includes:

[0085] Step S3051: Based on the second information of the target variable nodes, determine the minimum value and the second minimum value of the absolute value of the second information.

[0086] Step S3052: Based on the sign information of the second information of the target variable nodes, determine the sign information of the first information.

[0087] Step S3053: Based on the minimum value, the second minimum value of the absolute value of the second information, and the sign information of the first information, determine the first information.

[0088] For details, refer to the aforementioned update method of Lr, which will not be elaborated here.

[0089] Step S306: When the reliability of the variable node corresponding to any bit is updated, determine the target codeword to be decoded, and perform a check on the target codeword to be decoded. If the check passes, stop decoding and output the decoding result. For details, please refer to Figure 1 Step S106 of the embodiment shown, which will not be elaborated here.

[0090] The decoding method provided by the embodiment of the present application determines the minimum value and the second minimum value of the absolute value of the second information based on the second information of the target variable node, determines the sign information of the first information based on the sign information of the second information of the target variable node, and determines the first information based on the minimum value, the second minimum value of the absolute value of the second information, and the sign information of the first information, so as to update the information of the variable node more accurately in each decoding iteration process, thereby improving the accuracy and efficiency of the overall decoding.

[0091] In some optional implementation manners, the above step S303 includes:

[0092] Step a1: Determine the layer information of the non-zero block based on the row information and column information of the non-zero block in the parity-check matrix. The position information of the non-zero block includes row information and column information.

[0093] Among them, the layer information includes which layer the non-zero block is located in and whether the non-zero block is the last non-zero block in that layer.

[0094] Step a2: Generate an initial parity-check array based on the row information, column information, and layer information of the non-zero block. The non-zero block information includes row information, column information, and layer information.

[0095] Figure 4 For the schematic diagram of the initial parity-check array provided by the embodiment of the present application. As Figure 4 shown, one element of the parity-check array is a row. The first column of each element is the number of the non-zero block in the parity-check matrix, which is not stored in actual use. The second column is the column index of the non-zero block, that is, the column information of the non-zero block. The third column is the column weight index of the non-zero block, that is, which non-zero block in the column the non-zero block is. The fourth column is the layer end flag, that is, the flag indicating whether the non-zero block is the last non-zero block in that layer.

[0096] Combined with Figure 2 the shown parity-check matrix, each row of the parity-check matrix is regarded as a layer, and the calculation order of the layered decoding algorithm is described. According to the calculation order of the layered decoding algorithm, first calculate the non-zero blocks in the first layer of the parity-check matrix, that is, Figure 2 the non-zero blocks 1, 2, 3, 4 in, and after the calculation of the non-zero blocks in the first layer is completed, calculate the non-zero blocks in the second layer of the parity-check matrix, that is, Figure 2After the non-zero blocks 5, 6, 7, 8 in [[ ]] are calculated, calculate the non-zero blocks in the next layer, and so on. In actual use, elements can be read according to the storage order of non-zero block information in the check array, and the check matrix can be indexed according to the reading result of the check array to obtain the non-zero block to be calculated and whether this non-zero block is the last non-zero block in the current layer.

[0097] That is to say, an initial check array is generated in the order of non-zero block row information from small to large, column information from small to large, and layer information from small to large in the check matrix.

[0098] Exemplarily, for Figure 2 the shown check matrix, if each row of the check matrix is regarded as a layer, the column information of the non-zero block 7 is 4, the column re-index is 1, and it is not the last non-zero block in this layer, then the corresponding layer end flag is 0, and the non-zero block information corresponding to the non-zero block 7 is (4, 1, 0).

[0099] Another exemplarily, for Figure 2 the shown check matrix, if each row of the check matrix is regarded as a layer, the column information of the non-zero block 18 is 8, the column re-index is 2, and it is the last non-zero block in this layer, then the corresponding layer end flag is 1, and the non-zero block information corresponding to the non-zero block 18 is (8, 2, 1).

[0100] Step a3, based on the column information in the non-zero block information, determine multiple combinations of non-zero block information with the same column information.

[0101] Step a4, for any combination of non-zero block information, determine whether there are adjacent non-zero block information with adjacent row information in the combination of non-zero block information.

[0102] Step a5, if there is adjacent non-zero block information with adjacent row information in the combination of non-zero block information, determine whether the calculation timing of the reliability of the first variable node corresponding to the first non-zero block information with the earlier row information in the adjacent non-zero block information is earlier than the calculation timing of the second information of the first variable node corresponding to the second non-zero block information with the later row information in the adjacent non-zero block information.

[0103] Step a6: If the calculation timing of the reliability of the first variable node corresponding to the first non-zero block information with the earlier row information among the adjacent non-zero block information is after the calculation timing of the second information of the first variable node corresponding to the second non-zero block information with the later row information among the adjacent non-zero block information, then adjust the storage order of the first non-zero block information in the initial check array forward and adjust the storage order of the second non-zero block information backward, where the adjusted storage order of the first non-zero block information is not earlier than the earliest storage order of multiple first target non-zero block information with the same row information as the first non-zero block information, and the adjusted storage order of the second non-zero block information is not later than the latest storage order of multiple second target non-zero block information with the same row information as the second non-zero block information.

[0104] Among them, since during decoding, the order of in-layer calculations does not affect the calculation results. For example, for a parity-check matrix as Figure 2 shown, if each row of the parity-check matrix is regarded as a layer, then for the first layer, calculating in the order of non-zero blocks 1, 2, 3, 4 and calculating in the order of 4, 1, 3, 2 does not affect the decoding result. Therefore, the non-zero block conflict problem can be solved by adjusting the calculation order of non-zero blocks within a layer. After solving the non-zero block conflict problem, generating a check array according to the new storage order of non-zero blocks can complete the adjustment of the decoding order.

[0105] Exemplarily, for a parity-check matrix as Figure 2 shown, the non-zero block conflict problem is specifically manifested as:

[0106] When calculating LQ corresponding to non-zero block 1, Lq corresponding to non-zero block 5 is calculated synchronously. Since non-zero block 1 and non-zero block 5 correspond to the same variable node, according to the calculation process, it is necessary to first complete the LQ calculation of non-zero block 1, and then the Lq calculation of non-zero block 5 can be started. If the Lq calculation of non-zero block 5 is before the LQ calculation of non-zero block 1, then there is a non-zero block conflict.

[0107] This non-zero block conflict problem can be solved by adjusting the calculation order of non-zero blocks within the parity-check matrix layer. Specifically: Suppose the LQ of non-zero block 1 needs to be calculated 2 beats earlier than the Lq of non-zero block 5. Then the calculation order of the Lq of non-zero block 5 can be adjusted backward so that the calculation order of the LQ of non-zero block 1 is the same as that of the Lq of non-zero block 6. Then calculate the Lq of non-zero block 7, and then calculate the Lq of non-zero block 5. In this way, the calculation timing requirements are met and the non-zero block conflict problem is solved.

[0108] Step a7: Return to execute the step of determining combinations of multiple non-zero block information with the same column information based on the column information in the non-zero block information until there is no need to adjust the storage order of the non-zero block information in the initial check array, and obtain the target check array.

[0109] The descriptions of the above steps a3 to a7 can be summarized as follows: First, find two non-zero blocks where there may be conflicts in the calculation timing, then calculate the timing relationship between the two non-zero blocks. If the timing relationship between the two non-zero blocks does not meet the calculation timing requirements, adjust the calculation timing of the non-zero blocks within the layer so that the calculation timing of the non-zero block in the front layer among the two non-zero blocks is more forward within its layer, and the calculation timing of the non-zero block in the rear layer is more backward within its layer. After the adjustment is completed, continue to find two non-zero blocks where there may be conflicts in the calculation timing, and return to execute the step of calculating the timing relationship between the two non-zero blocks until the timing between all non-zero blocks that may conflict meets the calculation timing requirements, determining that the non-zero block conflict problem is solved. Exemplarily, Figure 5 is a schematic diagram of the calculation order of non-zero blocks after adjusting the calculation timing of the parity-check matrix with non-zero block conflict problems provided by the embodiment of the present application. As Figure 5 shown, it is a schematic diagram of the calculation order of non-zero blocks after adjusting the calculation timing of the non-zero blocks in the parity-check matrix shown in Figure 2 . Among them, Figure 5 the first row in represents the calculation order of each non-zero block in the current row, and the first column is the row information of each non-zero block in the parity-check matrix. The calculation timing between all non-zero blocks that may conflict meets the preset timing distance. Exemplarily, this preset timing distance can be two clock cycles.

[0110] It should be noted that the above process of steps c3 to c7 can also solve the problem of non-zero block conflicts in consecutive multiple layers. Such as Figure 2 the conflict problems of non-zero blocks 1, 5, and 19 and the conflict problems of non-zero blocks 3, 8, and 12 in the parity-check matrix shown. It can also solve the situation where the number of non-zero block conflicts is greater than half of the number of non-zero blocks in one layer.

[0111] The decoding method provided by the embodiment of the present application adjusts the calculation timing of non-zero blocks in the parity-check matrix within each layer. If it is found that there are overlapping non-zero blocks in adjacent two layers, the calculation timing of the overlapping non-zero blocks is staggered to ensure that there is no column conflict, that is, no non-zero block conflict. The overall operation order is adjusted and the inter-layer operation is switched through the scheduling array, that is, the parity-check array, which speeds up the decoding speed of the LDPC decoder and improves the decoding accuracy.

[0112] In some alternative embodiments, the above decoding method further includes:

[0113] Step b1, if the calculation timing of the reliability of the first variable node corresponding to the first non-zero block information with the forward row information in the adjacent non-zero block information is prior to the calculation timing of the second information of the first variable node corresponding to the second non-zero block information with the backward row information in the adjacent non-zero block information, then there is no need to adjust the storage order of the first non-zero block information and the second non-zero block information in the initial parity-check array.

[0114] The calculation timing of the reliability of the first variable node corresponding to the first non-zero block information with the earlier row information among the adjacent non-zero block information precedes the calculation timing of the second information of the first variable node corresponding to the second non-zero block information with the later row information among the adjacent non-zero block information, indicating that the calculation timing requirement is met and there is no need to adjust the storage order, i.e., the decoding order.

[0115] The decoding method provided by the embodiments of the present application ensures the accuracy of decoding by not adjusting the storage order corresponding to the non-zero block information when there is no column conflict, i.e., non-zero block conflict.

[0116] In some alternative embodiments, the above decoding method further includes:

[0117] Step c1, if the number of non-zero block information in the current layer is more than that in the previous layer, after the reliability update of the target variable node corresponding to the non-zero block information in the previous layer is completed, a first preset time delay is added to enable the calculation of the second information of the target variable node corresponding to the non-zero block information in the current layer and the reliability update of the target variable node corresponding to the non-zero block information in the previous layer to be completed synchronously.

[0118] Figure 6 This is the decoding timing schematic diagram provided by the embodiments of the present application. As Figure 6 shown, it is the decoding timing schematic diagram based on the Figure 2 shown parity-check matrix. One row of the parity-check matrix is one layer. For each layer, after the calculation of Lq is completed, the minimum value and the second minimum value of Lq in the current layer are obtained, and then LQ is calculated.

[0119] Due to the use of the First In First Out (FIFO) logic, the calculation order of Lq and the calculation order of LQ in each layer are the same. When calculating LQ in the previous layer, Lq in the next layer is calculated in parallel.

[0120] If the calculation length of Lq in the current layer is greater than the calculation length of LQ in the previous layer, then an empty slot is inserted after the calculation of LQ in the previous layer, i.e., a first preset time delay is added, which is represented by "x" in the figure, to enable the synchronous calculation completion of LQ in the previous layer and Lq in the current layer.

[0121] Step c2, if the number of non-zero block information in the current layer is less than that in the previous layer, before the calculation of the second information of the target variable node corresponding to the non-zero block information in the current layer starts, a second preset time delay is added to enable the calculation of the second information of the target variable node corresponding to the non-zero block information in the current layer and the reliability update of the target variable node corresponding to the non-zero block information in the previous layer to be completed synchronously.

[0122] If the calculated length of Lq of the current layer is less than the calculated length of LQ of the previous layer, a second preset time delay is added before calculating the Lq of the current layer.

[0123] It should be noted that a second preset time delay can also be added during the calculation of the second information of the target variable node corresponding to the non-zero block information of the current layer, so that the calculation of the second information of the target variable node corresponding to the non-zero block information of the current layer and the reliability update of the target variable node corresponding to the non-zero block information of the previous layer are completed synchronously.

[0124] The decoding method provided by the embodiments of the present application can avoid information inconsistency or error propagation caused by out-of-synchronization by ensuring that the calculation of the second information of the target variable node corresponding to the non-zero block information of the current layer and the reliability update of the target variable node corresponding to the non-zero block information of the previous layer are completed synchronously, thereby improving the accuracy of the final decoding result.

[0125] In some optional embodiments, the decoding method further includes:

[0126] Step d1, if the verification still fails after reaching the maximum number of iterations, output a signal indicating decoding failure;

[0127] Among them, after reading the non-zero block information in the target check array in sequence and completing the corresponding calculations, it is determined that one iteration is completed.

[0128] Among them, iterative decoding is performed based on the check matrix. If the verification still fails after reaching the maximum number of iterations, output a signal indicating decoding failure.

[0129] After reading the non-zero block information in the target check array in sequence and completing the corresponding calculations, that is, after reading all the non-zero block information in the target check array, the second information and reliability of the variable node corresponding to each non-zero block information are determined to be completed.

[0130] The decoding method provided by the embodiments of the present application can prevent the decoding process from falling into an infinite loop or being unable to converge for a long time by setting the maximum number of iterations. In the case where the verification still fails after reaching the maximum number of iterations, a signal indicating decoding failure is immediately output to avoid wasting more computing resources.

[0131] In some optional embodiments, before determining the initial reliability of the variable node corresponding to any bit in the codeword to be decoded, the decoding method further includes:

[0132] Step e1, based on the check matrix, perform an initial check on the codeword to be decoded.

[0133] Among them, the codeword to be decoded may have no errors. Therefore, before decoding the codeword to be decoded, an initial check is first performed on the codeword to be decoded.

[0134] Step e2, if the initial check of the codeword to be decoded passes, there is no need to execute the step of determining the initial reliability of the variable node corresponding to the bit for any bit in the codeword to be decoded, and output the codeword to be decoded.

[0135] If the initial check of the codeword to be decoded passes, there is no need to perform decoding, and directly output the codeword to be decoded, that is, the codeword to be decoded is a correct codeword.

[0136] Step e3, if the initial check of the codeword to be decoded fails, execute the step of determining the initial reliability of the variable node corresponding to the bit for any bit in the codeword to be decoded.

[0137] If the initial check of the codeword to be decoded passes, perform decoding, correct the error bits therein, and obtain the correct codeword for output.

[0138] It should be noted that if the initial check of the codeword to be decoded fails, execute the above steps S301 to S306. At this time, step S306 can be updated to: when the reliability of the variable node corresponding to any bit is updated, determine the target codeword to be decoded, perform incremental check on the target codeword to be decoded. If the incremental check passes, stop decoding and output the decoding result. Incremental check means determining the change information of the target codeword to be decoded compared with the initially received codeword to be decoded, and synchronously updating the check result according to the change information. If the change information is no change, the check result remains unchanged. If the change information is a change, the check results of the check equations related to the variable nodes corresponding to the changed bits are all changed.

[0139] As Figure 6 shown, whenever the reliability of a variable node is updated, an incremental check is performed. If the incremental check fails, the incremental check result is 1. If the incremental check passes, the incremental check result is 0.

[0140] For the decoding method provided by the embodiments of the present application, if the initial check passes, it indicates that the codeword to be decoded already meets the check conditions, and there is no need to perform additional reliability calculation and iterative decoding. This greatly reduces the amount of calculation and improves the decoding speed.

[0141] In some optional implementation methods, the decoding method further includes:

[0142] If the decoding time of the codeword to be decoded reaches the preset decoding time threshold and the check still fails, output a signal indicating decoding failure. The preset decoding time threshold is set by those skilled in the art.

[0143] When the reliability of the variable node corresponding to any bit is updated, determine the target codeword to be decoded, and perform a check on the target codeword to be decoded. If the check fails, continue decoding until the check passes or the decoding time reaches the preset decoding time threshold.

[0144] In the decoding method provided by the embodiments of the present application, LDPC decoding may not converge under some extreme channel conditions (such as extremely low signal-to-noise ratio), resulting in infinite iteration. By forcibly terminating the decoding through the time threshold, the system resources are prevented from being occupied for a long time, causing service blockage.

[0145] The embodiments of the present application also provide a decoding system. Figure 7 It is the architecture diagram of the decoding system provided by the embodiments of the present application. As Figure 7 shown, the decoding system includes a decoding module and an incremental check module. Among them, the decoding module is used to receive data input, that is, receive the codeword to be decoded, generate the initial reliability LQ of the variable node corresponding to any bit based on the codeword to be decoded, store LQ into the corresponding LQ storage module, and initialize the information Lr passed from the check node to the variable node.

[0146] The decoding module is also used to perform iterative decoding: First, sequentially read the check array (S array), use the element index of the S array to index the H matrix, and at the same time read the reliability LQ of the variable node, obtain the information Lr passed from the check node to the variable node, and calculate the information Lq passed from the variable node to the check node.

[0147] Next, according to the calculated Lq, update the minimum value and the second minimum value of the absolute value of the current layer's Lq, and synchronously send the result of Lq into the FIFO queue. After reading the end flag of the current layer, the minimum value and the second minimum value of the absolute value of the real Lq of the current layer can be obtained. At this time, the minimum value and the second minimum value of the absolute value of Lq can be obtained from the minimum value calculation module, and the value of Lq is taken out from the FIFO queue to calculate the real Lr and LQ, and stored in the corresponding LQ storage module and Lr storage module to update Lr and LQ.

[0148] When calculating the LQ of the current layer, start calculating the Lq of the next layer synchronously.

[0149] While calculating LQ, the incremental check module can be started, and the check result can be updated immediately after LQ is updated. Reading the S array from beginning to end is considered one round. Before one round of iteration is completed, when calculating Lq, do not read Lr from the Lr storage module, but directly initialize Lr to 0. After one round of iteration is completed, Lr can be read from the Lr storage module.

[0150] During the decoding process, if the incremental check module finds that the check passes, it immediately stops decoding and starts outputting data. If the check does not pass even after reaching the maximum number of iterations, a signal indicating decoding failure is output.

[0151] The decoding system provided by the embodiments of the present application releases the SRAM of the minimum value and the second minimum value by adding a FIFO queue, reducing the overall power consumption, which is beneficial to parallel design. By using the S array to control the decoding process and innovating the adjustment method for non-zero block conflicts, the non-zero block conflicts are resolved by adjusting the operation order of non-zero blocks in the check matrix, so that the decoding hardware circuit no longer has restrictions on the format of the H matrix and has better compatibility. A decoding scheme with high performance and low power consumption is achieved. For the same check matrix, the decoding method of the present application has a lower number of iterations.

[0152] Through the description of the above embodiments, those skilled in the art can clearly understand that the method according to the above embodiments can be implemented by means of software plus a necessary general hardware platform. Of course, it can also be implemented by hardware, but in many cases, the former is a better implementation method.

[0153] The embodiments of the present application also provide a decoding device, as Figure 8 shown, including:

[0154] A receiving module 801, configured to receive a codeword to be decoded.

[0155] A determining module 802, configured to determine the initial reliability and the initial first information of the variable node corresponding to a bit for any bit in the codeword to be decoded.

[0156] A generating module 803, configured to generate a target check array with non-zero block information as elements based on the position information of non-zero blocks in the check matrix. The storage order of the non-zero block information in the target check array is the decoding order, and the decoding order satisfies no conflict in the decoding process.

[0157] A reading module 804, configured to sequentially read the non-zero block information in the target check array, determine the non-zero block information of the current layer, determine the target variable node corresponding to the non-zero block information of the current layer based on the non-zero block information of the current layer, determine the second information of the target variable node based on the reliability and the first information of the target variable node, and store the second information in the first-in-first-out queue.

[0158] A parallel execution module 805, configured to parallelly execute the steps of obtaining the second information of the target variable node from the first-in-first-out queue, updating the first information and the reliability of the target variable node based on the second information, and starting to determine the second information of the target variable node corresponding to the non-zero block information of the next layer.

[0159] A verification module 806 is configured to, when the reliability of a variable node corresponding to any bit is updated, determine a target codeword to be decoded, verify the target codeword to be decoded, and if the verification passes, stop decoding and output a decoding result.

[0160] In some alternative embodiments, the generation module 803 includes:

[0161] A first determination unit is configured to determine layer information of a non-zero block based on row information and column information of the non-zero block in the parity-check matrix, where the position information of the non-zero block includes row information and column information.

[0162] A first generation unit is configured to generate an initial parity-check array based on the row information, column information, and layer information of the non-zero block, where the non-zero block information includes row information, column information, and layer information.

[0163] A second determination unit is configured to determine a combination of multiple non-zero block information with the same column information based on the column information in the non-zero block information.

[0164] A first judgment unit is configured to, for any combination of non-zero block information, judge whether there is adjacent non-zero block information with adjacent row information in the combination of non-zero block information.

[0165] A second judgment unit is configured to, if there is adjacent non-zero block information with adjacent row information in the combination of non-zero block information, judge whether the calculation timing of the reliability of the first variable node corresponding to the first non-zero block information with the earlier row information in the adjacent non-zero block information is prior to the calculation timing of the second information of the first variable node corresponding to the second non-zero block information with the later row information in the adjacent non-zero block information.

[0166] A first adjustment unit is configured to, if the calculation timing of the reliability of the first variable node corresponding to the first non-zero block information with the earlier row information in the adjacent non-zero block information is posterior to the calculation timing of the second information of the first variable node corresponding to the second non-zero block information with the later row information in the adjacent non-zero block information, adjust the storage order of the first non-zero block information in the initial parity-check array forward and adjust the storage order of the second non-zero block information backward, where the adjusted storage order of the first non-zero block information is not prior to the earliest storage order of multiple first target non-zero block information with the same row information as the first non-zero block information, and the adjusted storage order of the second non-zero block information is not posterior to the latest storage order of multiple second target non-zero block information with the same row information as the second non-zero block information.

[0167] A third determination unit is configured to return to execute the step of determining a combination of multiple non-zero block information with the same column information based on the column information in the non-zero block information until the storage order of the non-zero block information in the initial parity-check array does not need to be adjusted, and obtain a target parity-check array.

[0168] In some alternative embodiments, the decoding device further includes:

[0169] A fourth determination unit, configured to, if the calculation timing of the reliability of the first variable node corresponding to the first non-zero block information with a relatively earlier row information in the adjacent non-zero block information is prior to the calculation timing of the second information of the first variable node corresponding to the second non-zero block information with a relatively later row information in the adjacent non-zero block information, not adjust the storage order of the first non-zero block information and the second non-zero block information in the initial check array.

[0170] In some optional embodiments, the decoding device further includes:

[0171] A first increasing unit, configured to, if the number of non-zero block information in the current layer is more than that in the previous layer, after the reliability update of the target variable node corresponding to the non-zero block information in the previous layer is completed, increase a first preset time delay, so that the calculation of the second information of the target variable node corresponding to the non-zero block information in the current layer and the reliability update of the target variable node corresponding to the non-zero block information in the previous layer are completed synchronously.

[0172] A second increasing unit, configured to, if the number of non-zero block information in the current layer is less than that in the previous layer, before the calculation of the second information of the target variable node corresponding to the non-zero block information in the current layer starts, increase a second preset time delay, so that the calculation of the second information of the target variable node corresponding to the non-zero block information in the current layer and the reliability update of the target variable node corresponding to the non-zero block information in the previous layer are completed synchronously.

[0173] In some optional embodiments, the decoding device further includes:

[0174] A first output unit, configured to, if the check still fails after reaching the maximum number of iterations, output a signal indicating decoding failure.

[0175] Wherein, after reading and completing the corresponding calculations for the non-zero block information in the target check array in sequence, it is determined that one iteration is completed.

[0176] In some optional embodiments, the parallel execution module 805 includes:

[0177] A fifth determination unit, configured to determine the minimum value and the second minimum value of the absolute value of the second information based on the second information of the target variable node.

[0178] A sixth determination unit, configured to determine the sign information of the first information based on the sign information of the second information of the target variable node.

[0179] A seventh determination unit, configured to determine the first information based on the minimum value, the second minimum value of the absolute value of the second information, and the sign information of the first information.

[0180] In some optional embodiments, the decoding device further includes:

[0181] The first verification unit is configured to perform an initial verification on the codeword to be decoded based on a verification matrix.

[0182] The second output unit is configured to, if the initial verification of the codeword to be decoded passes, output the codeword to be decoded without performing the step of determining the initial reliability of the variable node corresponding to a bit for any bit in the codeword to be decoded.

[0183] The eighth determination unit is configured to, if the initial verification of the codeword to be decoded fails, perform the step of determining the initial reliability of the variable node corresponding to a bit for any bit in the codeword to be decoded.

[0184] For the description of the features in the embodiments corresponding to the decoding device, reference may be made to the relevant descriptions in the embodiments corresponding to the decoding method, which will not be elaborated here one by one.

[0185] An embodiment of the present application further provides an electronic device, as Figure 9 shown, including a processor 901 and a memory 902. A computer program is stored in the memory 902, and the processor 901 is configured to run the computer program to execute the steps in any of the above decoding method embodiments.

[0186] An embodiment of the present application further provides a computer-readable storage medium, in which a computer program is stored. The computer program is configured to execute the steps in any of the above decoding method embodiments when running.

[0187] In an exemplary embodiment, the above computer-readable storage medium may include, but is not limited to: various media such as a USB flash drive, a read-only memory (ROM), a random access memory (RAM), a mobile hard disk, a magnetic disk, or an optical disc that can store a computer program.

[0188] An embodiment of the present application further provides a computer program product. The above computer program product includes a computer program, and when the computer program is executed by a processor, the steps in any of the above decoding method embodiments are implemented.

[0189] An embodiment of the present application further provides another computer program product, including a non-volatile computer-readable storage medium. The non-volatile computer-readable storage medium stores a computer program, and when the computer program is executed by a processor, the steps in any of the above decoding method embodiments are implemented.

[0190] Those skilled in the art may further realize that the units and algorithm steps of each example described in combination with the embodiments disclosed herein can be implemented by electronic hardware, computer software, or a combination of both. To clearly illustrate the interchangeability of hardware and software, the composition and steps of each example have been generally described according to functions in the above description. Whether these functions are executed in a hardware or software manner depends on the specific application and design constraints of the technical solution. Those skilled in the art can use different methods to implement the described functions for each specific application, but such implementation should not be considered as exceeding the scope of this application.

[0191] The above has introduced in detail a decoding method, apparatus, electronic device, and storage medium provided by this application. Specific examples have been used herein to elaborate on the principles and implementation manners of this application. The description of the above embodiments is only used to help understand the method and its core idea of this application. It should be noted that for those of ordinary skill in the art in this technical field, without departing from the principle of this application, several improvements and modifications can be made to this application, and these improvements and modifications also fall within the protection scope of the claims of this application.

Claims

1. A decoding method, characterized in that: include: receiving a codeword to be decoded; For any bit in the codeword to be decoded, determine the initial reliability and initial first information of the variable node corresponding to the bit; Based on the position information of the non-zero blocks in the check matrix, a target check array with the non-zero block information as elements is generated, and the storage order of the non-zero block information in the target check array is a decoding order, and the decoding order satisfies that there is no conflict in the decoding process; Sequentially read the non-zero block information in the target check array, determine the non-zero block information of the current layer, determine the target variable node corresponding to the non-zero block information of the current layer based on the non-zero block information of the current layer, determine the second information of the target variable node based on the reliability of the target variable node and the first information, and store the second information in a first-in-first-out queue; Parallel execution of the steps of obtaining the second information of the target variable node from the first-in-first-out queue, updating the first information and reliability of the target variable node based on the second information, and determining the second information of the target variable node corresponding to the non-zero block information of the next layer; When the reliability of the variable node corresponding to any bit is updated, the target codeword to be decoded is determined, and the target codeword to be decoded is verified. If the verification passes, decoding is stopped and the decoding result is output.

2. The method according to claim 1, characterized in that The step of generating a target check matrix having non-zero block information as elements based on the position information of the non-zero blocks in the check matrix comprises: Determine the layer information of the non-zero block based on the row information and column information of the non-zero block in the check matrix, wherein the position information of the non-zero block includes the row information and the column information; Generate an initial check array based on row information, column information and layer information of the non-zero block, wherein the non-zero block information includes row information, column information and layer information; Based on the column information in the non-zero block information, determine a plurality of non-zero block information combinations with the same column information; For any non-zero block information combination, determining whether there is adjacent non-zero block information with adjacent row information in the non-zero block information combination; If there is adjacent non-zero block information with adjacent row information in the non-zero block information combination, determine whether the calculation timing of the reliability of the first variable node corresponding to the first non-zero block information with the front row information in the adjacent non-zero block information is earlier than the calculation timing of the second information of the first variable node corresponding to the second non-zero block information with the back row information in the adjacent non-zero block information; If the calculation timing of the reliability of the first variable node corresponding to the first non-zero block information with the front row information in the adjacent non-zero block information is later than the calculation timing of the second information of the first variable node corresponding to the second non-zero block information with the back row information in the adjacent non-zero block information, the storage order of the first non-zero block information in the initial check array is adjusted forward, and the storage order of the second non-zero block information is adjusted backward, wherein the adjusted storage order of the first non-zero block information is not earlier than the first storage order of multiple first target non-zero block information with the same row information as the first non-zero block information, and the adjusted storage order of the second non-zero block information is not later than the last storage order of multiple second target non-zero block information with the same row information as the second non-zero block information; Return to the step of determining a plurality of non-zero block information combinations with the same column information based on the column information in the non-zero block information, until the storage order of the non-zero block information in the initial check array does not need to be adjusted, and a target check array is obtained.

3. The method according to claim 2, characterized in that The method further comprises: If the calculation timing of the reliability of the first variable node corresponding to the first non-zero block information in the front row of the adjacent non-zero block information is earlier than the calculation timing of the second information of the first variable node corresponding to the second non-zero block information in the back row of the adjacent non-zero block information, there is no need to adjust the storage order of the first non-zero block information and the storage order of the second non-zero block information in the initial check array.

4. The method according to claim 1, characterized in that: The method further comprises: If the non-zero block information of the current layer is more than the non-zero block information of the previous layer, after the reliability update of the target variable node corresponding to the non-zero block information of the previous layer is completed, a first preset delay is added to synchronize the calculation of the second information of the target variable node corresponding to the non-zero block information of the current layer and the reliability update of the target variable node corresponding to the non-zero block information of the previous layer; If the non-zero block information of the current layer is less than the non-zero block information of the previous layer, a second preset delay is added before the calculation of the second information of the target variable node corresponding to the non-zero block information of the current layer begins, so that the calculation of the second information of the target variable node corresponding to the non-zero block information of the current layer and the reliability update of the target variable node corresponding to the non-zero block information of the previous layer are completed synchronously.

5. The method according to claim 1, characterized in that The method further comprises: If the verification fails after reaching the maximum number of iterations, a decoding failure signal is output; The non-zero block information in the target check array is read in sequence and the corresponding calculation is completed to determine that one iteration is completed.

6. The method according to claim 1, characterized in that Updating the first information of the target variable node based on the second information includes: Based on the second information of the target variable node, determining a minimum value and a second minimum value of the absolute value of the second information; Determining the symbolic information of the first information based on the symbolic information of the second information of the target variable node; The first information is determined based on the minimum value and the next minimum value of the absolute value of the second information and the sign information of the first information.

7. The method according to claim 1, characterized in that Before determining, for any bit in the codeword to be decoded, the initial reliability of the variable node corresponding to the bit, the method further includes: Based on the check matrix, performing an initial check on the codeword to be decoded; If the initial check of the codeword to be decoded passes, there is no need to perform the step of determining the initial reliability of the variable node corresponding to any bit in the codeword to be decoded, and the codeword to be decoded is output; If the initial check of the codeword to be decoded fails, a step of determining the initial reliability of a variable node corresponding to any bit in the codeword to be decoded is performed.

8. A decoding device, characterized in that: include: A receiving module, used for receiving a codeword to be decoded; A determination module, configured to determine, for any bit in the codeword to be decoded, an initial reliability and initial first information of a variable node corresponding to the bit; A generating module, configured to generate a target check array with non-zero block information as elements based on the position information of the non-zero blocks in the check matrix, wherein the storage order of the non-zero block information in the target check array is a decoding order, and the decoding order satisfies that there is no conflict in the decoding process; A reading module, used for sequentially reading the non-zero block information in the target check array, determining the non-zero block information of the current layer, determining the target variable node corresponding to the non-zero block information of the current layer based on the non-zero block information of the current layer, determining the second information of the target variable node based on the reliability of the target variable node and the first information, and storing the second information in a first-in-first-out queue; A parallel execution module, used for executing in parallel the steps of obtaining the second information of the target variable node from the first-in-first-out queue, updating the first information and reliability of the target variable node based on the second information, and starting the step of determining the second information of the target variable node corresponding to the non-zero block information of the next layer; The verification module is used to determine the target codeword to be decoded when the reliability of the variable node corresponding to any bit is updated, verify the target codeword to be decoded, and stop decoding and output the decoding result if the verification passes.

9. An electronic device, characterized in that: include: Memory for storing computer programs; A processor, configured to implement the steps of the decoding method according to any one of claims 1 to 7 when executing the computer program.

10. A computer-readable storage medium, characterized in that: The computer-readable storage medium stores a computer program, wherein the computer program, when executed by a processor, implements the steps of the decoding method according to any one of claims 1 to 7.

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