Display device

Abstract

An embodiment relates to a display device including: a substrate including an emission area and a non-emission area of sub-pixels, and on which a plurality of sub-pixels are disposed; a gate line disposed in the non-emission region and extending in one direction; a signal line disposed in the non-emission region and crossing the gate line; a repair pattern disposed in the non-emission region and connected to the signal line; and at least one branch line for connecting the repair pattern with the circuit devices of the plurality of sub-pixels.

Description

[0001] Cross - reference to related applications

[0002] This application claims priority to Korean Patent Application No. 10 - 2023 - 0187342, filed on December 20, 2023, the entire contents of which are incorporated herein by reference for all purposes. Technical Field

[0003] The present invention relates to a display device, and more particularly, to a display device capable of achieving a high aperture ratio and stably performing pixel repair. Background Art

[0004] With the development of the information society, various demands for display devices for displaying images are increasing, and various types of display devices are utilized, such as liquid crystal displays (LCDs) and organic light - emitting diode (OLED) displays.

[0005] A display device includes: a display panel on which pixels are provided, a gate driver for supplying a gate signal to the pixels through a gate line, a data driver for applying a data signal to the pixels through a data line, and a timing controller for controlling the operations of the gate driver and the data driver. Summary of the Invention

[0006] Embodiments are directed to providing a display device provided in an area where the aperture ratio can be increased by changing the structure of a transparent branch line connected to a reference voltage line.

[0007] In addition, embodiments are directed to providing a display device in which the aperture ratio is increased and the lifetime of image sticking is increased by reducing an area where a color filter is provided.

[0008] In addition, embodiments are directed to providing a display device capable of performing a repair process without reducing the aperture ratio.

[0009] A display device according to an embodiment may include: a substrate including an emission region and a non - emission region of sub - pixels, and a plurality of sub - pixels provided on the substrate; a gate line provided in the non - emission region and extending in one direction; a signal line provided in the non - emission region and intersecting the gate line; a repair pattern provided in the non - emission region and connected to the signal line; and at least one branch line for connecting the repair pattern to circuit devices of the plurality of sub - pixels.

[0010] At least one branch line may be made of a transparent material.

[0011] At least one region of at least one branch line may overlap with the emission regions of a plurality of sub-pixels.

[0012] The repair pattern may include: a main body portion connected to a signal line; and a plurality of extensions extending from the main body portion in one direction and respectively connected to a plurality of sub-pixels.

[0013] At least some of the plurality of extensions may be respectively connected to the plurality of sub-pixels through at least one branch line.

[0014] At least some of the plurality of extensions may extend from one side of the main body portion and may be disposed in a first color sub-pixel provided at one side of the main body portion.

[0015] Other extensions of the plurality of extensions may extend from the other side of the main body portion and may be disposed in a second color sub-pixel provided at the other side of the main body portion.

[0016] The plurality of extensions may be cut by laser during pixel repair.

[0017] The display device may further include a color filter layer disposed in the emission region and extending to the non-emission region to cover at least one region of the repair pattern.

[0018] The color filter layer may include a first color filter formed in the emission region of a first color sub-pixel provided at one side of the repair pattern and extending to the non-emission region of an adjacent sub-pixel of the first color sub-pixel.

[0019] The first color filter may cover at least one of the plurality of extensions of the repair pattern in the non-emission region of an adjacent second color sub-pixel.

[0020] The first color sub-pixel may be a blue sub-pixel, the second color sub-pixel may be a white sub-pixel, and the first color filter is a blue color filter.

[0021] The display device may further include: a first conductive layer formed on a substrate and including a signal line; a buffer layer formed on the first conductive layer; an active layer formed on the buffer layer and including at least one branch line; an interlayer insulating layer formed on the active layer; and a second conductive layer formed on the interlayer insulating layer and including a gate line and a repair pattern.

[0022] A display device according to an embodiment may include: a substrate including an emission region and a non-emission region of sub-pixels, and a plurality of sub-pixels disposed on the substrate; a gate line disposed in the non-emission region and extending in one direction; a signal line disposed in the non-emission region and intersecting the gate line; and a repair pattern disposed in the non-emission region and configured to connect the signal line to circuit devices of the plurality of sub-pixels.

[0023] The repair pattern may include: a main body portion connected to the signal line; and a plurality of extension portions extending from the main body portion in one direction and respectively connected to the plurality of sub-pixels.

[0024] At least some of the plurality of extension portions may extend from one side of the main body portion and may be disposed in blue sub-pixels provided at one side of the main body portion.

[0025] Other of the plurality of extension portions may extend from the other side of the main body portion and may be disposed in white sub-pixels provided at the other side of the main body portion.

[0026] The display device may include a blue color filter formed in the emission region of the blue sub-pixel and extending to the non-emission region of an adjacent sub-pixel of the blue color filter.

[0027] The blue color filter may cover at least one of the plurality of extension portions of the repair pattern in the non-emission region of an adjacent white sub-pixel.

[0028] In one embodiment, the repair pattern and the branch shape are particularly configured to perform pixel repair in blue pixels.

[0029] By reducing the placement area of the blue color filter, the pixel aperture ratio increases and the afterimage life increases. Description of the Drawings

[0030] Figure 1 is a block diagram showing a display device according to an embodiment.

[0031] Figure 2 is a circuit diagram of a sub-pixel according to an embodiment.

[0032] Figures 3 to 5 is a plan view of a unit pixel according to an embodiment.

[0033] Figure 6 is Figure 5 an enlarged view of the area AA shown.

[0034] Figure 7 is along Figure 5An embodiment of a cross-sectional view of line I-I' therein.

[0035] Figure 8 is along Figure 6 An embodiment of a cross-sectional view of line II-II' therein.

[0036] Figure 9 is a cross-sectional view for describing a pixel repair method according to an embodiment. Detailed Embodiments

[0037] Hereinafter, embodiments will be described with reference to the accompanying drawings. In the specification, when a first component (or region, layer, part, etc.) is described as being "on", "connected" or "coupled" to a second component, this means that the first component can be directly connected / coupled to the second component, or a third component can be disposed between the first component and the second component.

[0038] Like reference numerals indicate like components. Additionally, in the drawings, for effective description of the technical content, the thickness, ratio, and dimensions of the components are exaggerated. The term "and / or" includes all one or more combinations that can be defined by the associated configuration.

[0039] Terms such as first and second may be used to describe various components, but these components are not limited by these terms. These terms are only for the purpose of distinguishing one component from another. For example, without departing from the scope of the embodiment, the first component may be referred to as the second component, and similarly, the second component may also be referred to as the first component. Unless the context clearly indicates otherwise, the singular expression includes the plural expression.

[0040] Terms such as "below", "beneath", "above", and "on top of" are used to describe the relationship between the components shown in the drawings. These terms are relative concepts and are described with respect to the directions marked in the drawings.

[0041] It should be understood that terms such as "including" or "having" are intended to specify the presence of the features, numbers, steps, operations, components, parts, or combinations thereof described in the specification, and do not exclude the possibility of the presence or addition of one or more other features, numbers, steps, operations, components, parts, or combinations thereof.

[0042] Figure 1 is a block diagram showing a display device according to an embodiment.

[0043] Referring to Figure 1 , the display device 1 includes a timing controller 10, a gate driver 20, a data driver 30, a power supply 40, and a display panel 50.

[0044] The timing controller 10 can receive an image signal RGB and a control signal CS from an external host system (not shown in the drawings) or the like. The image signal RGB can include a plurality of grayscale data. The control signal CS can include, for example, a horizontal synchronization signal, a vertical synchronization signal, a main clock signal, etc.

[0045] The timing controller 10 can process the image signal RGB and the control signal CS according to the operating conditions of the display panel 50, and generate and output image data DATA, a gate drive control signal CONT1, a data drive control signal CONT2, and a power control signal CONT3.

[0046] The gate driver 20 can generate a gate signal based on the gate drive control signal CONT1 output from the timing controller 10. The gate driver 20 can provide the generated gate signal to the sub-pixels SP through a plurality of gate lines GL.

[0047] The data driver 30 can generate a data signal based on the image data DATA and the data drive control signal CONT2 output from the timing controller 10. The data driver 30 can provide the generated data signal to the sub-pixels SP through a plurality of data lines DL.

[0048] The power supply 40 can generate a high-potential drive voltage VDD and a low-potential drive voltage VSS to be provided to the display panel 50 based on the power control signal CONT3. The power supply 40 can provide the generated drive voltages VDD and VSS to the sub-pixels SP through corresponding power lines PL1 and PL2.

[0049] A plurality of unit pixels PX are provided on the display panel 50. Each unit pixel PX can include a plurality of sub-pixels SP. Each sub-pixel SP can display any one of red, green, blue, and white. In another embodiment, each sub-pixel SP can display any one of cyan, magenta, and yellow.

[0050] The sub-pixel SP can charge a data voltage supplied through the data line DL in response to the gate signal applied through the gate line GL, and emit light having a luminance corresponding to the charged data voltage.

[0051] The timing controller 10, the gate driver 20, the data driver 30, and the power supply 40 can each be configured as a separate integrated circuit (IC) or at least partially integrated ICs. Additionally, the gate driver 20 can be configured in the form of an in-panel gate integrated with the display panel 50. In an embodiment, the gate driver 20 can constitute an in-panel gate (hereinafter referred to as "GIP").

[0052] Figure 2 is a circuit diagram of a sub-pixel according to one embodiment.

[0053] Referring to Figure 2 , according to one embodiment, a sub-pixel SP may include a driving transistor DT, a light-emitting device LD connected to the driving transistor DT, and a control circuit for controlling the amount of driving current applied to the light-emitting device LD through the driving transistor DT. For example, the control circuit may include a first transistor T1, a second transistor T2, and a storage capacitor Cst.

[0054] The driving transistor DT controls the driving current applied to the light-emitting device LD according to the voltage between the gate and the source. A first electrode (e.g., drain electrode) of the driving transistor DT is connected to a first power line PL1 to which a high-potential driving voltage VDD is applied through a third node N3, and a second electrode (e.g., source electrode) is connected to a second node N2. The gate electrode of the driving transistor DT is connected to a first node N1. The driving transistor DT may be turned on according to the voltage applied to the first node N1 to control the amount of driving current flowing to the light-emitting device LD.

[0055] The first transistor T1 is a switching transistor and is connected between the data line DL and the first node N1. The gate electrode of the first transistor T1 is connected to the gate line GL. The first transistor T1 may be turned on in response to a scan signal SCAN applied to the gate line GL. When the first transistor T1 is turned on, the data voltage Vdata applied to the data line DL may be applied to the first node N1. The first transistor T1 may be electrically connected to the gate electrode of the driving transistor DT to apply the data voltage Vdata to the gate electrode of the driving transistor DT.

[0056] The storage capacitor Cst is connected between the first node N1 and the second node N2. The storage capacitor Cst may maintain a constant gate-source voltage of the driving transistor DT within one frame by storing a voltage corresponding to the voltage difference between the first node N1 and the second node N2.

[0057] The light-emitting device LD may have an anode electrode connected to the second node N2 and a cathode electrode connected to a second power line PL2 to which a low-potential driving voltage VSS is applied. When the driving transistor DT is turned on, a current path may be formed between the high-potential driving voltage VDD and the low-potential driving voltage VSS, such that the driving current may flow to the light-emitting device LD. The light-emitting device LD may emit light having a brightness corresponding to the amount of the applied driving current.

[0058] Meanwhile, as the driving time of each sub-pixel SP in the display device 1 increases, circuit devices such as the driving transistor DT may deteriorate. Therefore, the unique characteristic values of the circuit devices may change. Here, the characteristic values of the circuit devices may include the threshold voltage (Vth), mobility (α), etc. The change in the characteristic values of the circuit devices may cause a change in the brightness of the corresponding sub-pixel SP.

[0059] In addition, the degree of change in the characteristic values of the circuit devices of each sub-pixel SP may vary according to the degree of degradation of each sub-pixel SP. The difference in the degree of change in the characteristic values may cause a brightness deviation between the sub-pixels SP.

[0060] To solve such problems, the sub-pixel SP may also be provided with a circuit device capable of sensing the characteristic values of the sub-pixel SP. Specifically, as Figure 2 shown, the sub-pixel SP may further include a second transistor T2.

[0061] The second transistor T2 is a sensing transistor and is connected between the second node N2 and the reference voltage line RL to which the reference voltage Vref is applied. The gate electrode of the second transistor T2 is connected to the gate line GL. The second transistor T2 may be turned on in response to the scan signal SCAN applied to the gate line GL and may connect the second node N2 to the reference voltage line RL.

[0062] The second transistor T2 may be turned on by the scan signal SCAN applied through the gate line GL and may apply the reference voltage Vref supplied through the reference voltage line RL to the source electrode of the driving transistor DT. In addition, the second transistor T2 may be used as one of the voltage sensing paths of the source electrode of the driving transistor DT.

[0063] In Figure 2 the embodiment shown, the transistors of the sub-pixel SP are n-type transistors and may be formed of oxide semiconductor thin film transistors. The oxide semiconductor thin film transistor includes a gate electrode, a source electrode, and a drain electrode. The oxide semiconductor thin film transistor has an active layer formed of an oxide semiconductor. Here, the oxide semiconductor may be set as an amorphous or crystalline oxide semiconductor. The oxide semiconductor thin film transistor may be formed of an n-type transistor. The oxide semiconductor thin film transistor can be processed at a low temperature and has a lower charge mobility than a low temperature polycrystalline silicon (LTPS) thin film transistor. The oxide semiconductor thin film transistor has excellent off-current characteristics.

[0064] However, this embodiment is not limited thereto. In other words, in another embodiment, one or more transistors of the sub-pixel SP may be LTPS thin-film transistors. The LTPS thin-film transistor includes a gate electrode, a source electrode, and a drain electrode. The LTPS thin-film transistor has an active layer made of polysilicon. The LTPS thin-film transistor has a high electron mobility and thus has fast driving characteristics. The LTPS thin-film transistor may be formed of a p-type thin-film transistor or an n-type thin-film transistor.

[0065] Figures 3 to 5 is a plan view of a unit pixel according to an embodiment. Specifically, Figures 3 to 5 shows Figure 2 the planar layout of the sub-pixel SP shown. Figure 3 shows the planar layer of the circuit device of the sub-pixel SP, Figure 4 shows an example in which a color filter and an anode electrode are also provided on the circuit device of the sub-pixel SP, and Figure 5 includes area markings and cutting lines on the planar layout.

[0066] Referring to Figures 3 to 5 , in one embodiment, one unit pixel PX may include four sub-pixels SP1, SP2, SP3, and SP4. The first sub-pixel SP1 may be a red sub-pixel that displays red, the second sub-pixel SP2 may be a white sub-pixel that displays white, the third sub-pixel SP3 may be a blue sub-pixel that displays blue, and the fourth sub-pixel SP4 may be a green sub-pixel that displays green. However, this embodiment is not limited thereto.

[0067] Each of the sub-pixels SP1, SP2, SP3, and SP4 may be formed in a region defined by a gate line GL extending in the row direction X (first direction) and a data line DL extending in the column direction Y (second direction). A first power line (e.g., a high-potential voltage line) PL1 and a reference voltage line RL may extend substantially parallel to the data line DL.

[0068] In one embodiment, two or more adjacent sub-pixels SP1, SP2, SP3, and SP4 in the row direction X may share a first power line PL1 and / or a reference voltage line RL. For example, the first power line PL1 may be provided at one side of the first sub-pixel SP1 to apply a high-potential driving voltage VDD to the first sub-pixel SP1 and the second sub-pixel SP2. Alternatively, for example, the first power line PL1 may be provided at one side of the fourth sub-pixel SP4 to apply a high-potential driving voltage VDD to the third sub-pixel SP3 and the fourth sub-pixel SP4. Additionally, for example, a reference voltage line RL may be provided in the unit pixel PX, and the sub-pixels SP1, SP2, SP3, and SP4 forming the unit pixel PX may share a reference voltage line RL.

[0069] Each of the sub-pixels SP1, SP2, SP3, and SP4 includes a non-emission area (NEA) and an emission area (EA).

[0070] The non-emission area NEA is an area where a driving circuit for driving the light-emitting device LD is provided, and the driving transistor DT (see Figure 2 ), the first transistor T1 (see Figure 2 ), the second transistor T2 (see Figure 2 ), and the storage capacitor Cst (see Figure 2 ) can be provided in the non-emission area.

[0071] In the following description, the source electrodes and drain electrodes of the transistors DT, T1, and T2 may represent the conductive source electrode regions and drain electrode regions of the active layer, or may represent conductive patterns electrically connected to the source electrode regions and drain electrode regions. In addition, each of the nodes N1 to N3 is a connection point of two or more circuit devices, and may represent a point or region on the pattern.

[0072] The first electrode DT1 (e.g., drain electrode) of the driving transistor DT is connected to the first power line PL1. In one embodiment, the first electrodes DT1 of two or more adjacent sub-pixels SP1, SP2, SP3, and SP4 in the row direction X may be integrally formed. For example, the first electrode DT1 of the first sub-pixel SP1 and the first electrode DT1 of the second sub-pixel SP2 may be formed as one pattern and connected to one first power line PL1, and the first electrode DT1 of the third sub-pixel SP3 and the first electrode DT1 of the fourth sub-pixel SP4 are formed as one pattern and connected to one first power line PL1. The second electrode DT2 (e.g., source electrode) of the driving transistor DT is connected to the second node N2. The gate electrode DT3 of the driving transistor DT is connected to the first node N1.

[0073] The storage capacitor Cst is connected between the first node N1 and the second node N2. The storage capacitor Cst may include a lower electrode CstL connected to the first node N1 and an upper electrode CstU connected to the second node N2. The lower electrode CstL of the storage capacitor Cst may be formed as a planar pattern connected to the gate electrode DT3 of the driving transistor DT. The upper electrode CstU of the storage capacitor Cst may be integrally formed with the second electrode DT2 of the driving transistor DT, and may be formed as a pattern on a wide surface. The lower electrode CstL and the upper electrode CstU of the storage capacitor Cst may be arranged to overlap each other, and a capacitance may be formed between the lower electrode CstL and the upper electrode CstU of the storage capacitor Cst.

[0074] The first electrode T11 (e.g., source electrode) of the first transistor T1 is connected to the data line DL. The second electrode T12 (e.g., drain electrode) of the first transistor T1 is connected to the first node N1. The second electrode T12 of the first transistor T1 is a conductive region of the active layer and may be integrally formed with the lower electrode CstL of the storage capacitor Cst. In addition, the second electrode T12 of the first transistor T1 may be connected to the gate electrode DT3 of the driving transistor DT via the lower electrode CstL of the storage capacitor Cst. The gate electrode T13 of the first transistor T1 is connected to the gate line GL.

[0075] The first electrode T21 (e.g., source electrode) of the second transistor T2 is connected to the second node N2. The first electrode T21 of the second transistor T2 may be integrally formed with the second electrode DT2 of the driving transistor DT and the upper electrode CstU of the storage capacitor Cst.

[0076] The second electrode T22 (e.g., drain electrode) of the second transistor T2 is a conductive region of the active layer and is connected to the reference voltage line RL. As described above, when four sub-pixels SP1, SP2, SP3, and SP4 share one reference voltage line RL in the unit pixel PX, a branch line BL may also be provided to connect the sub-pixels SP1 and SP4 that are set far from the reference voltage line RL to the reference voltage line RL. For example, the first sub-pixel SP1 and the fourth sub-pixel SP4 may each be connected to the reference voltage line RL through a branch line BL extending from the reference voltage line RL toward the first sub-pixel SP1 and the fourth sub-pixel SP4. One side of the branch line BL may be connected to the reference voltage line RL, and the other side may be connected to the second electrode T22 of the second transistor T2 of the connected sub-pixels SP1 and SP4.

[0077] In order to connect the reference voltage line RL to each of the sub-pixels SP1 and SP4, the reference voltage line RL may have a bar shape in which at least one region extends and includes one or more bent or curved portions. Specifically, the branch line BL may have an "L" shape in which at least one region bends after extending in the row direction X and extends in the column direction Y, but is not limited thereto.

[0078] In one embodiment, the branch line BL may be formed as a single pattern integral with the second electrode T22 of the second transistor T2 of the corresponding sub-pixels SP1 and SP4. However, this embodiment is not limited thereto, and the branch line BL may be configured in the form of a bridge for connecting one or more different layers.

[0079] In one embodiment, at least a portion of the extension region of the branch line BL may be arranged to overlap with the emission regions EA of the sub-pixels SP1, SP2, SP3, and SP4. In other words, at least a portion of the branch line BL may extend to pass through the emission regions EA of the sub-pixels SP1, SP2, SP3, and SP4.

[0080] For example, the branch line BL may extend to pass through the emission regions EA of the first sub-pixel SP1 and the second sub-pixel SP2, and may be connected to the first sub-pixel SP1. In this case, the bent portion of the branch line BL may be arranged in the emission region EA of the first sub-pixel SP1, but is not limited thereto. In an embodiment, the branch line BL may be made of a transparent material to prevent the light emitted from the light-emitting device LD from being blocked.

[0081] When the branch line BL is made of an opaque material, the branch line BL should be arranged in the non-emission region NEA so as not to block the optical path. When the area of the non-emission region NEA increases to ensure a space for arranging the branch line BL, the area of the emission region EA, i.e., the aperture ratio, relatively decreases. As described above, when the branch line BL is made of a transparent material, the branch line BL may be arranged in the emission region EA, and thus a sufficient aperture ratio of the emission region EA can be ensured.

[0082] The gate electrode T23 of the second transistor T2 is connected to the gate line GL.

[0083] Meanwhile, a light-shielding layer LS may be arranged below the driving transistor DT and the storage capacitor Cst. The light-shielding layer LS may be arranged to block external light that may flow to the semiconductor layer. The light-shielding layer LS may be arranged only below the driving transistor DT or below other circuit devices. The light-shielding layer LS may block external light, assist the connection between other electrodes and lines, or may be used as an electrode of the storage capacitor Cst, etc.

[0084] In the non-emission region NEA, a repair pattern RP is also arranged to repair the signal lines of the sub-pixels SP1, SP2, SP3, and SP4 when defects such as short circuits or open circuits occur in the signal lines of the sub-pixels SP1, SP2, SP3, and SP4. The repair pattern RP may be prepared to repair the reference voltage line RL.

[0085] The repair pattern RP may have at least one region arranged to overlap with the reference voltage line RL, and may be connected to the repair pattern RP through a contact hole in the overlapping region. The repair pattern RP may include a plurality of extensions extending in the row direction X, and each extension may be connected to one side of the branch line BL through a contact hole. The repair pattern RP may be connected to each of the sub-pixels SP1, SP2, SP3, and SP4 through the extensions.

[0086] The structure of the repair pattern RP will be described in more detail with reference to Figure 6 the following.

[0087] The emission area EA is an area capable of independently emitting light of one color, and can be an area provided with a light-emitting device LD (see Figure 2 ).

[0088] Specifically, the anode electrode AE of the light-emitting device LD can be provided in the emission area EA. When the light-emitting device LD is a bottom-emission type, the anode electrode AE is formed as a transparent electrode capable of transmitting light. On the contrary, when the light-emitting device LD is a top-emission type, the anode electrode AE can be formed as an opaque electrode. In the following embodiments, it is assumed that the light-emitting device LD is a bottom-emission type.

[0089] A bank (not shown) is further formed on the anode electrode AE to cover the edge of the anode electrode AE and expose the central area upward. The area of the anode electrode AE that is not covered by the bank and is exposed upward can be defined as the emission area EA.

[0090] The anode electrode AE can be formed in the emission area EA and can extend to the non-emission area NEA to be connected to the second electrode DT2 of the driving transistor DT in the non-emission area NEA. The anode electrode AE can be connected to the second electrode DT2 of the driving transistor DT through a via hole.

[0091] A light-emitting layer and a cathode electrode (not shown) can be further formed on the anode electrode AE.

[0092] Color filters CF1, CF2, and CF3 for converting the light generated by the light-emitting device LD can also be provided in the emission area EA. When the light-emitting device LD is a bottom-emission type, the color filters CF1, CF2, and CF3 can be formed on a layer below the light-emitting device LD.

[0093] The color filters CF1, CF2, and CF3 can include a first color filter CF1, a second color filter CF2, and a third color filter CF3. For example, the first color filter CF1 can be a red color filter for transmitting only red light and blocking other color lights. The second color filter CF2 can be a blue color filter for transmitting only blue light and blocking other color lights. The third color filter CF3 can be a green color filter for transmitting only green light and blocking other color lights.

[0094] Each of the color filters CF1, CF2, and CF3 can be disposed in the emission region EA of each of the corresponding sub-pixels SP1, SP3, and SP4. For example, the first color filter CF1 can be disposed in the emission region EA of the first sub-pixel SP1, the second color filter CF2 can be disposed in the emission region EA of the third sub-pixel SP3, and the third color filter CF3 can be disposed in the emission region EA of the fourth sub-pixel SP4.

[0095] In one embodiment, the color filters CF1, CF2, and CF3 may not be disposed in the emission region EA of the second sub-pixel SP2 that displays white. Specifically, when the light-emitting device LD emits white light, the second sub-pixel SP2 that displays white does not require the color filters CF1, CF2, and CF3 for converting the light generated by the light-emitting device LD. Therefore, the separate color filters CF1, CF2, and CF3 may not be disposed in the emission region EA of the second sub-pixel SP2.

[0096] The color filters CF1, CF2, and CF3 can be disposed in the emission region EA of each of the corresponding sub-pixels SP1, SP3, and SP4 and extend to a part of the non-emission region NEA in which the reference voltage line RL and / or the gate line GL are set to extend beyond the emission region EA. For example, the second color filter CF2 of the third sub-pixel SP3 disposed adjacent to the repair pattern RP can be disposed to cover the repair pattern RP in the non-emission region NEA. The second color filter CF2 can extend to the non-emission regions NEA of other adjacent sub-pixels SP2 and SP4 other than the third sub-pixel SP3.

[0097] In an embodiment, the second color filter CF2 can be used to block the laser used in the pixel repair process from transmitting to the upper light-emitting device LD. Specifically, when performing a laser process for pixel repair, a laser in a specific wavelength band can be radiated to the sub-pixels SP1, SP2, SP3, and SP4. The laser used at this time may damage the anode electrode AE or the cathode electrode of the light-emitting device LD disposed at the top. Therefore, the second color filter CF2 can be used to prevent the laser from passing through the circuit device and reaching the light-emitting device LD.

[0098] For example, a laser having a green wavelength band can be used for pixel repair. In the second sub-pixel SP2 in which the color filters CF1, CF2, and CF3 are not disposed, the laser may reach the light-emitting device LD, resulting in defects in the light-emitting device LD. In an embodiment, the second color filter CF2 adjacent to the second sub-pixel SP2 can extend to the non-emission region NEA of the second sub-pixel SP2 to block the repair damage. In this case, the second color filter CF2 can be disposed to overlap at least one region of the repair pattern RP in the non-emission region NEA of the second sub-pixel SP2.

[0099] Similarly, in the fourth sub-pixel SP4 provided with the third color filter CF3 for transmitting green light, the laser may reach the light-emitting device LD, resulting in defects in the light-emitting device LD. In an embodiment, the second color filter CF2 for transmitting only blue light may be further formed on the repair area of the fourth sub-pixel SP4 to block repair damage. In this case, the second color filter CF2 may be set to cover the repair pattern RP in the non-emission area NEA of the fourth sub-pixel SP4.

[0100] Figure 6 Yes Figure 5 An enlarged view of the area AA shown. Specifically, Figure 6 The repair pattern RP connected to the reference voltage line RL is shown.

[0101] When defective pixels such as short circuits or open circuits of signal lines occur in the display panel 50, repair processing may be performed on the corresponding pixels. The repair processing may be performed in a method of manufacturing signal line dark spots by cutting the signal lines of defective pixels using a laser. For example, when a defect occurs in the reference voltage line RL, the reference voltage line RL may be disconnected from the sub-pixels SP1, SP2, SP3, and SP4, making the corresponding sub-pixels SP1, SP2, SP3, and SP4 dark spots.

[0102] To disconnect the reference voltage line RL from the sub-pixels SP1, SP2, SP3, and SP4, the branch line BL connected to the reference voltage line RL may be cut using a laser. When the branch line BL is made of an opaque material, the branch line BL does not transmit the laser and may be cut by absorbing the energy of the laser.

[0103] On the other hand, as described above, when the branch line BL is made of a transparent material, the branch line BL may not absorb the energy of the laser and may transmit the laser as it is, and thus the repair processing may not be performed. Therefore, as Figures 3 to 6 shown, the transparent branch line BL may be connected to the reference voltage line RL through the repair pattern RP formed of an opaque conductive layer. In an embodiment, the repair pattern RP is cut by laser irradiation, so that the branch line BL is disconnected from the reference voltage line RL.

[0104] Specifically, the repair pattern RP may include a main body portion RPa that is provided to have at least one area overlapping with the reference voltage line RL and is connected to the reference voltage line RL through a contact hole. In addition, the repair pattern RP may include an extension portion RPb that extends by branching out from the main body portion RPa and is connected to the branch line BL through a contact hole. The extension portion RPb may have a smaller width than the main body portion RPa and may thus be easily cut by a laser.

[0105] The extension part RPb extends slightly in the row direction X, for example. Some of the extension parts RPb have one end connected to the main body part RPa and the other end connected to the corresponding branch line BL. Some of the extension parts RPb can be connected to the corresponding sub-pixels SP1 and SP4 through the branch line BL. Here, the corresponding sub-pixels SP1 and SP4 can be the sub-pixels SP1 and SP4 that are set away from the reference voltage line RL in the unit pixel PX.

[0106] Other extension parts among the extension parts RPb can have one end connected to the main body part RPa, and the other end can be directly connected to the second electrode T22 of the second transistor T2 of the corresponding sub-pixels SP2 and SP3. Here, the corresponding sub-pixels SP2 and SP3 can be the sub-pixels SP2 and SP3 that are set close to the reference voltage line RL in the unit pixel PX.

[0107] In one embodiment, the extension parts RPb connected to the first, third, and fourth sub-pixels SP1, SP3, and SP4 extend in the row direction X from one side of the main body part RPa. In other words, the extension parts RPb connected to the first, third, and fourth sub-pixels SP1, SP3, and SP4 are arranged in the third sub-pixel SP3 provided on one side of the main body part RPa (i.e., on the side of the reference voltage line RL).

[0108] In one embodiment, the extension part RPb connected to the second sub-pixel SP2 extends in the row direction X from the other side of the main body part RPa. In other words, the extension part RPb connected to the second sub-pixel SP2 can be arranged in the second sub-pixel SP2 provided on the other side of the main body part RPa (i.e., on the other side of the reference voltage line RL). When not reducing the aperture ratio of the second sub-pixel SP2, the extension part RPb connected to the second sub-pixel SP2 can extend to the non-emission area NEA of the second sub-pixel SP2 and can be connected to the second transistor T2 of the sub-pixel SP2.

[0109] During the pixel repair process, the extension part RPb can be cut with a laser to disconnect the connection between the reference voltage line RL and the sub-pixels SP1, SP2, SP3, and SP4. In this case, in order to prevent damage to the upper light-emitting device LD caused by the laser, the extension part RPb of the repair pattern RP can be covered by the second color filter CF2.

[0110] As described above with reference to Figures 3 to 6 In the display device 1 according to one embodiment, the third sub-pixel SP3 that displays blue is designed to have an asymmetric structure for pixel repair.

[0111] Figure 7 is along Figure 5An embodiment of the cross-sectional view along line I-I'.

[0112] Referring to Figure 7 , the sub-pixel SP1 includes: a substrate 100; a circuit device layer disposed on the substrate 100 and having circuit devices provided thereon; and a light-emitting device layer disposed above the circuit device layer and having a light-emitting device LD provided thereon.

[0113] The substrate 100 may be a base substrate on which circuit devices and the light-emitting device LD are provided, and may be a light-transmissive substrate. The substrate 100 may be a rigid substrate including glass or tempered glass, or a flexible substrate made of plastic.

[0114] A first conductive layer may be formed on the substrate 100. The first conductive layer may include lines for driving the sub-pixel SP1. For example, the first conductive layer may include a first power line PL1, and may also include a data line DL (not shown) and a reference voltage line RL (not shown). In one embodiment, the first conductive layer may further include a light-blocking layer LS disposed to overlap with the driving transistor DT. The first conductive layer may be formed of a conductive material such as copper (Cu), aluminum (Al), molybdenum (Mo), nickel (Ni), titanium (Ti), chromium (Cr), or an alloy thereof, but is not limited thereto.

[0115] A buffer layer 110 may be formed on the first conductive layer. The buffer layer 110 may prevent ions or impurities from diffusing from the substrate 100 and prevent moisture from permeating. Additionally, the buffer layer 110 may improve the surface flatness of the substrate 100. The buffer layer 110 may include inorganic materials such as oxides and nitrides, organic materials, or organic-inorganic composite materials, and may be formed in a single-layer or multi-layer structure. For example, the buffer layer 110 may have a three-layer structure or more formed of silicon oxide, silicon nitride, and silicon oxide.

[0116] An active layer 210 may be formed on the buffer layer 110. The active layer 210 may be made of a silicon-based semiconductor material or an oxide-based semiconductor material. Amorphous silicon or polycrystalline silicon may be used as the silicon-based semiconductor material. As the oxide-based semiconductor material, indium tin gallium zinc oxide (InSnGaZnO) as a quaternary metal oxide, indium gallium zinc oxide (InGaZnO), indium tin zinc oxide (InSnZnO), indium aluminum zinc oxide (InAlZnO), tin gallium zinc oxide (SnGaZnO), aluminum gallium zinc oxide (AlGaZnO), tin aluminum zinc oxide (SnAlZnO) as ternary metal oxides, indium zinc oxide (InZnO), tin zinc oxide (SnZnO), aluminum zinc oxide (AlZnO), zinc magnesium oxide (ZnMgO), tin magnesium oxide (SnMgO), indium magnesium oxide (InMgO), indium gallium oxide (InGaO), indium oxide (InO), tin oxide (SnO), and zinc oxide (ZnO) as binary metal oxides, etc. may be used.

[0117] The active layer 210 may include a source region and a drain region containing p-type or n-type impurities, and a channel region formed between the source region and the drain region.

[0118] At least one region of the active layer 210 may be made of a transparent material. The transparent material is, for example, a transparent oxide and may be a transparent conductive material such as tin oxide (TO), indium tin oxide (ITO), indium zinc oxide (IZO), or indium tin zinc oxide (ITZO), but is not limited thereto. For example, the branch line BL formed on the active layer 210 may be made of a transparent material.

[0119] The active layer 210 may further include a lower electrode CstL of the storage capacitor Cst.

[0120] An interlayer insulating layer 120 may be formed on the active layer 210. The interlayer insulating layer 120 may be silicon oxide (SiOx), silicon nitride (SiNx), or a multi-layer thereof.

[0121] A second conductive layer is formed on the interlayer insulating layer 120. The second conductive layer may be an electrode layer, on which electrodes of circuit devices forming the sub-pixel SP1 are provided. For example, the second conductive layer may include drain electrodes / source electrodes DT1 and DT2 of a transistor and a gate electrode DT3. The gate electrode DT3 may be arranged to overlap with the channel region of the corresponding active layer 210, and the drain electrodes / source electrodes DT1 and DT2 may be connected to the drain region and the source region of the active layer 210 through contact holes, respectively. The drain electrodes / source electrodes DT1 and DT2, the gate electrode DT3, and the corresponding active layer 210 may form a transistor DT. In the illustrated embodiment, the driving transistor DT connected to the light-emitting device LD is shown as an example.

[0122] In addition, the second conductive layer may further include the upper electrode CstU of the storage capacitor Cst.

[0123] In addition, the second conductive layer may further include a line for driving the sub-pixel SP1. For example, the second conductive layer may include a gate line GL. The second conductive layer may be formed of a conductive material such as copper (Cu), aluminum (Al), molybdenum (Mo), nickel (Ni), titanium (Ti), chromium (Cr), or an alloy thereof, but is not limited thereto.

[0124] In one embodiment, the second conductive layer may further include a repair pattern RP for pixel repair.

[0125] A passivation layer 130 is formed on the second conductive layer. The passivation layer 130 may be an insulating layer for protecting components below the passivation layer 113. The passivation layer 130 may be formed of a single layer or multiple layers of silicon oxide (SiOx) or silicon nitride (SiNx), but is not limited thereto.

[0126] A color filter layer 140 is formed on the passivation layer 130. The color filter layer 140 may include a red color filter CF1, a blue color filter CF2, and a green color filter CF3. Specifically, the red color filter CF1 may be disposed on the emission region EA of the red sub-pixel SP1, the blue color filter CF2 may be disposed on the emission region EA of the blue sub-pixel SP3, and the green color filter CF3 may be disposed on the emission region EA of the green sub-pixel SP4. The color filter may not be provided in the white sub-pixel SP2.

[0127] A coating layer 150 may be formed on the color filter layer 140. The coating layer 150 may be a planarization film for reducing the step difference of the lower structure. The coating layer 150 may be made of an organic material and, for example, may be formed of a single layer or a double layer of polyimide or photoacrylic, but is not limited thereto.

[0128] A light-emitting device layer is formed on the coating layer 150, and the light-emitting device layer includes a light-emitting device LD. The light-emitting device LD includes an anode electrode AE, an emission layer EL, and a cathode electrode CE.

[0129] The anode electrode AE is formed on the coating layer 150. The anode electrode AE is connected to the second electrode DT2 of the driving transistor DT through a through hole passing through the coating layer 150.

[0130] A bank BNK is also formed on the coating layer 150. The bank BNK is formed to cover the edge of the anode electrode AE.

[0131] An emission layer EL is formed on the anode electrode AE. The emission layer EL is formed on the region of the anode electrode AE that is not covered by the bank BNK and is exposed. The region of the anode electrode AE that is not covered by the bank BNK and is exposed can be defined as the emission region EA.

[0132] The cathode electrode CE is deposited widely on the substrate 100. The cathode electrode CE is formed on the emission layer EL and the bank BNK. In other words, the cathode electrode CE can be formed to cover the emission layer EL and the bank BNK.

[0133] An encapsulation layer 160 can be formed on the cathode electrode CE. The encapsulation layer 160 can prevent oxygen or moisture from infiltrating into the plurality of light-emitting devices LD by including at least one inorganic layer. The encapsulation layer 160 can protect the plurality of light-emitting devices LD from foreign substances such as dust by including at least one organic layer.

[0134] Figure 8 is a cross-sectional view along line II-II' in Figure 6 One embodiment. In the description Figure 8 when, components overlapping with the components in Figure 7 are given the same reference numerals, and their detailed descriptions are omitted.

[0135] Refer to Figure 8 , a first conductive layer can be formed on the substrate 100. The first conductive layer can include a line for driving the sub-pixel SP3. For example, the first conductive layer can include a reference voltage line RL.

[0136] A buffer layer 110 can be formed on the first conductive layer. The buffer layer 110 can prevent ions or impurities from diffusing from the substrate 100 and block moisture penetration. In addition, the buffer layer 110 can improve the surface flatness of the substrate 100.

[0137] An active layer 210 can be formed on the buffer layer 110. The active layer 210 can include a branch line BL. The branch line BL has at least a part formed to overlap with the emission region EA. The branch line BL can be made of a transparent material. The transparent material is, for example, a transparent oxide and can be a transparent conductive material such as tin oxide (TO), indium tin oxide (ITO), indium zinc oxide (IZO), or indium tin zinc oxide (ITZO), but is not limited thereto.

[0138] An interlayer insulating layer 120 can be formed on the active layer 210.

[0139] A second conductive layer is formed on the interlayer insulating layer 120. The second conductive layer can be an electrode layer, on which an electrode of a circuit device forming the sub-pixel SP3 is provided.

[0140] In one embodiment, the second conductive layer may further include a repair pattern RP for pixel repair. The repair pattern RP may include a main body portion RPa which is arranged to have at least one region overlapping with the reference voltage line RL and is connected to the reference voltage line RL through a contact hole. Additionally, the repair pattern RP may further include an extension portion RPb extending from the main body portion RPa. The extension portion RPb may have one end connected to the main body portion RPa and the other end connected to the corresponding branch line BL.

[0141] A passivation layer 130 is formed on the second conductive layer. The passivation layer 130 may be an insulating layer for protecting the components below the passivation layer 113.

[0142] A color filter layer 140 is formed on the passivation layer 130. The color filter layer 140 may include a red color filter CF1, a blue color filter CF2, and a green color filter CF3. Specifically, the red color filter CF1 may be disposed on the emission region EA of the red sub-pixel SP1, the blue color filter CF2 may be disposed on the emission region EA of the blue sub-pixel SP3, and the green color filter CF3 may be disposed on the emission region EA of the green sub-pixel SP4. The color filter may not be provided in the white sub-pixel SP2.

[0143] The color filters CF1, CF2, and CF3 may extend to a part of the non-emission region NEA. For example, the second color filter CF2 may be formed to overlap at least one region of the repair pattern RP provided in the non-emission region NEA. In particular, the second color filter CF2 may also be formed on the extension portion RPb of the repair pattern RP that is laser-cut during pixel repair.

[0144] A coating layer 150 may be formed on the color filter layer 140. The coating layer 150 may be a planarization film for reducing the step difference of the underlying structure.

[0145] An organic light-emitting device layer is formed on the coating layer 150, and the organic light-emitting device layer includes an organic light-emitting device LD. The organic light-emitting device LD includes an anode electrode AE, an emission layer EL, and a cathode electrode CE.

[0146] The anode electrode AE is formed on the coating layer 150. A bank BNK is also formed on the coating layer 150. The bank BNK is formed to cover the edge of the anode electrode AE.

[0147] The emission layer EL is formed on the anode electrode AE. The emission layer EL is formed on the region of the anode electrode AE that is not covered by the bank BNK and is exposed. The region of the anode electrode AE that is not covered by the bank BNK and is exposed may be defined as the emission region EA.

[0148] The cathode electrode CE is widely deposited on the substrate 100. The cathode electrode CE is formed on the emission layer EL and the bank BNK. In other words, the cathode electrode CE can be formed to cover the emission layer EL and the bank BNK.

[0149] An encapsulation layer 160 can be formed on the cathode electrode CE. The encapsulation layer 160 can prevent oxygen or moisture from penetrating into the plurality of light-emitting devices LD by including at least one inorganic layer. The encapsulation layer 160 can protect the plurality of light-emitting devices LD from foreign substances such as dust by including at least one organic layer.

[0150] Figure 9 is a cross-sectional view for describing a pixel repair method according to an embodiment.

[0151] As described above with reference to Figure 3 In the present invention, the reference voltage line RL is shared among the four sub-pixels SP1, SP2, SP3, and SP4. In this case, branch lines BL can be provided to connect the reference voltage line RL to each of the sub-pixels SP1, SP2, SP3, and SP4. When the branch lines BL are made of an opaque material, the branch lines BL should be provided in the non-emission area NEA, which reduces the aperture ratio of the sub-pixels SP1, SP2, SP3, and SP4. In one embodiment, in order to increase the aperture ratio of the sub-pixels SP1, SP2, SP3, and SP4, the branch lines BL are made of a transparent material and provided in the emission area EA.

[0152] Therefore, in an embodiment, by forming the branch lines BL made of a transparent material and changing their shape, a sufficient aperture ratio of the sub-pixels SP1, SP2, SP3, and SP4 can be ensured.

[0153] Since the branch lines BL are made of a transparent material, laser cutting and pixel repair cannot be correctly applied to the branch lines BL. Therefore, in one embodiment, a repair pattern RP for connecting the branch lines BL to the reference voltage line RL is also formed. The repair pattern RP can include a main body portion RPa connected to the reference voltage line RL and an extension portion RPb extending from the main body portion RPa and connected to the branch lines BL. The extension portion RPb of the repair pattern RP can have a smaller width and can be easily cut using a laser. As Figure 9 shown, when a laser is irradiated onto the extension portion RPb, the extension portion RPb that absorbs the laser energy may be cut off to create a defective sub-pixel dark spot.

[0154] In one embodiment, the extensions RPb connected to the sub-pixels SP1, SP3, and SP4 may be disposed at one side of the main body portion RPa. For example, the extensions RPb may all be disposed on the blue sub-pixel SP3. In the embodiment, laser cutting for the sub-pixels SP1, SP3, and SP4 may be collectively performed in the non-emission area NEA of the third sub-pixel SP3.

[0155] In one embodiment, the extension RPb connected to the white sub-pixel SP2 may be disposed at the other side of the main body portion RPa. For example, the extension RPb connected to the white sub-pixel SP2 may be disposed in the non-emission area NEA of the white sub-pixel SP2.

[0156] As Figure 9 shown, when the laser irradiates the extension RPb, the damage caused by the laser may be applied to the upper light-emitting device LD. To prevent this, the color filter CF2 is used. When the extension RPb of the repair pattern RP is disposed on the blue sub-pixel SP3, the blue color filter CF2 is set to cover the extension RPb, thereby preventing the laser from reaching the light-emitting device LD and achieving stable repair.

[0157] When at least one of the extensions RPb (for example, the extension RPb connected to the white sub-pixel SP2) is disposed on another sub-pixel SP2, the blue color filter CF2 may extend to the area of the corresponding sub-pixel SP2. For example, the blue color filter CF2 may extend to the non-emission area NEA of the white sub-pixel SP2 to cover the extension RPb disposed on the white sub-pixel SP2. Since the extension RPb is disposed in the non-emission area NEA of the white sub-pixel SP2, the blue color filter CF2 does not need to extend to the emission area EA of the white sub-pixel SP2. In other words, the area where the blue color filter CF2 is disposed can be reduced, thereby ensuring a sufficient aperture ratio of the white sub-pixel SP2.

[0158] Based on the display device according to the embodiment, by forming the branch line connected to the reference voltage line made of a transparent material and changing the shape, the position of the repair area for the signal line can be adjusted, and the aperture area can be maximally ensured.

[0159] Based on the display device according to the embodiment, the area where the color filter for pixel repair is disposed can be reduced, and at the same time, short-circuit defects that may occur during the repair process can be prevented.

[0160] Based on the display device according to the embodiment, a high aperture ratio can be ensured, and the repair process for the signal line can be stably performed.

[0161] Although the embodiments of the present invention have been described above with reference to the accompanying drawings, those skilled in the art to which the present invention pertains will be able to understand that the above-described technical configuration of the present invention can be implemented in other specific forms without changing its technical spirit or basic characteristics. Therefore, it should be understood that the above-described embodiments are illustrative in all respects and not restrictive. In addition, the scope of the present invention is described by the claims described herein rather than the specific embodiment part. In addition, the meaning and scope of the claims and all changes or modifications derived from equivalent concepts should be construed as being included within the scope of the present invention.

Claims

1. A display device, comprising: A substrate, the substrate comprising an emission region and a non-emission region of a sub-pixel, and a plurality of sub-pixels are arranged on the substrate; a gate line disposed in the non-emitting region and extending in one direction; a signal line disposed in the non-emitting region and crossing the gate line; a repair pattern disposed in the non-emitting region and connected to the signal line; as well as At least one branch line is provided, and the at least one branch line is used to connect the repair pattern with the circuit devices of the plurality of sub-pixels.

2. The display device according to claim 1, wherein: The at least one branch line is made of a transparent material.

3. The display device according to claim 1, wherein: At least one region of the at least one branch line overlaps with emission regions of the plurality of sub-pixels.

4. The display device according to claim 1, wherein: The repair pattern comprises: a main body portion connected to the signal line; and A plurality of extension portions extend from the main body portion in one direction and are respectively connected to the plurality of sub-pixels.

5. The display device according to claim 4, wherein: At least some of the plurality of extension portions are respectively connected to the plurality of sub-pixels through the at least one branch line.

6. The display device according to claim 4, wherein: At least some of the plurality of extensions extend from one side of the body portion and are disposed in a first color sub-pixel disposed at one side of the body portion.

7. The display device according to claim 6, wherein: Other extending portions of the plurality of extending portions extend from the other side of the body portion and are disposed in a second color sub-pixel disposed at the other side of the body portion.

8. The display device according to claim 4, wherein: The plurality of extensions are cut using a laser during pixel repair. 9 . The display device of claim 4 , further comprising a color filter layer disposed in the emission region and extending to the non-emission region to cover at least one region of the repair pattern.

10. The display device according to claim 9, wherein: The color filter layer includes a first color filter formed in an emission region of a first color sub-pixel disposed at one side of the repair pattern and extending to a non-emission region of a sub-pixel adjacent to the first color sub-pixel.

11. The display device according to claim 10, wherein: The first color filter covers at least one extending portion of the plurality of extending portions of the repair pattern in a non-emission region of an adjacent second color sub-pixel.

12. The display device according to claim 11, wherein: The first color sub-pixel is a blue sub-pixel, the second color sub-pixel is a white sub-pixel, and the first color filter is a blue color filter.

13. The display device according to claim 1, further comprising: a first conductive layer, the first conductive layer being formed on the substrate and including the signal line; a buffer layer formed on the first conductive layer; an active layer formed on the buffer layer and including the at least one branch line; an interlayer insulating layer formed on the active layer; as well as A second conductive layer is formed on the interlayer insulating layer and includes the gate line and the repair pattern.

14. A display device, comprising: A substrate, the substrate comprising an emission region and a non-emission region of a sub-pixel, and a plurality of sub-pixels are arranged on the substrate; a gate line disposed in the non-emitting region and extending in one direction; a signal line disposed in the non-emitting region and crossing the gate line; as well as a repair pattern, the repair pattern being disposed in the non-emitting region and being used to connect the signal line with the circuit devices of the plurality of sub-pixels, Wherein, the repair pattern includes: a main body portion connected to the signal line; and A plurality of extension portions extend from the main body portion in one direction and are respectively connected to the plurality of sub-pixels.

15. The display device according to claim 14, wherein: At least some of the plurality of extensions extend from one side of the body portion and are disposed in a blue sub-pixel disposed at one side of the body portion.

16. The display device according to claim 15, wherein: Other extending portions of the plurality of extending portions extend from another side of the body portion and are disposed in a white sub-pixel disposed at the another side of the body portion. 17 . The display device of claim 16 , comprising a blue color filter formed in an emission region of the blue sub-pixel disposed at one side of the body portion and extending to a non-emission region of an adjacent sub-pixel of the blue sub-pixel.

18. The display device according to claim 17, wherein: The blue color filter covers at least one extending portion of the plurality of extending portions of the repair pattern in a non-emission region of an adjacent white sub-pixel.

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