Display panel and display device

Abstract

Disclosed are a display panel and a display device that reduce electromagnetic noise generated during operation of a multiplexer of the display device. The display device includes: a data driving circuit configured to supply a data signal to a display panel; a multiplexer configured to selectively supply the data signal output through one output line of the data driving circuit to at least one of a plurality of data lines of the display panel; and a noise cancellation circuit configured to generate a plurality of cancellation signals based on the plurality of driving signals supplied to the multiplexer to cancel electromagnetic noise generated during operation of the multiplexer.

Description

Technical Field

[0001] The present disclosure relates to a display panel and a display device with reduced electromagnetic noise. Background Art

[0002] With the development of the information society and the development of various portable electronic devices such as mobile communication terminals and laptop computers, the demand for display devices applied to these electronic devices has gradually increased.

[0003] Display devices include liquid crystal display devices (LCDs) and OLED display devices using organic light emitting diodes (hereinafter referred to as OLEDs).

[0004] A display device includes: a display panel having a plurality of gate lines and a plurality of data lines for displaying an image; and a data driving circuit for driving the display panel. Summary of the Invention

[0005] The data driving circuit of a display device may include a plurality of data integrated circuits. Each output line of each data integrated circuit may be connected to a plurality of data lines through a multiplexer. The multiplexer may reduce the number of output lines of the data driving circuit.

[0006] However, since the multiplexer operates based on a high-frequency driving signal, electromagnetic noise may be generated when the driving signal changes its state. Therefore, a technique for reducing the electromagnetic noise of the driving signal of the multiplexer is required.

[0007] An object of the present disclosure is to provide a display panel and a display device that reduce electromagnetic noise generated when driving a multiplexer of a display device.

[0008] The object according to the present disclosure is not limited to the above object. Other objects and advantages according to the present disclosure that are not mentioned can be understood based on the following description, and can be more clearly understood based on the embodiments of the present disclosure. In addition, it is easily understood that the objects and advantages of the present disclosure can be achieved by using the means shown in the claims or combinations thereof.

[0009] An embodiment of the present disclosure provides a display device, including: a data driving circuit configured to supply a data signal to a display panel; a multiplexer configured to selectively supply the data signal output through one output line of the data driving circuit to at least one of a plurality of data lines of the display panel; and a noise cancellation circuit configured to generate a plurality of cancellation signals based on a plurality of driving signals provided to the multiplexer to cancel electromagnetic noise generated during the operation of the multiplexer.

[0010] Another embodiment of the present disclosure provides a display panel, including: a multiplexer; and a noise cancellation circuit configured to generate a cancellation signal to cancel the cancellation signal generated when each of a first driving signal, a second driving signal, and a third driving signal applied to the multiplexer changes its state, wherein the noise cancellation circuit includes: a first logic circuit configured to perform a NOR logic operation on the first driving signal and the third driving signal to generate a first cancellation signal for canceling the noise generated when each of the first driving signal and the third driving signal changes its state; and a second logic circuit configured to invert the second driving signal to generate a second cancellation signal for canceling the electromagnetic noise generated when the state of the second driving signal changes.

[0011] According to an embodiment of the present disclosure, electromagnetic noise generated during the state transition of the high-frequency driving signal of the multiplexer driving the display device can be canceled. Therefore, the image quality of the display device is improved.

[0012] According to an embodiment of the present disclosure, the electromagnetic noise generated due to the rising edge and falling edge of the driving signal for operating the multiplexer can be canceled by the falling edge and rising edge of the cancellation signal, respectively.

[0013] According to an embodiment of the present disclosure, poor image quality caused by electromagnetic noise and common voltage stabilization delay due to the switching of the driving signal for operating the multiplexer can be prevented.

[0014] The effects of the present disclosure are not limited to the above effects, and those skilled in the art can clearly understand other effects not mentioned from the following description.

[0015] In addition to the above effects, while describing the specific details of implementing the present disclosure, the specific effects of the present disclosure are also described together. BRIEF DESCRIPTION OF THE DRAWINGS

[0016] Figure 1 is a block diagram schematically showing a display device according to an embodiment of the present disclosure.

[0017] Figure 2 shows an electromagnetic noise cancellation circuit according to a first embodiment of the present disclosure.

[0018] Figure 3 is a signal waveform diagram related to the electromagnetic noise cancellation circuit according to the first embodiment of the present disclosure.

[0019] Figure 4 shows an electromagnetic noise cancellation circuit according to a second embodiment of the present disclosure.

[0020] Figure 5 is a signal waveform diagram related to the electromagnetic noise cancellation circuit according to the second embodiment of the present disclosure.

[0021] Figure 6 It is a layout diagram of drive signal lines and cancellation signal lines of a display device according to an embodiment of the present disclosure. Detailed implementation manners

[0022] The advantages and features of the present disclosure and the methods for realizing these advantages and features will become clear with reference to the embodiments described in detail later in conjunction with the accompanying drawings. However, the present disclosure is not limited to the embodiments disclosed below, but can be implemented in various different forms. Therefore, these embodiments are presented only to make the present disclosure complete and to fully inform those of ordinary skill in the art to which the present disclosure pertains of the scope of the present disclosure, and the present disclosure is defined only by the scope of the claims.

[0023] For the sake of simplicity and clarity of illustration, the elements in the accompanying drawings are not necessarily drawn to scale. The same reference numerals in different drawings refer to the same or similar elements and thus perform similar functions. In addition, for the sake of simplifying the description, the description and details of known steps and elements are omitted. Moreover, in the following detailed description of the present disclosure, many specific details are set forth to provide a thorough understanding of the present disclosure. However, it should be understood that the present disclosure can be practiced without these specific details. In other cases, known methods, processes, components, and circuits are not described in detail so as not to unnecessarily obscure aspects of the present disclosure. Examples of various embodiments are further illustrated and described below. It should be understood that the description herein is not intended to limit the claims to the specific embodiments described. On the contrary, it is intended to cover alternatives, modifications, and equivalents that may be included within the spirit and scope of the present disclosure as defined by the appended claims.

[0024] The shapes, sizes, ratios, angles, quantities, etc. disclosed in the drawings used to describe the embodiments of the present disclosure are exemplary, and the present disclosure is not limited thereto.

[0025] The terms used herein are for the purpose of describing specific embodiments only and are not intended to limit the present disclosure. As used herein, unless the context clearly indicates otherwise, the singular forms “a” and “an” are also intended to include the plural forms. It should be further understood that when used in this specification, the terms “comprising,” “including,” “containing,” and “having” specify the presence of the stated features, integers, operations, elements, and / or components, but do not preclude the presence or addition of one or more other features, integers, operations, elements, components, and / or portions thereof. As used herein, the term “and / or” includes any and all combinations of one or more of the associated listed items. An expression such as “at least one” before a list of elements can modify the entire list of elements without modifying the individual elements of the list. When interpreting numerical values, there may be errors or tolerances even if they are not explicitly described.

[0026] In addition, it should also be understood that when a first element or layer is said to be "on" a second element or layer, the first element can be directly disposed on the second element or can be indirectly disposed on the second element in the case where a third element or layer is disposed between the first element and the second element or layer. It should be understood that when an element or layer is said to be "connected to" or "coupled to" another element or layer, it can be directly on the other element or layer, directly connected to or coupled to the other element or layer, or there can be one or more intermediate elements or layers. In addition, it should also be understood that when an element or layer is said to be "between" two elements or layers, it can be the only element or layer between the two elements or layers, or there can also be one or more intermediate elements or layers.

[0027] In the description of temporal relationships such as temporal precedence relationships (e.g., "after", "subsequent to", "before", etc.) between, for example, two events, unless it is specified as "directly after", "directly subsequent to", or "directly before", another event can occur therebetween.

[0028] When an embodiment can be implemented in different ways, the functions or operations specified in a particular block may occur in an order different from the order specified in the flowchart. For example, two consecutive blocks can actually be executed substantially simultaneously, or depending on the functions or operations involved, these two blocks can be executed in the reverse order.

[0029] It should be understood that although the terms "first", "second", "third", etc. may be used herein to describe various elements, components, regions, layers, and / or periods of time, these elements, components, regions, layers, and / or periods of time should not be limited by these terms. These terms are used to distinguish one element, component, region, layer, or part from another element, component, region, layer, or part. Thus, without departing from the spirit and scope of the present disclosure, the first element, component, region, layer, or part described below can be referred to as the second element, component, region, layer, or part.

[0030] When an embodiment can be implemented in different ways, the functions or operations specified in a particular block may occur in an order different from the order specified in the flowchart. For example, two consecutive blocks can actually be executed substantially simultaneously, or can be executed in the reverse order depending on the functions or operations involved.

[0031] The features of the various embodiments of the present disclosure can be partially or fully combined with each other and can be technically interrelated or interoperable. The embodiments can be implemented independently of each other and can be implemented together in an associated relationship.

[0032] When interpreting a numerical value, unless it is separately and explicitly described, the value is interpreted as including the error range.

[0033] It should be understood that when an element or layer is referred to as "connected to" or "coupled to" another element or layer, it can be directly on the other element or layer, directly connected to or coupled to the other element or layer, or there can be one or more intermediate elements or layers. Additionally, it should also be understood that when an element or layer is referred to as being "between" two elements or layers, it can be the only element or layer between the two elements or layers, or there can also be one or more intermediate elements or layers.

[0034] Unless otherwise defined, all terms used herein, including technical and scientific terms, have the same meaning as commonly understood by one of ordinary skill in the art to which this inventive concept pertains. It should be further understood that terms (such as those defined in a general dictionary) should be interpreted as having a meaning consistent with their meaning in the context of the relevant art, and are not to be interpreted in an idealized or overly formal sense unless expressly defined herein.

[0035] As used herein, "embodiments", "examples", "aspects", etc. should not be construed as any aspect or design being superior to or more advantageous than other aspects or designs described.

[0036] Furthermore, the term "or" means "including or" rather than "exclusive or". That is, unless otherwise stated or clearly derived from the context, the statement "x uses a or b" means any one of the permutations naturally included.

[0037] The terms used in the following description are selected as general terms and common terms in the relevant technical field. However, depending on the development and / or changes in technology, convention, the preferences of those skilled in the art, etc., there may be other terms in addition to these terms. Therefore, the terms used in the following description should not be construed as limiting the technical concept, but should be understood as examples of terms used to illustrate embodiments.

[0038] In addition, in specific cases, the applicant can arbitrarily select terms, and in such cases, the detailed meaning of the terms will be described during the corresponding description. Therefore, the terms used in the following description should not be understood solely based on the name of the terms, but should be understood based on the meaning and content of the terms in the entire specific implementation.

[0039] In the description of signal flow, for example, when a signal is transmitted from node A to node B, this may include the case where the signal is transmitted from node A via another node to node B, unless the phrase "transmitted immediately" or "transmitted directly" is used.

[0040] Throughout this disclosure, unless otherwise stated, "A and / or B" means A, B, or A and B, and unless otherwise stated, "C to D" means C (including C) to D (including D).

[0041] "At least one" should be understood to include any combination of one or more of the listed components. For example, at least one of the first component, the second component, and the third component not only means the first component, the second component, or the third component, but also means all combinations of two or more of the first component, the second component, and the third component.

[0042] Hereinafter, a display panel and a display device with reduced electromagnetic noise according to some embodiments will be described.

[0043] Figure 1 is a block diagram schematically showing a display device according to an embodiment of the present disclosure.

[0044] Referring to Figure 1 , a display device according to an embodiment of the present disclosure includes a display panel 400, a multiplexer 30, a data driving circuit 200, a gate driving circuit 300, a timing controller 100, and a noise cancellation circuit 500.

[0045] The display panel 400 may be a display panel using organic light emitting diode elements. The area of the display panel 400 may be divided into a display area for displaying an image and a non-display area other than the display area.

[0046] In the display area, a plurality of data lines DL1 to DL3 and DL6 to DL8 intersect with a plurality of gate lines GL1 to GL4 to define intersections. A plurality of sub-pixels are arranged in a matrix form and are respectively provided at the intersections. A plurality of multiplexers 30 may be provided in the non-display area of the display panel 400.

[0047] In Figure 1 's example, a plurality of multiplexers 30 are shown provided in the display panel 400. However, embodiments of the present disclosure are not limited thereto, and the multiplexer may be provided outside the display panel.

[0048] The intersections of the data lines and the gate lines respectively define a plurality of sub-pixel regions. A thin film transistor and a pixel electrode may be formed in each sub-pixel region. The thin film transistor may supply the data signal of the data line to the pixel electrode in response to a scan signal supplied to the gate line.

[0049] The sub-pixels may include a plurality of red sub-pixels that emit red light, a plurality of green sub-pixels that emit green light, and a plurality of blue sub-pixels that emit blue light. Alternatively, the sub-pixels may further include white sub-pixels to improve brightness.

[0050] Each sub-pixel may include a light emitting element and a driving circuit for driving the light emitting element. In one example, the light emitting element may be an organic light emitting diode element.

[0051] The timing controller 100 may generate a gate control signal and a data control signal using a synchronization signal supplied from an external system. The gate control signal may include a gate start pulse, a gate shift clock, and a gate output enable signal. The data control signal may include a source start pulse, a source shift clock, and a source output enable signal.

[0052] In addition, the timing controller 100 may supply a plurality of driving signals for driving the multiplexer 30 to the noise canceling circuit 500.

[0053] The noise canceling circuit 500 may perform a voltage level shift on the plurality of driving signals and supply the voltage level shifted driving signals to the multiplexer 30.

[0054] In addition, the noise canceling circuit 500 may generate a plurality of canceling signals based on the plurality of driving signals to cancel electromagnetic noise generated when the states of the plurality of driving signals are changed. In this regard, the plurality of canceling signals may be applied to canceling signal lines disposed adjacent to the driving signal lines to which the plurality of driving signals are applied. The detailed configuration of the noise canceling circuit 500 is described in detail in the description of Figure 2 and Figure 4 .

[0055] The gate driving circuit 300 may include a plurality of gate integrated circuits and sequentially generate a plurality of scan pulse signals in response to a gate control signal from the timing controller 100.

[0056] The data driving circuit 200 may include a plurality of data integrated circuits, and each data integrated circuit outputs data signals corresponding to one line to the output lines OL1 and OL2 during each horizontal period in response to a data control signal supplied from the timing controller 100.

[0057] For convenience of explanation, Figure 1 two output lines are shown. However, embodiments of the present disclosure are not limited thereto. A plurality of output lines may be included, and a plurality of data lines may be connected to each output line via the multiplexer 30. Figure 1 One output line is shown connected to three data lines via the multiplexer 30. However, embodiments of the present disclosure are not limited thereto.

[0058] The multiplexer 30 time-division multiplexes the data signals output from the output lines in response to the driving signals and distributes the time-division multiplexed data signals to the data lines. For example, the multiplexer 30 distributes the data signals at a ratio of 1:3 in response to the first driving signal, the second driving signal, and the third driving signal.

[0059] In one example, the multiplexer 30 may include a first switch, a second switch, and a third switch. Each of the first switch, the second switch, and the third switch may be embodied as a thin film transistor. The first switch, the second switch, and the third switch may be formed simultaneously in a process of forming elements in a sub-pixel region provided in a display area of the display panel 400.

[0060] In one example, the first switch of the multiplexer 30 may transmit a data signal to a first data line in response to a first driving signal. The second switch of the multiplexer 30 may transmit the data signal to a second data line in response to a second driving signal. The third switch of the multiplexer 30 may transmit the data signal to a third data line in response to a third driving signal.

[0061] In this way, the multiplexer 30 may distribute the data signal output from one output line to three data lines, such that the number of output lines of the data driving circuit 200 may be reduced to 1 / 3 of the number of data lines.

[0062] The noise cancellation circuit 500 may receive the first driving signal, the second driving signal, and the third driving signal from the timing controller 100, and may perform a level shift on the first driving signal, the second driving signal, and the third driving signal and provide the level-shifted first driving signal, the level-shifted second driving signal, and the level-shifted third driving signal to the first switch, the second switch, and the third switch of the multiplexer 30, respectively.

[0063] In addition, the noise cancellation circuit 500 may generate a first cancellation signal and a second cancellation signal based on the first driving signal, the second driving signal, and the third driving signal, and may perform a level shift on the first cancellation signal and the second cancellation signal and apply the level-shifted first cancellation signal and the level-shifted second cancellation signal to cancellation signal lines, respectively.

[0064] Figure 2 Shows an electromagnetic noise cancellation circuit according to a first embodiment of the present disclosure.

[0065] The timing controller 100 provides a first driving signal MUX1, a second driving signal MUX2, and a third driving signal MUX3 to the noise cancellation circuit 500 to control the operation of the multiplexer 30.

[0066] The noise cancellation circuit 500 may include a logic circuit 10 and a level shifter 20.

[0067] The logic circuit 10 can perform a NOR logic operation on the first drive signal MUX1, the second drive signal MUX2, and the third drive signal MUX3 to generate a cancellation signal PS1. The level shifter 20 can perform a level shift on the first drive signal MUX1, the second drive signal MUX2, and the third drive signal MUX3, and supply the level-shifted first drive signal MUX1, second drive signal MUX2, and third drive signal MUX3 to the first switch, second switch, and third switch of the multiplexer 30, respectively.

[0068] In addition, the level shifter 20 can perform a level shift on the cancellation signal PS1 and supply the level-shifted cancellation signal PS1 to the cancellation signal line. The cancellation signal line can be arranged adjacent to the drive signal lines to which the first drive signal MUX1, the second drive signal MUX2, and the third drive signal MUX3 are respectively applied.

[0069] Figure 3 is a signal waveform diagram related to the electromagnetic noise cancellation circuit according to the first embodiment of the present disclosure.

[0070] Referring to Figure 2 and Figure 3 , the noise cancellation circuit 500 performs a NOR logic operation on the first drive signal MUX1, the second drive signal MUX2, and the third drive signal MUX3 to generate a first cancellation signal PS1, thereby canceling the electromagnetic noise generated by each of the first drive signal MUX1, the second drive signal MUX2, and the third drive signal MUX3 during state transitions.

[0071] In this regard, the first cancellation signal PS1 has a waveform that changes from a high level to a low level when the first drive signal MUX1 changes from a low level to a high level. Therefore, the electromagnetic noise generated when the first drive signal MUX1 changes from a low level to a high level can be canceled.

[0072] In addition, the first cancellation signal PS1 has a waveform that changes from a low level to a high level when the first drive signal MUX1 changes from a high level to a low level. Therefore, the electromagnetic noise generated when the first drive signal MUX1 changes from a high level to a low level can be canceled.

[0073] In addition, the first cancellation signal PS1 has a waveform that changes from a high level to a low level when the third drive signal MUX3 changes from a low level to a high level. Therefore, the electromagnetic noise generated when the third drive signal MUX3 changes from a low level to a high level can be canceled.

[0074] In addition, the first cancellation signal PS1 has a waveform that changes from low level to high level when the third drive signal MUX3 changes from high level to low level. Therefore, the electromagnetic noise generated when the third drive signal MUX3 changes from high level to low level can be eliminated.

[0075] However, as Figure 3 shown, when the second drive signal MUX2 changes from low level to high level, the first cancellation signal PS1 does not change but remains at low level. Therefore, the first cancellation signal PS1 cannot eliminate the noise generated when the second drive signal MUX2 changes from low level to high level.

[0076] This noise may have an adverse effect on EMI. To eliminate this situation, the present disclosure provides an electromagnetic noise cancellation circuit that can 100% eliminate the noise generated during the state transitions of all drive signals of the multiplexer 30.

[0077] Figure 4 An electromagnetic noise cancellation circuit according to a second embodiment of the present disclosure is shown.

[0078] Referring to Figure 4 , the noise cancellation circuit 500 may include a logic circuit 10 and a level shifter 20, and the logic circuit 10 includes a first logic circuit 12 and a second logic circuit 14.

[0079] The timing controller 100 provides the first drive signal MUX1, the second drive signal MUX2, and the third drive signal MUX3 to the noise cancellation circuit 500 to control the operation of the multiplexer 30.

[0080] The first logic circuit 12 may perform a NOR logic operation on the first drive signal MUX1 and the third drive signal MUX3 to generate the first cancellation signal PS1. The first cancellation signal PS1 has a waveform that changes from low level to high level when the first drive signal MUX1 and the third drive signal MUX3 each change from high level to low level. In addition, the first cancellation signal PS1 has a waveform that changes from high level to low level when the first drive signal MUX1 and the third drive signal MUX3 each change from low level to high level. In one example, the first logic circuit 12 may be a NOR logic element.

[0081] The second logic circuit 14 may invert the second drive signal MUX2 to generate the second cancellation signal PS2. The phase of the waveform of the second cancellation signal PS2 is opposite to the phase of the second drive signal MUX2. In one example, the second logic circuit 14 may be an inverting element.

[0082] The level shifter 20 can perform level shifting on the first drive signal MUX1, the second drive signal MUX2, and the third drive signal MUX3, and supply the level-shifted first drive signal MUX1, second drive signal MUX2, and third drive signal MUX3 to the first switch, second switch, and third switch of the multiplexer 30, respectively.

[0083] In addition, the level shifter 20 can perform level shifting on the first cancellation signal PS1 and the second cancellation signal PS2, and supply the level-shifted first cancellation signal PS1 and the level-shifted second cancellation signal PS2 to the first cancellation signal line and the second cancellation signal line, respectively. In one example, the first cancellation signal line and the second cancellation signal line can be arranged adjacent to the drive signal lines to which the first drive signal MUX1, the second drive signal MUX2, and the third drive signal MUX3 are respectively applied.

[0084] Figure 5 is a signal waveform diagram related to the electromagnetic noise cancellation circuit according to the second embodiment of the present disclosure.

[0085] Referring to Figure 4 and Figure 5 , the noise cancellation circuit 500 performs a NOR logic operation on the first drive signal MUX1 and the third drive signal MUX3 to generate a first cancellation signal PS1, thereby canceling the electromagnetic noise generated when the states of the first drive signal MUX1 and the third drive signal MUX3 change respectively.

[0086] In this regard, the first cancellation signal PS1 has a waveform that changes from high level to low level when the first drive signal MUX1 changes from low level to high level. In addition, the first cancellation signal PS1 has a waveform that changes from low level to high level when the first drive signal MUX1 changes from high level to low level. In addition, the first cancellation signal PS1 has a waveform that changes from high level to low level when the third drive signal MUX3 changes from low level to high level. In addition, the first cancellation signal PS1 has a waveform that changes from low level to high level when the third drive signal MUX1 changes from high level to low level.

[0087] Therefore, the first cancellation signal PS1 can cancel the electromagnetic noise generated when the first drive signal MUX1 changes from low level to high level or from high level to low level. In addition, the first cancellation signal PS1 can cancel the electromagnetic noise generated when the third drive signal MUX3 changes from low level to high level or from high level to low level.

[0088] In addition, the noise cancellation circuit 500 inverts the second drive signal MUX2 to generate a second cancellation signal PS2, thereby canceling the electromagnetic noise generated when the second drive signal MUX2 changes.

[0089] In this regard, the second cancellation signal PS2 has a waveform that changes from a high level to a low level when the second drive signal MUX2 changes from a low level to a high level. In addition, the second cancellation signal PS2 has a waveform that changes from a low level to a high level when the second drive signal MUX2 changes from a high level to a low level.

[0090] Therefore, the second cancellation signal PS2 can cancel the electromagnetic noise generated when the second drive signal MUX2 changes from a low level to a high level or from a high level to a low level.

[0091] Figure 6 is a layout diagram of a driving signal line and a cancellation signal line of a display device according to an embodiment of the present disclosure.

[0092] Referring to Figure 6 , the noise cancellation circuit 500 performs a level shift on the first drive signal MUX1, the second drive signal MUX2, and the third drive signal MUX3, and supplies the level-shifted first drive signal MUX1, the level-shifted second drive signal MUX2, and the level-shifted third drive signal MUX3 to the first drive signal line MUX1_L, the second drive signal line MUX2_L, and the third drive signal line MUX3_L, respectively.

[0093] The first drive signal line MUX1_L, the second drive signal line MUX2_L, and the third drive signal line MUX3_L can be connected to the first switch, the second switch, and the third switch of the multiplexer 30 of the display panel 400, respectively. In one example, each of the first switch, the second switch, and the third switch can be implemented as a thin film transistor. The first drive signal line MUX1_L, the second drive signal line MUX2_L, and the third drive signal line MUX3_L can each be connected to the gate of the corresponding thin film transistor.

[0094] In addition, the noise cancellation circuit 500 performs a level shift on the first cancellation signal PS1 and the second cancellation signal PS2, and supplies the level-shifted first cancellation signal PS1 and the level-shifted second cancellation signal PS2 to the first cancellation signal line PS1_L and the second cancellation signal line PS2L, respectively.

[0095] The first cancellation signal line PS1_L and the second cancellation signal line PS2_L can be arranged adjacent to the first drive signal line MUX1_L, the second drive signal line MUX2_L, and the third drive signal line MUX3_L.

[0096] In addition, at least one of the first cancellation signal line PS1_L and the second cancellation signal line PS2_L may be arranged adjacent to the first driving signal line MUX1_L, the second driving signal line MUX2_L, and the third driving signal line MUX3_L, and may have a closed-loop form.

[0097] In one example, the first cancellation signal line PS1L may be arranged adjacent to the first driving signal line MUX1_L, the second driving signal line MUX2_L, and the third driving signal line MUX3_L. A partial section of the second cancellation signal line PS2_L may be adjacent to the first cancellation signal line PS1_L, the first driving signal line MUX1_L, the second driving signal line MUX2_L, and the third driving signal line MUX3_L, and may have a closed-loop form.

[0098] In another embodiment, the noise cancellation circuit 500 may be installed on multiple data integrated circuits within the data driving circuit 200. Each data integrated circuit may supply the first driving signal MUX1, the second driving signal MUX2, and the third driving signal MUX3 to the multiplexer 30 of the display panel 400 from its opposite sides respectively.

[0099] In addition, each data integrated circuit may generate a first cancellation signal PS1 and a second cancellation signal PS2, and may supply the first cancellation signal PS1 and the second cancellation signal PS2 to the first cancellation signal line PS1_L and the second cancellation signal line PS2_L adjacent to the first driving signal line MUX1_L, the second driving signal line MUX2_L, and the third driving signal line MUX3_L respectively, wherein the second cancellation signal line PS2_L is adjacent to the first cancellation signal line PS1_L.

[0100] A display device and a display panel according to some aspects and embodiments of the present disclosure may be described as follows:

[0101] One aspect of the present disclosure provides a display device, including: a data driving circuit configured to supply data signals to a display panel; a multiplexer configured to selectively supply data signals output through one output line of the data driving circuit to at least one of multiple data lines of the display panel; and a noise cancellation circuit configured to generate multiple cancellation signals based on multiple driving signals provided to the multiplexer to cancel electromagnetic noise generated during the operation of the multiplexer.

[0102] According to some embodiments of the display device of the present disclosure, the multiple driving signals include a first driving signal, a second driving signal, and a third driving signal, wherein the noise cancellation circuit is configured to receive the multiple driving signals from a timing controller, perform a voltage level shift on the multiple driving signals, and supply the voltage level shifted multiple driving signals to the multiplexer.

[0103] According to some embodiments of the display device of the present disclosure, the multiplexer includes: a first switch configured to transmit a data signal to a first data line among a plurality of data lines in response to a first driving signal; a second switch configured to transmit the data signal to a second data line among the plurality of data lines in response to a second driving signal; and a third switch configured to transmit the data signal to a third data line among the plurality of data lines in response to a third driving signal.

[0104] According to some embodiments of the display device of the present disclosure, the noise cancellation circuit includes a first logic circuit configured to perform a NOR logic operation on the first driving signal and the third driving signal to generate a first cancellation signal for canceling noise generated when the states of the first driving signal and the third driving signal change respectively.

[0105] According to some embodiments of the display device of the present disclosure, the noise cancellation circuit further includes a second logic circuit configured to invert the second driving signal to generate a second cancellation signal for canceling electromagnetic noise generated when the state of the second driving signal changes.

[0106] According to some embodiments of the display device of the present disclosure, the noise cancellation circuit further includes a level shifter configured to perform a level shift on each of the first driving signal, the second driving signal, the third driving signal, the first cancellation signal, and the second cancellation signal.

[0107] According to some embodiments of the display device of the present disclosure, the display device further includes: a plurality of driving signal lines disposed between the noise cancellation circuit and the multiplexer, wherein a plurality of driving signals are respectively applied to the plurality of driving signal lines; and a plurality of cancellation signal lines disposed adjacent to the plurality of driving signal lines, wherein a plurality of cancellation signals are respectively applied to the plurality of cancellation signal lines.

[0108] According to some embodiments of the display device of the present disclosure, the plurality of driving signals include a first driving signal, a second driving signal, and a third driving signal, wherein the plurality of cancellation signal lines include a first cancellation signal line and a second cancellation signal line, and wherein the first cancellation signal line and the second cancellation signal line are disposed adjacent to the first driving signal line, the second driving signal line, and the third driving signal line.

[0109] According to some embodiments of the display device of the present disclosure, at least one of the first cancellation signal line and the second cancellation signal line is adjacent to at least one of the first driving signal line, the second driving signal line, and the third driving signal line and has an annular form.

[0110] Another aspect of the present disclosure provides a display panel, including: a multiplexer; and a noise cancellation circuit configured to generate cancellation signals for canceling noise generated when each of a first driving signal, a second driving signal, and a third driving signal applied to the multiplexer undergoes a state transition. The noise cancellation circuit includes: a first logic circuit configured to perform a NOR logic operation on the first driving signal and the third driving signal to generate a first cancellation signal for canceling noise generated when each of the first driving signal and the third driving signal undergoes a state transition; and a second logic circuit configured to invert the second driving signal to generate a second cancellation signal for canceling electromagnetic noise generated when the second driving signal undergoes a state transition.

[0111] According to some embodiments of the display panel of the present disclosure, the display panel further includes a level shifter configured to perform a level shift on each of the first cancellation signal and the second cancellation signal.

[0112] According to some embodiments of the display panel of the present disclosure, the display panel further includes a data driving circuit configured to supply a data signal to the multiplexer, and the noise cancellation circuit is disposed in the data driving circuit.

[0113] According to some embodiments of the display panel of the present disclosure, the waveform of the first cancellation signal is configured such that the first cancellation signal changes from a high level to a low level when at least one of the first driving signal and the third driving signal changes from a low level to a high level; and the first cancellation signal changes from a low level to a high level when at least one of the first driving signal and the third driving signal changes from a high level to a low level.

[0114] According to some embodiments of the display panel of the present disclosure, the waveform of the second cancellation signal is configured such that the second cancellation signal changes from a high level to a low level when the second driving signal changes from a low level to a high level; and the second cancellation signal changes from a low level to a high level when the second driving signal changes from a high level to a low level.

[0115] According to an embodiment of the present disclosure, electromagnetic noise generated during a state transition of a high-frequency driving signal for driving a multiplexer of a display device can be canceled. Therefore, the image quality of the display device is improved.

[0116] According to an embodiment of the present disclosure, electromagnetic noise generated due to the rising edge and falling edge of a driving signal for operating a multiplexer can be canceled by the falling edge and rising edge of a cancellation signal, respectively.

[0117] According to an embodiment of the present disclosure, poor image quality caused by electromagnetic noise and common voltage stabilization delay due to switching of a driving signal for operating a multiplexer can be prevented.

[0118] Although embodiments of the present disclosure have been described with reference to the accompanying drawings, the present disclosure is not limited to the above embodiments, but can be implemented in various different forms. Those skilled in the art can understand that the present disclosure can be implemented in other specific forms without changing the technical concept or basic features of the present disclosure. Therefore, it should be understood that the embodiments described above are illustrative rather than restrictive in all aspects.

Claims

1. A display device, comprising: a data driving circuit configured to supply a data signal to the display panel; a multiplexer configured to selectively supply the data signal output through one output line of the data driving circuit to at least one of a plurality of data lines of the display panel; as well as The noise cancellation circuit is configured to generate a plurality of cancellation signals based on a plurality of driving signals provided to the multiplexer to cancel electromagnetic noise generated during operation of the multiplexer.

2. The display device according to claim 1, further comprising a timing controller, in, The plurality of driving signals include a first driving signal, a second driving signal and a third driving signal, The noise elimination circuit is configured to receive the plurality of driving signals from the timing controller, level-shift the plurality of driving signals, and provide the plurality of level-shifted driving signals to the multiplexer.

3. The display device according to claim 2, wherein: The multiplexer comprises: a first switch configured to transmit the data signal to a first data line among the plurality of data lines in response to the first driving signal; a second switch configured to transmit the data signal to a second data line among the plurality of data lines in response to the second driving signal; and The third switch is configured to transmit the data signal to a third data line among the plurality of data lines in response to the third driving signal.

4. The display device according to claim 3, wherein: The noise elimination circuit includes a first logic circuit configured to perform a NOR logic operation on the first drive signal and the third drive signal to generate a first elimination signal for eliminating noise generated when the first drive signal and the third drive signal change their respective states.

5. The display device according to claim 4, wherein: The noise cancellation circuit also includes a second logic circuit configured to invert the second driving signal to generate a second cancellation signal.

6. The display device according to claim 5, wherein: The noise cancellation circuit also includes a level shifter configured to level shift each of the first drive signal, the second drive signal, the third drive signal, the first cancellation signal, and the second cancellation signal.

7. The display device according to claim 1, wherein: The display device further includes: a plurality of drive signal lines disposed between the noise elimination circuit and the multiplexer, wherein the plurality of drive signals are applied to the plurality of drive signal lines, respectively; and A plurality of cancel signal lines are arranged adjacent to the plurality of driving signal lines, wherein the plurality of cancel signals are applied to the plurality of cancel signal lines respectively.

8. The display device according to claim 7, wherein: The plurality of driving signals include a first driving signal, a second driving signal and a third driving signal, The plurality of elimination signal lines include a first elimination signal line and a second elimination signal line, The first cancel signal line and the second cancel signal line are arranged adjacent to the first drive signal line, the second drive signal line and the third drive signal line.

9. The display device according to claim 8, wherein: At least one of the first cancel signal line and the second cancel signal line is adjacent to at least one of the first drive signal line, the second drive signal line, and the third drive signal line, and has a ring form.

10. A display panel, comprising: Multiplexer; as well as a noise elimination circuit configured to generate a cancellation signal to eliminate noise generated when the states of the first drive signal, the second drive signal, and the third drive signal applied to the multiplexer are respectively changed, Wherein, the noise elimination circuit comprises: a first logic circuit configured to perform a NOR logic operation on the first driving signal and the third driving signal to generate a first cancellation signal; and The second logic circuit is configured to invert the second driving signal to generate a second cancellation signal.

11. The display panel according to claim 10, wherein: The display panel further includes a level shifter configured to level-shift each of the first elimination signal and the second elimination signal.

12. The display panel according to claim 10, wherein: The display panel further includes a data driving circuit configured to supply a data signal to the multiplexer, Wherein, the noise elimination circuit is arranged in the data driving circuit.

13. The display panel according to claim 10, wherein: The waveform of the first elimination signal is constructed as follows: The first elimination signal changes from a high level to a low level when at least one of the first drive signal and the third drive signal changes from a low level to a high level, and The first cancel signal changes from a low level to a high level when at least one of the first drive signal and the third drive signal changes from a high level to a low level.

14. The display panel according to claim 10, wherein: The waveform of the second elimination signal is constructed as follows: The second elimination signal changes from a high level to a low level when the second driving signal changes from a low level to a high level, and The second cancel signal changes from a low level to a high level when the second drive signal changes from a high level to a low level.

15. A display device, comprising: a data driving circuit configured to supply a data signal; a multiplexer configured to selectively supply the data signal output through one output line of the data driving circuit to one of two data lines of the display panel; a timing controller configured to apply a first drive signal and a second drive signal to the multiplexer; as well as The noise elimination circuit includes a logic circuit configured to perform a NOR logic operation on the first driving signal and the second driving signal to generate a cancellation signal.

16. The display device according to claim 15, further comprising: a first drive signal line and a second drive signal line provided between the noise elimination circuit and the multiplexer, wherein the first drive signal is applied to the first drive signal line and the second drive signal is applied to the second drive signal line; and A cancel signal line is disposed adjacent to the first drive signal line and the second drive signal line, wherein the cancel signal is applied to the cancel signal line.

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