MOS protection circuit, protection method and server system

Abstract

The invention provides an MOS protection circuit, a protection method and a server system, and relates to the technical field of server power supplies. The circuit comprises a control unit, a voltage division circuit, a controllable signal circuit, a detection circuit and a controlled unit comprising an MOS (Metal Oxide Semiconductor). The control unit detects the power-on state of the PSU after the PSU accesses the server system, and enables the detection circuit when the power-on is completed; the voltage division circuit divides the voltage between the input side and the output side of the controlled unit and outputs the divided voltage to the detection circuit; when the voltage difference is larger than a set threshold value, the detection circuit outputs a high-level control signal, the controllable signal circuit is triggered to be switched on, a control signal of the control unit is pulled down, and then output of the PSU is closed so as to protect the MOS from being burnt out. According to the application, the MOS state is monitored through the hardware circuit, and the PSU output is closed when the abnormality is detected, so that the risk of damage to the MOS is remarkably reduced.

Description

Technical Field

[0001] This application relates to the technical field of server power supplies, and particularly to a MOS protection circuit, a protection method, and a server system. Background Art

[0002] In modern server systems, the reliability and stability of the power supply unit (PSU) are crucial for ensuring the stable operation of the server. To improve the high availability of the system, server power supplies usually adopt an N+N redundant configuration, that is, multiple PSUs work in parallel to achieve load balancing and fault tolerance. To achieve parallel current sharing of PSUs and prevent reverse current flow, a MOS, namely a MOSFET, is usually connected in series at the 12V output of each PSU. The MOS isolates the 12V bus and the 12V voltage inside a single PSU, ensuring that current can only flow from the PSU to the 12V bus, and the current on the 12V bus cannot flow back into the PSU. This design can effectively prevent abnormal power supply of the entire system caused by a single PSU failure. Although the MOS plays an important role in PSU protection, when an abnormality occurs in the driving circuit of the MOS, resulting in the MOS being unable to conduct normally, the parallel current sharing function of the PSU can still work properly. At this time, the current can only flow through the body diode of the MOS, resulting in a sharp increase in conduction loss. Due to the large forward voltage drop of the body diode, the MOS will burn out due to overheating under high-current conditions.

[0003] In related technologies, a temperature detection circuit is usually added at the MOS, and the temperature of the MOS is monitored through a negative temperature coefficient (NTC) resistor. When the temperature exceeds the alarm threshold, the PSU output is turned off and a fault message is reported through the Power Management Bus (PMBus). However, there are still cases where the MOS is damaged. Summary of the Invention

[0004] The MOS protection circuit, protection method, and server system provided by this application are used to reduce the risk of MOS damage.

[0005] In a first aspect, this application provides a MOS protection circuit, including: a control unit, a controlled unit, a voltage division circuit, and a controllable signal circuit that are respectively connected to the control unit, and a detection circuit that is connected to both the voltage division circuit and the controllable signal circuit. The controlled unit includes a MOS; wherein:

[0006] The control unit is configured to detect whether the PSU power-on is completed in response to the PSU being connected to the server system; and disable the detection circuit when the PSU power-on is not completed, and enable the detection circuit when the PSU power-on is completed;

[0007] A voltage dividing circuit for dividing the voltage between the input side and the output side of the controlled unit and outputting it to the detection circuit;

[0008] A detection circuit for outputting a high-level control signal to the controllable signal circuit when the voltage difference of the input voltage is greater than the set threshold;

[0009] A controllable signal circuit for conducting under the action of the high-level control signal and pulling down the control signal of the control unit;

[0010] The control unit is further configured to turn off the output of the PSU based on the control signal to protect the MOS in the controlled unit from being burned out.

[0011] In a possible implementation manner, the detection circuit includes an operational amplifier. The non-inverting input terminal and the inverting input terminal of the operational amplifier are respectively connected to the output terminal of the voltage dividing circuit for comparing the voltage difference of the voltage output by the voltage dividing circuit; when the MOS conducts normally, the voltage difference is the conduction voltage drop of the MOS, and the voltage of the inverting input terminal of the operational amplifier is greater than the voltage of the non-inverting input terminal, and the operational amplifier outputs a low level; when the MOS cannot conduct normally, the current flows through its body diode, and the voltage difference is the forward voltage drop of the body diode. The voltage of the non-inverting input terminal of the operational amplifier is greater than the voltage of the inverting input terminal, and the operational amplifier outputs a high level, which is transmitted to the controllable signal circuit as the high-level control signal.

[0012] In a possible implementation manner, the detection circuit further includes a positive feedback circuit. The input terminal of the positive feedback circuit is connected to the output terminal of the detection circuit, and its output terminal is connected to the input terminal of the detection circuit for latching the high-level state when the detection circuit outputs a high-level control signal to ensure that the controllable signal circuit continues to conduct until the control unit turns off the output of the PSU.

[0013] In a possible implementation manner, the positive feedback circuit includes a resistor and a diode connected in series with the resistor. The input terminal of the positive feedback circuit serves as the input terminal of the resistor, and the output terminal of the positive feedback circuit serves as the output terminal of the diode.

[0014] In a possible implementation manner, the controllable signal circuit includes a controllable switch device. The control terminal of the controllable switch device is connected to the output terminal of the detection circuit for conducting when the detection circuit outputs a high level and pulling down the control signal of the control unit.

[0015] In a possible implementation manner, the controllable switch device is a triode or a MOS.

[0016] In a possible implementation manner, the set threshold is set according to the conduction voltage drop of the MOS in the controlled unit and the forward voltage drop of the corresponding body diode to ensure that the protection action of the control unit can be triggered in time when the MOS cannot conduct normally.

[0017] In a possible implementation, the MOS protection circuit can be configured according to software logic into a locked protection mode or an automatic restart protection mode to adapt to the requirements of different application scenarios.

[0018] In a second aspect, the present application provides a server system, including the MOS protection circuit described in any one of the first aspects.

[0019] In a third aspect, the present application provides a MOS protection method, which is applied to a control unit in the MOS protection circuit described in any one of the first aspects. The protection method includes:

[0020] Responding to the access of the PSU to the server system, detecting whether the power-on of the PSU is completed;

[0021] If the power-on of the PSU is not completed, disabling the detection circuit in the MOS protection circuit; if the power-on of the PSU is completed, enabling the detection circuit; and, under the action of the pulled-down control signal, controlling to turn off the output of the PSU to protect the MOS in the controlled unit from being burned out.

[0022] The MOS protection circuit, protection method and server system provided by the present application, wherein the MOS protection circuit includes: a control unit, a controlled unit, a voltage dividing circuit and a controllable signal circuit respectively connected to the control unit, and a detection circuit connected to both the voltage dividing circuit and the controllable signal circuit. The controlled unit includes a MOS; wherein: the control unit is used for responding to the access of the PSU to the server system, detecting whether the power-on of the PSU is completed; and disabling the detection circuit when the power-on of the PSU is not completed; enabling the detection circuit when the power-on of the PSU is completed; the voltage dividing circuit is used for dividing the voltage between the input side and the output side of the controlled unit and outputting it to the detection circuit; the detection circuit is used for outputting a high-level control signal to the controllable signal circuit when the voltage difference of the input voltage is greater than a set threshold; the controllable signal circuit is used for conducting under the action of the high-level control signal and pulling down the control signal of the control unit; the control unit is further used for closing the output of the PSU based on the control signal to protect the MOS in the controlled unit from being burned out. The present application enables the detection circuit after the power-on of the PSU is completed, continuously detects the working state of the MOS by using hardware circuits, immediately turns off the output of the PSU when the detected voltage difference exceeds the set threshold, and reports the fault information through PMBus, effectively reducing the possibility of the MOS being damaged due to overheating or abnormal current, thereby significantly reducing the risk of MOS damage and reducing the maintenance cost of the server system; in addition, by using the voltage difference instead of a single temperature detection to judge the working state of the MOS, the dependence on physical heat dissipation conditions is reduced, and the misoperation caused by temperature detection errors is significantly reduced, ensuring that the protection action is triggered only when it is really needed, thereby greatly improving the reliability of the MOS protection circuit. Description of the Drawings

[0023] The accompanying drawings herein are incorporated into the specification and form a part of this specification, showing embodiments consistent with the present application, and are used together with the specification to explain the principles of the present application.

[0024] Figure 1 A schematic diagram of a MOS inside a PSU in the related art;

[0025] Figure 2 A schematic structural diagram of a MOS protection circuit provided by an exemplary embodiment of the present application;

[0026] Figure 3 A schematic structural diagram of a detection circuit provided by an exemplary embodiment of the present application;

[0027] Figure 4 Another schematic structural diagram of a MOS protection circuit provided by an exemplary embodiment of the present application;

[0028] Figure 5 A schematic structural diagram of a server system provided by an exemplary embodiment of the present application;

[0029] Figure 6 A schematic flowchart of a MOS protection method provided by an exemplary embodiment of the present application.

[0030] Through the above accompanying drawings, specific embodiments of the present application have been shown, and there will be more detailed descriptions hereinafter. These drawings and textual descriptions are not intended to limit the scope of the concept of the present application in any way, but to illustrate the concept of the present application to those skilled in the art by referring to specific embodiments. Detailed Description of Specific Embodiments

[0031] Exemplary embodiments will be described in detail herein, and examples thereof are shown in the accompanying drawings. When the following description refers to the accompanying drawings, unless otherwise indicated, the same numbers in different drawings represent the same or similar elements. The embodiments described in the following exemplary embodiments do not represent all embodiments consistent with the present application. On the contrary, they are merely examples of devices and methods consistent with some aspects of the present application as detailed in the appended claims.

[0032] The terms "first", "second", etc. in the description and claims of this application are used to distinguish similar objects and do not necessarily describe a specific order or sequence. It should be understood that the data used in this way can be interchanged under appropriate circumstances so that the embodiments of this application described herein can be implemented, for example, in an order other than those illustrated or described herein. In addition, the terms "comprising" and "having" and any variations thereof are intended to cover non-exclusive inclusion. For example, a process, system, product, or device that includes a series of steps or units need not be limited to those steps or units clearly listed, but may include other steps or units not clearly listed or inherent to these processes, products, or devices.

[0033] It should be noted that the user information (including but not limited to user device information, user personal information, etc.) and data (including but not limited to data for analysis, stored data, displayed data, etc.) involved in this application are all information and data authorized by the user or fully authorized by all parties. And the collection, use, and processing of relevant data need to comply with relevant laws, regulations, and standards, and corresponding operation entrances are provided for users to choose to authorize or refuse.

[0034] First, the nouns involved in this application are explained:

[0035] MOS: It is an abbreviation for Metal-Oxide-Semiconductor Field-Effect Transistor (MOSFET for short). MOSFET is a field-effect transistor based on MOS technology, widely used in electronic circuits as a switch or amplifier, with high input impedance and fast switching speed. It is divided into two types: N-type (i.e., NMOS) and P-type (i.e., PMOS), and is suitable for various power management and signal processing applications.

[0036] ORing MOSFET: It is a specific application MOSFET, usually used in power management circuits to achieve power redundancy and protection. ORing MOS is the abbreviation of ORing MOSFET, and usually refers to the MOS used for the ORing function in specific application scenarios.

[0037] Figure 1 It is a schematic diagram of the MOS inside the PSU in the related art. As Figure 1As shown, a MOS is connected in series to the 12V output terminal of each PSU to isolate the 12V bus (i.e., the 12V power bus) from the 12V voltages inside a single PSU, such as 12Vout1 and 12Vout2, ensuring that current can only flow from the PSU to the 12V bus, and the current on the 12V bus cannot flow back into the PSU. For example, when the power-on of PSU1 is not completed, the connected MOS is turned off, and the current flows from inside PSU1 to the 12V bus through the body diode of the MOS, while the current on the 12V bus cannot flow back into PSU1; after the power-on of the PSU is completed, the MOS conducts, and the current flows from inside PSU1 to the 12V bus through the MOS; when an abnormality is detected inside PSU1, such as short circuit protection (SCP), over voltage protection (OVP), under voltage protection (UVP), or over temperature protection (OTP), etc., PSU1 turns off the MOS, thus ensuring that the voltage on the 12V bus is not affected by the faulty PSU1, enabling the server system to continue to operate normally. However, when an abnormality occurs in the driving circuit of the MOS, causing the MOS to fail to conduct normally, the current can still flow through the body diode of the MOS, resulting in a sharp increase in conduction loss. Due to the relatively large forward voltage drop of the body diode, under high-current conditions, the MOS will burn out due to overheating.

[0038] Currently, in order to ensure the load-carrying capacity of the MOS, multiple MOSs are usually connected in parallel. The greater the rated power of the PSU, the more MOSs are connected in parallel. Due to space limitations, the layout of these parallel MOSs on the circuit board is often relatively scattered, resulting in uneven current distribution, and thus uneven heat distribution. Some MOSs may overheat due to poor physical heat dissipation conditions. Due to layout limitations, it is difficult to stack external heat sinks on the MOSs, further exacerbating the heat dissipation problem. In related technologies, when adding a temperature detection circuit at the MOS and using an NTC resistor to monitor the temperature of the MOS, since most NTC resistors are surface mount devices (SMD), their detection accuracy is usually affected by factors such as the detection position and the air duct. For example, the installation position of the NTC resistor may not accurately reflect the actual temperature of the MOS, and the air flow distribution in the air-cooling system is uneven, etc., making the temperature detection result may have a large error and cannot accurately reflect the actual working state of the MOS, which may lead to a delay in the protection action and it is difficult to effectively deal with the overheating problem of the MOS, and further cause the MOS to burn out due to overheating; in addition, it may also cause unnecessary protection actions to be triggered falsely, affecting the reliability of MOS protection.

[0039] In view of the problems existing in the related art, the present application proposes a MOS protection circuit. After the PSU is powered on, the hardware circuit is used to continuously detect the voltage difference between the input side and the output side of the controlled unit. Compared with the temperature detection result monitored by the NTC resistor, this voltage difference can more accurately reflect the actual working state of the MOS. When the voltage difference is greater than the set threshold, the output of the PSU is controlled to be turned off in a timely manner, and the fault information is reported through the PMBus, thereby significantly reducing the risk of MOS damage. In addition, by using voltage difference detection instead of temperature detection, the misoperation caused by temperature detection errors is significantly reduced, ensuring that the protection action is triggered only when it is truly needed, thus greatly improving the reliability of the MOS protection circuit.

[0040] The following uses specific embodiments to elaborate in detail on the technical solutions of the present application and how the technical solutions of the present application solve the above technical problems. These several specific embodiments can be combined with each other, and the same or similar concepts or processes may not be repeated in some embodiments. The embodiments of the present application will be described below with reference to the drawings.

[0041] Figure 2 FIG. is a schematic structural diagram of a MOS protection circuit provided for an exemplary embodiment of the present application. As Figure 2 shown, the MOS protection circuit 20 provided in the embodiment of the present application includes a control unit 21, a controlled unit 22, a voltage dividing circuit 23, a controllable signal circuit 24, and a detection circuit 25 that are respectively connected to the control unit 21. The controlled unit 21 includes a MOS. Among them:

[0042] The control unit 21 is configured to detect whether the PSU is powered on in response to the PSU being connected to the server system; and disable the detection circuit 25 when the PSU is not powered on; and enable the detection circuit 25 when the PSU is powered on.

[0043] Among them, the MOS includes, but is not limited to, a synchronous rectification (SR) MOS, an ORing MOS, or a power MOS, etc. Exemplarily, the control unit 21 determines whether the PSU has been connected and started to be powered on by monitoring the connection state between the PSU and the server system; in response to the PSU being connected to the server system, the control unit 21 continuously monitors the power-on state of the PSU; when the PSU is not powered on, the control unit 21 pulls down the output of the voltage dividing circuit 23 to disable the detection circuit 25 and make the detection circuit 25 not operate, so as to reduce the possibility of triggering an incorrect detection under unstable voltage conditions; when it is detected that the PSU is powered on, the control unit 21 pulls up the output of the voltage dividing circuit 23 to enable the detection circuit 25.

[0044] A voltage-dividing circuit 23 is configured to divide the voltage between the input side and the output side of the controlled unit 22 and output the divided voltage to the detection circuit.

[0045] Exemplarily, the voltage-dividing circuit 23 divides the voltage between the input side voltage and the output side of the controlled unit 22 through, for example, a resistor voltage-dividing network; further, the divided voltage is output to the detection circuit 25 as the input signal of the detection circuit 25 for further voltage difference analysis.

[0046] The detection circuit 25 is configured to output a high-level control signal to the controllable signal circuit 24 when the voltage difference of the input voltage is greater than a set threshold.

[0047] Correspondingly, the detection circuit 25 receives the voltage output by the voltage-dividing circuit 23 and compares the corresponding voltage difference with a preset set threshold. This voltage difference reflects the operating state of the MOS and its driving circuit included in the controlled unit 22, especially the conduction state of the MOS; correspondingly, when the detection circuit 25 detects that the voltage difference exceeds the set threshold, it outputs a high-level control signal to the controllable signal circuit 24. This high-level control signal indicates that the operating state of the controlled unit 22 is abnormal and immediate protective measures need to be taken.

[0048] The controllable signal circuit 24 is configured to conduct under the action of the high-level control signal and pull down the control signal of the control unit 21.

[0049] Correspondingly, when the controllable signal circuit 24 receives the high-level control signal, the controllable signal circuit 24 conducts and pulls down the control signal of the control unit 21 to instruct the control unit 21 to turn off the output of the PSU, thereby reducing the possibility of the MOS being damaged due to overheating or abnormal current.

[0050] The control unit 21 is further configured to turn off the output of the PSU based on the control signal to protect the MOS in the controlled unit 21 from being burned out.

[0051] After receiving the pulled-down control signal, the control unit 21 immediately turns off the output of the PSU to cut off the power supply of the controlled unit 22 and reduce the possibility of the MOS being damaged due to overheating or abnormal current; meanwhile, the control unit 21 also reports the fault information to the central management unit or the server system through PMBus; correspondingly, the server system can perform further processing based on the fault information, such as recording the fault log, triggering an alarm to notify the maintenance personnel, adjusting the system operation parameters, etc., or performing a system restart when necessary to resume normal operation.

[0052] The MOS protection circuit provided by the embodiments of the present application enables the detection circuit after the PSU powers on. It continuously detects the working state of the MOS using hardware circuitry. When the detected voltage difference exceeds the set threshold, it immediately shuts down the output of the PSU and reports a fault message via PMBus, effectively reducing the possibility of the MOS being damaged due to overheating or abnormal current, thus significantly reducing the risk of MOS damage and reducing the maintenance cost of the server system. Additionally, by judging the working state of the MOS through voltage difference rather than single temperature detection, it reduces the dependence on physical heat dissipation conditions and significantly reduces misoperations caused by temperature detection errors, ensuring that the protection action is triggered only when truly needed, thereby greatly improving the reliability of the MOS protection circuit.

[0053] In some embodiments, the detection circuit includes an operational amplifier. The non-inverting input terminal and the inverting input terminal of the operational amplifier are respectively connected to the output terminals of the voltage dividing circuit for comparing the voltage difference of the voltages output by the voltage dividing circuit. When the MOS conducts normally, the voltage difference is the conduction voltage drop of the MOS, the voltage of the inverting input terminal of the operational amplifier is greater than the voltage of the non-inverting input terminal, and the operational amplifier outputs a low level. When the MOS cannot conduct normally, the current flows through its body diode, the voltage difference is the forward voltage drop of the body diode, the voltage of the non-inverting input terminal of the operational amplifier is greater than the voltage of the inverting input terminal, and the operational amplifier outputs a high level, which is transmitted to the controllable signal circuit as a high-level control signal.

[0054] Exemplarily, the voltage dividing circuit divides the voltage between the S pole (i.e., source) and D pole (i.e., drain) of the MOS and outputs them to the non-inverting input terminal and the inverting input terminal of the operational amplifier respectively. Correspondingly, when the PSU works normally, the MOS conducts normally, the current flows through the S pole and D pole of the MOS, and the voltage drop between the S pole and D pole is the conduction voltage drop V SD , and its maximum value is I max ×R sd(on) (for example, 100A × 1mΩ = 0.1V); after the voltage dividing circuit divides V SD and outputs them to the non-inverting input terminal V + and the inverting input terminal V - of the operational amplifier respectively; since V SD is small, the divided V - voltage is greater than the V + voltage, and the voltage difference between the two is less than the preset set threshold, for example, 0.3V, so the operational amplifier outputs a low level, and the low level is not sufficient to trigger the action of the controllable signal circuit.

[0055] Correspondingly, when the MOS cannot conduct normally (for example, the MOS is damaged or its drive line fails), the current flows through the body diode of the MOS, and the voltage drop between the S pole and D pole is the forward voltage drop V F(usually about 0.7V); the voltage division circuit divides V F After voltage division, it is respectively output to the non-inverting input terminal V of the operational amplifier + and the inverting input terminal V - . At this time, since V F is relatively large, the voltage of V after voltage division + is greater than the voltage of V - voltage, and the voltage difference between the two exceeds the preset threshold, such as 0.3V. Therefore, the operational amplifier outputs a high level, and this high level triggers the controllable signal circuit to act, indicating that the control unit closes the PSU output and reports a fault message.

[0056] In the embodiment of the present application, by comparing the voltage difference in real time through the operational amplifier, it is possible to detect that the MOS cannot conduct normally and trigger the protection mechanism within milliseconds. Its response speed is much faster than the traditional temperature detection protection mechanism, which can effectively reduce the possibility of the MOS being damaged due to overheating or abnormal current, and significantly reduce its damage risk; in addition, this detection circuit can monitor the working states of multiple parallel-connected MOSs at the same time. The voltage between the S pole and the D pole of each MOS is divided by the voltage division circuit and then input to the non-inverting input terminal and the inverting input terminal of the operational amplifier. When any one of the MOSs is damaged, the operational amplifier outputs a high-level control signal, triggering the fault reporting mechanism to achieve comprehensive monitoring of multiple parallel-connected MOSs and ensure the reliability and safety of the system.

[0057] In some embodiments, the detection circuit further includes a positive feedback circuit. The input terminal of the positive feedback circuit is connected to the output terminal of the detection circuit, and its output terminal is connected to the input terminal of the detection circuit, and is used to latch the high-level state when the detection circuit outputs a high-level control signal to ensure that the controllable signal circuit remains conducting until the control unit closes the output of the PSU.

[0058] Exemplarily, when the MOS conducts normally, the detection circuit outputs a low level, the positive feedback circuit does not act, the controllable signal circuit remains closed, and the PSU output is normal; when the MOS cannot conduct normally, the detection circuit outputs a high-level control signal, triggering the positive feedback circuit to act; the positive feedback circuit sends the feedback signal back to the input terminal of the detection circuit to latch the high-level state, ensuring that the detection circuit continuously outputs a high level, so that the controllable signal circuit remains conducting; the controllable signal circuit transmits the high-level control signal to the control unit, and the control unit closes the output of the PSU, effectively reducing the possibility of the MOS being damaged due to overheating or abnormal current; further, after troubleshooting, the latched state of the positive feedback circuit can be cleared through a manual reset operation to restore the normal operation of the MOS protection circuit.

[0059] In the embodiments of the present application, by introducing a positive feedback circuit, the detection circuit can latch the high-level state when it detects that the MOS cannot conduct normally, effectively reducing the possibility of protection failure caused by the output fluctuation of the detection circuit, and further improving the reliability of the MOS protection circuit.

[0060] Based on the above embodiments, in some embodiments, the positive feedback circuit includes a resistor and a diode connected in series with the resistor. The input end of the positive feedback circuit serves as the input end of the resistor, and the output end of the positive feedback circuit serves as the output end of the diode.

[0061] Exemplarily, Figure 3 is a schematic structural diagram of the detection circuit provided by an exemplary embodiment of the present application. As Figure 3 shown, the input end of the positive feedback circuit is connected to the output end of the detection circuit, and the output end of the positive feedback circuit is connected to the input end of the detection circuit. The positive feedback circuit includes a resistor R and a diode D connected in series with the resistor R. The input end of the resistor R is connected to the output end of the detection circuit, and the output end of the diode D is connected to the input end of the detection circuit. Correspondingly, when the detection circuit outputs a high level, the high-level signal is fed back to the input end of the detection circuit through the resistor and the diode to latch the high-level state.

[0062] In the embodiments of the present application, the latching function can be realized only by one resistor and one diode. The circuit structure is simple and does not require complex control logic, which not only simplifies the circuit design but also effectively reduces the hardware cost.

[0063] In some embodiments, the controllable signal circuit includes a controllable switch device. The control end of the controllable switch device is connected to the output end of the detection circuit and is used to conduct when the detection circuit outputs a high level, pulling down the control signal of the control unit.

[0064] Among them, the controllable switch device is an electronic component that can be controlled to conduct and turn off through an external signal and is often used in switch circuits or signal control circuits. Correspondingly, its control end is the input pin of the controllable switch device, which is used to receive an external control signal and determine the on or off state of the device; its output end is the output pin of the controllable switch device, which is used to transmit the control signal to the next-stage circuit.

[0065] Exemplarily, when the MOS cannot conduct normally, the detection circuit outputs a high-level control signal, and the high-level control signal triggers the controllable switch device to conduct, pulling down the control signal of the control unit, that is, changing the level of the control signal from high level to low level to trigger a protection action; correspondingly, after receiving the pulled-down control signal, the control unit turns off the output of the PSU, effectively reducing the possibility of the MOS being damaged due to overheating or abnormal current.

[0066] In some embodiments, the controllable switch device is a triode or MOS, etc.

[0067] Exemplarily, in one implementation manner, the controllable switch device is a triode. Correspondingly, the base of the triode is connected to the output terminal of the detection circuit, its collector is connected to the power supply or the load, and its emitter is connected to the ground or the other end of the load; correspondingly, when the detection circuit outputs a high-level signal, the base current turns on the triode, thereby realizing the effective management of the control signal.

[0068] In another implementation manner, the controllable switch device is a MOS. Correspondingly, the gate of the MOS is connected to the output terminal of the detection circuit, its drain is connected to the power supply or the load, and its source is connected to the ground or the other end of the load. Correspondingly, when the detection circuit outputs a high-level signal, the gate voltage turns on the MOS, thereby realizing the effective management of the control signal.

[0069] The embodiments of the present application allow for the flexible selection of appropriate devices according to specific requirements (such as current, voltage, or power consumption, etc.), effectively improving the flexibility and applicability of the circuit; in addition, both the triode and the MOS have fast switching characteristics, and can quickly turn on when the detection circuit outputs a high level, triggering a protection action, effectively reducing the possibility of damage to the MOS due to overheating or abnormal current; and both the triode and the MOS are common and low-cost devices, which are easy to purchase and integrate, helping to reduce the overall circuit cost.

[0070] In some embodiments, the set threshold is set according to the on-voltage drop of the MOS in the controlled unit and the forward voltage drop of the corresponding body diode, so as to ensure that the protection action of the control unit can be triggered in time when the MOS cannot conduct normally.

[0071] Exemplarily, when the MOS conducts normally, measure the voltage drop between the S pole and the D pole, and the maximum measured on-voltage drop V SD is I max ×R sd(on) (for example, 100 A × 1 mΩ = 0.1 V); when the MOS cannot conduct normally, measure the forward voltage drop V F of the body diode of the MOS, which is usually about 0.7 V; correspondingly, according to the above measurement values, set the set threshold of the voltage detection circuit, and this set threshold should be slightly higher than the on-voltage drop of the MOS and lower than the forward voltage drop of the body diode. For example, the set threshold is 0.3 V, so as to ensure that when the MOS cannot conduct normally, the current can pass through the body diode, thereby ensuring that the voltage detection circuit can detect the abnormal voltage drop and trigger a protection action; further, based on the preset set threshold, calibrate and test the MOS protection circuit to ensure that under various working conditions, the preset set threshold can effectively trigger the protection mechanism.

[0072] In some embodiments, the MOS protection circuit can be configured as a locked protection mode or an automatic restart protection mode according to software logic to meet the requirements of different application scenarios.

[0073] Among them, the lockout protection mode means that when it is detected that the MOS cannot conduct normally, the output of the PSU is permanently turned off until manual intervention restores it; the auto-restart protection mode means that when it is detected that the MOS cannot conduct normally, after briefly turning off the PSU output, an attempt is made to auto-restart and restore the PSU output.

[0074] Exemplarily, in one implementation, the MOS protection circuit can be configured as the lockout protection mode according to the software logic. Correspondingly, when the MOS cannot conduct normally, the detection circuit outputs a high-level control signal; the controllable signal circuit transmits the high-level control signal to the control unit, and the control unit turns off the PSU output and reports a fault message; the PSU output remains off continuously until a manual reset operation restores it. Correspondingly, the lockout protection mode is applicable to scenarios with extremely high security requirements, such as data centers, medical devices, etc., to ensure that it will not automatically recover after a fault occurs to avoid potential risks.

[0075] In another implementation, the MOS protection circuit can be configured as the auto-restart protection mode according to the software logic. Correspondingly, when the MOS cannot conduct normally, the detection circuit outputs a high-level control signal; the controllable signal circuit transmits the high-level control signal to the control unit, and the control unit turns off the PSU output and reports a fault message; after a short delay, the control unit attempts to auto-restart the PSU output. If the fault has been eliminated, the normal operation of the MOS protection circuit is restored; if the fault still exists, the control unit turns off the PSU output again and reports a fault message. The lockout protection mode is applicable to scenarios with relatively high continuity requirements, such as communication devices, industrial control systems, etc., to ensure that the system can quickly resume operation after a short-term fault.

[0076] In the embodiments of the present application, by configuring the lockout protection mode or the auto-restart protection mode, the MOS protection circuit can adapt to different application scenarios, which not only improves the flexibility and practicability of the MOS protection circuit, but also helps to improve the reliability, security and flexibility of the server system.

[0077] Exemplarily, Figure 4 is another structural schematic diagram of the MOS protection circuit provided for the exemplary embodiments of the present application. As Figure 4As shown, M1 is a MOS. When it works normally, the current flows from the S pole of the MOS, such as 12V_local (connected to the 12V internal voltage), to the D pole 12Vbus (connected to the 12V bus voltage); R1, R2, R3, and R4 form a voltage-dividing circuit; U is an operational amplifier in the detection circuit; Q1 is a triode. Correspondingly, when the PSU is powered on, the output signal on / off_ctrl of the control unit is high, thus turning on M2 and pulling down the positive input voltage of the operational amplifier U. At this time, the output of U is forced to be pulled down, and Q1 in the controllable signal circuit does not act; after the PSU starts up normally, the control unit pulls down the output signal on / off_ctrl to enable the detection circuit; correspondingly, when the PSU works normally, M1 is normally turned on, and the current flows through the S pole and D pole of M1, and the voltage drop between the S pole and D pole is the on-state voltage drop V SD , the maximum value of which is I max ×R sd(on) (for example, 100A × 1mΩ = 0.1V); the voltage-dividing circuit divides V SD and outputs it to the non-inverting input terminal V + and the inverting input terminal V - of U respectively; since V SD is small, the divided V - voltage is greater than the V + voltage, and the voltage difference between the two is less than the preset threshold, such as 0.3V. Therefore, U outputs a low level and Q1 does not act; when M1 cannot be normally turned on, the current flows through its body diode, and the voltage drop between the S pole and D pole is the forward voltage drop V F (usually about 0.7V); the voltage-dividing circuit divides V F and outputs it to the non-inverting input terminal V + and the inverting input terminal V - of U respectively; at this time, since V F is large, the divided V + voltage is greater than the V - voltage, and the voltage difference between the two exceeds the preset threshold, such as 0.3V. Therefore, U outputs a high level and locks this state under the positive feedback of R5 and D1; this high level triggers Q1 in the controllable signal circuit to conduct, pulls down the mcu_ctrl signal, and the control unit turns off the PSU output, thus disconnecting the current of M1 to protect the MOS from being burned out.

[0078] It should be noted that Figure 4 M1, M2, Q1, etc. are only examples; in practical applications, M1 can also be in the form of multiple MOSs connected in parallel; M2 can also be replaced by a controllable switch device such as a triode; Q1 can be an NPN-type or PNP-type bipolar transistor, or can be replaced by other controllable switch devices such as MOSs according to needs. Here, for Figure 4Components such as M1, M2, and Q1 in the Chinese text are not limited.

[0079] In summary, the present application has at least the following advantages:

[0080] First, by enabling the detection circuit after the PSU is powered on, continuously detecting the working state of the MOS using hardware circuits, when the detected voltage difference exceeds the set threshold, immediately shutting down the output of the PSU and reporting the fault information through PMBus, effectively reducing the possibility of the MOS being damaged due to overheating or abnormal current, thus significantly reducing the risk of MOS damage and reducing the maintenance cost of the server system; in addition, by using the voltage difference rather than a single temperature detection to judge the working state of the MOS, the dependence on physical heat dissipation conditions is reduced, and the misoperation caused by temperature detection errors is significantly reduced, ensuring that the protection action is triggered only when truly needed, thereby greatly improving the reliability of the MOS protection circuit.

[0081] Second, by using an operational amplifier to continuously compare the voltage difference, it is possible to detect that the MOS cannot conduct normally and trigger the protection mechanism within milliseconds, and its response speed is much faster than the traditional temperature detection protection mechanism, which can effectively reduce the possibility of the MOS being damaged due to overheating or abnormal current and significantly reduce the risk of its damage; in addition, the detection circuit can simultaneously monitor the working states of multiple parallel MOSs. The voltage between the S and D poles of each MOS is divided by a voltage dividing circuit and input to the non-inverting input terminal and inverting input terminal of the operational amplifier. When any one of the MOSs is damaged, the operational amplifier outputs a high-level control signal to trigger the fault reporting mechanism, realizing the comprehensive monitoring of multiple parallel MOSs and ensuring the reliability and safety of the system.

[0082] Third, by introducing a positive feedback circuit, the detection circuit can latch the high-level state when it detects that the MOS cannot conduct normally, effectively reducing the possibility of the protection action failing due to the output fluctuation of the detection circuit, and further improving the reliability of the MOS protection circuit.

[0083] Fourth, by configuring the lockout protection mode or the auto-restart protection mode, the MOS protection circuit can adapt to different application scenarios, not only improving the flexibility and practicality of the MOS protection circuit, but also helping to improve the reliability, safety, and flexibility of the server system.

[0084] The above embodiments introduce the implementation manner of the MOS protection circuit. Next, the application of the MOS protection circuit will be introduced.

[0085] Figure 5 This is a schematic structural diagram of a server system provided for an exemplary embodiment of the present application. As Figure 5 shown, the server system 50 includes the MOS protection circuit 51 described in the above embodiment.

[0086] Exemplarily, the server system is designed with a multi - power - redundancy architecture to ensure that when one power supply fails, the other power supplies can continue to supply power. Correspondingly, the MOS protection circuit is integrated into each power path, and the detection circuit therein continuously monitors the conduction state and voltage drop of the MOS. Once it detects that the MOS cannot conduct normally, the MOS protection circuit immediately triggers to cut off the faulty power path, effectively reducing the possibility of the MOS being damaged due to overheating or abnormal current, and significantly reducing the risk of MOS damage.

[0087] Figure 6 This is a flowchart of a MOS protection method provided for an exemplary embodiment of the present application. The MOS protection method provided by the embodiments of the present application is applied to the control unit in the MOS protection circuit in the above - mentioned embodiment. As Figure 6 shown, the MOS protection method includes:

[0088] S601. In response to the PSU being connected to the server system, detect whether the power - on of the PSU is completed.

[0089] Exemplarily, the control unit determines whether the PSU has been connected and started to power - on by monitoring the connection state between the PSU and the server system; in response to the PSU being connected to the server system, the control unit continuously monitors the power - on state of the PSU.

[0090] S602. If the power - on of the PSU is not completed, disable the detection circuit in the MOS protection circuit; if the power - on of the PSU is completed, enable the detection circuit; and, under the action of the pulled - low control signal, control to turn off the output of the PSU to protect the MOS in the controlled unit from being burned out.

[0091] Correspondingly, when the power - on of the PSU is not completed, the control unit pulls down the output of the voltage - dividing circuit to disable the detection circuit in the MOS protection circuit, so that the detection circuit does not operate, to reduce the possibility of triggering false detection under unstable voltage conditions; when it is detected that the power - on of the PSU is completed, the control unit pulls up the output of the voltage - dividing circuit in the MOS protection circuit to enable the detection circuit; the voltage - dividing circuit in the MOS protection circuit divides the voltage between the input side and the output side of the controlled unit and outputs it to the detection circuit; the detection circuit receives the voltage output by the voltage - dividing circuit and compares the corresponding voltage difference with a preset set threshold. When it detects that the voltage difference exceeds the set threshold, it outputs a high - level control signal to the controllable signal circuit in the MOS protection circuit; the controllable signal circuit conducts under the action of the high - level control signal, pulling down the control signal of the control unit; correspondingly, the control unit controls to turn off the output of the PSU under the action of the pulled - low control signal and reports a fault message through PMBus to protect the MOS in the controlled unit from being burned out.

[0092] In the embodiments of the present application, by disabling the detection circuit when the PSU power-on is not completed, false triggering of the protection action during the startup process is avoided, thereby improving the reliability and stability of the PSU startup; after the PSU power-on is completed, the detection circuit is enabled to monitor the working state of the MOS in real time, and the protection action is triggered in a timely manner when a fault is detected, effectively reducing the possibility of damage to the MOS due to overheating or abnormal current, thereby extending its service life and reducing the maintenance cost.

[0093] Finally, it should be noted that: those skilled in the art will easily think of other implementation schemes of the present invention after considering the specification and practicing the invention disclosed herein. The present invention is intended to cover any variations, uses or adaptations of the present invention, which follow the general principles of the present invention and include the common general knowledge or conventional technical means in the technical field not disclosed in the present invention. It is not limited to the exact structure described above and shown in the drawings, and various modifications and changes can be made without departing from its scope. The scope of the present invention is only limited by the appended claims.

Claims

1. A MOS protection circuit, characterized in that: include: A control unit and a controlled unit, a voltage divider circuit and a controllable signal circuit respectively connected to the control unit, and a detection circuit connected to both the voltage divider circuit and the controllable signal circuit, wherein the controlled unit comprises a MOS; wherein: The control unit is used to detect whether the power supply unit PSU is powered on in response to the PSU being connected to the server system; and to disable the detection circuit when the PSU is powered on and enable the detection circuit when the PSU is powered on; The voltage divider circuit is used to divide the voltage between the input side and the output side of the controlled unit and output the voltage to the detection circuit; The detection circuit is used to output a high-level control signal to the controllable signal circuit when the voltage difference of the input voltage is greater than a set threshold; The controllable signal circuit is used to be turned on under the action of the high-level control signal, and pull down the control signal of the control unit; The control unit is further used to shut down the output of the PSU based on the control signal to protect the MOS in the controlled unit from being burned out.

2. The MOS protection circuit according to claim 1, characterized in that: The detection circuit comprises an operational amplifier, wherein a non-inverting input terminal and an inverting input terminal of the operational amplifier are respectively connected to an output terminal of the voltage divider circuit, and is used to compare a voltage difference of voltages output by the voltage divider circuit; When the MOS is normally turned on, the voltage difference is the on-state voltage drop of the MOS, the voltage at the inverting input terminal of the operational amplifier is greater than the voltage at the non-inverting input terminal, and the operational amplifier outputs a low level; When the MOS cannot be turned on normally, current flows through its body diode, the voltage difference is the forward voltage drop of the body diode, the voltage at the non-inverting input terminal of the operational amplifier is greater than the voltage at the inverting input terminal, and the operational amplifier outputs a high level, which is transmitted to the controllable signal circuit as the high level control signal.

3. The MOS protection circuit according to claim 1 or 2, characterized in that: The detection circuit also includes a positive feedback circuit, the input end of the positive feedback circuit is connected to the output end of the detection circuit, and the output end is connected to the input end of the detection circuit, and is used to latch a high-level state when the detection circuit outputs a high-level control signal to ensure that the controllable signal circuit is continuously turned on until the control unit turns off the output of the PSU.

4. The MOS protection circuit according to claim 3, characterized in that: The positive feedback circuit includes a resistor and a diode connected in series with the resistor. The input end of the positive feedback circuit serves as the input end of the resistor, and the output end of the positive feedback circuit serves as the output end of the diode.

5. The MOS protection circuit according to claim 1 or 2, characterized in that: The controllable signal circuit includes a controllable switch device, a control end of which is connected to the output end of the detection circuit, and is used to be turned on when the detection circuit outputs a high level, thereby pulling down the control signal of the control unit.

6. The MOS protection circuit according to claim 4, characterized in that: The controllable switch device is a triode or MOS.

7. The MOS protection circuit according to claim 1 or 2, characterized in that: The set threshold is set according to the conduction voltage drop of the MOS in the controlled unit and the forward voltage drop of the corresponding body diode to ensure that the protection action of the control unit can be triggered in time when the MOS cannot be normally turned on.

8. The MOS protection circuit according to claim 1 or 2, characterized in that: The MOS protection circuit can be configured as a lock protection mode or an automatic restart protection mode according to software logic to meet the requirements of different application scenarios.

9. A server system, characterized in that: The MOS protection circuit comprises the MOS protection circuit as claimed in any one of claims 1 to 8.

10. A MOS protection method, characterized in that: A control unit applied to a MOS protection circuit according to any one of claims 1 to 8, wherein the protection method comprises: In response to a power supply unit PSU being connected to the server system, detecting whether the PSU is powered on completely; If the PSU is not powered on, the detection circuit in the MOS protection circuit is disabled; if the PSU is powered on, the detection circuit is enabled; and, under the action of a low control signal, the output of the PSU is controlled to be turned off to protect the MOS in the controlled unit from being burned out.

Images