Display device

Abstract

A display device is provided. The display device includes: a substrate including a transmissive region, a display region surrounding the transmissive region, and an intermediate region between the transmissive region and the display region; a metal layer disposed in the intermediate region on the substrate to have a closed curve shape around the transmissive region in a plan view; a light emitting film disposed on the substrate to extend from the display area to the intermediate area; and a common electrode layer disposed to extend from the display area to the intermediate area, and disposed on the light emitting film at least in the display area, where each of the light emitting film and the common electrode layer is disposed not to overlap with the metal layer in the intermediate area in a plan view.

Description

[0001] Cross - reference to related applications

[0002] This application claims priority and all benefits derived therefrom to Korean Patent Application No. 10 - 2023 - 0183179, filed on December 15, 2023, the content of which is incorporated herein by reference in its entirety. Technical field

[0003] Embodiments of the present disclosure relate to a display device and a method of manufacturing the display device. Background art

[0004] A display device includes a display area in which an image is displayed. Recently, research has been conducted on a display device in which various types of components (e.g., a camera, etc.) are arranged in the display area to increase the area of the display area and add various functions. Summary of the invention

[0005] The present disclosure provides a display device and a method of manufacturing the display device in which various types of components are arranged in the display area.

[0006] Embodiments of the present disclosure provide a display device including: a substrate including a transmissive area, a display area surrounding the transmissive area, and an intermediate area between the transmissive area and the display area; a metal layer disposed on the substrate in the intermediate area, wherein the metal layer has a closed - curve shape surrounding the transmissive area in a plan view; a light - emitting film disposed on the substrate to extend from the display area to the intermediate area; and a common electrode layer disposed to extend from the display area to the intermediate area and disposed on the light - emitting film at least in the display area, wherein, in the plan view, each of the light - emitting film and the common electrode layer is disposed in the intermediate area so as not to overlap the metal layer.

[0007] In an embodiment, the display device may further include: a encapsulation layer disposed on the common electrode layer to extend from the display area to the intermediate area and including a first inorganic encapsulation layer, an organic encapsulation layer, and a second inorganic encapsulation layer sequentially stacked at least in the display area, wherein the first inorganic encapsulation layer may be in direct contact with the entire upper surface of the metal layer.

[0008] In an embodiment, in the plan view, the first inorganic encapsulation layer and the second inorganic encapsulation layer may be in direct contact with each other in the area where the metal layer is disposed.

[0009] In an embodiment, the display device may further include: a dam structure disposed in the intermediate area, wherein the dam structure has a closed - curve shape surrounding the transmissive area in the plan view, and the metal layer may not overlap the dam structure in the plan view.

[0010] In an embodiment, the intermediate region may include a first intermediate region in which at least one wiring bypassing the transmissive region is disposed and a second intermediate region surrounded by the first intermediate region in a plan view, and a metal layer may be disposed in the second intermediate region.

[0011] In an embodiment, the metal layer may include a first metal layer and a second metal layer surrounded by the first metal layer in a plan view.

[0012] In an embodiment, in a plan view, at least one stacked structure including a light-emitting film and a common electrode layer disposed on the light-emitting film may be disposed in a region between the first metal layer and the second metal layer.

[0013] In an embodiment, the display device may further include: a pixel electrode disposed under the light-emitting film in the display region; a first conductive pattern disposed under the pixel electrode and in electrical contact with the pixel electrode; and a second conductive pattern disposed under the first conductive pattern and in electrical contact with the first conductive pattern.

[0014] In an embodiment, the metal layer may include: a lower metal layer formed of the same material as the second conductive pattern by the same process; and an upper metal layer directly disposed on an upper surface of the lower metal layer and formed of the same material as the first conductive pattern by the same process.

[0015] In an embodiment, the display device may further include: a capping layer disposed to extend from the display region to the intermediate region and disposed on the common electrode layer in at least the display region, wherein, in a plan view, the capping layer may be disposed in the intermediate region so as not to overlap with the metal layer.

[0016] In an embodiment, the thickness of the metal layer may be about 50 nanometers (nm) or greater.

[0017] In an embodiment, the metal layer may include at least one selected from molybdenum and titanium.

[0018] Another embodiment of the present disclosure provides a method of manufacturing a display device, including: forming a metal layer on a substrate to have a closed curve shape surrounding a transmissive region in a plan view in an intermediate region of the substrate, wherein the substrate includes a transmissive region, a display region surrounding the transmissive region, and an intermediate region between the transmissive region and the display region; forming a light-emitting film on the substrate in at least the display region and at least the intermediate region; forming a common electrode layer on the light-emitting film in at least the display region and at least the intermediate region; and irradiating the metal layer with a laser to remove portions of each of the light-emitting film and the common electrode layer disposed to overlap with the metal layer.

[0019] In an embodiment, in irradiating the laser, the metal layer may not be removed.

[0020] In an embodiment, in irradiating the laser, the laser may be irradiated onto the metal layer at least through the substrate.

[0021] In an embodiment, in irradiating the laser, the average temperature in the light-emitting film overlapping with the metal layer may be about 350 °C or higher.

[0022] In an embodiment, irradiating the laser may be performed in a vacuum.

[0023] In an embodiment, the method of manufacturing a display device may further include: after irradiating the laser, forming an encapsulation layer including a first inorganic encapsulation layer, an organic encapsulation layer, and a second inorganic encapsulation layer sequentially stacked in at least a display region and at least an intermediate region, wherein the first inorganic encapsulation layer may be in direct contact with the entire upper surface of the metal layer.

[0024] In an embodiment, the method of manufacturing a display device may further include: in at least a display region and in at least an intermediate region, forming a capping layer on a common electrode layer, wherein, in irradiating the laser, the capping layer arranged to overlap with the metal layer may be further removed.

[0025] In an embodiment, after irradiating the laser, the thickness of the metal layer may be about 50 nm or greater.

[0026] In an embodiment, a display device according to an embodiment of the present disclosure may include a metal layer having a closed curve shape surrounding a transmissive region in a plan view, and each of the light-emitting film and the common electrode layer may be arranged not to overlap with the metal layer in the plan view. Accordingly, a moisture permeation path defined by the light-emitting film and the common electrode layer may be blocked in a region overlapping with the metal layer, thereby effectively preventing moisture permeation from the transmissive region to the display region.

[0027] In the method of manufacturing a display device according to an embodiment of the present disclosure, a process of removing the light-emitting film and the common electrode layer overlapping with the metal layer by irradiating a laser onto the metal layer having a closed curve shape may be performed. Accordingly, an effective manufacturing method can be provided to provide a structure for blocking a moisture permeation path. BRIEF DESCRIPTION OF THE DRAWINGS

[0028] Figure 1 A top plan view of a display device according to an embodiment of the present disclosure is illustrated.

[0029] Figure 2 is a circuit diagram showing an embodiment of a pixel included in Figure 1 the display device.

[0030] Figure 3 An enlarged view of a transmissive region, an intermediate region, and a display region according to an embodiment of the present disclosure.

[0031] Figure 4 The figure illustrates Figure 3 a cross-sectional view taken along line X1-X1'.

[0032] Figure 5 An enlarged view of a transmissive region, an intermediate region, and a display region, and a plan view for explaining a second embodiment of the present disclosure.

[0033] Figure 6 The figure illustrates Figure 5 a cross-sectional view taken along line X2-X2'.

[0034] Figure 7 An enlarged view of a transmissive region, an intermediate region, and a display region according to another embodiment of the present disclosure.

[0035] Figure 8 The figure illustrates Figure 7 a cross-sectional view taken along line X3-X3'.

[0036] Figure 9 An enlarged view of a transmissive region, an intermediate region, and a display region according to another embodiment of the present disclosure.

[0037] Figure 10 The figure illustrates Figure 9 a cross-sectional view taken along line X4-X4'.

[0038] Figure 11 A flowchart showing a method of manufacturing a display device according to an embodiment of the present disclosure.

[0039] Figures 12 to 15 A cross-sectional view showing a process of an embodiment of a method of manufacturing a Figure 11 display device. Detailed Description of Embodiments

[0040] The present invention will now be described more fully hereinafter with reference to the accompanying drawings in which various embodiments are shown. However, the present invention may be embodied in many different forms and should not be construed as limited to the embodiments set forth herein. Rather, these embodiments are provided so that this disclosure will be thorough and complete, and will fully convey the scope of the invention to those skilled in the art. Throughout the specification, like reference numerals refer to like elements.

[0041] It will be understood that when an element is referred to as being "on" another element, it can be directly on the other element or intervening elements may be present therebetween. In contrast, when an element is referred to as being "directly on" another element, no intervening elements are present.

[0042] Throughout the specification, when a component is described as "connected" to another component, this includes not only "directly connected" but also "indirectly connected" through another device therebetween. The terms used herein are for the purpose of describing particular embodiments and are not intended to limit the scope of the present invention.

[0043] The terms used herein are for the purpose of describing particular embodiments only and are not intended to be limiting. As used herein, "a", "an", "the", and "at least one" do not denote a limitation of quantity and are intended to include both the singular and the plural, unless the context clearly dictates otherwise. Thus, a reference to "a" component in a claim followed by a reference to "the" component includes one component and a plurality of components. For example, "a component" and "at least one component" have the same meaning unless the context clearly dictates otherwise. "At least one" is not to be construed as limited to "one" or "a". "Or" means "and / or". As used herein, the term "and / or" includes any and all combinations of one or more of the associated listed items. It will also be understood that the terms "comprises", "comprising", "includes", and / or "including", when used in this specification, specify the presence of the stated features, regions, wholes, steps, operations, elements, and / or components, but do not preclude the presence or addition of one or more other features, regions, wholes, steps, operations, elements, components, and / or groups thereof.

[0044] Although the terms first, second, etc. may be used herein to describe various component elements, these component elements should not be limited by these terms. These terms are used to distinguish one component element from another. Thus, a first component element discussed below may be termed a second component element without departing from the teachings of the present disclosure.

[0045] For descriptive purposes, spatially relative terms such as "below", "beneath", "lower", "above", "upper", etc. may be used herein and are thus used to describe the relationship of one element or feature to another (or others) as illustrated in the figures. Spatially relative terms are intended to encompass different orientations of the device in use, operation, and / or manufacture in addition to the orientation depicted in the figures. For example, if the device in the figures is turned over, an element described as "below" or "beneath" another element or feature will then be oriented "above" the other element or feature. Thus, the term "below" can encompass both an orientation of above and below. In addition, the device may be otherwise oriented (e.g., rotated 90 degrees or at other orientations), and thus, the spatially relative descriptors used herein are to be interpreted accordingly.

[0046] Taking into account the measurements and errors associated with a specific number of measurements (such as limitations of the measurement system), as used herein, "about" or "approximate" includes the stated value and means within an acceptable range of deviation for the specific value as determined by a person of ordinary skill in the art. For example, "about" can mean within one or more standard deviations, or within ±30%, 20%, 10%, or 5% of the stated value.

[0047] Unless otherwise defined, all terms (including technical and scientific terms) used herein have the same meaning as commonly understood by a person of ordinary skill in the art to which this disclosure pertains. It will also be understood that terms (such as those defined in a common dictionary) should be interpreted as having a meaning consistent with their meaning in the relevant art and the context of this disclosure, and will not be interpreted in an idealized or overly formal sense unless expressly so defined herein.

[0048] Embodiments are described herein with reference to cross-sectional illustrations that are schematic illustrations of ideal embodiments. Accordingly, variations in the shape of the illustrations due to, for example, manufacturing techniques and / or tolerances are expected. Thus, the embodiments described herein should not be construed as limited to the specific shapes of the regions illustrated herein, but include deviations in shape caused by, for example, manufacturing. For example, regions illustrated or described as flat may generally have rough and / or non-linear features. Additionally, sharp corners in the illustrations may be rounded. Thus, the regions illustrated in the figures are schematic in nature, and their shapes are not intended to illustrate the exact shape of the regions and are not intended to limit the scope of the claims.

[0049] Figure 1 A top plan view of a display device according to an embodiment of the present disclosure is illustrated.

[0050] Reference Figure 1 , embodiments of the display device 10 may include a transmissive region TA, an intermediate region MA, a display region DA, and a peripheral region PA.

[0051] The transmissive region TA may be a region that transmits external light. Components having various functions (such as, for example, a camera, etc.) may be disposed in the transmissive region TA. The components may receive external light through the transmissive region TA. In an embodiment, for example, the component may be a camera, and in such an embodiment, the camera may capture an image based on the external light received through the transmissive region TA.

[0052] The edge of the transmissive region TA may have the shape of a closed curve in a plan view. In an embodiment, for example, as Figure 1 shown, the edge of the transmissive region TA may be circular.

[0053] In an embodiment of the display device 10, various designs for ensuring the light transmittance in the transmissive region TA can be applied. In an embodiment, for example, holes may be defined or formed in the transmissive region TA, and components may be disposed within the holes. In another embodiment, for example, only materials having a relatively high light transmittance (such as inorganic films and organic films, etc.) may be disposed in the transmissive region TA.

[0054] In an embodiment, an image may or may not be displayed in the transmissive region TA. In an embodiment in which an image is displayed in the transmissive region TA, pixels P including, for example, passive organic light emitting diodes may be disposed in the transmissive region TA. Here, the pixels P including passive organic light emitting diodes may be disposed at a density that does not impede the light transmittance in the transmissive region TA.

[0055] The intermediate region MA may surround the transmissive region TA. The intermediate region MA may be a region in which wirings bypassing the transmissive region TA and / or various components for improving the reliability of the display device 10 are disposed. Here, reference will be made later to Figures 3 to 10 the components disposed in the intermediate region MA in detail.

[0056] The display region DA may surround the intermediate region MA. In an embodiment, the display region DA may be a region for displaying an image. In such an embodiment, a plurality of pixels P may be disposed in the display region DA. In addition, signal lines for sending signals to the plurality of pixels P may be disposed in the display region DA. In an embodiment, for example, scan lines SL for sending scan signals to the pixels P, data lines DL for sending data signals to the pixels P, etc. may be disposed in the display region DA.

[0057] The peripheral region PA may surround at least one side of the display region DA. A circuit portion for generating signals provided to the pixels P disposed in the display region DA may be disposed in the peripheral region PA. In an embodiment, for example, in the peripheral region PA, a scan driving circuit portion 1100 that generates a scan signal and is electrically connected to the scan line SL and a data driving circuit portion 1200 that generates a data signal and is electrically connected to the data line DL may be disposed.

[0058] Figure 2 is a circuit diagram showing an embodiment of a pixel included in Figure 1 the display device.

[0059] Referring to Figure 2 , an embodiment of the pixel P may include a pixel circuit PC and an organic light emitting diode OLED electrically connected to the pixel circuit PC.

[0060] In an embodiment, the pixel circuit PC may include at least one transistor and at least one capacitor. In an embodiment, for example, the pixel circuit PC may include a first transistor T1, a second transistor T2, and a storage capacitor Cst. However, this is an example, and the pixel circuit PC may include a greater number of transistors or a greater number of capacitors.

[0061] The second transistor T2 may be connected to a scan line SL and a data line DL to transmit a data signal input from the data line DL to the first transistor T1 based on a scan signal input from the scan line SL.

[0062] The storage capacitor Cst may be connected to the second transistor T2 and a driving voltage line PL, and may store a voltage corresponding to a difference between a voltage received from the second transistor T2 and a first power supply voltage ELVDD supplied from the driving voltage line PL.

[0063] The first transistor T1 may be connected to the driving voltage line PL and the storage capacitor Cst to control a driving current flowing from the driving voltage line PL to the organic light-emitting diode OLED in response to the voltage stored in the storage capacitor Cst.

[0064] The organic light-emitting diode OLED may emit light having a predetermined luminance through the driving current. An opposite electrode (e.g., Figure 4 the common electrode layer CME) of the organic light-emitting diode OLED may receive a second power supply voltage ELVSS.

[0065] Figure 3 is an enlarged view of a transmissive region, an intermediate region, and a display region according to an embodiment of the present disclosure.

[0066] Reference Figure 3 In an embodiment, the intermediate region MA may be disposed or defined between the transmissive region TA and the display region DA. In a plan view, the intermediate region MA may include a second intermediate region MA2 surrounding the transmissive region TA and a first intermediate region MA1 surrounding the second intermediate region MA2.

[0067] Pixels P may be disposed in the display region DA to surround the transmissive region TA. Some of the pixels P may be spaced apart from each other around the transmissive region TA, and the transmissive region TA may be defined between the plurality of pixels P. In an embodiment, for example, in a plan view, the plurality of pixels P may be respectively disposed above and below the transmissive region TA, and the plurality of pixels P may be respectively disposed on the left and right sides.

[0068] In an embodiment, among the plurality of signal lines for supplying a plurality of signals to the plurality of pixels P, the signal line adjacent to the transmissive region TA may bypass the transmissive region TA. In such an embodiment, the signal line bypassing the transmissive region TA may be arranged in the first intermediate region MA1.

[0069] In an embodiment, as Figure 3 shown, at least one of the plurality of data lines DL passing through the display region DA extends in the Y direction (i.e., the Y-axis direction) to supply data signals to the plurality of pixels P respectively arranged above and below the transmissive region TA, and may bypass along the edge of the transmissive region TA in the first intermediate region MA1. Additionally, at least one of the plurality of scan lines SL passing through the display region DA extends in the X direction (i.e., the X-axis direction) to supply scan signals to the plurality of pixels P respectively arranged on the left and right sides of the transmissive region TA, and may bypass along the edge of the transmissive region TA in the first intermediate region MA1.

[0070] The bypass portion SL-D of the scan line SL and the extending portion SL-L passing through the display region DA are arranged in the same layer (or are directly arranged on the same layer as the extending portion SL-L passing through the display region DA), and they may be integrally formed into a single indivisible component with each other. The bypass portion DL-D1 of at least one of the plurality of data lines DL may be arranged in a different layer from the extending portion DL-L1 passing through the display region DA (or is directly arranged in a different layer from the extending portion DL-L1 passing through the display region DA), and the bypass portion DL-D1 and the extending portion DL-L1 of the data line DL may be connected through a contact hole CNT. The bypass portion DL-D2 of at least one of the plurality of data lines DL may be arranged in the same layer as the extending portion DL-L2 (or is directly arranged in the same layer as the extending portion DL-L2), and they may be integrally formed into a single indivisible component with each other.

[0071] In an embodiment, the metal layer MLa may be arranged in the second intermediate region MA2. In a plan view, the metal layer MLa may have a closed curve shape surrounding the transmissive region TA.

[0072] Although not shown in Figure 3 , at least one dam structure may be arranged in the intermediate region MA. The dam structure may have a closed curve shape surrounding the transmissive region TA in a plan view, and may be arranged so as not to overlap with the metal layer MLa. In an embodiment in which a plurality of dam structures are provided, the plurality of dam structures may be arranged to be spaced apart from each other.

[0073] Figure 4 Illustrated along Figure 3Cross-sectional view taken along line X1-X1'.

[0074] Hereinafter, reference will first be made to Figure 4 describe the cross-sectional structure in the display area DA.

[0075] In an embodiment, the display device 10 may include a substrate 100 including glass and / or a polymer resin. In an embodiment, the substrate 100 may have a multilayer structure, in which a plurality of layers are stacked in the Z direction (i.e., the Z-axis direction) or its thickness direction.

[0076] A buffer layer BUF may be disposed on the substrate 100. The buffer layer BUF may be used to prevent impurities from penetrating into the semiconductor layer ACT. The buffer layer BUF may include an inorganic insulating material. In an embodiment, for example, the buffer layer BUF may include silicon nitride, silicon oxide, silicon oxynitride, etc.

[0077] The pixel circuit PC and the organic light-emitting diode OLED may be disposed on the buffer layer BUF. The pixel circuit PC may include a transistor TFT and a storage capacitor Cst.

[0078] The transistor TFT may include a semiconductor layer ACT, a first electrode pattern CE1 serving as (or defining) a gate electrode, and a second conductive pattern CP2 serving as a connection electrode. In an embodiment, for example, the transistor TFT may correspond to the first transistor T1 described with reference to Figure 2 Although not shown in Figure 4 , the data line DL of the pixel circuit PC may be electrically connected to a second transistor T2 included in the pixel circuit PC.

[0079] The storage capacitor Cst may include a first electrode pattern CE1 and a second electrode pattern CE2. The first electrode pattern CE1 and the second electrode pattern CE2 may correspond to two electrodes of the storage capacitor Cst. In an embodiment, the storage capacitor Cst may overlap with the transistor TFT. In an embodiment, for example, the first electrode pattern CE1 may serve as the gate electrode of the transistor TFT and one electrode of the storage capacitor Cst. In another embodiment, the storage capacitor Cst and the transistor TFT may not overlap with each other in the Z direction.

[0080] The organic light-emitting diode OLED may include a pixel electrode PXE, a common electrode layer CME, and a light-emitting layer EML interposed between the pixel electrode PXE and the common electrode layer CME. The pixel electrode PXE may be electrically connected to the transistor TFT through a first conductive pattern CP1 included in the pixel circuit PC. The second power supply voltage ( Figure 2 the second power supply voltage ELVSS in) may be applied to the common electrode layer CME.

[0081] The semiconductor layer ACT may include a semiconductor material. In an embodiment, for example, the semiconductor layer ACT may include polysilicon, amorphous silicon, an oxide semiconductor, an organic semiconductor, etc.

[0082] The first electrode pattern CE1 may include a low-resistance metal material. In an embodiment, for example, the first electrode pattern CE1 may include at least one selected from molybdenum, aluminum, copper, and titanium, and may be configured as a multilayer structure or a single-layer structure including at least one selected from the above-mentioned various materials (or defined by a multilayer structure or a single-layer structure including at least one selected from the above-mentioned various materials).

[0083] The first insulating layer IL1 may be disposed between the semiconductor layer ACT and the first electrode pattern CE1. The first insulating layer IL1 may include an inorganic insulating material. In an embodiment, for example, the first insulating layer IL1 may include silicon nitride, silicon oxide, silicon oxynitride, aluminum oxide, titanium oxide, tantalum oxide, hafnium oxide, etc., and may be configured as a multilayer structure or a single-layer structure including at least one selected from the above-mentioned various materials.

[0084] The second electrode pattern CE2 may form a storage capacitor Cst by overlapping with the first electrode pattern CE1. The second electrode pattern CE2 may include a low-resistance metal material. In an embodiment, for example, the second electrode pattern CE2 may include at least one selected from molybdenum, aluminum, copper, and titanium, and may be configured as a multilayer structure or a single-layer structure including at least one selected from the above-mentioned various materials.

[0085] The second insulating layer IL2 may be disposed between the first electrode pattern CE1 and the second electrode pattern CE2. The second insulating layer IL2 may include an inorganic insulating material. In an embodiment, for example, the second insulating layer IL2 may include silicon nitride, silicon oxide, silicon oxynitride, aluminum oxide, titanium oxide, tantalum oxide, hafnium oxide, etc., and may be configured as a multilayer structure or a single-layer structure including at least one selected from the above-mentioned various materials.

[0086] The third insulating layer IL3 may be disposed on the second insulating layer IL2 and cover the storage capacitor Cst. The third insulating layer IL3 may include an inorganic insulating material. In an embodiment, for example, the third insulating layer IL3 may include silicon nitride, silicon oxide, silicon oxynitride, aluminum oxide, titanium oxide, tantalum oxide, hafnium oxide, etc., and may be configured as a multilayer structure or a single-layer structure including at least one selected from the above-mentioned various materials.

[0087] The second conductive pattern CP2 may be disposed on the third insulating layer IL3. The second conductive pattern CP2 may be connected to the semiconductor layer ACT through a through hole defined or formed in the first insulating layer IL1, the second insulating layer IL2, and the third insulating layer IL3. In an embodiment, the second conductive pattern CP2 may be disposed in the same layer as the data line DL (or directly disposed on the same layer as the data line DL). That is, the second conductive pattern CP2 and the data line DL may be formed of the same material by the same process. The second conductive pattern CP2 and the data line DL may include a material having high conductivity. In an embodiment, for example, the second conductive pattern CP2 and the data line DL may include molybdenum, aluminum, copper, or titanium, and may be configured as a multi-layer structure or a single-layer structure including at least one selected from the above-mentioned various materials.

[0088] The first conductive pattern CP1 may be disposed on the first via insulating layer VIA1. The first conductive pattern CP1 may be connected to the second conductive pattern CP2 through a through hole defined or formed in the first via insulating layer VIA1. The first conductive pattern CP1 may be used to electrically connect the transistor TFT and the pixel electrode PXE to each other. The first conductive pattern CP1 may include a material having high conductivity. In an embodiment, for example, the first conductive pattern CP1 may include molybdenum, aluminum, copper, or titanium, and may be configured by a multi-layer structure or a single-layer structure including at least one selected from the above-mentioned various materials.

[0089] The pixel electrode PXE may be disposed on the second via insulating layer VIA2. The pixel electrode PXE may be in contact with the first conductive pattern CP1 through a through hole defined or formed in the second via insulating layer VIA2. In an embodiment, the pixel electrode PXE may include a conductive oxide. In an embodiment, for example, the pixel electrode PXE may include at least one selected from indium tin oxide (ITO), indium zinc oxide (IZO), zinc oxide (ZnO), indium oxide (In2O3), indium gallium oxide (IGO), and aluminum zinc oxide (AZO). In another embodiment, the pixel electrode PXE may include a metal material. In an embodiment, for example, the pixel electrode PXE may include silver, magnesium, aluminum, platinum, palladium, gold, nickel, neodymium, iridium, chromium, etc. In another configuration, the pixel electrode PXE may have a multi-layer structure including the above-mentioned conductive oxide and / or metal material.

[0090] The first via insulating layer VIA1 and the second via insulating layer VIA2 may include an organic insulating material. In an embodiment, for example, the first via insulating layer VIA1 and the second via insulating layer VIA2 may include PMMA, polystyrene, a polymer derivative having a phenol group, an acrylic polymer, an imide polymer, an amide polymer, a fluoropolymer, or a polyvinyl alcohol polymer.

[0091] The pixel defining layer PDL can be disposed on the pixel electrode PXE. The pixel defining layer PDL can expose the upper surface of the pixel electrode PXE and can protrude along the circumference of the pixel P. The pixel defining layer PDL can be used to demarcate the light-emitting region of each pixel P. The pixel defining layer PDL can include an organic insulating material. Alternatively, the pixel defining layer PDL can include an inorganic insulating material. Alternatively, the pixel defining layer PDL can have a multi-layer structure including an organic insulating material and / or an inorganic insulating material.

[0092] The light-emitting layer EML can be disposed in the pixel region surrounded by the pixel defining layer PDL. The light-emitting layer EML can include a low-molecular material or a high-molecular material. In an embodiment, for example, the light-emitting layer EML can include copper phthalocyanine (CuPc), N,N'-bis(naphthalen-1-yl)-N,N'-diphenyl-benzidine (NPB), tris(8-hydroxyquinoline)aluminum (Alq3), PEDOT, polyphenylacetylene (PPV) compounds, or polyfluorene compounds.

[0093] The light-emitting layer EML can be provided as a single-layer structure, or can also be provided as a multi-layer structure including respective functional layers. In an embodiment where the light-emitting layer EML is provided as a multi-layer structure, the light-emitting layer EML can have a structure in which a hole injection layer (HIL), a hole transport layer (HTL), a light-emitting layer (EL), an electron transport layer (ETL), and an electron injection layer (EIL) are stacked in a single or composite structure.

[0094] In some embodiments, at least a portion of the light-emitting layer EML can be formed integrally or commonly across multiple pixel electrodes PXE, or can be provided separately to correspond to each of the multiple pixel electrodes PXE.

[0095] The common electrode layer CME can be disposed on the light-emitting layer EML. The common electrode layer CME can be disposed for each pixel P, but can be disposed to cover most of the display area DA and can be shared by multiple pixels P.

[0096] The common electrode layer CME can include a metal material and / or a transparent conductive material. In an embodiment, for example, the common electrode layer CME can include silver, magnesium, aluminum, platinum, palladium, gold, nickel, neodymium, iridium, chromium, indium tin oxide (ITO), indium zinc oxide (IZO), zinc oxide (ZnO), indium tin zinc oxide (ITZO), etc.

[0097] The capping layer CAP can be disposed on the common electrode layer CME. The capping layer CAP can be used to improve the light-emitting efficiency of the organic light-emitting diode OLED. The capping layer CAP can include, for example, an organic material or an inorganic material (e.g., LiF).

[0098] The encapsulation layer EN can completely cover the organic light-emitting diode OLED. The encapsulation layer EN can be used to protect the organic light-emitting diode OLED from external moisture and gases. The encapsulation layer EN can include a first inorganic encapsulation layer IEN1, a second inorganic encapsulation layer IEN2, and an organic encapsulation layer OEN interposed between the first inorganic encapsulation layer IEN1 and the second inorganic encapsulation layer IEN2. The first inorganic encapsulation layer IEN1 and the second inorganic encapsulation layer IEN2 can include an inorganic insulating material, and the organic encapsulation layer OEN can include an organic insulating material.

[0099] Hereinafter, reference will be made to Figure 4 describe the cross-sectional structure in the intermediate region MA.

[0100] The buffer layer BUF, the first insulating layer IL1, the second insulating layer IL2, and the third insulating layer IL3 can extend from the display region DA and can also be disposed in the intermediate region MA.

[0101] The first via insulating layer VIA1 and the second via insulating layer VIA2 can extend from the display region DA and can also be disposed in the first intermediate region MA1.

[0102] In the first intermediate region MA1, the signal line LL bypassing the transmissive region TA can be disposed between the first via insulating layer VIA1 and the third insulating layer IL3 and between the first via insulating layer VIA1 and the second via insulating layer VIA2. Each of the plurality of signal lines LL can correspond to the extension portions DL-L1 and DL-L2 of the data line DL, the bypass portions DL-D1 and DL-D2 of the data line DL, the extension portion SL-L of the scan line SL, and the bypass portion SL-D of the scan line SL described with reference to Figure 3 the extension portions DL-L1 and DL-L2 of the data line DL, the bypass portions DL-D1 and DL-D2 of the data line DL, the extension portion SL-L of the scan line SL, and the bypass portion SL-D of the scan line SL.

[0103] The dam structure can be disposed in the second intermediate region MA2. In an embodiment, for example, the dam structure can include a first dam structure DAM1 and a second dam structure DAM2. The first dam structure DAM1 can have a closed curve shape surrounding the transmissive region TA in a plan view (when viewed in the Z direction), and the second dam structure DAM2 can have a closed curve shape surrounding the transmissive region TA between the first dam structure DAM1 and the transmissive region TA in a plan view.

[0104] In an embodiment, the first dam structure DAM1 may include a first first dam structure DAM1-1 and a second first dam structure DAM1-2 disposed on the first first dam structure DAM1-1. Here, the first first dam structure DAM1-1 and the second first dam structure DAM1-2 may be formed of the same material by the same process with at least two organic insulating layers selected from a first via insulating layer VIA1, a second via insulating layer VIA2, and a pixel defining layer PDL.

[0105] In an embodiment, the second dam structure DAM2 may include a first second dam structure DAM2-1 and a second second dam structure DAM2-2 disposed on the first second dam structure DAM2-1. Here, the first second dam structure DAM2-1 and the second second dam structure DAM2-2 may be formed of the same material by the same process with at least two organic insulating layers selected from a first via insulating layer VIA1, a second via insulating layer VIA2, and a pixel defining layer PDL.

[0106] The metal layer MLa may be disposed in the second intermediate region MA2. The metal layer MLa may be disposed on the third insulating layer IL3. The metal layer MLa may be disposed so as not to overlap with the first dam structure DAM1 and the second dam structure DAM2 in a plan view or in the Z direction. In an embodiment, for example, the metal layer MLa may be disposed between the second dam structure DAM2 and the transmissive region TA.

[0107] The metal layer MLa may be formed of the same material by the same process as the first conductive pattern CP1. In another embodiment, the metal layer MLa may be formed of the same material by the same process as the second conductive pattern CP2.

[0108] The light emitting layer EML, the common electrode layer CME, and the capping layer CAP may be disposed to extend from the display region DA to the intermediate region MA. In an embodiment, for example, the light emitting layer EML, the common electrode layer CME, and the capping layer CAP may extend from the display region DA to completely cover the second dam structure DAM2. In such an embodiment, the light emitting layer EML, the common electrode layer CME, and the capping layer CAP may be disposed so as not to overlap with the metal layer MLa.

[0109] The encapsulation layer EN may be disposed to extend from the display region DA to the intermediate region MA. Here, the organic encapsulation layer OEN of the encapsulation layer EN may be blocked by the first dam structure DMA1. Accordingly, the first inorganic encapsulation layer IEN1 and the second inorganic encapsulation layer IEN2 may be in direct contact with each other at a position above the first dam structure DAM1.

[0110] The first inorganic encapsulation layer IEN1 may directly contact the entire upper surface of the metal layer MLa. The metal layer MLa may be completely covered directly by the first inorganic encapsulation layer IEN1. In an embodiment, in the region where the metal layer MLa is disposed, the first inorganic encapsulation layer IEN1 and the second inorganic encapsulation layer IEN2 may be in direct contact with each other.

[0111] Hereinafter, reference will be made to Figure 4 describe the cross-sectional structure in the transmission region TA.

[0112] In the transmission region TA, holes may be defined in the substrate 100. Additionally, the above components (e.g., the buffer layer BUF, the first insulating layer IL1, etc.) may not be disposed in the region overlapping with the holes.

[0113] In an embodiment, although not shown in Figure 4 components having various functions (e.g., a camera, etc.) may be disposed in the transmission region TA.

[0114] Returning to the reference Figure 3 and Figure 4 , in an embodiment of the present disclosure, in a plan view, a metal layer MLa having a closed curve shape surrounding the transmission region TA may be disposed in the intermediate region MA. Additionally, in the intermediate region MA, the light-emitting film EML, the common electrode layer CME, and the capping layer CAP may be disposed so as not to overlap with the metal layer MLa in the plan view. Accordingly, the moisture permeation path defined by the light-emitting film EML, the common electrode layer CME, and the capping layer CAP may be blocked between the transmission region TA and the display region DA. That is, each of the light-emitting film EML, the common electrode layer CME, and the capping layer CAP may not be continuously disposed from the transmission region TA to the display region DA without interruption.

[0115] In such an embodiment, as described above, since the moisture permeation path is blocked in the region where the metal layer MLa is disposed, the reliability of the display device 10 may be improved.

[0116] In an embodiment, the thickness of the metal layer MLa in the Z direction may be about 50 nanometers (nm) or more. When the thickness of the metal layer MLa satisfies the above numerical range, the further formation of a moisture permeation path passing through the metal layer MLa other than the moisture permeation path defined by the light-emitting film EML, the common electrode layer CME, and the capping layer CAP described above can be effectively suppressed.

[0117] In an embodiment, the metal layer MLa may include at least one selected from molybdenum and titanium.

[0118] Figure 5It is an enlarged view of the transmissive region, the intermediate region, and the display region, and is a plan view for explaining a second embodiment of the present disclosure. Figure 5 The same or similar elements shown in Figure 3 the embodiment shown above have been labeled with the same reference numerals as those used to describe the

[0119] Referring to Figure 5 , the metal layer MLb may be disposed in the second intermediate region MA2. The metal layer MLb may have a closed curve shape surrounding the transmissive region TA in the plan view.

[0120] Figure 6 FIG. illustrates a cross-sectional view taken along the Figure 5 line X2-X2' of Figure 6 The same or similar elements shown in Figure 4 the embodiment shown above have been labeled with the same reference numerals as those used to describe the

[0121] Referring to Figure 6 , in the embodiment, the metal layer MLb may include a lower metal layer ML_1 and an upper metal layer ML_2.

[0122] The lower metal layer ML_1 may be formed of the same material as the second conductive pattern CP2 by the same process.

[0123] The upper metal layer ML_2 may be directly disposed on the upper surface of the lower metal layer ML_1. The upper metal layer ML_2 may be formed of the same material as the first conductive pattern CP1 by the same process.

[0124] In this embodiment, as shown in Figure 6 , the metal layer MLb may have a stacked structure of the lower metal layer ML_1 and the upper metal layer ML_2. Therefore, Figure 6 the thickness of the metal layer MLb in the Z direction in the embodiment shown in Figure 4 may be greater than the thickness of the metal layer MLa in the Z direction in the embodiment shown in

[0125] Figure 7 It is an enlarged view of the transmissive region, the intermediate region, and the display region according to another embodiment of the present disclosure. Figure 7 The same or similar elements shown in Figure 3 the embodiment shown above have been labeled with the same reference numerals as those used to describe the

[0126] Reference Figure 7 , in an embodiment, the metal layer MLc may be disposed in the second intermediate region MA2. The metal layer MLc may include a first metal layer ML1 and a second metal layer ML2.

[0127] The first metal layer ML1 may have a closed curve shape surrounding the second metal layer ML2. The second metal layer ML2 may have a closed curve shape surrounding the transmissive region TA.

[0128] Figure 8 Illustrated is a cross-sectional view taken along Figure 7 the line X3-X3’. Figure 8 The same or similar elements as those shown in Figure 4 have been labeled with the same reference numerals as those used above to describe the

[0129] Reference Figure 8 , in an embodiment, the light-emitting film EML, the common electrode layer CME, and the capping layer CAP may be arranged not to overlap with the first metal layer ML1 and the second metal layer ML2. In such an embodiment, in the separation region between the first metal layer ML1 and the second metal layer ML2, a stacked structure ST including the light-emitting film EML, the common electrode layer CME, and the capping layer CAP stacked in sequence may be arranged.

[0130] In some embodiments, at least one selected from the first metal layer ML1 and the second metal layer ML2 may have a bilayer structure such as that of the metal layer MLb described in reference Figure 6 .

[0131] Figure 9 is an enlarged view of the transmissive region, the intermediate region, and the display region according to another embodiment of the present disclosure. Figure 9 The same or similar elements as those shown in Figure 3 and Figure 7 have been labeled with the same reference numerals as those used above to describe the

[0132] Reference Figure 9 , in an embodiment, the metal layer MLd may be disposed in the second intermediate region MA2. The metal layer MLd may include a first metal layer ML1’ and a second metal layer ML2’.

[0133] The first metal layer ML1’ may have a closed curve shape surrounding the second metal layer ML2’. The second metal layer ML2’ may have a closed curve shape surrounding the transmissive region TA.

[0134] Figure 10 Illustrated is a cross-sectional view taken alongFigure 9 Cross-sectional view taken along line X4-X4'. Figure 10 The same or similar elements shown in have been labeled with the same reference characters as those used to describe the embodiments shown above for Figure 3 and Figure 8 the embodiments shown in, and any repeated detailed description thereof will be omitted.

[0135] Referring to Figure 10 , the first metal layer ML1' may be disposed between the first dam structure DAM1 and the second dam structure DAM2, and the second metal layer ML2' may be disposed between the second dam structure DAM2 and the transmissive region TA.

[0136] In an embodiment, as described above, the metal layer MLd may include respective metal layers disposed in respective regions within the second intermediate region MA2. In such an embodiment, the respective metal layers included in the metal layer MLd may have a closed curve shape that surrounds the transmissive region TA and is spaced apart from each other, and may be arranged so as not to overlap with the dam structure. In an embodiment, for example, the metal layer MLd may further include a metal layer disposed between the first dam structure DAM1 and the first intermediate region MA1. Additionally, the metal layer MLd may include three or more metal layers that satisfy the above conditions.

[0137] In an embodiment, at least one selected from the plurality of metal layers included in the metal layer MLd may have a bilayer structure such as that of the metal layer MLb described in reference Figure 6 .

[0138] Figure 11 is a flowchart showing a method of manufacturing a display device according to an embodiment of the present disclosure.

[0139] Referring to Figure 11 , an embodiment of a method of manufacturing the display device 10 may include: forming a metal layer (S10); forming a light-emitting film (S20); forming a common electrode layer (S30); and irradiating the metal layer with a laser (S40).

[0140] Figures 12 to 15 is a cross-sectional view showing the process of an embodiment of a method of manufacturing a Figure 11 display device. Figures 12 to 15 The same or similar elements shown in have been labeled with the same reference characters as those used to describe the embodiments shown above for Figure 3 and Figure 4 the embodiments shown in, and any repeated detailed description thereof will be omitted.

[0141] Referring to Figure 12, a metal layer MLa may be formed on a substrate 100 (S10). In an embodiment, the metal layer MLa and the second conductive pattern CP2 may be formed of the same material by the same process. In another embodiment, the metal layer MLa and the first conductive pattern ( Figure 3 the first conductive pattern CP1 in

[0142] Reference Figure 13 , the first dam structure DAM1, the second dam structure DAM2, the signal line LL, the pixel circuit PC, the pixel electrode PXE, and the pixel defining film PDL may be formed on the substrate 100. There is no limitation on the method of forming the above components, and the above components may be formed by applying suitable forming methods known in the art according to their stacking order.

[0143] Reference Figure 14 , a light-emitting film EML may be formed on the substrate 100 (S20), a common electrode layer CME may be formed on the substrate 100 (S30), and a capping layer CAP may be formed on the substrate 100. In this embodiment, the light-emitting film EML, the common electrode layer CME, and the capping layer CAP may be completely formed in at least the display area DA and at least the intermediate area MA.

[0144] Reference Figure 15 , the light-emitting film EML, the common electrode layer CME, and the capping layer CAP disposed to overlap the metal layer MLa may be removed by irradiating the metal layer MLa with a laser L (S40). In this embodiment, the metal layer MLa may not be substantially removed by the laser L. In an embodiment, for example, after the irradiation of the laser L, the thickness of the metal layer MLa may be about 50 nm or greater.

[0145] Various types of lasers may be used as the laser L to sufficiently increase the temperature of the metal layer MLa so that the light-emitting film EML, the common electrode layer CME, and the capping layer CAP disposed to overlap the metal layer MLa may be removed. In an embodiment, for example, the laser L may be a laser in the form of a Gaussian beam.

[0146] The laser L may be irradiated for a relatively short time. For example, the laser L may be irradiated at an intensity of about 200 millijoules per square centimeter (mJ / cm 2 ) to about 500 mJ / cm 2 for 2 nanoseconds (ns) to 14 ns. When the irradiation time of the laser L increases, the process efficiency may decrease, and the yield of the display device 10 may decrease.

[0147] The temperature of the metal layer MLa can increase due to the irradiation of the laser L, and thus, the light-emitting film EML, the common electrode layer CME, and the capping layer CAP arranged to overlap the metal layer MLa can be decomposed. In an embodiment, the metal layer MLa can include a material that can cause a sufficient temperature increase even when the laser L is irradiated for a relatively short time as described above. In an embodiment, for example, the metal layer MLa can include at least one selected from molybdenum and titanium. Therefore, when the laser L is irradiated, the average temperature in the light-emitting film EML overlapping the metal layer MLa can be about 350 °C or higher.

[0148] When the laser L is irradiated, the laser L can be irradiated onto the metal layer MLa at least through the substrate 100. That is, the laser L can be irradiated in the direction of the back surface of the substrate 100.

[0149] In an embodiment, the irradiation of the laser L can be performed in a vacuum. Therefore, the light-emitting film EML, the common electrode layer CME, and the capping layer CAP can be effectively decomposed and removed.

[0150] In an embodiment, after the laser L is irradiated, the encapsulation layer EN can be formed in at least the display area DA and at least the intermediate area MA.

[0151] The present invention should not be construed as limited to the embodiments set forth herein. On the contrary, these embodiments are provided so that this disclosure will be thorough and complete, and will fully convey the concept of the present invention to those skilled in the art.

[0152] Although the present invention has been particularly shown and described with reference to the embodiments of the present invention, those of ordinary skill in the art will understand that various changes in form and detail can be made therein without departing from the spirit or scope of the present invention as defined by the appended claims.

Claims

1. A display device, comprising: a substrate comprising a transmission area, a display area surrounding the transmission area, and an intermediate area between the transmission area and the display area; a metal layer, the metal layer being arranged in the middle region on the substrate, wherein the metal layer has a closed curve shape surrounding the transmission region in a plan view; a light emitting film arranged on the substrate to extend from the display area to the middle area; and a common electrode layer, the common electrode layer being arranged to extend from the display area to the middle area and being arranged on the light emitting film at least in the display area, Wherein, in the plan view, each of the light emitting film and the common electrode layer is arranged in the middle region so as not to overlap with the metal layer.

2. The display device according to claim 1, further comprising: an encapsulation layer, the encapsulation layer being arranged on the common electrode layer to extend from the display area to the middle area, wherein the encapsulation layer includes a first inorganic encapsulation layer, an organic encapsulation layer, and a second inorganic encapsulation layer sequentially stacked in at least the display area, Wherein, the first inorganic encapsulation layer is in direct contact with the entire upper surface of the metal layer.

3. The display device according to claim 2, wherein: In the plan view, the first inorganic encapsulating layer and the second inorganic encapsulating layer are in direct contact with each other in a region where the metal layer is arranged.

4. The display device according to claim 1, further comprising: a dam structure arranged in the middle region, wherein the dam structure has a closed curve shape surrounding the transmission region in the plan view, Wherein, the metal layer does not overlap with the dam structure in the plan view.

5. The display device according to claim 1, wherein: The intermediate region includes a first intermediate region where at least one wiring bypassing the transmission region is arranged and a second intermediate region surrounded by the first intermediate region in the plan view, and The metal layer is arranged in the second intermediate region.

6. The display device according to claim 1, wherein: The metal layer includes a first metal layer and a second metal layer surrounded by the first metal layer in the plan view, Wherein, in the plan view, at least one stacked structure including the light emitting film and the common electrode layer arranged on the light emitting film is arranged in a region between the first metal layer and the second metal layer.

7. The display device according to claim 1, further comprising: a pixel electrode, wherein the pixel electrode is arranged below the light emitting film in the display area; a first conductive pattern disposed below the pixel electrode and in electrical contact with the pixel electrode; as well as a second conductive pattern disposed below the first conductive pattern and in electrical contact with the first conductive pattern, Wherein, the metal layer comprises: a lower metal layer, the lower metal layer and the second conductive pattern being formed of the same material through the same process; and An upper metal layer is directly disposed on an upper surface of the lower metal layer and is formed of the same material as the first conductive pattern through the same process.

8. The display device according to claim 1, further comprising: a capping layer, the capping layer being arranged to extend from the display area to the middle area and being arranged on the common electrode layer in at least the display area, Wherein, in the plan view, the capping layer is arranged in the middle region so as not to overlap with the metal layer.

9. The display device according to claim 1, wherein: The thickness of the metal layer is 50 nm or more.

10. The display device according to claim 1, wherein: The metal layer includes at least one selected from molybdenum and titanium.

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