Firmware configuration method and system of Retimer chip, electronic equipment and medium

Abstract

The invention provides a firmware configuration method and system of a Retimer chip, electronic equipment and a medium. The method comprises the following steps: acquiring a storage in-place signal and a storage node authentication signal; based on the storage in-place signal and the storage node authentication signal, enabling the BMC to write corresponding firmware configuration into a Retimer chip; and changing a communication link of a CPU configuration and a storage node based on the stored in-place signal, so that the CPU configuration and the communication link are adapted to firmware configuration of a Retimer chip. According to the method and the device, the BMC can automatically write the corresponding firmware configuration into the Retimer chip according to different application scenes, so that automatic updating of the firmware configuration of the Retimer chip is realized, a user can freely exchange node positions, NTB firmware configuration and NTB and PCIe synchronous firmware configuration are supported at the same time under the condition that hardware is not changed, mutual compatibility of PCIe SSD and NTB is realized, the communication distance is prolonged, and the user experience is improved. And the method has high compatibility and flexibility.

Description

Technical Field

[0001] This application belongs to the technical field of storage servers, and particularly relates to a firmware configuration method, system, electronic device, and medium for a Retimer chip. Background Art

[0002] NTB (Non-Transparent Bridge) is a bridging technology used to connect different bus segments or different bus architectures, mainly for resource isolation, signal conversion, and performance optimization. In the PCIe (Peripheral Component Interconnect Express) interface, the NTB technology allows devices between different bus segments to communicate through functions such as address mapping, signal conversion, and data forwarding, while preventing direct access between devices, thereby improving the security and stability of the system. The NTB technology has a wide range of applications in multi-processor systems, heterogeneous computing environments, and distributed storage systems, especially in scenarios where resource isolation or cross-domain communication is required.

[0003] However, with the increasing complexity of the PCIe interconnect system, the length of the communication link and signal integrity issues have become challenges. To extend the PCIe transmission distance and ensure signal quality, a Retimer (retimer) chip is usually required. The Retimer can effectively reduce signal attenuation and jitter through signal conditioning and clock recovery functions, thereby supporting a longer physical transmission distance. However, the Retimer chip needs to burn different firmware in different application scenarios, which brings flexibility and compatibility issues. For example, in the NTB application scenario, the primary storage node and the secondary storage node usually need to be configured with different firmware. Even if the hardware of the two nodes is exactly the same, users cannot freely exchange the node positions. In addition, the hardware with fixed firmware cannot support multiple application scenarios. For example, the same device cannot support both the NTB X16 mode and the NTB X8 + 4 * PCIe X2 mode without changing the hardware. Summary of the Invention

[0004] This application provides a firmware configuration method, system, electronic device, and medium for a Retimer chip, which can enable the Retimer chip to dynamically adapt to different application scenarios and improve compatibility and flexibility.

[0005] In a first aspect, this application provides a firmware configuration method for a Retimer chip, and the method includes:

[0006] Obtain the storage in-position signal and the storage node authentication signal;

[0007] Based on the stored in - bit signal and the storage node authentication signal, the BMC writes the corresponding firmware configuration to the Retimer chip; and

[0008] Based on the stored in - bit signal, the CPU configures and changes the communication link of the storage node so that the CPU configuration and the communication link adapt to the firmware configuration of the Retimer chip.

[0009] In an implementation manner of the first aspect, when no external storage device is connected, based on the stored in - bit signal, the BMC writes the NTB firmware configuration to the Retimer chip; and

[0010] Based on the node authentication signal, the BMC writes the NTB firmware configuration of the first storage node or the NTB firmware configuration of the second storage node to the Retimer chip.

[0011] In an implementation manner of the first aspect, when an external storage device is connected, based on the stored in - bit signal, the BMC writes the NTB and PCIe synchronization firmware configuration to the Retimer chip; and

[0012] Based on the node authentication signal, the BMC writes the NTB and PCIe synchronization firmware configuration of the first storage node or the NTB and PCIe synchronization firmware configuration of the second storage node to the Retimer chip.

[0013] In an implementation manner of the first aspect, when no external storage device is connected, based on the communication link switching signal, the communication link switching chip switches the communication link to the NTB path so that the communication link adapts to the NTB firmware configuration of the Retimer chip.

[0014] In an implementation manner of the first aspect, when an external storage device is connected, based on the communication link switching signal, the communication link switching chip switches the communication link to the PCIe path so that the communication link adapts to the NTB and PCIe synchronization firmware configuration of the Retimer chip.

[0015] In an implementation manner of the first aspect, when no external storage device is connected, based on the communication link switching signal, the communication link switching chip switches the communication link to the NTB path so that the communication link adapts to the NTB firmware configuration of the Retimer chip.

[0016] In an implementation manner of the first aspect, when an external storage device is connected, based on the communication link switching signal, the communication link switching chip switches the communication link to the PCIe path so that the communication link adapts to the NTB and PCIe synchronization firmware configuration of the Retimer chip.

[0017] In a second aspect, the present application provides a firmware configuration system for a Retimer chip, the system comprising:

[0018] An acquisition module, configured to acquire a storage in-position signal and a storage node authentication signal;

[0019] A writing module, configured to cause the BMC to write corresponding firmware configuration to the Retimer chip based on the storage in-position signal and the storage node authentication signal; and

[0020] A configuration module, configured to change the communication link between the CPU configuration and the storage node based on the storage in-position signal, so that the CPU configuration and the communication link are adapted to the firmware configuration of the Retimer chip.

[0021] In a third aspect, the present application provides an electronic device, comprising: a processor and a memory; the memory is used to store a computer program, the processor is communicatively connected to the memory, and the processor is configured to execute the computer program stored in the memory to execute the firmware configuration method of the Retimer chip described in the first aspect of the present application.

[0022] In a fourth aspect, the present application provides a computer-readable storage medium, on which a computer program is stored, and when the computer program is executed by a processor, it implements the firmware configuration method of the Retimer chip described in the first aspect of the present application.

[0023] As described above, the firmware configuration method, system, electronic device and medium of a Retimer chip provided by the present application have the following beneficial effects: The present application can cause the BMC to automatically write corresponding firmware configuration to the Retimer chip according to different application scenarios, realizing automatic update of the firmware configuration of the Retimer chip, so that users can freely exchange the positions of nodes, and without changing the hardware, simultaneously support NTB firmware configuration and NTB and PCIe synchronous firmware configuration, realize the compatibility between PCIe SSD and NTB, extend the communication distance, and have strong compatibility and flexibility. Description of the Drawings

[0024] Figure 1 It shows a schematic diagram of an application scenario architecture of a storage node provided by an embodiment of the present application.

[0025] Figure 2 It shows a schematic flowchart of a firmware configuration method of a Retimer chip described in an embodiment of the present application.

[0026] Figure 3 It shows a schematic diagram of the architecture of a firmware configuration system of a Retimer chip described in an embodiment of the present application.

[0027] Figure 4 It shows a schematic diagram of the architecture of an electronic device according to an embodiment of the present application. Detailed implementation manners

[0028] The following uses specific specific examples to illustrate the implementation manners of the present application. Those skilled in the art can easily understand other advantages and effects of the present application from the content disclosed in this specification. The present application can also be implemented or applied through other different specific implementation manners. Various details in this specification can also be modified or changed based on different viewpoints and applications without departing from the spirit of the present application. It should be noted that, without conflict, the following embodiments and the features in the embodiments can be combined with each other.

[0029] It should be noted that the diagrams provided in the following embodiments only illustrate the basic concept of the present application in a schematic manner. Therefore, only the components related to the present application are shown in the diagrams, rather than being drawn according to the number, shape, and size of the components in actual implementation. The type, quantity, and ratio of each component in actual implementation can be arbitrarily changed, and the component layout type may also be more complex.

[0030] In addition, it should also be understood that unless otherwise specified or indicated, the terms "first", "second", etc. described in the specification are only used to distinguish each component, element, step, etc. in the specification, rather than to represent the logical relationship or sequence relationship between each component, element, step, etc., nor can it be understood as indicating or implying relative importance or implicitly indicating the quantity of the indicated technical features.

[0031] The embodiment of the present application provides a firmware configuration method, system, electronic device, and medium for a Retimer chip, which can enable the BMC to automatically write corresponding firmware configurations to the Retimer chip according to different application scenarios, realize automatic update of the Retimer chip firmware configuration, so that users can freely exchange node positions, and without changing the hardware, support both NTB firmware configuration and NTB and PCIe synchronous firmware configuration at the same time, realize the compatibility between PCIe SSD and NTB, extend the communication distance, and have strong compatibility and flexibility.

[0032] The following will describe the present application by taking the application scenario of two storage nodes as an example.

[0033] As Figure 1 shown, this embodiment provides an architecture diagram of a storage node application scenario. It is worth noting that Figure 1 the structure shown is only an example, and it is not the only structure for implementing this method. As Figure 1 shown, this application scenario consists of the following parts:

[0034] Storage Nodes: Two independent and identical storage nodes, including Storage Node 1 and Storage Node 2, which are interconnected via NTB.

[0035] Primary Node: The priority node, which can be the master node on the bus and is used for interconnection between different nodes, such as NTB.

[0036] Secondary Node: The backup node, which can be the slave node on the interconnection bus. When the master node fails or encounters abnormal situations, it can undertake all the work tasks.

[0037] Storage Backplane: The backplane into which SSD hard drives are inserted.

[0038] CPU: Central Processing Unit. In this application, the CPU is used to control the change of PCIE configuration to achieve the switching of different applications.

[0039] CPLD: Programmable Logic Device, which performs digital logic on the in-position signal and outputs relevant logic output signals to the CPU and BMC.

[0040] BMC: Baseboard Management Controller, which is used to monitor and manage the host system.

[0041] Retimer Chip: When the signal passes through the Retimer chip, the internal clock reconstructs the signal, increasing its signal transmission energy and the signal transmission distance. The Retimer chip requires firmware to operate properly.

[0042] PCIe: High-Speed Serial Computer Expansion Bus Standard, the most common interface in the motherboard. It uses a high-speed differential bus and end-to-end connection method to provide a larger bus bandwidth and is commonly used to interconnect external devices.

[0043] PCIe Switching Chip: It can be controlled via GPIO (General Purpose Input Output) to switch from one PCIe channel to two PCIe channels. The host can connect to different PCIe devices through the PCIe switching chip.

[0044] EEPROM: Stores the firmware required for the operation of the Retimer chip.

[0045] NTB: Non-Transparent Bridge, which performs address mapping translation on the corresponding data to achieve data communication between storage nodes.

[0046] SSD Hard Drive: The medium for storing information.

[0047] FLASH: Stores the firmware and other files required during the operation of the BMC.

[0048] Specifically, in this storage node application scenario, the Retimer chip is connected to the EEPROM via I2C to read the firmware required for normal operation. The BMC is connected to the EEPROM via I2C, so that different firmware configurations can be written according to the application scenario, enabling the Retimer chip to read the corresponding firmware configuration from the EEPROM. Among them, the BMC is connected to the FLASH via SPI and can read the firmware required for operation and the files of the managed configuration.

[0049] Specifically, in this storage node application scenario, the level of the storage presence signal is obtained according to the presence signal of the SSD storage hard disk, and the level of the storage node authentication signal is determined according to whether to use the priority node interconnection or the backup node interconnection. Then, the CPLD sends the storage presence signal and the storage node authentication signal to the BMC, so that the BMC can write the firmware to the Retimer chip according to the storage presence signal and the storage node authentication signal. In addition, the CPLD also sends the storage presence signal to the CPU. After receiving the signal, the CPU changes its configuration to the NTB configuration or the NTB and PCIe configurations. At the same time, the CPLD outputs a communication link switching signal according to the storage presence signal, causing the communication link switching chip to switch the communication link to the NTB path (PCIex8 (For NTB) path) or the PCIe path (4 * PCIe x2 path).

[0050] Next, the technical solutions in the embodiments of the present application will be described in detail with reference to the accompanying drawings in the embodiments of the present application.

[0051] As Figure 2 shown, this embodiment provides a firmware configuration method for a Retimer chip, which includes the following steps S1 to S3.

[0052] S1. Obtain the storage presence signal and the storage node authentication signal.

[0053] Specifically, the storage presence signal refers to the signal determined by the CPLD according to whether an external SSD storage hard disk is connected.

[0054] In some embodiments, when the SSD storage hard disk is not connected to the storage node, the power supply is defaultly connected through a resistor at this time. Therefore, all the presence signals of the SSD storage hard disk are high-level signals, and at this time, the CPLD will output a high-level storage presence signal to the CPU according to the presence signal of the SSD storage hard disk.

[0055] In some embodiments, when an SSD storage hard drive is connected to a storage node, due to the presence pin of the SSD, the inside of the SSD is grounded. Therefore, when any SSD storage hard drive is connected to the storage node, the presence signal of the corresponding SSD storage hard drive is a low-level signal. At this time, the CPLD will output a storage presence signal of low-level to the CPU and BMC according to the presence signal of the SSD storage hard drive.

[0056] It should be noted that regardless of the number of external SSD storage hard drives, as long as one SSD storage hard drive is connected to the storage node, the CPLD will output a storage presence signal of low-level to the CPU and BMC.

[0057] Specifically, the storage node authentication signal refers to when multiple storage nodes are interconnected, the CPLD determines which storage node signal according to the storage node authentication signal and outputs it to the BMC, so that the BMC writes the corresponding firmware configuration to the corresponding storage node. For example, in some embodiments, the first storage node is the master node, and its storage node authentication signal is a high-level signal, and the second storage node is the slave node, and its storage node authentication signal is a low-level signal.

[0058] S2. Based on the storage presence signal and the storage node authentication signal, the BMC writes the corresponding firmware configuration to the Retimer chip.

[0059] Specifically, the firmware configuration of the Retimer chip is stored in the fixed area of the BMC flash (the memory of the BMC). After the BMC receives the storage presence signal and the node identity authentication signal sent by the CPLD, it writes the corresponding firmware configuration to the EEPROM according to the storage presence signal and the node identity authentication signal, so that the Retimer chip reads the corresponding firmware configuration. That is, the BMC writes the corresponding firmware configuration to the Retimer chip according to the storage presence signal and the node identity authentication signal, so that the Retimer chip adapts to different application scenarios.

[0060] In some embodiments, the firmware configurations stored in the fixed area of the BMC flash include:

[0061] Firmware 1: Main controller NTB PCIE*16 (NTB firmware configuration of the first storage node)

[0062] Firmware 2: Sub controller NTB PCIE*16 (NTB firmware configuration of the second storage node)

[0063] Firmware 3: Main controller NTB PCIE*8 + 4*PCIE*2 (NTB and PCIe synchronization firmware configuration of the first storage node)

[0064] Firmware 4: Secondary Controller NTB PCIE*8 + 4*PCIE*2 (NTB and PCIe Synchronization Firmware Configuration for the Second Storage Node)

[0065] Then, based on the storage presence signal and the storage node authentication signal, the BMC writes the corresponding firmware configuration to the Retimer chip, which specifically includes:

[0066] (1) When no external storage device is connected, based on the storage presence signal, the BMC writes the NTB firmware configuration to the Retimer chip; and based on the storage node authentication signal, the BMC writes the NTB firmware configuration of the first storage node or the NTB firmware configuration of the second storage node to the Retimer chip.

[0067] In some embodiments, when no external storage device is connected and the BMC obtains that the storage node authentication signal is at a high level and the storage presence signal is at a high level, the BMC writes Firmware 1, i.e., the NTB firmware configuration of the first storage node (Primary Controller NTB PCIE*16), to the Retimer chip according to the storage node authentication signal and the storage presence signal.

[0068] In some embodiments, when no external storage device is connected and the BMC obtains that the storage node authentication signal is at a low level and the storage presence signal is at a high level, the BMC writes Firmware 2, i.e., the NTB firmware configuration of the second storage node (Secondary Controller NTB PCIE*16), to the Retimer chip according to the storage node authentication signal and the storage presence signal.

[0069] (2) When an external storage device is connected, based on the storage presence signal, the BMC writes the NTB and PCIe synchronization firmware configuration to the Retimer chip; and based on the node authentication signal, the BMC writes the NTB and PCIe synchronization firmware configuration of the first storage node or the NTB and PCIe synchronization firmware configuration of the second storage node to the Retimer chip.

[0070] In some embodiments, when an external storage device is connected and the BMC obtains that the storage node authentication signal is at a high level and the storage presence signal is at a low level, the BMC writes Firmware 3, i.e., the NTB and PCIe synchronization firmware configuration of the first storage node (Primary Controller NTB PCIE*8 + 4*PCIE*2), to the Retimer chip according to the storage node authentication signal and the storage presence signal.

[0071] In some embodiments, when an external storage device is connected, if the BMC obtains that the storage node authentication signal is at a low level and the storage present signal is at a low level, the BMC writes firmware 4 to the Retimer chip according to the storage node authentication signal and the storage present signal, that is, the NTB and PCIe synchronization firmware configuration of the second storage node (sub - controller NTB PCIE*8 + 4*PCIE*2).

[0072] In addition, as Figure 1 shown, after the BMC writes the corresponding firmware configuration to the Retimer chip according to the storage present signal and the storage node authentication signal, the CPLD sends a reset signal to restart the Retimer chip to make the firmware configuration take effect.

[0073] S3. Based on the storage present signal, the CPU configuration and the communication link of the storage node are changed so that the CPU configuration and the communication link are adapted to the firmware configuration of the Retimer chip.

[0074] Specifically, on the one hand, the present application writes different firmware configurations to the Retimer chip through the BMC, and on the other hand, based on the firmware configurations of different Retimer chips, the CPU configuration and the communication link of the storage node are adaptively changed to meet the requirements of different application scenarios.

[0075] Specifically, as Figure 1 shown, the CPLD sends the storage present signal to the CPU so that the PCIe control module in the CPU switches the CPU configuration to achieve the switching of different applications. Wherein, the CPU configuration includes NTB configuration, NTB and PCIe configuration.

[0076] In some embodiments, when the external storage device is not connected, based on the storage present signal, the CPU configuration is changed to the NTB configuration so that the CPU configuration is adapted to the NTB firmware configuration of the Retimer chip. That is, the CPLD inputs a high - level storage present signal to the CPU to make the CPU configuration become the NTB configuration (PCIE x16 (For NTB)). At this time, since the storage present signal is at a high level, in fact, the BMC also writes the NTB firmware configuration to the Retimer chip, so the CPU configuration is adapted to the firmware configuration of the Retimer chip.

[0077] In some embodiments, when the external storage device is connected, based on the storage present signal, the CPU configuration is changed to NTB and PCIe configurations, so that the CPU configuration adapts to the NTB and PCIe synchronization firmware configurations of the Retimer chip. That is, the CPLD inputs a low-level storage present signal to the CPU, causing the CPU configuration to become NTB and PCIe configurations (PCIE x8 (For NTB) + 4 PCIE x2 (For ssd)). At this time, since the storage present signal is low level, in fact, the BMC also writes the NTB and PCIe synchronization firmware configurations to the Retimer chip, so that the CPU configuration adapts to the firmware configuration of the Retimer chip.

[0078] Specifically, as Figure 1 shown, the CPLD sends a communication link switching signal to the communication link switching chip ( Figure 1 shown as the PCIe switching chip in the figure) according to whether an external storage device is connected, so that the communication link switching chip switches the communication link of the storage node to meet different application scenarios. Among them, the communication link includes an NTB path and a PCIe path.

[0079] In some embodiments, when the external storage device is not connected, based on the communication link switching signal, the communication link switching chip switches the communication link to the NTB path, so that the communication link adapts to the NTB firmware configuration of the Retimer chip. That is, when the present signals of all SSD storage hard disks are high level, the CPLD outputs a communication link switching signal to the communication link switching chip, causing the communication link switching chip to switch the communication link to the NTB path. At this time, the communication link of the storage node is configured in the NTB x16 mode because the full SSD is not required in actual applications. At this time, the two storage nodes (the first storage node and the second storage node) are connected through the NTB x16 bus to achieve the maximum interconnection bandwidth.

[0080] In some embodiments, when the external storage device is connected, based on the communication link switching signal, the communication link switching chip switches the communication link to the PCIe path, so that the communication link adapts to the NTB and PCIe synchronization firmware configurations of the Retimer chip. That is, when the present signal of any SSD storage hard disk is low level, the CPLD outputs a communication link switching signal to the communication link switching chip, causing the communication link switching chip to switch the communication link to the SSD PCIE path. At this time, the communication link of the storage node is configured in the NTB x8 and 4x PCIe x2 modes. The two storage nodes (the first storage node and the second storage node) are connected through the NTB PCIe x8 bus, and 4 PCIe x2 SSDs can be added. The two storage nodes and the external storage device are interconnected through the PCIe bus.

[0081] The protection scope of the firmware configuration method of the Retimer chip described in the embodiments of this application is not limited to the execution order of the steps listed in this embodiment. Any solution achieved by adding or subtracting steps of the prior art and replacing steps according to the principles of this application is included in the protection scope of this application.

[0082] The embodiments of this application also provide a firmware configuration system for a Retimer chip. The firmware configuration system for the Retimer chip can implement the firmware configuration method of the Retimer chip described in this application. However, the implementation devices of the firmware configuration method of the Retimer chip described in this application include, but are not limited to, the structure of the firmware configuration system of the Retimer chip listed in this embodiment. Any structural deformation and replacement of the prior art made according to the principles of this application are included in the protection scope of this application.

[0083] As Figure 3 shown, this embodiment provides a firmware configuration system for a Retimer chip, including an acquisition module 20, a writing module 21, and a configuration module 22.

[0084] The acquisition module 21 is used to acquire the storage in-position signal and the storage node authentication signal;

[0085] The writing module 22 is used to cause the BMC to write the corresponding firmware configuration to the Retimer chip based on the storage in-position signal and the storage node authentication signal;

[0086] The configuration module 23 is used to change the CPU configuration and the communication link of the storage node based on the storage in-position signal, so that the CPU configuration and the communication link are adapted to the firmware configuration of the Retimer chip.

[0087] It should be noted that the principles of the acquisition module 20, the writing module 21, and the configuration module 22 are the same as those in the above embodiments and will not be elaborated here.

[0088] This application also provides an electronic device. As Figure 4 shown, this embodiment provides an electronic device 90, and the electronic device 90 includes: a memory 901 configured to store a computer program; and a processor 902 communicatively connected to the memory 901 and configured to call the computer program to execute the method for firmware configuration of the Retimer chip.

[0089] The memory 901 includes various media that can store program codes, such as ROM (Read Only Memory image), RAM (Random Access Memory), magnetic disks, USB flash drives, memory cards, or optical discs.

[0090] The processor 902 is connected to the memory 901 and is configured to execute the computer program stored in the memory 901, so that the electronic device executes the method for firmware configuration of the Retimer chip described above.

[0091] Preferably, the processor 902 may be a general-purpose processor, including a central processing unit (CPU), a network processor (NP), etc.; it may also be a digital signal processor (DSP), an application specific integrated circuit (ASIC), a field programmable gate array (FPGA), or other programmable logic devices, discrete gate or transistor logic devices, discrete hardware components.

[0092] In several embodiments provided in the present application, it should be understood that the disclosed system, apparatus, or method may be implemented in other ways. For example, the apparatus embodiments described above are merely illustrative. For example, the division of modules / units is only a logical function division. In actual implementation, there may be other division methods. For example, multiple modules or units may be combined or integrated into another system, or some features may be ignored or not executed. Another point is that the displayed or discussed couplings or direct couplings or communication connections between each other may be through some interfaces, and the indirect couplings or communication connections of the devices or modules or units may be in electrical, mechanical, or other forms.

[0093] The modules / units described as separate components may or may not be physically separated, and the components displayed as modules / units may or may not be physical modules, that is, they may be located in one place, or may be distributed to multiple network units. Some or all of the modules / units may be selected according to actual needs to achieve the objectives of the embodiments of the present application. For example, in each embodiment of the present application, the functional modules / units may be integrated in a processing module, or each module / unit may exist physically alone, or two or more modules / units may be integrated in one module / unit.

[0094] Those of ordinary skill in the art should further realize that the units and algorithm steps of each example described in combination with the embodiments disclosed herein can be implemented by electronic hardware, computer software, or a combination of the two. To clearly illustrate the interchangeability of hardware and software, the composition and steps of each example have been generally described according to functions in the above description. Whether these functions are executed in a hardware or software manner depends on the specific application and design constraints of the technical solution. Professional technicians can use different methods to implement the described functions for each specific application, but such implementation should not be considered to exceed the scope of this application.

[0095] The embodiments of this application also provide a computer-readable storage medium. Those of ordinary skill in the art can understand that all or part of the steps in the methods of the above embodiments can be completed by a program instructing a processor. The program can be stored in a computer-readable storage medium. The storage medium is a non-transitory medium, such as random access memory, read-only memory, flash memory, hard disk, solid-state drive, magnetic tape, floppy disk, optical disc, and any combination thereof. The above storage medium can be any available medium that a computer can access or a data storage device such as a server or data center that integrates one or more available media. The available medium can be a magnetic medium (such as a floppy disk, hard disk, magnetic tape), an optical medium (such as a digital video disc (DVD)), or a semiconductor medium (such as a solid-state drive (SSD)).

[0096] The embodiments of this application can also provide a computer program product, which includes one or more computer instructions. When the computer instructions are loaded and executed on a computing device, all or part of the processes or functions described in the embodiments of this application are generated. The computer instructions can be stored in a computer-readable storage medium or transmitted from one computer-readable storage medium to another. For example, the computer instructions can be transmitted from a website, computer, or data center to another website, computer, or data center in a wired manner (such as coaxial cable, optical fiber, digital subscriber line (DSL)) or a wireless manner (such as infrared, wireless, microwave, etc.).

[0097] When the computer program product is executed by a computer, the computer executes the method described in the foregoing method embodiments. The computer program product can be a software installation package. In the case where the foregoing method is needed, the computer program product can be downloaded and executed on the computer.

[0098] The present application can enable the BMC to automatically write the corresponding firmware configuration into the Retimer chip according to different application scenarios, realizing the automatic update of the Retimer chip firmware configuration. Thus, users can freely exchange the node positions, and without changing the hardware, support both the NTB firmware configuration and the NTB and PCIe synchronous firmware configuration at the same time, achieving the compatibility between the PCIe SSD and the NTB, extending the communication distance, and having strong compatibility and flexibility.

[0099] The descriptions of the processes or structures corresponding to the above-mentioned various drawings each have their own focuses. For the parts not detailed in a certain process or structure, reference can be made to the relevant descriptions of other processes or structures.

[0100] The above embodiments are only illustrative of the principles and effects of the present application, rather than limiting the present application. Any person familiar with this technology can modify or change the above embodiments without departing from the spirit and scope of the present application. Therefore, all equivalent modifications or changes completed by those with ordinary knowledge in the technical field without departing from the spirit and technical idea disclosed by the present application should still be covered by the claims of the present application.

Claims

1. A firmware configuration method for a Retimer chip, characterized in that: The method comprises: Obtain storage in place signal and storage node authentication signal; Based on the storage in place signal and the storage node authentication signal, the BMC writes a corresponding firmware configuration to the Retimer chip; and The CPU configuration and the communication link of the storage node are changed based on the storage-in-place signal, so that the CPU configuration and the communication link are adapted to the firmware configuration of the Retimer chip.

2. The firmware configuration method of the Retimer chip according to claim 1, characterized in that: When no external storage device is connected, causing the BMC to write the NTB firmware configuration to the Retimer chip based on the storage in place signal; and Based on the node authentication signal, the BMC writes the NTB firmware configuration of the first storage node or the NTB firmware configuration of the second storage node into the Retimer chip.

3. The firmware configuration method of the Retimer chip according to claim 1, characterized in that: When an external storage device is connected, based on the storage in place signal, the BMC writes NTB and PCIe synchronization firmware configuration to the Retimer chip; and Based on the node authentication signal, the BMC writes the NTB and PCIe synchronization firmware configuration of the first storage node or the NTB and PCIe synchronization firmware configuration of the second storage node into the Retimer chip.

4. The firmware configuration method of the Retimer chip according to claim 2, characterized in that: When the external storage device is not connected, the CPU configuration is changed to the NTB configuration based on the storage in place signal, so that the CPU configuration adapts to the NTB firmware configuration of the Retimer chip.

5. The firmware configuration method of the Retimer chip according to claim 3, characterized in that: When the external storage device is connected, the CPU configuration is changed to the NTB and PCIe configuration based on the storage in place signal, so that the CPU configuration adapts to the NTB and PCIe synchronization firmware configuration of the Retimer chip.

6. The firmware configuration method of the Retimer chip according to claim 2, characterized in that: When the external storage device is not connected, the communication link switching chip switches the communication link to the NTB path based on the communication link switching signal, so that the communication link adapts to the NTB firmware configuration of the Retimer chip.

7. The firmware configuration method of the Retimer chip according to claim 3, characterized in that: When the external storage device is connected, the communication link switching chip switches the communication link to a PCIe path based on a communication link switching signal, so that the communication link adapts to the NTB and PCIe synchronization firmware configuration of the Retimer chip.

8. A firmware configuration system for a Retimer chip, characterized in that: The system comprises: An acquisition module, used to acquire a storage-in-place signal and a storage node authentication signal; a writing module, configured to enable the BMC to write a corresponding firmware configuration to the Retimer chip based on the storage-in-place signal and the storage node authentication signal; and The configuration module is used to change the CPU configuration and the communication link of the storage node based on the storage-in-place signal, so that the CPU configuration and the communication link are adapted to the firmware configuration of the Retimer chip.

9. An electronic device, characterized in that: include: Processor and memory; The memory is used to store a computer program, the processor is communicatively connected to the memory, and the processor is used to execute the computer program stored in the memory to execute the firmware configuration method of the Retimer chip according to any one of claims 1 to 7.

10. A computer-readable storage medium having a computer program stored thereon, characterized in that: When the computer program is executed by a processor, the firmware configuration method of the Retimer chip according to any one of claims 1 to 7 is implemented.

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