Display device and electronic substrate
By integrating the unit circuit of the memristor and transistor on the electronic substrate, using the resistive state of the memristor to repair defects, the problems of traditional laser repair time and the difficulty of repairing small pixel substrates are solved, and efficient and accurate defect repair is achieved.
Patent Information
- Application Number
- CN202311781774.8
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- Filing Date
- 2023-12-22
- Publication Date
- 2025-06-27
AI Technical Summary
Traditional laser repairs defects in thin film transistors for a long time, and when the substrate pixels are reduced, repair difficulties increase, making it difficult to effectively solve defect problems.
By integrating a unit circuit combining a memristor and a transistor on the electronic substrate, the failed unit circuit is repaired by changing the resistance state of the memristor, and automatic repair of defects is achieved.
This method greatly saves detection and repair time, improves repair efficiency and accuracy on small pixel substrates, and reduces the complexity of defect repair.
Smart Images
Figure CN120224784A_ABST
Abstract
Description
Technical Field
[0001] The present invention relates to a display device and an electronic substrate. Background Art
[0002] When the thin film transistor array process on the substrate is completed, an array detection system is used to detect whether each thin film transistor has a defect. The traditional way to repair the defects of thin film transistors is to use laser repair. However, laser repair takes a relatively long time. In addition, when the pixels of the substrate become smaller, the difficulty of repair will also increase accordingly. Summary of the Invention
[0003] An object of the present invention is to provide a display device and an electronic substrate.
[0004] The present invention provides an electronic substrate, which includes a substrate, and a plurality of data lines, a plurality of scan lines, and a plurality of unit circuits disposed on the substrate. The plurality of unit circuits are defined by the intersection of the plurality of data lines and the plurality of scan lines. One of the plurality of unit circuits includes a transistor and a memristor disposed on the substrate. The memristor overlaps a part of the transistor.
[0005] The present invention provides a display device, which includes an electronic substrate and a display medium. The electronic substrate includes a substrate, and a plurality of data lines, a plurality of scan lines, and a plurality of unit circuits disposed on the substrate. The plurality of unit circuits are defined by the intersection of the plurality of data lines and the plurality of scan lines. One of the plurality of unit circuits includes a transistor and a memristor disposed on the substrate. The memristor overlaps a part of the transistor. The display medium is disposed on the electronic substrate, wherein the electronic substrate controls the state of the display medium by changing the voltage of the display medium to display an image. Brief Description of the Drawings
[0006] Figure 1 is a schematic diagram of an electronic substrate according to an embodiment of the present invention and a partial enlarged view thereof.
[0007] Figure 2 is a partial cross-sectional view of a display device including the Figure 1 electronic substrate according to an embodiment of the present invention.
[0008] Figure 3 is Figure 1 a partial cross-sectional view of the electronic substrate in
[0009] Figure 4 is Figure 1 the equivalent circuit diagram of the unit circuit in
[0010] Figure 5 is a partial cross-sectional view of an electronic substrate according to another embodiment of the present invention.
[0011] Figure 6Yes Figure 5 The equivalent circuit diagram of a unit circuit of an electronic substrate in
[0012] Figure 7 is the partial wiring diagram of the electronic substrate of another embodiment of the present invention.
[0013] Figure 8 Yes Figure 7 The partial sectional view of the electronic substrate along the section of A - B - A' in
[0014] Figure 9 is the partial sectional view of the electronic substrate of another embodiment of the present invention.
[0015] Figure 10 is the partial sectional view of the electronic substrate of another embodiment of the present invention.
[0016] Figure 11 is the partial sectional view of the electronic substrate of another embodiment of the present invention.
[0017] Figure 12 is the flowchart for detecting the electronic substrate of an embodiment of the present invention Figure 1 of
[0018] Figure 13 is the flowchart for detecting the electronic substrate of another embodiment of the present invention Figure 1 of
[0019] Explanation of reference numerals: 1 - display device; 10, 10B, 10C, 10C, 10D, 10E, 10F - electronic substrate; 12 - substrate; 14 - pixel electrode; 20 - scan line; 30 - data line; 40 - read line; 50 - display medium; 100, 100B - unit circuit; 150 - memristor; 211 - metal component; 212 - insulating layer; 213 - semiconductor; 214 - insulating layer; 216 - insulating layer; 217 - semiconductor; 218 - insulating layer; 219 - metal component; 220 - insulating layer; 222 - metal component; 224 - metal component; 226 - metal component; 228 - metal component; 229 - lightly doped region; 230 - semiconductor; 232 - metal component; 1100, 1200 - method; A, B, A' - points; C LC 、C ST - capacitor; L1 - width; H0, H1, H2 - vias; M0, M1, M2 - metal layers; Q - transistor; R - voltage - dividing resistor; S110 to S150, S210 to S260 - steps; Vcom - common electrode; VD - data voltage; VR - read voltage; VS - scan voltage; X, Y, Z - directions. Detailed implementation manners
[0020] The present invention can be understood by referring to the following detailed description and in conjunction with the accompanying drawings. It should be noted that, for the convenience of the reader's understanding and the simplicity of the drawings, only a part of the electronic device is shown in the multiple drawings of the present invention, and the specific elements in the drawings are not drawn in actual proportion. In addition, the number and size of each element in the drawings are only for illustration and are not used to limit the scope of the present invention.
[0021] Throughout the specification of the present invention and the appended claims, certain terms will be used to refer to specific elements. Those of ordinary skill in the art should understand that electronic device manufacturers may refer to the same element by different names. The present invention is not intended to distinguish between elements that have the same function but different names.
[0022] In the specification and claims of the present invention, terms such as "comprising", "containing", "having", etc. are open-ended terms, and thus should be interpreted as meaning "including but not limited to...". Therefore, when the description of the present invention uses the terms "comprising", "containing", and / or "having", it specifies the existence of the corresponding features, regions, steps, operations, and / or components, but does not exclude the existence of one or more corresponding features, regions, steps, operations, and / or components.
[0023] The directional terms mentioned in the present invention, such as "upper", "lower", "front", "rear", "left", "right", etc., are only with reference to the directions in the drawings. Therefore, the directional terms used are for illustration and not for limiting the present invention. In the drawings, each drawing shows the general characteristics of the methods, structures, and / or materials used in specific embodiments. However, these drawings should not be construed as defining or limiting the scope or nature covered by these embodiments. For example, for clarity, the relative dimensions, thicknesses, and positions of each film layer, region, and / or structure may be reduced or enlarged.
[0024] When a corresponding component (such as a film layer or a region) is referred to as "on another component", it can be directly on the other component, or there may be other components between the two. On the other hand, when a component is referred to as "directly on another component", there are no components between the two. In addition, when a component is referred to as "on another component", there is an up-and-down relationship between the two in the vertical direction, and this component can be above or below the other component, and this up-and-down relationship depends on the orientation of the device.
[0025] It should be understood that when a component or film layer is referred to as "connected to" another component or film layer, it can be directly connected to this other component or film layer, or there are intervening components or film layers between the two. When a component is referred to as "directly connected to" another component or film layer, there are no intervening components or film layers between the two. Additionally, when a component is referred to as "coupled to another component (or its variant)", it can be directly connected to this other component or indirectly connected (e.g., electrically connected) to this other component through one or more components.
[0026] In the present invention, when a component is "electrically connected" to another component, an electrical signal can flow between the two components at at least one moment during normal operation; when a component is "coupled" to another component, an electrical signal can flow between the two components within the specified time. In the present invention, when a component is "disconnected" from another component, an electrical signal cannot flow between the two components within the specified time.
[0027] It should be understood that in the specification and claims of the present invention, the term "horizontal direction" refers to a direction parallel to the horizontal plane, the term "horizontal plane" refers to a surface parallel to the directions X and Y in the drawings, the term "vertical direction" refers to a direction parallel to the direction Z in the drawings, and the directions X, Y, and Z are perpendicular to each other. In the specification and claims, the term "top view" refers to the viewing result when viewed along the vertical direction.
[0028] It should be understood that in the specification and claims, the term "overlap" means the overlap of two components in the Z direction, and in the absence of specification, the term "overlap" includes partial overlap or complete overlap.
[0029] The term "approximate" or "about" is generally interpreted as within a range of plus or minus 10% of the given value, or within a range of plus or minus 5%, plus or minus 3%, plus or minus 2%, plus or minus 1%, or plus or minus 0.5% of the given value.
[0030] The ordinal numbers used in the specification and claims of the present invention, such as "first", "second", etc., are used to modify elements, and they do not imply or represent any previous ordinal numbers for the said (or these) elements, nor do they represent the order of one element and another element, or the order in the manufacturing method. The use of these ordinal numbers is only to clearly distinguish an element with a certain name from another element with the same name. The same terms may not be used in the claims and the specification. Accordingly, the first component in the specification may be the second component in the claims.
[0031] It should be noted that, without departing from the spirit of the present invention, the features in several different embodiments can be replaced, recombined, and mixed to complete other embodiments. As long as the features between the embodiments do not violate the spirit of the invention or conflict with each other, they can be arbitrarily mixed and used.
[0032] In the present invention, the electronic device may include a display device, a light-emitting device, an antenna device, a sensing device, a splicing device, or any combination thereof, but not limited thereto. The display device may be a non-self-luminous display or a self-luminous display according to requirements, and may be a color display or a monochrome display according to requirements. The antenna device may be a liquid crystal type antenna device or a non-liquid crystal type antenna device. The sensing device may be a sensing device for sensing capacitance, light, heat energy, or ultrasonic waves. The splicing device may be a display splicing device or an antenna splicing device, but not limited thereto. The electronic components in the electronic device may include passive components and active components, such as capacitors, resistors, inductors, diodes, transistors, etc. The diode may include a light emitting diode (LED) or a photodiode. The light emitting diode may include, for example, an organic light emitting diode (OLED), a mini light emitting diode (mini LED), a micro light emitting diode (micro LED), or a quantum dot light emitting diode (quantum dot LED), but not limited thereto. The transistor may include, for example, a top gate thin film transistor, a bottom gate thin film transistor, or a dual gate thin film transistor, but not limited thereto. The electronic device may also include a fluorescence material, a phosphor material, a quantum dot (QD) material, or other suitable materials according to requirements, but not limited thereto. The electronic device may have peripheral systems such as a driving system, a control system, a light source system, etc. to support the devices and components in the electronic device.
[0033] In some embodiments, the electronic substrate may be a type of electronic device, and the electronic substrate may be at least a combination of a display device and a touch sensing device, so that the electronic substrate has at least a display function and a touch sensing function. Hereinafter, the present invention will be described by taking the electronic substrate as an example, but the design of the present invention can be applied to any suitable electronic device.
[0034] Please refer to Figure 1 , Figure 1Schematic diagram and partial enlarged view of an electronic substrate 10 according to an embodiment of the present invention. The electronic substrate 10 includes a substrate 12, and a plurality of scan lines 20, a plurality of data lines 30, and a plurality of unit circuits 100 disposed on the substrate 12. The substrate 12 can be rigid or flexible, and the substrate 12 can correspondingly include suitable materials according to its type. For example, the substrate 12 can include glass, quartz, ceramic, sapphire, polymer (such as, polyimide (PI), polyethylene terephthalate (PET)), other suitable materials, or a combination thereof. The plurality of unit circuits 100 are defined by the intersection of the plurality of scan lines 20 and the plurality of data lines 30.
[0035] In the present invention, the electronic substrate 10 can include at least one conductive layer, at least one insulating layer, at least one semiconductor layer, or a combination thereof. These film layers are disposed on the substrate 10 to form electronic components in the electronic substrate 10. Examples of the material of the conductive layer can include metal, transparent conductive material (such as indium tin oxide (ITO), indium zinc oxide (IZO), etc.), other suitable conductive materials, or a combination thereof. Examples of the material of the insulating layer can include silicon oxide (SiO x ), silicon nitride (SiN y ), silicon oxynitride (SiO x N y ), organic insulating material (such as, photosensitive resin), other suitable insulating materials, or a combination thereof. Examples of the material of the semiconductor layer can include poly-silicon, amorphous silicon, metal-oxide semiconductor, other suitable semiconductor materials, or a combination thereof, but not limited thereto.
[0036] In some embodiments, each unit circuit 100 can be, for example, a sub-pixel, but not limited thereto. The unit circuit 100 can include a transistor Q, a capacitor C LC and a capacitor C ST . The gate of the transistor Q can be coupled to the scan line 20, the first end of the transistor Q can be coupled to the data line 30, and the second end of the transistor Q can be electrically connected to the capacitor C LC and the capacitor C ST . The capacitor C LC can be, for example, a liquid crystal capacitor, and the capacitor C ST can be, for example, a storage capacitor, but not limited thereto. One end of the capacitor C LC and the capacitor C ST is coupled to a common electrode Vcom. The common electrode Vcom can be 0 volts, but not limited thereto.
[0037] One of the multiple unit circuits 100 may further include a memristor 150 disposed on the substrate 12. In this embodiment, the memristor 150 is coupled to the gate of the transistor Q. In other embodiments of the present invention, the memristor 150 is coupled to the drain of the transistor Q. The resistance value (or resistance state) of the memristor 150 can be changed by changing the voltage across its two ends. The semiconductor in the memristor 150 may include at least two different resistance states, and each resistance state corresponds to a different voltage difference across the two ends of the memristor 150. When the manufacturing process of the transistor Q on the substrate 12 is completed, an array detection system can be used to detect whether each transistor Q has a defect. When it is detected that the unit circuit 100 fails due to a defect in the transistor Q, the unit circuit 100 can be repaired by changing the resistance value of the memristor 150 in the unit circuit 100. In some embodiments, the bias voltage of the transistor Q in the unit circuit 100 can be adjusted by adjusting the resistance value of the memristor 150. Since the memristor 150 is a type of memory and the unit circuit 100 can be a sub-pixel, the technology of the present invention is a Memory in Pixel (MIP) technology.
[0038] Please refer to Figure 2 , Figure 2 which is a partial cross-sectional view of the display device 1 including Figure 1 the electronic substrate 10 in an embodiment of the present invention. The display device 1 includes an electronic substrate 10 and a display medium 50. The display medium 50 is disposed on the electronic substrate 10, and the electronic substrate 10 controls the state of the display medium 50 by changing the voltage of the display medium 50, so that the display device 1 displays an image. The display medium 50 is, for example, liquid crystal. And the above-mentioned change in the voltage of the display medium 50 is, for example, changing the voltage difference between the pixel electrode 14 and the common electrode Vcom of the display device 1. In some embodiments, the drain of the transistor Q is electrically connected to the pixel electrode 14 (not shown), so that the data signal provided by the data line 30 is transmitted to the pixel electrode 14 to control the state of the display medium 50 in the sub-pixel region. In one embodiment, the drain of the transistor Q and the pixel electrode 14 may be in direct contact. In another embodiment, the drain of the transistor Q and the pixel electrode 14 may be electrically connected through a transfer conductive element, but this is not limiting.
[0039] Please refer to Figure 3 and Figure 4 , Figure 3 which is Figure 1 a partial cross-sectional view of the electronic substrate 10 in Figure 4 which is Figure 1 the equivalent circuit diagram of the unit circuit 100 in LC capacitor C STand the memristor 150. The electronic substrate 10 may include Figure 3 the base material 12, the insulating layer 212, the insulating layer 214, the insulating layer 216, the insulating layer 218, the insulating layer 220, the semiconductor 213, the metal component 226, the metal component 228, the semiconductor 230, the metal component 222, the metal component 224, and the metal component 232 in Figure 3 . The materials of the insulating layers 212, 214, 216, 218, and 220 may be all the same, all different, or the materials of some of the insulating layers are the same while the materials of other insulating layers are different. For example, the materials of the insulating layers may include silicon nitride (SiN x ), silicon oxide (SiO x ), silicon oxynitride (SiO x N y ), epoxy resin, acrylic, bismaleimide, polyimide, or a combination of the foregoing, but not limited thereto. In one embodiment, the material of the insulating layer 212 is silicon nitride (SiN x ), and the materials of the insulating layers 214, 216, and 218 are silicon oxide (SiO x)。The materials of the metal components 222, 224, 226, 228, and 232 may all be the same, all be different, or some of the metal components may have the same material while others have different materials. The materials of the metal components may, for example, include copper (Cu), aluminum (Al), indium (In), ruthenium (Ru), tin (Sn), gold (Au), platinum (Pt), molybdenum (Mo), zinc (Zn), silver (Ag), titanium (Ti), lead (Pb), nickel (Ni), neodymium (Nd), iridium (Ir), chromium (Cr), magnesium (Mg), palladium (Pd), lithium (Li), calcium (Ca), alloys of the foregoing metals, other suitable metal materials, or combinations of the foregoing, but are not limited thereto. In one embodiment, the gate of the transistor Q may be the metal components 226 and 228 with the same material, and the metal components 226 and 228 may be formed through dry etching and wet etching processes respectively, but the present invention is not limited thereto. In some embodiments, the gate of the transistor Q may include the metal component 228 but not the metal component 226. In one embodiment, the metal components 222, 224, and 226 may be formed by etching the same metal layer. The metal component 222 may be the drain of the transistor Q, the metal component 224 may be the source of the transistor Q, and the semiconductor 213 may be the channel of the transistor Q. In addition, the memristor 150 may include the metal component 228, the semiconductor 230, and the metal component 232. At least a part of the memristor 150 overlaps with the transistor Q in the Z direction, the semiconductors 213 and 230 at least partially overlap in the Z direction, and the width of the semiconductor 213 is greater than the width of the semiconductor 230. The materials of the semiconductors 213 and 230 may be the same or different, and the materials may include indium tin oxide (ITO), antimony zinc oxide (AZO), tin oxide (SnO), zinc oxide (ZnO), indium zinc oxide (IZO), indium gallium zinc oxide (IGZO), indium tin zinc oxide (ITZO), antimony tin oxide (ATO), or combinations of the foregoing, but are not limited thereto.
[0040] Please refer to Figure 4When the transistor Q is defective and causes the unit circuit 100 to malfunction, a suitable scanning voltage VS can be applied to one end of the memristor 150 through the scanning line 20 to change the resistance state of the memristor 150. Among them, the suitable scanning voltage VS can be between 1 volt and 7 volts. After the resistance state of the memristor 150 is changed (for example: from a low resistance state to a high resistance state), the scanning signal transmitted from the electronic substrate 10 to the scanning line 20 cannot pass through the high-resistance memristor 150 and be transmitted to the gate of the transistor Q, thereby reducing the malfunction of the defective transistor Q. In another embodiment, one end of the memristor 150 is coupled to the voltage-dividing resistor R, and the other end of the memristor 150 is coupled to the read line 40 and the scanning line 20. The voltage-dividing resistor R has a fixed resistance value. When it is necessary to determine the resistance state of the memristor 150, a read voltage VR can be applied to the read line 40 coupled to one end of the memristor 150. Then, the resistance state of the memristor 150 can be determined through the voltage at the contact point between the memristor 150 and the voltage-dividing resistor R. For example, when the read voltage VR is 5 volts, when the memristor 150 is in the low resistance state, the voltage at the contact point between the memristor 150 and the voltage-dividing resistor R will approach 5 volts; when the memristor 150 is in the high resistance state, the voltage at the contact point between the memristor 150 and the voltage-dividing resistor R will approach 0 volts.
[0041] Please refer to Figure 5 and Figure 6 , Figure 5 is a partial cross-sectional view of the electronic substrate 10B according to another embodiment of the present invention. Figure 6 is Figure 5 an equivalent circuit diagram of a unit circuit 100B of the electronic substrate 10B in Figure 3 . The difference between the electronic substrate 10B and the ST electronic substrate 10 in LC is that one of the metal components of the memristor 150 in the electronic substrate 10B is the drain of the transistor Q (i.e., the metal component 222). One end of the memristor 150 is coupled to the voltage-dividing resistor R, the capacitor C ST and the capacitor C LC , and the other end of the memristor 150 is coupled to the read line 40. When the transistor Q is defective, a suitable read voltage VR can be applied to one end of the memristor 150 through the read line 40 to change the resistance state of the memristor 150. Among them, the suitable read voltage VR can be between 1 volt and 7 volts. After the resistance state of the memristor 150 is changed (for example: from a low resistance state to a high resistance state), the data voltage VD transmitted from the electronic substrate 10B to the data line 30 cannot pass through the high-resistance memristor 150 and be transmitted to the capacitor CST and the capacitor CLC, thereby reducing the malfunction of the defective transistor Q. When it is necessary to determine the resistance state of the memristor 150, a read voltage VR can be applied to the read line 40. Then, the resistance state of the memristor 150 can be determined through the voltage at the contact point between the memristor 150 and the voltage-dividing resistor R.
[0042] Please refer to Figure 7 and Figure 8 , Figure 7 is a partial wiring diagram of the electronic substrate 10C according to another embodiment of the present invention, and Figure 8 is Figure 7 a partial cross-sectional view of the electronic substrate 10C along the A-B-A' section in. In this embodiment, the transistor Q of the unit circuit in the electronic substrate 10C is a dual gate thin film transistor. Figure 7 The wiring shown includes the wiring and relative positions of the metal layer M0, the metal layer M1, the metal layer M2, the through hole H0, the through hole H1, and the through hole H2. The circuit unit in the electronic substrate 10C may include the transistor Q, the memristor 150, and the capacitor C as described above LC and the capacitor C ST . The electronic substrate 10C may include a substrate 12, an insulating layer 212, an insulating layer 214, an insulating layer 215, an insulating layer 216, an insulating layer 218, an insulating layer 220, a semiconductor 213, a semiconductor 217, a metal component 219, a metal component 226, a metal component 228, a doped region 229, a metal component 222, and a metal component 224. Among them, the metal component 222 and the metal component 224 are located in the metal layer M2, the metal component 228 is located in the metal layer M1, and the metal component 219 is located in the metal layer M0. The metal component 224 is coupled to the doped region 229 through the through hole H0, the metal component 228 is coupled to the metal component 219 through the through hole H1, and the metal component 222 is coupled to the semiconductor 217 through the through hole H2. Furthermore, the top gate electrode of the transistor Q may be the metal components 226 and 228 with the same material, and the metal components 226 and 228 may be formed through dry etching and wet etching processes respectively, but the present invention is not limited thereto. The metal component 219 may be the bottom gate electrode of the transistor Q, the metal component 228 may be the metal component 224 of the transistor Q, the metal component 224 may be the source of the transistor Q, and the metal component 222 may be the drain of the transistor Q. In addition, the memristor 150 of the unit circuit in the electronic substrate 10C may include the metal component 222, the semiconductor 217, and the metal component 219. In other words, the metal component 219 may be a part of the memristor 150 or the bottom gate electrode of the transistor Q. As for the equivalent circuit of the unit circuit in the electronic substrate 10C, it may be consistent with Figure 4 the equivalent circuit of the unit circuit 100 in.
[0043] Please refer to Figure 9 , Figure 9It is a partial cross-sectional view of an electronic substrate 10D according to another embodiment of the present invention. The transistor Q of the unit circuit in the electronic substrate 10D is a dual gate thin film transistor. The electronic substrate 10D may include a substrate 12, an insulating layer 212, an insulating layer 214, a metal component 211, an insulating layer 216, an insulating layer 218, an insulating layer 220, a semiconductor 213, a metal component 226, a metal component 228, a doped region 229, a semiconductor 230, a metal component 222, a metal component 232, and a metal component 224. The metal component 228 may be the top gate of the transistor Q, the metal component 211 may be the bottom gate of the transistor Q, the metal component 224 may be the source of the transistor Q, and the metal component 222 may be the drain of the transistor Q. In addition, the metal component 232, the semiconductor 230, and the metal component 222. The memristor 150 of the unit circuit in the electronic substrate 10D includes the metal component 232, the semiconductor 230, and the metal component 222. In other words, the metal component 222 may be part of the memristor 150 or the drain of the transistor Q. As for the equivalent circuit of the unit circuit in the electronic substrate 10D, it may be consistent with the equivalent circuit of the unit circuit 100B in Figure 6 The equivalent circuit of the unit circuit 100B in
[0044] Please refer to Figure 10 , Figure 10 It is a partial cross-sectional view of an electronic substrate 10E according to another embodiment of the present invention. The transistor Q of the unit circuit in the electronic substrate 10E is a bottom gate thin film transistor. In this embodiment, the electronic substrate 10E may include a substrate 12, an insulating layer 212, an insulating layer 214, a metal component 211, a semiconductor 213, a metal component 222, a semiconductor 230, a metal component 232, and a metal component 224. Among them, the semiconductor 230 is disposed between the metal component 211 and the metal component 232. In addition, the metal component 211 may be the gate of the transistor Q, the metal component 224 may be the source of the transistor Q, and the metal component 222 may be the drain of the transistor Q. The memristor 150 of the unit circuit in the electronic substrate 10E includes the metal component 232, the semiconductor 230, and the metal component 211. In other words, the metal component 211 may be both part of the memristor 150 and the gate of the transistor Q. As for the equivalent circuit of the unit circuit in the electronic substrate 10E, it may be consistent with the equivalent circuit of the unit circuit 100 in Figure 4 The equivalent circuit of the unit circuit 100 in
[0045] Please refer to Figure 11 , Figure 11is a partial cross-sectional view of an electronic substrate 10F according to another embodiment of the present invention. The transistor Q of the unit circuit in the electronic substrate 10F is a bottom-gate thin-film transistor. The electronic substrate 10F may include a substrate 12, an insulating layer 212, an insulating layer 214, a metal component 211, a semiconductor 213, a metal component 222, a semiconductor 230, a metal component 232, and a metal component 224. Among them, the semiconductor 230 is disposed between the metal component 232 and the metal component 222. In addition, the metal component 211 may be the gate of the transistor Q, the metal component 224 may be the source of the transistor Q, and the metal component 222 may be the drain of the transistor Q. The memristor 150 of the unit circuit in the electronic substrate 10F may include the metal component 232, the semiconductor 230, and the metal component 222. In other words, the metal component 222 may be a part of the memristor 150 or the drain of the transistor Q. As for the equivalent circuit of the unit circuit in the electronic substrate 10F, it may be consistent with Figure 6 the equivalent circuit of the unit circuit 100B in
[0046] Please refer to Figure 12 , Figure 12 is a flowchart of a method 1100 for detecting an Figure 1 electronic substrate 10 according to an embodiment of the present invention. The method 1100 includes the following steps:
[0047] Step S110: Perform a circuit test on the electronic substrate 10;
[0048] Step S120: Record the coordinates of the failed unit circuit 100;
[0049] Step S130: Generate a control signal according to the coordinates of the failed unit circuit 100 to change the resistance state of the corresponding memristor 150;
[0050] Step S140: Pair the color filter with the electronic substrate 10; and
[0051] Step S150: Perform a lighting detection on the electronic substrate 10.
[0052] Please refer to Figure 13 , Figure 13 is a flowchart of a method 1200 for detecting an Figure 1 electronic substrate according to an embodiment of the present invention. The method 1200 includes the following steps:
[0053] Step S210: Perform a circuit test on the electronic substrate 10;
[0054] Step S220: Record the information of the transistor Q (for example: the voltage-current curve of the transistor Q, the coordinates of the transistor Q, whether the transistor Q corresponds to a bright point, etc.);
[0055] Step S230: Generate appropriate control signals;
[0056] Step S240: Provide control signals to transistor Q according to the coordinates of transistor Q;
[0057] Step S250: For the group of color filters and the electronic substrate 10; and
[0058] Step S260: Detection of the lighting of the electronic substrate 10.
[0059] The present invention combines a memristor with the unit circuit of a display device. By changing the resistance state of the memristor, the operation of repairing a failed unit circuit can be performed. In addition, according to the circuit characteristics of each unit circuit, it can be determined whether to repair the unit circuit through the corresponding memristor. Therefore, the time required for detecting and repairing the electronic substrate of the display device can be greatly saved.
[0060] The above are only embodiments of the present invention and are not intended to limit the present invention. For those of ordinary skill in the art, the present invention can have various modifications and changes. Any modifications, equivalent replacements, improvements, etc. made within the spirit and principle of the present invention shall be included within the protection scope of the present invention.
Claims
1. An electronic substrate, characterized in that, The electronic substrate includes: a base material; a plurality of data lines disposed on the base material; a plurality of scan lines disposed on the base material; and a plurality of unit circuits disposed on the base material and defined by the intersection of the plurality of data lines and the plurality of scan lines, wherein one of the plurality of unit circuits includes: a transistor disposed on the base material; and a memristor disposed on the transistor and overlapping a part of the transistor.
2. The electronic substrate according to claim 1, wherein The memristor includes a first metal component, a first semiconductor, and a second metal component, and the first semiconductor is disposed between the first metal component and the second metal component.
3. The electronic substrate according to claim 2, characterized in that, When there is a first voltage difference between the first metal component and the second metal component, the first semiconductor exhibits a first resistance state; and wherein when there is a second voltage difference different from the first voltage difference between the first metal component and the second metal component, the first semiconductor exhibits a second resistance state different from the first resistance state.
4. The electronic substrate according to claim 2, characterized in that, The transistor includes a second semiconductor and a gate, and the gate is disposed on the second semiconductor and is the first metal component of the memristor.
5. The electronic substrate according to claim 4, characterized in that, The first semiconductor and the second semiconductor overlap at least partially.
6. The electronic substrate according to claim 4, characterized in that, The width of the second semiconductor is greater than the width of the first semiconductor.
7. The electronic substrate according to claim 2, wherein, The transistor includes a second semiconductor and a drain, and the drain is disposed on the second semiconductor and is the first metal component of the memristor.
8. The electronic substrate according to claim 7, characterized in that, The first semiconductor and the second semiconductor overlap at least partially.
9. The electronic substrate according to claim 7, characterized in that, The width of the second semiconductor is greater than the width of the first semiconductor.
10. A display device, characterized in that, The display device includes: an electronic substrate, including: a base material; a plurality of data lines disposed on the base material; a plurality of scan lines disposed on the base material; a plurality of unit circuits disposed on the base material and defined by the intersection of the plurality of data lines and the plurality of scan lines, wherein one of the plurality of unit circuits includes: a transistor disposed on the base material; and a memristor disposed on the transistor and overlapping a part of the transistor; and a display medium disposed on the electronic substrate, wherein the electronic substrate controls the state of the display medium by changing the voltage of the display medium to display an image.