Oscillator feedthrough calibration

Abstract

An apparatus for oscillator feedthrough calibration is disclosed, such as a component arrangement that can be calibrated to account for signal leakage from an oscillator coupled to a mixer circuit. In an example aspect, the apparatus includes a mixer circuit having a first stage, a second stage, and a tuning circuit. The first stage includes at least one transistor coupled between the mixer input and the mixer output. The second stage includes one or more transistors coupled between the at least one transistor of the first stage and the mixer output. The one or more transistors are also coupled between a local oscillator signal input and the mixer output. The tuning circuit includes at least one current source coupled to the at least one transistor of the first stage.

Description

Technical Field

[0001] The present disclosure generally relates to signal communication or signal processing using an electronic device, and more particularly to circuit calibration for canceling signal feedthrough from an oscillator coupled to a mixer circuit. Background Art

[0002] Electronic devices include conventional computing devices such as desktop computers, laptop computers, smart phones, wearable devices such as smart watches, Internet servers, etc. Electronic devices also include other types of computing devices such as personal voice assistants (e.g., smart speakers), wireless access points or routers, thermostats and other automation controllers, robots, automotive electronics, devices embedded in other machines such as refrigerators and industrial tools, Internet of Things (IoT) devices, medical devices, etc. These different electronic devices provide services related to productivity, communication, social interaction, security, health and safety, remote management, entertainment, transportation, and information dissemination. Thus, electronic devices play a crucial role in modern society.

[0003] In today's interconnected world, many of the services provided by electronic devices rely at least in part on electronic communication. Electronic communication can include, for example, those communications that are exchanged between two or more electronic devices using wireless signals or wired signals transmitted over one or more networks such as the Internet, a network or a cellular network. Thus, electronic communication can include wireless transmission and reception or wired transmission and reception. To send and receive communications, an electronic device can use a transceiver, such as a wireless transceiver designed for wireless communication.

[0004] Thus, some electronic communications can be achieved by propagating signals between two wireless transceivers at two different electronic devices. For example, using a wireless transmitter, a smart phone can send a wireless signal (as part of an uplink communication) to a base station via air to support mobile services. Using a wireless receiver, a smart phone can receive a wireless signal (as part of a downlink communication) sent from the base station via the air medium to enable mobile services. In the case of a smart phone, for example, mobile services can include making voice and video calls, participating in social media interactions, sending messages, watching movies, sharing videos, performing searches, using map information or navigation instructions, finding friends, participating in location-based services generally, transferring money, obtaining another service such as a car ride, etc.

[0005] Many mobile services and other communication-based services rely at least in part on the transmission or reception of wireless signals between two or more electronic devices. Thus, researchers, electrical engineers, and other designers of electronic devices strive to develop wireless transceivers that can effectively use wireless signals to provide these and other mobile services. SUMMARY OF THE INVENTION

[0006] Local oscillator feedthrough (LOFT) refers to oscillator signals that "leak" into a communication chain through a mixer and have an adverse effect on downstream signals. This document describes devices and techniques for canceling such oscillator signal leaks. To transmit or receive wireless signals, a wireless interface device may include a communication chain (e.g., a transmit or receive chain) that processes propagated signals. Such processing may require frequency conversion using a mixer. The mixer uses a local oscillator (LO) signal from a local oscillator to convert between frequencies. In the example described, the mixer circuit includes a mixer and a tuning circuit. The tuning circuit applies a calibration signal to the mixer to cancel LOFT. To determine the calibration signal, the mixer may operate without receiving an information-carrying input signal. However, the mixer does receive an LO signal at a specific frequency. A power detector is coupled to a point along the communication chain to detect the power level and provide the power level to a controller circuit. The controller circuit adjusts the tuning circuit based on the detected power level to generate a calibration signal. Since the detected power level is caused by a mixer with an LO signal input but no information-carrying signal input, the detected power level corresponds to LOFT. Thus, the controller circuit adjusts the tuning circuit to minimize or at least reduce the detected power level to cancel LOFT. During operation at the same specific frequency, the tuning circuit applies the calibration signal to the mixer to reduce LOFT. In these ways, LOFT can be reduced without relying on expensive external test equipment, but rather using on-board calibration circuitry. These specific implementations and other specific implementations are described herein.

[0007] In an example aspect, a device for oscillator feedthrough calibration is disclosed. The device includes a mixer circuit having a first stage, a second stage, and a tuning circuit. The first stage includes at least one transistor coupled between a mixer input and a mixer output. The second stage includes one or more transistors coupled between the at least one transistor of the first stage and the mixer output. The one or more transistors are also coupled between a local oscillator signal input and the mixer output. The tuning circuit includes at least one current source coupled to the at least one transistor of the first stage.

[0008] In an example aspect, an apparatus for oscillator feedthrough calibration is disclosed. The apparatus includes: a power detector configured to detect a power level; and a communication chain. The communication chain includes a port, a mixer circuit, and an amplifier. The port is configured to be coupled to an antenna. The mixer circuit includes a mixer and a tuning circuit. The mixer is configured to combine a local oscillator signal and an input signal to generate an output signal. The tuning circuit is coupled between the mixer and the power detector. The tuning circuit is configured to adjust the output signal based on the power level. The amplifier is coupled between the mixer circuit and the port. The power detector is coupled to the communication chain between the amplifier and the port.

[0009] In an example aspect, a method for mixer calibration is disclosed. The method includes operating a mixer to generate an output signal based on an input signal and a local oscillator signal. The method further includes propagating the output signal through one or more components. The method additionally includes using at least one of the one or more components to adjust the output signal to generate an adjusted signal. The method further includes detecting a power level associated with the adjusted signal to obtain a detected power level. The method further includes calibrating the operation of the mixer based on the detected power level.

[0010] In an example aspect, an apparatus for mixer calibration is disclosed. The apparatus includes means for mixing an input signal and a local oscillator signal to generate an output signal. The apparatus further includes means for propagating the output signal along a communication chain. The apparatus additionally includes means for detecting a power level of the output signal based on the means for propagating. The apparatus further includes means for adjusting the output signal based on the power level to tune the means for mixing to reduce feedthrough of the local oscillator signal.

[0011] In an example aspect, an apparatus for oscillator feedthrough calibration is disclosed. The apparatus includes a mixer circuit having a first stage, a second stage, and a tuning circuit. The first stage includes at least one transistor coupled between a mixer input and a mixer output. The at least one transistor includes a gate terminal and a back gate terminal, wherein the gate terminal of the at least one transistor corresponds to the mixer input. The second stage includes one or more transistors coupled between the at least one transistor of the first stage and the mixer output. The one or more transistors are further coupled between a local oscillator signal input and the mixer output. The tuning circuit includes at least one current source coupled to the back gate terminal of the at least one transistor. Description of the Drawings

[0012] Figure 1Illustrates an environment with an example electronic device having a wireless interface device that includes an example mixer circuit and a corresponding calibration circuit.

[0013] Figure 2 Is a schematic diagram illustrating an example radio frequency (RF) front end and an example transceiver that may each include at least one mixer circuit.

[0014] Figure 3 Is a schematic diagram illustrating an example communication link including a mixer circuit having an associated local oscillator and a corresponding calibration circuit.

[0015] Figure 4 Is a circuit diagram illustrating an example communication link including a mixer circuit having an associated local oscillator and a corresponding calibration circuit.

[0016] Figure 5 Is a schematic diagram illustrating an example mixer circuit including an example mixer and a tuning circuit having multiple stages.

[0017] Figure 6 Is a circuit diagram illustrating an example mixer circuit including an example mixer and an example tuning circuit having multiple stages.

[0018] Figure 7 Is a circuit diagram illustrating another example mixer circuit including an example mixer and an example tuning circuit having multiple stages.

[0019] Figure 8 Is a circuit diagram illustrating an example interaction between a tuning circuit including a current-based digital-to-analog converter (DAC) (IDAC) and a register that holds values determined through a calibration process.

[0020] Figure 9 Is a circuit diagram illustrating an example current source that may use a current mirror architecture to generate an adjustable current.

[0021] Figure 10 Is a flowchart illustrating an example process for performing a calibration process to cancel oscillator signal feedthrough with respect to a mixer circuit. Detailed Description

[0022] Introduction and Overview

[0023] To facilitate the transmission and reception of wireless signals, an electronic device may use a wireless interface device that includes a wireless transceiver and / or a radio frequency (RF) front end. The electronic device communicates using wireless signals by utilizing electromagnetic (EM) signaling at various frequencies that exist on a portion of the electromagnetic (EM) spectrum. These wireless signals can travel between two electronic devices while oscillating at a specific frequency, such as a kilohertz (kHz) frequency, a megahertz (MHz) frequency, or a gigahertz (GHz) frequency. However, the EM spectrum is a limited resource that restricts how many signals can be communicated simultaneously in any given spatial area. There are already billions of electronic devices using this limited resource. To enable a greater number of simultaneous communications using EM signaling, the limited EM spectrum is shared among the electronic devices. For example, frequency division multiplexing (FDM) techniques and / or time division multiplexing (TDM) techniques may be used to share the EM spectrum.

[0024] FDM or TDM techniques may require dividing the EM spectrum into different frequency bands and restricting communication to occur within the designated frequency bands. EM signals in different frequency bands can be communicated simultaneously in the same area without significantly interfering with each other. To transmit a signal within a target frequency band, the transmit chain of the wireless interface device may apply a mixer to the signal to up-convert the relatively lower frequency to reach the target frequency band. To recover the information carried by a signal received within the target frequency band, the receive chain of the wireless interface device may apply a mixer to the received signal to down-convert from the target frequency band to a lower frequency to facilitate further processing.

[0025] To perform frequency conversion, the mixer operates in conjunction with a local oscillator that generates a local oscillator (LO) signal (the LO signal). The mixer "combines" (e.g., multiplies) the input signal with the LO signal to produce an output signal. The input signal carries information, and the output signal continues to carry information after the signal mixing to convert the frequency. The mixer can be configured such that the output signal has a higher frequency than the input signal for frequency up-conversion in the transmit chain as part of processing the signal to be transmitted. Alternatively, the mixer can be configured such that the output signal has a lower frequency than the input signal for frequency down-conversion in the receive chain as part of processing the received signal. The frequency of the output signal depends at least in part on the frequency of the LO signal provided by the local oscillator.

[0026] To provide a purer signal for downstream processing after frequency conversion at a mixer, little LO signal should "leak" through the mixer independently of the information-carrying output signal. Local oscillator feedthrough (LOFT) refers to the LO signal that "leaks" through a mixer into a communication link (e.g., a transmit link or a receive link) and has an adverse effect on downstream signal processing. LOFT can limit the throughput of a system. For example, LOFT can increase the error vector magnitude (EVM) parameter, especially in the case of wideband signaling. The EVM parameter measures how accurately the signal being transmitted or received matches the expected signal in terms of timing, phase, and / or intensity, as represented by a constellation diagram.

[0027] Specifically for transmit operations, LOFT may reduce the effective radiated power (ERP), which is particularly harmful in systems that utilize beamforming. Additionally, for mmW large-scale phased array systems, LOFT is particularly influential because the "leaked" power on the field may potentially add up across the elements of the antenna array. This total "leaked" power may exceed the transmit specification of the 3GPP standard, which may be approximately -13 decibels per meter (dBm) / MHz depending on the range. This transmit constraint results in a relatively strict LOFT specification for each antenna element because each element is scaled down by a factor of 10*log(N), where "N" is the number of large-scale phased array elements that can be turned on simultaneously.

[0028] To further more efficiently utilize the limited EM spectrum, some wireless interface devices implement beamforming. Beamforming focuses transmission or reception in a target direction to facilitate spatial sharing of EM signals and / or increase the available signal range. To implement beamforming, a wireless interface device is coupled to an antenna array having multiple antenna elements. To interface with the multiple antenna elements, the wireless interface device includes multiple communication links. Employing multiple communication links also makes it increasingly difficult to meet the LOFT specification.

[0029] In one approach, an external or additional filter can be used to filter out LO signal leakage, for example, at the output of the power amplifier of a transmit chain. However, this filtering method incurs excessive losses in the generation and transmission of the transmit signal and in the acquisition and processing of the receive signal. These losses limit performance and significantly increase module cost and design complexity. Notably, LOFT is typically generated by mismatches in the transconductance stage of the local oscillator or mixer, and as the process scales down to dozens of nanometers (nm), these mismatches are increasing both in terms of the amount and frequency of occurrence. LOFT can also or alternatively be generated by other components coupled along the communication link.

[0030] In another method, expensive external radio frequency (RF) equipment can be used during manufacturing and testing to perform calibration to counteract LOFT. Additionally, as frequencies increase to utilize more of the limited EM spectrum, signal processing and transmission are reaching millimeter wave (mmW) frequencies. These mmW frequencies can include frequencies above approximately three to eight (3 to 8) gigahertz (GHz), and LOFT can occur at such mmW frequencies. The RF equipment used to capture the spectrum at these frequencies during testing incurs greater production costs and loss of test time.

[0031] For an alternative method, this document describes devices and techniques for canceling LOFT without relying on external equipment to capture RF emissions. Thus, the described devices and techniques can reduce the production cost of wireless interface devices, including those operating at mmW frequencies. To avoid using external RF test equipment, these techniques can be implemented using, for example, a DC probing test procedure with automated test equipment (ATE). Alternatively, these techniques can be employed in factory calibration using a digital test engine (DTE); the DTE solution can avoid ATE production costs but may increase factory calibration time.

[0032] Generally, a mixer circuit of a communication link can use a LO signal from a local oscillator to perform frequency conversion. In an example embodiment, the mixer circuit includes a mixer and a tuning circuit. The tuning circuit applies a calibration signal to the mixer to counteract LOFT, which can propagate along the communication link. To determine the calibration signal, the mixer can operate during a calibration process without receiving an information-carrying input signal (e.g., where the input signal has a substantially zero amplitude). However, the mixer does receive a LO signal from the local oscillator that has a non-zero amplitude at a specific LO frequency.

[0033] A power detector is coupled to a point along the communication link to obtain an indication of a propagated signal that includes at least a portion of the LOFT. The power detector detects the power level of the propagated signal based on the indication and provides the detected power level to a controller circuit. The controller circuit adjusts the tuning circuit based on the detected power level to modify the calibration signal. Since the detected power level is generated from a mixer that receives a positive amplitude LO signal but a zero amplitude information-carrying signal, the detected power level can substantially represent the LOFT. Thus, the controller circuit adjusts the tuning circuit to minimize or at least reduce the detected power level, thereby reducing (if not minimizing) the LOFT. The controller circuit can be implemented with analog or digital circuitry. The controller circuit can establish one or more settings based on a calibration process, such as by storing at least one value in a register.

[0034] During subsequent operations at a particular LO frequency, the tuning circuit applies a calibration signal to the mixer to reduce LOFT based on the established settings (such as by using values stored in a register). For example, the tuning circuit can include at least one current source that can be part of a current-based digital-to-analog converter (IDAC). In some cases, the tuning circuit uses the current source to inject current into the mixer to reduce LOFT. In other cases, the tuning circuit uses the current source to adjust the voltage applied to the back-gate terminal of a transistor in the mixer to reduce LOFT. In these ways, LOFT can be reduced at least using an on-board calibration circuit without relying on expensive external test equipment. These and other embodiments are described herein.

[0035] Description Example

[0036] Figure 1 An example environment 100 is illustrated with an electronic device 102 that has a wireless interface device 120 that includes at least one example mixer circuit 130 and a calibration circuit 138. This document describes example embodiments of the mixer circuit 130 and the corresponding calibration circuit 138, which can be part of a radio frequency front end (RFFE), transceiver, communication processor, etc. of a device. In environment 100, the example electronic device 102 communicates with a base station 104 via a wireless link 106.

[0037] In Figure 1 the electronic device 102 is depicted as a smart phone. However, the electronic device 102 can be implemented as any suitable computing device or other electronic device. Example devices that can be implemented as the electronic device 102 include cellular base stations, broadband routers, access points, cellular or mobile phones, gaming devices, navigation devices, media devices, laptop computers, desktop computers, tablet computers, and server computers. Other examples of devices that can be implemented as the electronic device 102 include network-attached storage (NAS) devices, smart appliances, vehicle-based communication systems, Internet of Things (IoT) devices, sensors or security devices, asset trackers, fitness management devices, wearable devices (such as smart glasses or smart watches), wireless power devices (transmitters or receivers), medical devices, etc. The electronic device 102 can be referred to by different terms, such as user equipment (UE) or customer premise equipment (CPE).

[0038] Base station 104 communicates with electronic device 102 via wireless link 106, which can be implemented as any suitable type of wireless link for carrying communication signals. Although depicted as a base station tower of a cellular radio network, base station 104 can represent or be implemented as another device, such as a satellite, a terrestrial broadcast tower, an access point, a peer device, a mesh network node, a fiber optic line interface, another electronic device substantially as described above, etc. Thus, wireless link 106 can extend between electronic device 102 and base station 104 in any of a variety of ways.

[0039] Wireless link 106 can include a downlink for data or control information transmitted from base station 104 to electronic device 102. Wireless link 106 can also include an uplink for other data or control information transmitted from electronic device 102 to base station 104. Wireless link 106 can be implemented using any suitable wireless communication protocol or standard. Examples of such protocols and standards include the 3rd Generation Partnership Project (3GPP) Long Term Evolution (LTE) standards, such as 4th Generation (4G), 5th Generation (5G), or 6th Generation (6G) cellular standards; IEEE 802.11 standards, such as 802.11g, ac, ax, ad, aj, or ay standards (e.g., 6 or ); IEEE 802.16 standards (e.g., ); standards; Ultra-Wideband (UWB) standards (e.g., IEEE802.15.4); and so on. In some particular implementations, wireless link 106 can wirelessly provide power, and electronic device 102 or base station 104 can include a power source or a power dissipator.

[0040] As shown for some particular implementations, electronic device 102 can include at least one application processor 108 and at least one computer-readable storage medium 110 (CRM 110). Application processor 108 can include any type of processor configured to execute processor-executable instructions (e.g., code) stored by CRM 110, such as a central processing unit (CPU) or a multi-core processor. CRM 110 can include any suitable type of data storage medium, such as volatile memory (e.g., random-access memory (RAM)), non-volatile memory (e.g., flash memory), optical media (e.g., optical discs), magnetic media (e.g., disks or tapes), etc. In the context of the present disclosure, CRM 110 is implemented to store instructions 112, data 114, and other information of electronic device 102, and thus CRM 110 does not include transiently propagated signals or carriers.

[0041] The electronic device 102 may also include one or more input / output ports 116 (I / O ports 116) and at least one display 118. The I / O ports 116 enable data exchange or interaction with other devices, networks, or users. The I / O ports 116 may include serial ports (e.g., Universal Serial Bus ports), parallel ports, audio ports, infrared (IR) ports, camera or other sensor ports, etc. The display 118 may be implemented as a display screen or projection that presents graphical images provided by other components of the electronic device 102, such as a user interface (UI) associated with an operating system, program, or application. Alternatively or additionally, the display 118 may be implemented as a display port or virtual interface through which graphical content of the electronic device 102 is communicated or presented.

[0042] The electronic device 102 also includes at least one wireless interface device 120 and at least one antenna 122. Example wireless interface devices 120 provide connectivity to corresponding networks and peer devices via a wireless link, which may be configured similarly or differently from the wireless link 106. The wireless interface device 120 may facilitate communication over any suitable type of wireless network, such as a wireless local area network (LAN) (WLAN), wireless personal area network (PAN) (WPAN), peer-to-peer (P2P) network, mesh network, cellular network, wireless wide area network (WAN) (WWAN), and / or a navigation network (e.g., the Global Positioning System (GPS) in North America or another satellite positioning system (SPS) or Global Navigation Satellite System (GNSS)). In the context of the example environment 100, the electronic device 102 may communicate various data and control information bidirectionally with the base station 104 via the wireless interface device 120. However, the electronic device 102 may communicate directly with other peer devices, alternative wireless networks, etc. Additionally, as described above, the electronic device 102 may alternatively be implemented as the base station 104, an access point, or another device as set forth herein.

[0043] As Figure 1As shown, the wireless interface device 120 may include at least one communication processor 124, at least one transceiver 126, and at least one radio frequency front end 128 (RFFE 128). These components process data information, control information, and signals associated with transmitting information for the electronic device 102 via the antenna 122. The communication processor 124 may be implemented as at least a part of a system-on-chip (SoC), a modem processor, or a baseband radio processor (BBP), which implements a digital communication interface for data, voice, messaging, or other applications for the electronic device 102. The communication processor 124 may include a digital signal processor (DSP) or one or more signal processing blocks (not shown) for encoding and modulating data for transmission and for demodulating and decoding received data. Additionally, the communication processor 124 may also manage (e.g., control or configure) aspects or operations of the transceiver 126, the RF front end 128, and other components of the wireless interface device 120 to implement various communication protocols or communication technologies.

[0044] In some cases, the application processor 108 and the communication processor 124 may be combined into one module or integrated circuit (IC), such as an SoC. In any case, the application processor 108, the communication processor 124, or the processors are generally operatively coupled to one or more other components (such as the CRM 110 or the display 118) to enable control of or other interaction with various components of the electronic device 102. For example, at least one of the processors 108 or 124 may present one or more graphical images on the display screen of the display 118 based on one or more wireless signals communicated (e.g., transmitted or received) via the components of the wireless interface device 120 using at least one antenna 122. Additionally, the application processor 108 or the communication processor 124 (including their combination) may be implemented using digital circuits that implement the logic or functionality described herein. Additionally, the communication processor 124 may also include a memory (not shown separately) (such as the same CRM 110 or another CRM) for storing data and processor-executable instructions (e.g., code) or be associated with such a memory.

[0045] As shown, the wireless interface device 120 may include at least one mixer circuit 130 as described below. More specifically, the transceiver 126 may include at least one mixer circuit 130-1, or the RF front end 128 may include at least one mixer circuit 130-2 (including that both components may have at least one mixer circuit 130 according to the optional but herein permitted “inclusive or” interpretation of the word “or”). The transceiver 126 may also include circuits and logic for filtering, switching, amplifying, channelizing, frequency shifting, etc.

[0046] Frequency transformation functionality may include upconversion or downconversion of a frequency performed by a single conversion operation (e.g., using a direct conversion architecture) or by multiple conversion operations (e.g., using a superheterodyne architecture). Transceiver 126 may perform such frequency conversion (e.g., frequency transformation) by using mixer circuit 130-1 and associated local oscillator 136. Generally, transceiver 126 may include filters, switches, amplifiers, mixers, etc., for routing and conditioning signals transmitted or received via antenna 122.

[0047] In addition to mixer circuit 130-1, transceiver 126 may also include an analog-to-digital converter (ADC) or a digital-to-analog converter (DAC) ( Figure 1 not shown in the figure). In operation, the ADC may convert an analog signal to a digital signal, and the DAC may convert a digital signal to an analog signal. Generally, the ADC or DAC may be implemented as part of communication processor 124, part of transceiver 126, or separate from both (e.g., as another part of the SoC or as part of application processor 108).

[0048] The components or circuits of transceiver 126 may be implemented in any suitable manner, such as using combined transceiver logic or separately as corresponding transmitter and receiver entities. In some cases, transceiver 126 is implemented using multiple or different parts to implement the corresponding transmit and receive operations (e.g., implemented using separate transmit and receive chains as depicted in Figure 2 the figure). Although not shown in Figure 1 the figure, transceiver 126 may include logic for performing in-phase / quadrature (I / Q) operations (such as synthesis, phase correction, modulation, demodulation, etc.).

[0049] The RF front end 128 may also include one or more mixers (such as mixer circuit 130-2), one or more filters, one or more switches, or one or more amplifiers for adjusting the signals received via antenna 122 or for adjusting the signals to be transmitted via antenna 122. The RF front end 128 may also include a local oscillator, a phase shifter (PS), a peak detector, a power meter, a gain control block, an antenna tuning circuit, a multiplexer, a balun, etc. The configurable components of the RF front end 128 (such as some phase shifters, an automatic gain controller (AGC), or a reconfigurable version of mixer circuit 130-3) may be controlled by the communication processor 124 to implement communication in various modes, using different frequency bands, or using beamforming. In some specific implementations, antenna 122 is implemented as at least one antenna array including a plurality of antenna elements. Thus, as used herein, "antenna" may refer to at least one discrete or independent antenna, to at least one antenna array including a plurality of antenna elements, or to a part of an antenna array (e.g., an antenna element), depending on the context or specific implementation.

[0050] In an example specific implementation, the wireless interface device 120 includes at least one mixer circuit 130, at least one local oscillator 136 (LO 136), and at least one instance of calibration circuit 138. The mixer circuit 130 is coupled to the local oscillator 136 and the calibration circuit 138. These components may be located separately or jointly at the communication processor 124, transceiver 126, RF front end 128, or a combination thereof, including being distributed across two or more sections or parts of the wireless interface device 120. In Figure 1 the example, mixer circuit 130 is depicted with mixer circuit 130-1 as part of transceiver 126, mixer circuit 130-2 as part of RF front end 128, etc. However, the described specific implementation of mixer circuit 130 may additionally or alternatively be generally used in other parts of the wireless interface device 120 or in other parts of the electronic device 102.

[0051] As elaborated above, mixer circuit 130 may be included in electronic devices other than cellular phones (such as base station 104 or wireless access point). Additionally, using a base station (or using a mobile phone or other electronic device with a superheterodyne architecture), mixer circuit 130 as described herein may be used to implement, for example, a mixer for the intermediate frequency (IF) section of the wireless interface device 120. Other electronic device arrangements that may employ mixer circuit 130 and the corresponding calibration circuit 138 include laptop computers, communication hardware of a vehicle, wireless access points, wearable devices, etc., as described herein.

[0052] In an example implementation, mixer circuit 130 may include at least one instance of mixer 132 and tuning circuit 134. Mixer 132 is coupled to tuning circuit 134. Although certain components are shown as Figure 1 part of the example mixer circuit 130 in Figures 5 to 8 a given mixer circuit may have more, fewer, or different components. An example of a mixer circuit is described below with reference to

[0053] During operation, local oscillator 136 feeds an LO signal to mixer 132 of mixer circuit 130. The LO signal may "leak" into other parts of wireless interface device 120, such as along a communication link ( Figure 1 not shown in Figure 3 ), of which mixer 132 forms a part. To address this LO feedthrough (LOFT), calibration circuit 138 controls tuning circuit 134 to provide one or more cancellation calibration signals, such as current or voltage, to mixer 132. This may reduce LOFT to improve EVM, ERP, and other wireless performance characteristics. An example method of the calibration process is described below with reference to Figure 4 and Figure 2 However, next, this document describes an example implementation of a transceiver and an RF front end with reference to

[0054] Figure 2 FIG. 200 is a schematic diagram of a circuit 200 that illustrates an example RF front end 128 and an example transceiver 126 that may each include at least one mixer circuit 130. Figure 2 Antenna 122 and communication processor 124 are also depicted. Communication processor 124 conveys one or more data signals to other components (such as Figure 1 application processor 108 of

[0055] As illustrated from left to right, in an example embodiment, antenna 122 is coupled to RF front end 128, and RF front end 128 is coupled to transceiver 126. Transceiver 126 is coupled to communication processor 124. Example RF front end 128 includes at least one signal propagation path 222. The at least one signal propagation path 222 may include at least one mixer circuit 130, such as mixer circuit 130-2 and mixer circuit 130-3. Example transceiver 126 includes at least one receive chain 202 (or receive path 202) and at least one transmit chain 252 (or transmit path 252). Although only one RF front end 128, one transceiver 126, and one communication processor 124 are shown at circuit 200, electronic device 102 or the wireless interface device 120 of the electronic device may include multiple instances of any or all such components. Additionally, although Figure 2 only certain components are explicitly depicted and shown coupled together in a particular manner, transceiver 126 or RF front end 128 may include other unillustrated components (e.g., switches or diplexers), more or fewer components, component arrangements coupled in different ways, etc.

[0056] In some embodiments, RF front end 128 couples antenna 122 to transceiver 126 via signal propagation path 222. In operation, signal propagation path 222 carries signals between antenna 122 and transceiver 126. During or as part of signal propagation, signal propagation path 222 adjusts the propagating signal, such as using mixer circuit 130-2 or mixer circuit 130-3. This enables RF front end 128 to couple wireless signal 220 from antenna 122 to transceiver 126 as part of a receive operation. RF front end 128 also enables a transmit signal to be coupled from transceiver 126 to antenna 122 as part of a transmit operation to emit wireless signal 220. Although not explicitly shown in Figure 2 the RF front end 128 or the signal propagation path 222 of the RF front end may include one or more other components, such as another mixer, filter, amplifier (e.g., power amplifier (PA) or low noise amplifier (LNA)), multiplexer, phase shifter, diplexer, one or more switches, etc.

[0057] In some specific implementations, the transceiver 126 may include at least one receive chain 202, at least one transmit chain 252, or at least one receive chain 202 and at least one transmit chain 252. From left to right, the receive chain 202 may include a low-noise amplifier 204 (LNA 204), a filter circuit 206, a mixer circuit 130-1 for frequency down-conversion, and an ADC 210. The transmit chain 252 may include a power amplifier 254 (PA 254), a filter circuit 256, a mixer 130-4 for frequency up-conversion, and a DAC 260. However, the receive chain 202 or the transmit chain 252 may include other components (e.g., additional amplifiers or mixers, multiple filters, at least one transformer, one or more buffers, or at least one phase-locked loop), and these components are electrically or electromagnetically coupled anywhere along the depicted receive and transmit chains.

[0058] The receive chain 202 is coupled, for example, between the signal propagation path 222 of the RF front-end 128 and the communication processor 124 via the low-noise amplifier 204 and the ADC 210, respectively. The transmit chain 252 is coupled, for example, between the signal propagation path 222 and the communication processor 124 via the power amplifier 254 and the DAC 260, respectively. The transceiver 126 may further include at least one local oscillator 136 (LO 136), and the at least one local oscillator is coupled to the mixer circuit 130-1 or the mixer circuit 130-4, including being coupled to both of these mixer circuits. For example, the transceiver 126 may include one local oscillator 136 for each transmit / receive chain pair, one local oscillator 136 for each transmit chain, one local oscillator 136 for each receive chain, multiple local oscillators 136 for each transmit or receive chain, etc. Each of the mixer circuit 130-2 and the mixer circuit 130-3 in the RF front-end 128 may also be coupled to the same local oscillator 136 or different local oscillators ( Figure 2 not shown in the figure).

[0059] As depicted for certain examples of receive chain 202 along the signal propagation direction, antenna 122 is coupled to low noise amplifier 204 via signal propagation path 222 and mixer circuit 130-3 of this signal propagation path, and low noise amplifier 204 is coupled to filter circuit 206. Filter circuit 206 is coupled to mixer circuit 130-1, and mixer circuit 130-1 is coupled to ADC 210. ADC 210 is in turn coupled to communication processor 124. As depicted for certain examples of transmit chain 252 along the signal propagation direction, communication processor 124 is coupled to DAC 260, and DAC 260 is coupled to mixer circuit 130-4. Mixer circuit 130-4 is coupled to filter circuit 256, and filter circuit 256 is coupled to power amplifier 254. Power amplifier 254 is coupled to antenna 122 via mixer circuit 130-2 of signal propagation path 222 along this signal propagation path. Although only one receive chain 202 and one transmit chain 252 are explicitly shown, electronic device 102 or its transceiver 126 may include multiple instances of either or both components. Although ADC 210 and DAC 260 are illustrated as being separately coupled to communication processor 124, they may share a bus or other components for communicating with processor 124.

[0060] As part of an example signal reception operation, mixer circuit 130-3 (if present) of signal propagation path 222 downconverts (e.g., downconverts to an intermediate frequency (IF)) the received signal and forwards the downconverted signal to low noise amplifier 204. Low noise amplifier 204 receives the downconverted signal from RF front end 128 and provides an amplified signal to filter circuit 206 based on the received signal. Filter circuit 206 filters the amplified signal and provides the filtered signal to mixer circuit 130-1. Mixer circuit 130-1 performs a frequency downconversion operation on the filtered signal to downconvert from one frequency to a lower frequency (e.g., from IF to baseband frequency (BBF) in the presence of mixer circuit 130-3, or from radio frequency (RF) to IF or BBF in the absence of mixer circuit 130-3). Mixer circuit 130-1 or multiple mixer circuits may perform the frequency downconversion in a single conversion step or through multiple conversion steps using at least one local oscillator 136. Mixer circuit 130-1 may provide the downconverted analog signal to ADC 210 for analog-to-digital conversion and subsequently forward it to communication processor 124 as a digital signal.

[0061] As part of an example signal transmission operation, the DAC 260 converts a digital signal received from the communication processor 124 into an analog signal. The mixer circuit 130-4 receives the analog signal at BBF or IF from the DAC 260. The mixer circuit 130-4 upconverts the analog signal to a higher frequency (such as upconverting to IF or RF) to generate a higher frequency signal with a target synthesis frequency using a signal generated by the local oscillator 136. The mixer circuit 130-4 provides the RF or other upconverted signal to the filter circuit 256. The filter circuit 256 filters the upconverted IF or RF signal and provides the filtered signal to the power amplifier 254. Thus, after being filtered by the filter circuit 256, the power amplifier 254 amplifies the filtered signal and provides the amplified signal to the signal propagation path 222 for signal conditioning. For example, if the amplified signal is at IF, the RF front end 128 can use the mixer circuit 130-2 of the signal propagation path 222 to provide an RF signal to the antenna 122 to transmit as a wireless signal 220.

[0062] As described herein, example embodiments of the mixer circuit 130 may be deployed at any one or more of the example mixer circuits 130-1, 130-2, 130-3, or 130-4 in the transceiver 126 or the RF front end 128 or at other mixer circuits of the electronic device 102 ( Figure 2 not shown in the figure). However, the circuit 200 only depicts a few examples for the transceiver 126 and the RF front end 128. In some cases, the various components illustrated using separate schematic boxes or circuit elements in the drawings may be fabricated or packaged in different discrete manners. For example, one physical module may include components of the RF front end 128 and some components of the transceiver 126, and another physical module may combine the communication processor 124 with the remaining components of the transceiver 126.

[0063] In addition, in some cases, antenna 122 may be co - packaged into a module with at least some components of RF front - end 128 or transceiver 126. For example, in a non - limiting example corresponding to an mmW implementation, transceiver 126 may provide an IF signal to RF front - end 128. In some such cases, RF front - end 128 may be co - packaged into a module with an antenna array version of antenna 122. Here, RF front - end 128 includes one or more mixer circuits 130 - 2 and 130 - 3, which are configured to up - convert and down - convert between IF / RF signals. RF front - end 128 also provides further signal conditioning, such as phase shifting for beamforming, etc. In another non - limiting example, such as for a 5G New Radio (NR) Frequency Range 1 (FR1) implementation, RF front - end 128 may not include mixers (e.g., having a direct - conversion architecture where the frequency conversion between BB and RF occurs in transceiver 126). Even without mixers, RF front - end 128 may still include other components, such as power amplifiers, low - noise amplifiers, filters, or other conditioning circuits, for processing signals after or before being processed by transceiver 126 (for transmit or receive operations, respectively).

[0064] In an alternative implementation, compared to the illustrated circuit 200, one or more components may be physically or logically “shifted” to different parts of wireless interface device 120 and / or may be incorporated into different modules. For example, low - noise amplifier 204 or power amplifier 254 may alternatively or additionally be deployed in RF front - end 128. Similarly, ADC 210 or DAC 260 may alternatively be deployed in communication processor 124. In addition, a receive chain or a transmit chain may be present in RF front - end 128, and / or the depicted receive chain 202 or transmit chain 252 may extend into RF front - end 128, such that these chains are at least partially distributed across transceiver 126 and RF front - end 128. Next, refer to Figure 3 Describe a general communication chain having mixer circuit 130.

[0065] Figure 3 FIG. 300 is a schematic diagram illustrating an example communication chain 320 including a mixer circuit 130 having an associated local oscillator 136 and a corresponding calibration circuit 138. As illustrated, communication chain 320 may accept an incoming signal 312 and produce an outgoing signal 314. Communication chain 320 may be implemented as, for example,( Figure 2 of) receive chain 202, transmit chain 252, or a portion thereof. Below, refer to Figure 4 Describe an example circuit implementation of communication chain 320.

[0066] In an example implementation, mixer circuit 130 is electrically or electromagnetically coupled along communication link 320. Local oscillator 136 and calibration circuit 138 are coupled to mixer circuit 130. Calibration circuit 138 is coupled to a point or node along communication link 320 in any of a variety of ways described below with reference to Figure 4 Although these two components are depicted separately from communication link 320 in Figure 3 local oscillator 136 or calibration circuit 138 (including both in some cases) may be included, in whole or in part, as components of communication link 320. Alternatively, but by way of example only, local oscillator 136 may serve mixer circuits of multiple communication links, and calibration circuit 138 may be incorporated, at least in part, as part of a communication processor (e.g., Figure 1 and Figure 2 communication processor 124).

[0067] As shown, mixer circuit 130 includes mixer 132 and tuning circuit 134. Mixer 132 is coupled to tuning circuit 134. In some cases, calibration circuit 138 is coupled to tuning circuit 134. In at least some of such cases, calibration circuit 138 may be coupled between mixer circuit 130 and a node or component of communication link 320 via tuning circuit 134. Local oscillator 136 may be coupled to mixer circuit 130 via mixer 132.

[0068] In an example operation, local oscillator 136 generates LO signal 306. Mixer 132 receives input signal 302 from an upstream component of communication link 320 ( Figure 3 not shown in ). Mixer 132 also receives LO signal 306 from local oscillator 136. Based on input signal 302 and LO signal 306, mixer 132 generates output signal 304. Mixer 132 provides or forwards output signal 304 to a downstream component of communication link 320 ( Figure 3 not shown in ). Mixer 132 converts the frequency of input signal 302 (e.g., the input frequency) to another frequency of output signal 304 (e.g., the output frequency) based on the LO frequency of LO signal 306. The frequency conversion (or “frequency translation”) may be an up-conversion that increases the frequency (e.g., for a transmit chain) or a down-conversion that decreases the frequency (e.g., for a receive chain).

[0069] The calibration circuit 138 obtains an indication of the signal propagating along communication link 320, which is referred to herein as the propagated signal indication 310. Based on the propagated signal indication 310, the calibration circuit 138 generates a control signal 308. The calibration circuit 138 provides the control signal 308 to the mixer circuit 130 via the tuning circuit 134. In response to the control signal 308, the tuning circuit 134 modifies the behavior or operation of the mixer 132 to cancel (e.g., at least reduce, if not minimize) the LO signal 306 feedthrough into the communication link 320.

[0070] The timing of the calibration process can vary based on the particular implementation. In some cases, the calibration circuit 138 is initially run to establish tuning values. The calibration circuit 138 can be run, for example, as part of factory calibration during the manufacture of the wireless interface device or the assembly of the electronic device. The resulting tuning values can be stored by the wireless interface device for later use. Subsequently, the stored tuning values are retrieved or applied such that the tuning circuit 134 can calibrate the mixer circuit 130 and thereby reduce the LOFT. For example, the subsequent use may occur during mission mode operation (e.g., in the field). In other cases, the calibration process can be performed while the electronic device is in the field. In other cases, the calibration process can be performed by the device manufacturer and later by the device user again. The later calibration process can be performed once or repeatedly (e.g., at startup, at regular intervals, based on environmental changes, or in response to band or other frequency changes). In any of these cases, the example implementations of the calibration process can be performed in a manner that at least substantially isolates the downstream effects of the LO signal 306 from the downstream effects of the input signal 302, as described next with reference to Figure 4 as described.

[0071] Figure 4 is a circuit diagram 400 illustrating an example communication link 320 including a mixer circuit 130 having an associated local oscillator 136 and a corresponding calibration circuit 138. As shown, the communication link 320 includes a plurality of components serially linked together between an amplifier 410-1 and a port 408. Although only a single line is used to depict these components coupled together, these components can be single-ended, having a single (or “unbalanced”) coupling line, or these components can be differential, and the coupling lines can likewise be differential (or “balanced”). In some cases, the port 408 can represent an endpoint or node of the communication link 320. The port 408 can be coupled to an antenna 122 ( Figure 4 not shown in) and / or an antenna feeder. The antenna feeder or an extension of the communication link 320 or an additional communication link can include other components. As described below, the circuit diagram 400 can operate in multiple modes (e.g., a first mode and a second mode) at different times, such as operating in a calibration mode 450 at a first time and in a mission mode 452 at a second time.

[0072] The illustrated components include multiple amplifiers, such as amplifiers 410-1, 410-2, and 410-3; driver amplifier 412; and power amplifier 254. Example components along communication link 320 further include mixer circuit 130 and at least one phase shifter 414 (PS 414). However, communication link 320 may include more, fewer, and / or different components than the illustrated components. Such other components may include one or more buffers, at least one filter, one or more switches, at least one transformer, other components described herein, etc. These components may also be rearranged or reordered along a serial chain of components before or after mixer circuit 130. Additionally, although Figure 4 communication link 320 corresponds to a transmit chain, the principles described herein apply to a receive chain implementation of communication link 320.

[0073] In an example implementation, calibration circuit 138 includes at least one instance of power detector 402 and controller circuit 404. Power detector 402 and controller circuit 404 are coupled in series between a node or point along communication link 320 and mixer circuit 130. From the perspective of signal or information propagation or in terms of time, power detector 402 may operate before controller circuit 404.

[0074] In an example operation, power detector 402 obtains propagation signal indication 310 from communication link 320. Power detector 402 may use another component to obtain propagation signal indication 310. For example, power detector 402 may use coupler 416. Coupler 416 may be implemented in different ways, such as using a directional coupler. In the depicted example, coupler 416 may sense propagation signal 418 and provide propagation signal indication 310, which represents propagation signal 418.

[0075] In an alternative implementation, coupler 416 may be placed at a different location (such as at any node along communication link 320). For example, coupler 416 may be coupled to a node between phase shifter 414 and amplifier 410-3 or a node between mixer circuit 130 and amplifier 410-2. Additionally or alternatively, the power detector may use a different type of component to obtain propagation signal indication 310. For example, an alternative power detector 402* may use at least one capacitor to obtain an indication of signal propagation along communication link 320 between driver amplifier 412 and power amplifier 254, as shown. Generally, power detector 402 may use one or more different components that are electrically or electromagnetically coupled to any point along communication link 320 to obtain an indication of the propagation signal.

[0076] Continuing with the description of the operation example, power detector 402 receives propagation signal indication 310 from coupler 416. Power detector 402 detects the power level 406 of propagation signal 418 based on propagation signal indication 310. Power detector 402 can be implemented using, for example, at least one diode. Power detector 402 provides power level 406 to controller circuit 404. Controller circuit 404 receives power level 406 from power detector 402.

[0077] Controller circuit 404 can be implemented using at least in part one or more digital circuits. These digital circuits can be part of communication processor 124 or another part of wireless interface device 120. Such digital circuits can also be distributed across multiple parts of wireless interface device 120. The digital circuits can include, for example, an analog-to-digital converter (ADC) and logic circuitry. The ADC can produce a digital version of power level 406. The logic circuitry can determine at least one value of a register (e.g., a digital version of tuning value 420) based on the digital power level during calibration mode 450. For example, the logic circuitry can iteratively use different values to reduce (if not minimize) the digital power level to an extent allowed by the quantization, background noise, etc. of a given power level 406.

[0078] Additionally or alternatively, controller circuit 404 can be implemented using at least in part one or more analog circuits. For example, as part of an analog control loop, controller circuit 404 can include a comparator that compares power level 406 with a threshold power level (such as a threshold power level at or near background noise). Based on power level 406, controller circuit 404 produces control signal 308 using analog or digital circuitry during calibration mode 450. Controller circuit 404 provides control signal 308 (e.g., as an analog version of tuning value 420) to mixer circuit 130. The use of control signal 308 by mixer circuit 130 is described below with reference to Figures 5 to 8 the use of control signal 308 by mixer circuit 130 is described.

[0079] Generally speaking, control signal 308 is generated to cancel the signaling effect of LO signal 306 flowing through a portion of communication link 320. To separate the signaling effect of input signal 302 from the signaling effect of LO signal 306, controller circuit 404 can make input signal 302 substantially zero (0) at least from an alternating current (AC) perspective during calibration mode 450. For example, a low-amplitude or zero-amplitude input signal can be fed to mixer 132 ( Figure 4 not shown) of mixer circuit 130 or amplifier 410-1, amplifier 410-1 can be turned off, or the mixer input of mixer circuit 130 can be disconnected from amplifier 410-1.

[0080] Accordingly, the output signal 304 provided by the mixer circuit 130 is substantially caused by the leakage of the LO signal 306. This feedthrough of the LO signal 306 can propagate along the communication link 320 through one or more other components. Accordingly, the propagated signal 418 can be sensed or otherwise obtained anywhere along the communication link 320 downstream or "after" the mixer circuit 130. However, the closer the coupler 416 or other sensing component is positioned to the port 408, the more the detrimental effects of other mismatch components besides the mixer can be compensated for by the calibration process.

[0081] In some embodiments, one or more of the following techniques can be used during the calibration mode 450 to perform the calibration process. To at least partially isolate the LO signal 306, the input signal 302 (e.g., a baseband or intermediate frequency input signal) is set to a substantially zero magnitude (e.g., no drive signal power at the mixer input). The wireless interface device can operate normally as if the device were transmitting in the field using the target frequency band (or receiving for a receive-chain embodiment) for LOFT calibration. The signal gain and filter frequency response along the communication link 320 can be set to produce maximum gain at the LO frequency of the LO signal 306. The power detector 402 is used to sense the LO feedthrough along the communication link 320. The direct current (DC) output of the power detector 402 is fed to the ADC of the controller circuit 404. The calibration engine of the controller circuit 404 can use a current mode or a voltage mode to adjust the tuning value 420, which is applied to the tuning circuit 134 of the mixer circuit 130. The following are respectively referred to Figure 6 and Figure 7 to describe these modes.

[0082] The tuning value 420 for controlling the signal 308 can be implemented as calibration code, which is determined by converging to the code that provides the minimum detected power level 406 and thus the minimum LOFT. Here, the minimum power level or LOFT is the minimum value under one or more constraints such as the implementation circuit of the communication link 320, the current oscillation frequency of the LO signal 306, the capabilities of the tuning circuit 134, and the bits in the digital circuit portion of the calibration circuit 138 and / or the available accuracy of the calibration code of the control signal 308. The control signal 308 (such as one or more bits of its at least one tuning value 420) can be stored in at least one register, which persists in the absence of power in association with the frequency of the local oscillator signal 306 that determines the value. The register can be implemented using flash memory, programmable read-only memory (PROM), electrically erasable programmable read-only memory (EEPROM), one or more fuses, etc.

[0083] Thus, in certain digital embodiments of the controller circuit 404, the controller circuit 404 determines tuning values 420 written to or otherwise stored in at least one register ( Figure 4 not shown) during the calibration mode 450. The register can be part of the controller circuit 404, part of the mixer circuit 130 (e.g., part of its tuning circuit 134), part of other control circuits, some combination thereof, etc. During the task mode 452, software, firmware, or other circuitry can read or otherwise retrieve the tuning values 420 from the register to apply the tuning values 420 to the operation of the tuning circuit 134. Alternatively, the register can be otherwise coupled to the tuning circuit 134 to expose its tuning values 420 to control the operation of the tuning circuit 134. The wireless interface device 120 can also have multiple registers. For example, one register can hold the tuning values 420 in a powerless state (e.g., a non-volatile memory cell), and another register can hold the tuning values 420 during the task mode 452 after software, firmware, or circuitry loads the tuning values 420 from one register to another. In other embodiments, the calibration mode 450 and the task mode 452 can be combined, or the device can switch between these two modes quickly enough and / or frequently enough such that the calibration process is performed in a continuous loop or in a partially or fully continuous loop.

[0084] As indicated above, the calibration process can be performed during the calibration mode 450 at the target operating frequencies for transmission or reception. The calibration process can be repeated for multiple target frequencies to cover one or more frequency bands, such as the low band (LB), the mid band (MB), and the high band (HB). Custom, potentially different, tuning values 420 can be stored in multiple registers in association with each target frequency or frequency band during the calibration mode 450. During the task mode 452, the wireless interface device 120 loads the tuning values 420 associated with the target frequency or frequency band to be used from the multiple registers into a register that can control the operation of the tuning circuit 134. Thus, the amount of current that the tuning circuit 134 steers to reduce LO leakage can be based on the band in which the device operates.

[0085] In some specific implementations, the device may enter the calibration mode 450 and / or perform the calibration process once (or several times) during manufacturing, and then the determined tuning values may be used throughout the device's useful life during instances of the task mode 452. Additionally or alternatively, the device may enter the calibration mode 450 and / or perform the calibration process multiple times after the device reaches the user. For example, the calibration process may be performed during power-on or reset, at regular intervals (e.g., twice a day or once an hour), during periods when the wireless interface device 120 is not otherwise in use, in response to a changed target frequency or frequency band, based on a change in the device's location, in combinations thereof, etc. Each time the device enters the calibration mode 450 and runs the calibration process, the stored tuning values may be updated. The device may then use the updated tuning values in the task mode 452.

[0086] Figure 5 FIG. 500 is a schematic diagram illustrating an example mixer circuit 130 including an example tuning circuit 134 and an example mixer 132 having multiple stages 510-1 and 510-2. As shown, the mixer 132 includes a mixer input 502 to receive or accept an input signal 302, and a mixer output 504 to provide or transmit an output signal 304. The mixer 132 also includes an LO signal input 506 to receive or accept an LO signal 306. The tuning circuit 134 includes a control input 508 to receive or accept a control signal 308. The input and output may be implemented, for example, by at least a portion of a node, port, wire, or other conductive element, at least a portion of a transistor (e.g., a terminal), combinations thereof, etc.

[0087] In an example specific implementation, the mixer 132 includes multiple stages, such as two stages: a first stage 510-1 and a second stage 510-2. However, other specific implementations of the mixer 132 may have a single stage or more than two stages. In some cases, the first stage 510-1 is implemented as a transconductance stage (or “Gm stage”) having at least one transistor (as Figure 6 and Figure 7 shown), and the second stage 510-2 is implemented as a cascode stage having one or more transistors (as Figure 6 and Figure 7 shown). Examples of multi-stage specific implementations of the mixer 132 having multiple transistors are described below with reference to Figure 6 and Figure 7

[0088] In an example operation, the tuning circuit 134 generates a calibration signal 512 based on the control signal 308. The tuning circuit 134 provides the calibration signal 512 to the mixer 132, such as to its first stage 510-1. The calibration signal 512 affects the operation of the mixer 132 to reduce the LO signal 306 to the output signal 304 and the feedthrough to downstream components. The calibration signal 512 can compensate for the imbalance of the positive and negative components of the mixer 132 or the imbalance of other components along the communication link. In some embodiments, such as those embodiments in which ( Figure 4 ), the controller circuit 404 is implemented at least in part with digital circuitry, the tuning circuit 134 includes at least one current source configured as a current-based DAC 514 (IDAC 514). Examples of IDAC-based embodiments of the tuning circuit 134 are described next with reference to Figure 6 and Figure 7 .

[0089] Figure 6 and Figure 7 are circuit diagrams 600 and 700 illustrating example mixer circuits 130, each of which includes a respective instance of the tuning circuit 134. Figure 6 The tuning circuit 134 of ( Figure 7 ) operates in an example current mode, and the tuning circuit 134 of ( Figure 6 and Figure 7 ) operates in an example voltage mode. Examples of embodiments of the first stage 510-1 and the second stage 510-2 of the mixer 132 (which are explicitly depicted in, for example, Figure 3 and Figure 5 ) are described next in conjunction with reference to

[0090] . The first stage 510-1 includes at least one transistor T, such as a positive transistor T+ and a negative transistor T-. The second stage 510-2 includes one or more transistors M, such as a positive transistor M1+, a negative transistor M1-, another positive transistor M2+ and another negative transistor M2-.

[0090] The transistors of the mixer 132 can be arranged according to, for example, a double-balanced Gilbert cell architecture. The illustrated Gilbert cell architecture includes a supply or load line 602 that is coupled to the voltage supply V.Supp and one or more transistors M of the second stage 510-2. At least one transistor T of the first stage 510-1 is coupled between the second stage 510-2 and ground. Ground and the supply voltage V.Supp are two examples of power distribution nodes.

[0091] Each transistor T or M can be implemented using any one or more of a variety of transistor types. Example transistor types include field effect transistors (FETs), junction FETs (JFETs), metal oxide semiconductor FETs (MOSFETs), bipolar junction transistors (BJTs), insulated gate bipolar transistors (IGBTs), etc. A manufacturer can fabricate an FET as an n-channel or p-channel transistor type and can fabricate a BJT as an NPN or PNP transistor type.

[0092] Each transistor can include at least one control terminal and one or more channel terminals. For an FET transistor, the control terminal can correspond to the gate terminal, and the channel terminals can correspond to the source terminal or the drain terminal. For a BJT transistor, the control terminal can correspond to the base terminal, and the channel terminals can correspond to the emitter terminal or the collector terminal.

[0093] In an example embodiment, (e.g., Figure 5 of) the transistors of mixer 132 can be coupled together as shown in Figure 6 and Figure 7 For example, at least one transistor T of the first stage 510-1 is coupled between the mixer input 502 (e.g., the positive mixer input 502+ or the negative mixer input 502-) and the mixer output 504 (e.g., the positive mixer output 504+ or the negative mixer output 504-). One or more transistors M of the second stage 510-2 are coupled between at least one transistor T of the first stage 510-1 and the mixer output 504. One or more transistors M are also coupled between the local oscillator signal input 506 (e.g., the positive LO signal input 506+ or the negative LO signal input 506-) and the mixer output 504. The tuning circuit 134 includes at least one current source CS that is coupled to at least one transistor T of the first stage 510-1.

[0094] As shown for the differential signaling embodiment, each signal can be implemented using differential signals. Thus, the input signal 302 can be implemented as a positive input signal 302+ and a negative input signal 302-. The output signal 304 can be implemented as a positive output signal 304+ and a negative output signal 304-. Additionally, the LO signal 306 can be implemented as a positive LO signal 306+ and a negative LO signal 306-. The input signal 302 is coupled to the mixer 132 via the respective gate terminals of at least one transistor T of the first stage 510-1. (e.g., Figure 3 and Figure 4 of) The local oscillator 136 is coupled to the mixer 132 via the respective gate terminals of one or more transistors M of the second stage 510-2.

[0095] Figure 6FIG. 600 is a circuit diagram of an exemplary mixer circuit 130 that illustrates an exemplary mixer including multiple stages 510-1 and 510-2 and an exemplary tuning circuit 134. As shown, the tuning circuit 134 includes at least one tunable current source CS, one or more switches SW, and one or more resistors R. The positive switch SW+ is serially coupled between at least one current source CS and the channel terminal (e.g., drain terminal) of the positive transistor T+ of the first stage 510-1. The negative switch SW- is serially coupled between at least one current source CS and the channel terminal (e.g., drain terminal) of the negative transistor T- of the first stage 510-1.

[0096] Here, the tuning circuit 134 operates in an exemplary current mode. In an exemplary implementation, at least one current source CS, in combination with one or more switches SW, serves as part of a current-based DAC 514. Based on the control signal 308, the current-based DAC 514 sets the state (e.g., open or closed state) of the switches SW. At least one current source CS can be implemented as an adjustable current source, as indicated.

[0097] In an exemplary operation, with the state of the switches SW set, the tuning circuit 134 directs current from at least one current source CS to the positive or negative side of the first stage 510-1 of the mixer (e.g., to the channel terminal of the positive transistor T+ or the negative transistor T-). One or more switches SW (e.g., the positive switch SW+ or the negative switch SW-) are used to direct the current based on the control signal 308. The control signal 308 also determines the magnitude of the current applied by at least one current source CS. For example, the control signal 308 can control how much current is injected into one side of the mixer. For example, if LOFT is caused at least in part by the presence of a relatively large current on the positive side, the current-based DAC 514 can direct current to the negative side for compensation. The tuning circuit 134 can apply current to at least one node corresponding to the channel terminal of at least one transistor T of the first stage 510-1 to adjust the magnitude of the current flowing through one or more transistors M of the second stage 510-2.

[0098] A current-based DAC 514 with an example 8-bit control signal 308 can use one bit to steer current and seven bits to set the magnitude of the current. An injection compensation or offset current is passed through a resistor R (e.g., a positive resistor R+ or a negative resistor R-). The value of the resistor R can be set by trading off the LOFT range versus the gain performance. The higher the value of the resistor, the lower the gain degradation due to the current-based DAC 514, but the lower the LOFT range as well. For specific implementations where the IR voltage drop is relatively more sensitive, a differential-coupled transformer can be used instead of the resistor R. The transformer can provide a higher impedance in the IF frequency domain but a lower DC current impedance to maintain the target LOFT range. This transformer replacement with a lower IR voltage drop may incur an area penalty. To increase the matching between the current-based DAC 514 and the mixer Gm cell, the two can share the same reference current. The tuned offset current can generate out-of-phase LO leakage and cancel the inherent leakage due to device mismatches and other mismatches along the coupling path.

[0099] Figure 7 FIG. 700 is a circuit diagram illustrating another example mixer circuit 130 that includes an example mixer having a plurality of stages 510-1 and 510-2 and an example tuning circuit 134. In Figure 7 this, at least the transistors of the first stage 510-1 (which are indicated as positive transistor T+ and negative transistor T-) include back-gate terminals. By way of example only, the back-gate terminals can be designed into transistors constructed using fully depleted silicon-on-insulator (FDSOI) technology. For example, the back-gate terminals can be used to change the threshold voltage of the transistors.

[0100] As Figure 7 shown, the tuning circuit 134 includes at least one tunable current source CS, one or more switches SW, and at least one resistor R. Here, the tuning circuit 134 operates in voltage mode. In an example implementation, at least one current source CS in combination with one or more switches SW serves as part of at least one current-based DAC 514. At least one current source CS can be implemented as an adjustable current source, as indicated by the arrow. Similarly, at least one resistor R can be implemented as an adjustable resistor, as indicated by the arrow. Based on the control signal 308, the current-based DAC 514 sets the states (e.g., open state or closed state) of the switches SW1 and SW2 on the positive or negative side of the differential mixer circuit 130. For example, if the corresponding back-gate terminals of the transistors T are not adjusted by the current-based DAC 514, the second positive switch SW2+ or the second negative switch SW2- is placed in the closed state to ground the corresponding back-gate terminals of the positive transistor T+ or the negative transistor T-.

[0101] Changing the voltage level of the back gate terminal of the transistor T changes the threshold voltage of the transistor. For example, increasing the voltage level of the back gate terminal decreases the threshold voltage. Thus, if the positive transistor T+ has a higher threshold voltage than the negative transistor T-, the first positive switch SW1+ closes (and the first negative switch SW1- opens), and the current from the current-based DAC 514 is turned on to provide current flow across the resistor R. Additionally, the second positive switch SW2+ opens, and the second negative switch SW2- closes. This raises the voltage level of the back gate terminal of the positive transistor T+, which can decrease the threshold voltage of the positive transistor T+ to improve the match with the lower threshold voltage of the negative transistor T-. By using current flow to change the back gate terminal voltage and reduce the threshold voltage mismatch between the positive and negative sides, the tuning circuit 134 can reduce the LO leakage from the mixer circuit 130. By appropriately controlling the switching states of the positive and negative switches SW1+, SW2+, SW1-, and SW2-, the current flow can be directed to the positive transistor side or the negative transistor side. Compared with the Figure 6 method shown, using the Figure 7 method to change the back gate voltage can provide better resolution for LO mismatch calibration, but the Figure 7 method may also result in a relatively small dynamic range for LO mismatch calibration. Figure 6 or the Figure 7 method can be used independently (e.g., alone) or in combination, depending on the target performance level and the given specific implementation. The switching states of the various methods can be set based on the control signal 308, as described next with reference to Figure 8 .

[0102] Figure 8 is a circuit diagram 800 illustrating an example interaction between a specific implementation of the current-based digital-to-analog converter 514 (IDAC514) of the tuning circuit 134 (e.g., Figure 6 and Figure 7 ) and a register 802 that holds the value determined through the calibration process (e.g., the tuning value 420 of Figure 4 ). Example calibration processes are described with reference to Figure 4 and Figure 10 . The controller circuit 404 of the calibration circuit 138 (e.g., Figure 4 ) can determine the value to cancel the LOFT by reducing (if not minimizing) the detected power level 406. This value can be stored in the register 802 through programming of the controller circuit 404. The register 802 can be part of the controller circuit 404, part of the tuning circuit 134, part of each, or separate from both.

[0103] In an example embodiment, a current-based DAC 514 includes a plurality of current sources CS-1, CS-2, ……, CS-(B-1) and a plurality of switches SW-1, SW-2, ……, SW-(B-1), where "B" represents a positive integer. Each of the plurality of switches SW-1 …… SW-(B-1), i.e., switch SW, is coupled to a current source CS among the plurality of current sources CS-1 …… CS-(B-1). The current sources may provide the same, similar, or different currents (e.g., in terms of magnitude).

[0104] A register 802 is coupled to the plurality of switches SW-1 …… SW-(B-1). The register 802 includes a plurality of bits 804-1, 804-2, ……, 804-(B-1). Each of the plurality of bits 804-1 …… 804-(B-1), i.e., bit 804, corresponds to a switch SW among the plurality of switches SW-1 …… SW-(B-1). Each switch may be formed using at least one transistor. The bit 804 is configured to control the state of the corresponding switch (e.g., an open state or a closed state), such as by coupling to a control terminal of the corresponding switch SW. In the depicted example, a zero-valued bit results in an open state of the corresponding switch, and a one-valued bit results in a closed state of the corresponding switch. However, these bit values and the associated switch states may be implemented in different ways. Additionally, although each bit is shown as controlling the state of a single switch, a bit may alternatively control the states of multiple switches, just as Figure 7 and Figure 9 shown in the embodiment.

[0105] To control which side of a differential mixer (e.g., the positive component or the negative component) is directly affected by current or voltage mode adjustment, the register 802 may include a "B" bit 804-B. The tuning circuit 134 includes another switch SW-B, which is coupled to at least one transistor T of a first stage 510-1 (e.g., Figure 6 and Figure 7 ). Another bit 802-B of the register 804 corresponds to the other switch SW-B to control the positive or negative "sign" of the tuning. Thus, another bit 802-B of the register 804 is coupled to one or more other switches SW-B to provide its value or its reciprocal to control the positive or negative "sign" of the tuning. Although specific circuits are depicted and described herein for the mixer circuit 130 and the register 802 in Figures 6 to 8 , these are provided by way of example only. The illustrated and described components may be implemented using different components, in alternative arrangements, etc.

[0106] Figure 9 FIG. 900 is a circuit diagram illustrating an example current source that may use a current mirror architecture to generate an adjustable current. The circuit diagram 900 may be used to implement Figure 6 or Figure 7Adjustable current source CS of current-based IDAC 514. Figure 9 The adjustable current source includes a current source CS-0 that generates a current mirrored to a plurality of current sources CS-1, CS-2, ……, CS-N, where "N" represents a positive integer, which can correspond to Figure 8 "(B - 1)". The illustrated current mirror can provide high tuning resolution to generate current I.CS. Current I.CS is output to Figure 6 and Figure 7 switches SW of IDAC 514, which can be controlled by Figure 8 "B" bits 804 - B as described above. A current type I.CS (e.g., a bias current from a temperature-independent bandgap reference (BGT) or a temperature-proportional bias current (PTT)) can be established to be the same as the current type of the mixer core. Thus, the calibration quality or the degree of eliminating LO leakage from the applied current can be maintained at a relatively stable level as the temperature changes.

[0107] Two transistors T0 - 1 and T0 - 2 form a transistor stack pair that can mirror the current of current source CS-0 to transistor stack pairs of a plurality of current sources CS-1 …… CS-N. Each corresponding current source CS-x among the plurality of current sources CS-1 …… CS-N can be activated based on the states of the corresponding switch pairs SW-xA / SW-xB in a plurality of switch pairs SW-1A / SW-1B, SW-2A / SW-2B, ……, SW-NA / SW-NB to contribute to the output current I.CS. The states of these switch pairs SW-1A / SW-1B …… SW-NA / SW-NB can be controlled by Figure 8 the corresponding values (or their reciprocals) of a plurality of bits 804 - 1 …… 804-(B - 1), where "N" is equal to "(B - 1)". However, the adjustable current source of current-based IDAC 514 can be implemented using different circuits.

[0108] Figure 10 is a flowchart illustrating an example process 1000 for performing a calibration process to cancel oscillator signal feedthrough with respect to a mixer circuit. Process 1000 includes five blocks 1002 to 1010 that specify operations that can be performed for the method. In an example implementation, the operations of blocks 1002 - 1010 can be performed during a calibration mode 450. At block 1002, the mixer is operated to generate an output signal based on an input signal and a local oscillator signal. For example, mixer 132 can be operated to generate output signal 304 based on input signal 302 and LO signal 306. To at least partially isolate downstream effects caused by the feedthrough of LO signal 306, the input signal 302 can be set to a substantially zero magnitude for the operation of mixer 132, such as by disconnecting the mixer input 502 from the signaling.

[0109] At block 1004, the propagated output signal passes through one or more components. For example, the output signal 304 can pass through one or more components of the communication link 320. In some cases, these components can include filters (e.g., filter 206 or filter 256), phase shifters 414, or one or more amplifiers (such as amplifier 410, driver amplifier 412, or power amplifier 254).

[0110] At block 1006, at least one of the one or more components is used to adjust the output signal to produce an adjusted signal. For example, at least one of the one or more components along the communication link 320 (such as a filter (e.g., filter circuit 206 or 256), a phase shifter (e.g., phase shifter 414), or an amplifier (e.g., amplifier 410, 412, or 254)) can be used to adjust (e.g., filter, phase shift, or amplify) the output signal 304 to produce an adjusted signal (such as the propagated signal 418). As Figure 4 shown by way of example, the propagated signal 418 can be amplified by at least the driver amplifier 412 or the power amplifier 254.

[0111] At block 1008, the power level associated with the adjusted signal is detected to obtain a detected power level. For example, the power level associated with the adjusted signal (e.g., the propagated signal 418) can be detected to obtain the detected power level 406. Here, the coupler 416 or other signal sensing component can provide a propagated signal indication 310 representative of the propagated signal 418, and the power detector 402 can detect its power level to obtain the detected power level 406.

[0112] At block 1010, the operation of the mixer is calibrated based on the detected power level. For example, the operation of the mixer 132 can be calibrated based on the detected power level 406. This calibration can be performed by the controller circuit 404, which determines a control signal 308 that reduces the feedthrough of the LO signal 306 based on the detected power level 406. For example, the controller circuit 404 can iteratively adjust the tuning value 420 stored in at least one register to control the current-based digital-to-analog converter 514 (IDAC514) such that the detected power level 406 is reduced to the background noise, for example, by using the digital value in the available set of digital values that produces the lowest power level, to substantially minimize this power level.

[0113] The operation of the block 1010 may occur as part of a calibration mode 450. Subsequently, at least one stored tuning value 420 determined during the calibration mode 450 may be used in a task mode 452. For example, the tuning value 420 may be used to tune the mixer circuit 130. In some cases, the determined tuning value 420 may be retrieved from one register and loaded into another register coupled to the tuning circuit 134. The tuning circuit 134 uses the tuning value 420 generated during the calibration mode 450 to tune the operation of the mixer 132 during the task mode 452.

[0114] The tuning circuit 134 may adjust the operation of the mixer 132 in response to a control signal 308. In some cases, the tuning circuit 134 may operate in a current mode by injecting at least one current into the mixer 132 to adjust the output signal 304 based on a detected power level 406. In other cases, the tuning circuit 134 may operate in a voltage mode by changing the voltage level of the back-gate terminal of at least one transistor T to adjust the output signal 304 based on a detected power level 406.

[0115] Figure 10 is a flowchart illustrating an example process or method related to oscillator feedthrough calibration. These processes are described in the form of a set of blocks specifying executable operations. However, the operations are not necessarily limited to the order shown in the figures or described herein, as these operations may be implemented in an alternative order or in a fully or partially overlapping manner. Additionally, more, fewer, and / or different operations may be implemented to perform the corresponding process or an alternative process. The operations represented by the illustrated blocks of each process may be performed by an electronic device (such as Figure 1 the electronic device 102 or the wireless interface device 120 of the electronic device). More specifically, the operations of the corresponding process may be performed by the mixer circuit 130 of the transceiver 126 or the RF front end 128 in combination with other components (such as the power detector 402 or the controller circuit 404).

[0116] Although some of the descriptions herein focus on target LO leakage calibration for the first harmonic of the LO frequency, the principles described (e.g., devices, circuits, techniques, and processes) are not limited thereto. These principles also apply to second-order or other-order LO harmonic calibration. For example, for some applications or different frequency plans, instead of the first harmonic of the LO signal, higher-order harmonics of the LO signal may cause more serious problems (e.g., 3GPP emission problems or EVM / throughput limitations). In such cases, the described principles may be extended to other harmonics. For example, the frequency response of one or more of the amplifiers 410, 412, or 414 (in Figure 4 ) may be changed such that the propagated signal is more proportional to the higher-order LO harmonics of more concern.

[0117] Specific Implementation Example

[0118] This section describes some aspects of example embodiments and / or example configurations related to the apparatus and / or processes presented above.

[0119] Example aspect 1: An apparatus, the apparatus comprising:

[0120] A mixer circuit, the mixer circuit comprising:

[0121] A first stage, the first stage comprising at least one transistor coupled between a mixer input and a mixer output;

[0122] A second stage, the second stage comprising one or more transistors coupled between the at least one transistor of the first stage and the mixer output, the one or more transistors being coupled between a local oscillator signal input and the mixer output; and

[0123] A tuning circuit, the tuning circuit comprising at least one current source, the at least one current source being coupled to the at least one transistor of the first stage.

[0124] Example aspect 2: The apparatus according to example aspect 1, wherein:

[0125] The tuning circuit comprises a current-based digital-to-analog converter (IDAC).

[0126] Example aspect 3: The apparatus according to example aspect 1 or 2, wherein the tuning circuit comprises:

[0127] A plurality of current sources, the plurality of current sources including the at least one current source of the tuning circuit;

[0128] A plurality of switches, each switch of the plurality of switches being respectively coupled to a current source of the plurality of current sources; and

[0129] Another switch, the another switch being coupled to the at least one transistor.

[0130] Example aspect 4: The apparatus according to example aspect 3, the apparatus further comprising:

[0131] At least one register, the at least one register being coupled to the plurality of switches, the at least one register including a plurality of bits, each bit of the plurality of bits corresponding respectively to a switch of the plurality of switches.

[0132] Example aspect 5: The apparatus according to example aspect 4, wherein:

[0133] The at least one register includes another bit, the another bit corresponding to the another switch; and

[0134] The another switch of the tuning circuit is coupled between the at least one current source of the tuning circuit and the at least one transistor of the first stage.

[0135] Example aspect 6: The apparatus according to any of the preceding example aspects, wherein:

[0136] The at least one transistor of the first stage includes a channel terminal; and

[0137] The at least one current source of the tuning circuit is coupled to the channel terminal of the at least one transistor.

[0138] Example aspect 7: The apparatus according to example aspect 6, wherein:

[0139] The one or more transistors of the second stage are coupled between the mixer output and the at least one transistor of the first stage via the channel terminal of the at least one transistor.

[0140] Example aspect 8: The apparatus according to example aspect 6 or 7, wherein:

[0141] The tuning circuit includes at least one resistor, the at least one resistor being coupled between the at least one current source and the channel terminal of the at least one transistor of the first stage.

[0142] Example aspect 9: The apparatus according to example aspect 8, wherein:

[0143] The at least one transistor of the first stage includes a positive transistor and a negative transistor;

[0144] The at least one resistor of the tuning circuit includes a positive resistor and a negative resistor; and

[0145] The tuning circuit includes:

[0146] A positive switch, the positive switch being serially coupled with the positive resistor between the at least one current source and the channel terminal of the positive transistor of the first stage; and

[0147] A negative switch, the negative switch being serially coupled with the negative resistor between the at least one current source and the channel terminal of the negative transistor of the first stage.

[0148] Example aspect 10: The apparatus according to any of example aspects 6 to 9, wherein:

[0149] At least one current source of the tuning circuit is configured to apply at least one current to at least one node corresponding to the channel terminal of the at least one transistor of the first stage to adjust the magnitude of the current flowing through the one or more transistors of the second stage.

[0150] Example aspect 11: The apparatus according to any one of the preceding example aspects, wherein:

[0151] The at least one transistor of the first stage includes a gate terminal and a back gate terminal;

[0152] The gate terminal of the at least one transistor corresponds to the mixer input; and

[0153] At least one current source of the tuning circuit is coupled to the back gate terminal of the at least one transistor.

[0154] Example aspect 12: The apparatus according to example aspect 11, wherein:

[0155] At least one current source of the tuning circuit is configured to apply at least one current to at least one node corresponding to the back gate terminal of the at least one transistor of the first stage to adjust the level of the voltage at the at least one node.

[0156] Example aspect 13: The apparatus according to example aspect 12, wherein:

[0157] The tuning circuit is configured to change the level of the voltage of the back gate terminal of the at least one transistor of the first stage by adjusting the level of the voltage at the at least one node to change the threshold voltage of the at least one transistor.

[0158] Example aspect 14: The apparatus according to any one of example aspects 11 to 13, wherein:

[0159] The tuning circuit includes at least one resistor, and the at least one resistor is coupled between at least one current source of the tuning circuit and a power distribution node.

[0160] Example aspect 15: The apparatus according to example aspect 14, wherein:

[0161] The at least one transistor of the first stage includes a positive transistor and a negative transistor;

[0162] At least one current source of the tuning circuit includes a positive current source and a negative current source;

[0163] At least one resistor of the tuning circuit includes a positive resistor and a negative resistor; and

[0164] The tuning circuit includes:

[0165] A positive switch coupled between the positive resistor and the back gate terminal of the positive transistor of the first stage, and between the positive current source and the back gate terminal of the positive transistor of the first stage; and

[0166] A negative switch coupled between the negative resistor and the back gate terminal of the negative transistor of the first stage, and between the negative current source and the back gate terminal of the negative transistor of the first stage.

[0167] Example aspect 16: The apparatus according to any one of the preceding example aspects, the apparatus further comprising:

[0168] A power detector coupled to the communication link,

[0169] A controller coupled to the power detector and configured to generate a control signal for the tuning circuit.

[0170] Example aspect 17: The apparatus according to any one of the preceding example aspects, wherein:

[0171] The first stage includes a transconductance stage of a mixer; and

[0172] The second stage includes a cascode stage of the mixer.

[0173] Example aspect 18: An apparatus, the apparatus comprising:

[0174] A power detector configured to detect a power level; and

[0175] A communication link including:

[0176] A port configured to be coupled to an antenna;

[0177] A mixer circuit including:

[0178] A mixer configured to combine a local oscillator signal and an input signal to generate an output signal;

[0179] And

[0180] A tuning circuit coupled between the mixer and the power detector, the tuning circuit configured to adjust the output signal based on the power level; and

[0181] An amplifier coupled between the mixer circuit and the port,

[0182] The power detector is coupled to the communication link between the amplifier and the port.

[0183] Example aspect 19: The apparatus according to example aspect 18, wherein the tuning circuit is configured to:

[0184] Adjust the output signal of the mixer to reduce the power level detected by the power detector along the communication link between the amplifier and the port.

[0185] Example aspect 20: The apparatus according to example aspect 18 or 19, wherein the tuning circuit is configured to:

[0186] Inject at least one current into the mixer to adjust the output signal of the mixer based on the power level detected by the power detector.

[0187] Example aspect 21: The apparatus according to any one of example aspects 18 to 20, wherein the tuning circuit is configured to:

[0188] Change at least one voltage level of the back gate terminal of at least one transistor to adjust the output signal of the mixer. Example aspect 22: The apparatus according to any one of example aspects or 18 to 21, the apparatus further comprising:

[0189] A controller circuit, the controller circuit being coupled between the power detector and the tuning circuit, the controller circuit being configured to:

[0190] Make the input signal of the mixer substantially zero;

[0191] Couple the local oscillator signal having a frequency to the mixer;

[0192] When the local oscillator signal has the frequency and the input signal is substantially zero, operate the power detector to detect the power level; and

[0193] Establish one or more settings for the tuning circuit.

[0194] Example aspect 23: The apparatus according to example aspect 22, wherein:

[0195] The controller circuit is configured to establish the one or more settings for the tuning circuit to substantially reduce the amount of the local oscillator signal from the local oscillator within the communication link.

[0196] Example aspect 24: The apparatus according to example aspect 22 or 23, the apparatus further comprising:

[0197] at least one register coupled to the tuning circuit, wherein:

[0198] the controller circuit is configured to establish the one or more settings for the tuning circuit by programming the at least one register with at least one value based on the power level detected by the power detector; and

[0199] the tuning circuit is configured to use the at least one value of the at least one register to cancel the feedthrough of the local oscillator signal from the mixer along at least a portion of the communication link.

[0200] Example aspect 25: The apparatus according to any one of example aspects 22 to 24, wherein:

[0201] the power level detected by the power detector represents the feedthrough of the local oscillator signal from the mixer along at least a portion of the communication link.

[0202] Example aspect 26: The apparatus according to any one of example aspects 18 to 25, wherein:

[0203] the mixer is configured to convert the input frequency of the input signal to the output frequency of the output signal based on the frequency of the local oscillator signal.

[0204] Example aspect 27: The apparatus according to any one of example aspects 18 to 26, wherein:

[0205] the communication link includes a receive chain; and

[0206] the mixer is configured to perform frequency downconversion.

[0207] Example aspect 28: The apparatus according to any one of example aspects 18 to 26, wherein:

[0208] the communication link includes a transmit chain; and

[0209] the mixer is configured to perform frequency upconversion.

[0210] Example aspect 29: The apparatus according to example aspect 28, the apparatus further comprising:

[0211] a wireless interface device including the transmit chain and the power detector;

[0212] a display screen; and

[0213] At least one processor, the at least one processor being operatively coupled to at least a portion of the display screen and the wireless interface device, the at least one processor being configured to present one or more graphical images on the display screen based on one or more wireless signals communicated using the mixer circuit of the wireless interface device.

[0214] Example aspect 30: A method for mixer calibration, the method comprising:

[0215] Operating a mixer to generate an output signal based on an input signal and a local oscillator signal;

[0216] Propagating the output signal through one or more components;

[0217] Using at least one of the one or more components to adjust the output signal to produce an adjusted signal;

[0218] Detecting a power level associated with the adjusted signal to obtain a detected power level; and

[0219] Calibrating the operation of the mixer based on the detected power level.

[0220] Example aspect 31: The method according to example aspect 30, wherein the operating comprises:

[0221] Mixing the input signal having a substantially zero magnitude with the local oscillator signal to produce the output signal having a magnitude indicative of the feedthrough of the local oscillator signal from the mixer to the one or more components.

[0222] Example aspect 32: The method according to example aspect 30 or 31, wherein the calibrating comprises:

[0223] Calibrating the operation of the mixer to reduce the detected power level.

[0224] Example aspect 33: The method according to example aspect 32, wherein the calibrating comprises:

[0225] Iteratively adjusting a current-based digital-to-analog converter (IDAC) to substantially minimize the detected power level.

[0226] Example aspect 34: The method according to example aspect 33, wherein the iteratively adjusting comprises:

[0227] Storing a value associated with a frequency or frequency band corresponding to the local oscillator signal.

[0228] Example aspect 35: The method according to any one of example aspects 30 to 34, wherein the calibrating comprises:

[0229] Inject at least one current into the mixer to adjust the output signal based on the detected power level.

[0230] Example aspect 36: The method according to any one of example aspects 30 to 35, wherein the calibration includes:

[0231] Changing the voltage level of the back gate terminal of at least one transistor based on the detected power level to adjust the output signal.

[0232] Example aspect 37: An apparatus for mixer calibration, the apparatus comprising:

[0233] Components for mixing an input signal and a local oscillator signal to generate an output signal;

[0234] Components for propagating the output signal along a communication link;

[0235] Components for detecting the power level of the output signal based on the components for propagation; and

[0236] Components for adjusting the output signal based on the power level to tune the components for mixing to reduce the feedthrough of the local oscillator signal.

[0237] Example aspect 38: The apparatus according to example aspect 37, wherein the components for adjustment include:

[0238] Components for injecting at least one current into the components for mixing to adjust the output signal so as to reduce the power level.

[0239] Example aspect 39: The apparatus according to example aspect 37 or 38, wherein the components for adjustment include:

[0240] Components for changing the voltage level of the back gate terminal of the components for mixing to adjust the output signal so as to reduce the power level.

[0241] Example aspect 40: An apparatus, the apparatus comprising:

[0242] A mixer circuit, the mixer circuit comprising:

[0243] A first stage, the first stage including at least one transistor coupled between a mixer input and a mixer output, the at least one transistor including a gate terminal and a back gate terminal, the gate terminal of the at least one transistor corresponding to the mixer input;

[0244] A second stage, the second stage including one or more transistors coupled between the at least one transistor of the first stage and the mixer output, the one or more transistors being coupled between a local oscillator signal input and the mixer output; and

[0245] A tuning circuit, the tuning circuit including at least one current source, the at least one current source being coupled to the back gate terminal of the at least one transistor.

[0246] Example aspect 41: The apparatus according to example aspect 40, wherein:

[0247] The mixer output includes a positive mixer output and a negative mixer output;

[0248] The at least one transistor of the first stage includes:

[0249] A positive transistor, the positive transistor being coupled between a power distribution node and the second stage via the channel terminal of the positive transistor; and

[0250] A negative transistor, the negative transistor being coupled between the power distribution node and the second stage via the channel terminal of the negative transistor; and

[0251] The one or more transistors of the second stage include:

[0252] A first positive transistor, the first positive transistor being coupled between the positive transistor and the positive mixer output via the channel terminal of the first positive transistor;

[0253] A first negative transistor, the first negative transistor being coupled between the negative transistor and the positive mixer output via the channel terminal of the first negative transistor;

[0254] A second positive transistor, the second positive transistor being coupled between the negative transistor and the negative mixer output via the channel terminal of the second positive transistor; and

[0255] A second negative transistor, the second negative transistor being coupled between the positive transistor and the negative mixer output via the channel terminal of the second negative transistor.

[0256] Conclusion

[0257] As used herein, the term "coupled" refers to a relationship between two or more components that are operably communicable with each other to implement a certain feature described herein or to achieve a certain capability described herein. For example, coupling can be implemented using a physical wire such as a metal trace or a wire or an electromagnetic coupling such as a transformer. Coupling can include direct coupling or indirect coupling. Direct coupling refers to connecting discrete circuit elements via the same node without intermediate elements. Indirect coupling refers to connecting discrete circuit elements via one or more other devices or other discrete circuit elements (including two or more different nodes).

[0258] The term "node" (e.g., including "first node" or "local oscillator node") refers to at least a point of electrical connection between two or more components (e.g., circuit elements). Although a node can sometimes be visually depicted as a single point in a diagram, the node can represent a connection portion of a physical circuit or network that has approximately the same voltage potential at or along the connection portion between two or more components. In other words, a node can represent at least one point among a plurality of points along a conductive medium (e.g., a wire or a trace) that exists between electrically connected components. Similarly, a "terminal" or "port" can represent one or more points that have at least approximately the same voltage potential with respect to an input or output of a component (e.g., a transistor).

[0259] In this document, the terms "first", "second", "third", and other numerically related indicators are used to identify or distinguish items that are similar or analogous to each other in a given context (such as a particular specific implementation, a single schema, a given component, or a claim). Thus, the first item in one context can be different from the first item in another context. For example, an item identified as the "first node" in one context can be identified as the "second node" in another context. Similarly, a "first resistor" or a "first switch" in one claim can be recited as a "second resistor" or a "third switch", respectively, in different claims (e.g., in separate claim sets). A similar interpretation applies to differential-related terms, such as "positive resistor" and "negative resistor".

[0260] Unless the context otherwise requires, the use of the word "or" in this document may be regarded as an "inclusive or" or the use of a term that permits the inclusion or application of one or more of the items linked by the word "or" (e.g., the phrase "A or B" may be interpreted as permitting only "A", only "B", or both "A" and "B"). Additionally, as used herein, the phrase referring to "at least one of" a list of items refers to any combination of those items (which includes a single member). For example, "at least one of a, b, or c" may cover a, b, c, a - b, a - c, b - c, and a - b - c, as well as any combination with multiple identical elements (e.g., a - a, a - a - a, a - a - b, a - a - c, a - b - b, a - c - c, b - b, b - b - b, b - b - c, c - c, and c - c - c, or any other ordering of a, b, and c). Additionally, the items represented in the drawings and the terms discussed herein may indicate one or more items or terms, and thus the singular or plural forms of these items and terms may be interchangeably referred to in this written description.

[0261] Although the specific implementation of oscillator feedthrough calibration has been described in language specific to certain features and / or methods, the subject matter of the appended claims need not be limited to the specific features or methods described. Instead, these specific features and methods are disclosed as example implementations of oscillator feedthrough calibration.

Claims

1. An apparatus, the apparatus comprising: A mixer circuit, the mixer circuit comprising: A first stage, the first stage comprising at least one transistor coupled between a mixer input and a mixer output; A second stage, the second stage comprising one or more transistors coupled between the at least one transistor of the first stage and the mixer output, the one or more transistors being coupled between a local oscillator signal input and the mixer output; and A tuning circuit, the tuning circuit comprising at least one current source, the at least one current source being coupled to the at least one transistor of the first stage.

2. The apparatus according to claim 1, wherein: The tuning circuit comprises a current-based digital-to-analog converter (IDAC).

3. The apparatus according to claim 1, wherein the tuning circuit comprises: A plurality of current sources, the plurality of current sources comprising the at least one current source of the tuning circuit; A plurality of switches, each switch of the plurality of switches being respectively coupled to a current source of the plurality of current sources; And Another switch, the another switch being coupled to the at least one transistor.

4. The apparatus according to claim 3, the apparatus further comprising: At least one register, the at least one register being coupled to the plurality of switches, the at least one register comprising a plurality of bits, each bit of the plurality of bits respectively corresponding to a switch of the plurality of switches.

5. The apparatus according to claim 4, wherein: The at least one register comprises another bit, the another bit corresponding to the another switch; and The another switch of the tuning circuit is coupled between the at least one current source of the tuning circuit and the at least one transistor of the first stage.

6. The apparatus according to claim 1, wherein: The at least one transistor of the first stage comprises a channel terminal; and The at least one current source of the tuning circuit is coupled to the channel terminal of the at least one transistor.

7. The apparatus according to claim 6, wherein: The one or more transistors of the second stage are coupled between the mixer output and the at least one transistor of the first stage via the channel terminal of the at least one transistor.

8. The apparatus according to claim 6, wherein: The tuning circuit comprises at least one resistor, the at least one resistor being coupled between the at least one current source and the channel terminal of the at least one transistor of the first stage.

9. The apparatus according to claim 8, wherein: The at least one transistor of the first stage comprises a positive transistor and a negative transistor; The at least one resistor of the tuning circuit comprises a positive resistor and a negative resistor; And The tuning circuit comprises: A positive switch, the positive switch being serially coupled with the positive resistor between the at least one current source and the channel terminal of the positive transistor of the first stage; And A negative switch, the negative switch being serially coupled with the negative resistor between the at least one current source and the channel terminal of the negative transistor of the first stage.

10. The apparatus according to claim 6, wherein: at least one current source of the tuning circuit is configured to apply at least one current to at least one node corresponding to the channel terminal of at least one transistor of the first stage to adjust a magnitude of a current flowing through one or more transistors of the second stage.

11. The apparatus according to claim 1, wherein: at least one transistor of the first stage includes a gate terminal and a back gate terminal; the gate terminal of the at least one transistor corresponds to the mixer input; and at least one current source of the tuning circuit is coupled to the back gate terminal of the at least one transistor.

12. The apparatus according to claim 11, wherein: at least one current source of the tuning circuit is configured to apply at least one current to at least one node corresponding to the back gate terminal of at least one transistor of the first stage to adjust a level of a voltage at the at least one node.

13. The apparatus according to claim 12, wherein: the tuning circuit is configured to change a level of a voltage of the back gate terminal of at least one transistor of the first stage by adjusting the level of the voltage at the at least one node to change a threshold voltage of the at least one transistor.

14. The apparatus according to claim 11, wherein: the tuning circuit includes at least one resistor, and the at least one resistor is coupled between at least one current source of the tuning circuit and a power distribution node.

15. The apparatus according to claim 14, wherein: at least one transistor of the first stage includes a positive transistor and a negative transistor; at least one current source of the tuning circuit includes a positive current source and a negative current source; at least one resistor of the tuning circuit includes a positive resistor and a negative resistor; and the tuning circuit includes: a positive switch coupled between the positive resistor and the back gate terminal of the positive transistor of the first stage and between the positive current source and the back gate terminal of the positive transistor of the first stage; and a negative switch coupled between the negative resistor and the back gate terminal of the negative transistor of the first stage and between the negative current source and the back gate terminal of the negative transistor of the first stage.

16. The apparatus according to claim 1, the apparatus further comprising: a power detector coupled to a communication link, a controller coupled to the power detector and configured to generate a control signal for the tuning circuit.

17. The apparatus according to claim 1, wherein: the first stage includes a transconductance stage of a mixer; and the second stage includes a cascode stage of the mixer.

18. An apparatus, the apparatus comprising: a power detector configured to detect a power level; and a communication link including: a port configured to be coupled to an antenna; a mixer circuit including: A mixer configured to combine a local oscillator signal and an input signal to produce an output signal; and A tuning circuit coupled between the mixer and the power detector, the tuning circuit being configured to adjust the output signal based on the power level; and An amplifier coupled between the mixer circuit and the port, The power detector is coupled to the communication link between the amplifier and the port.

19. The apparatus according to claim 18, wherein the tuning circuit is configured to: Inject at least one current into the mixer to adjust the output signal of the mixer based on the power level detected by the power detector.

20. The apparatus according to claim 18, wherein the tuning circuit is configured to: Change at least one voltage level of the back gate terminal of at least one transistor to adjust the output signal of the mixer.

21. The apparatus according to claim 18, the apparatus further comprising: A controller circuit coupled between the power detector and the tuning circuit, the controller circuit being configured to: Make the input signal of the mixer substantially zero; Couple the local oscillator signal having a frequency to the mixer; When the local oscillator signal has the frequency and the input signal is substantially zero, operate the power detector to detect the power level; And Establish one or more settings for the tuning circuit.

22. The apparatus according to claim 21, wherein: The controller circuit is configured to establish the one or more settings for the tuning circuit to substantially reduce the amount of the local oscillator signal from the local oscillator within the communication link.

23. The apparatus according to claim 21, the apparatus further comprising: At least one register coupled to the tuning circuit, wherein: The controller circuit is configured to establish the one or more settings for the tuning circuit by programming the at least one register with at least one value based on the power level detected by the power detector; and The tuning circuit is configured to use the at least one value of the at least one register to cancel the feedthrough of the local oscillator signal from the mixer along at least a portion of the communication link.

24. The apparatus according to claim 21, wherein: The power level detected by the power detector represents the feedthrough of the local oscillator signal from the mixer along at least a portion of the communication link.

25. The apparatus according to claim 18, wherein: The mixer is configured to convert the input frequency of the input signal to the output frequency of the output signal based on the frequency of the local oscillator signal.

26. The apparatus according to claim 18, wherein: The communication link includes a transmit chain; and The mixer is configured to perform frequency upconversion.

27. The apparatus according to claim 26, the apparatus further comprising: A wireless interface device, the wireless interface device including the transmission chain and the power detector; A display screen; And At least one processor, the at least one processor operatively coupled to at least a portion of the display screen and the wireless interface device, the at least one processor configured to present one or more graphical images on the display screen based on one or more wireless signals communicated using the mixer circuit of the wireless interface device.

28. A method for mixer calibration, the method comprising: Operating a mixer to generate an output signal based on an input signal and a local oscillator signal; Propagating the output signal through one or more components; Using at least one of the one or more components to adjust the output signal to produce an adjusted signal; Detecting a power level associated with the adjusted signal to obtain a detected power level; And Calibrating the operation of the mixer based on the detected power level.

29. An apparatus, the apparatus comprising: A mixer circuit, the mixer circuit including: A first stage, the first stage including at least one transistor coupled between a mixer input and a mixer output, the at least one transistor including a gate terminal and a back gate terminal, the gate terminal of the at least one transistor corresponding to the mixer input; A second stage, the second stage including one or more transistors coupled between the at least one transistor of the first stage and the mixer output, the one or more transistors coupled between a local oscillator signal input and the mixer output; and A tuning circuit, the tuning circuit including at least one current source, the at least one current source coupled to the back gate terminal of the at least one transistor.

30. The apparatus according to claim 29, wherein: The mixer output includes a positive mixer output and a negative mixer output; The at least one transistor of the first stage includes: A positive transistor, the positive transistor coupled between a power distribution node and the second stage via a channel terminal of the positive transistor; and A negative transistor, the negative transistor coupled between the power distribution node and the second stage via a channel terminal of the negative transistor; and The one or more transistors of the second stage includes: A first positive transistor, the first positive transistor coupled between the positive transistor and the positive mixer output via a channel terminal of the first positive transistor; A first negative transistor, the first negative transistor coupled between the negative transistor and the positive mixer output via a channel terminal of the first negative transistor; A second positive transistor, the second positive transistor coupled between the negative transistor and the negative mixer output via a channel terminal of the second positive transistor; and A second negative transistor, the second negative transistor coupled between the positive transistor and the negative mixer output via a channel terminal of the second negative transistor.

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