Semiconductor light-emitting element and display device

Abstract

A semiconductor light emitting element includes: a light emitting layer having a first region and a second region surrounding the first region; a first electrode on top of the first region; a second electrode on top of the second region; a passivation layer surrounding the light emitting layer; and a metal oxide layer on the bottom of the light emitting layer. A thickness of the metal oxide layer may be less than a thickness of the passivation layer.

Description

Technical Field

[0001] The present embodiment relates to a semiconductor light-emitting element and a display device. Background Art

[0002] Large-area displays include liquid crystal displays (LCDs), OLED displays, and micro-LED displays.

[0003] A micro-LED display is a display that uses micro-LEDs as display elements, and each of the micro-LEDs is a semiconductor light-emitting element having a diameter or cross-sectional area of 100 μm or less.

[0004] Since a micro-LED display uses micro-LEDs, each of which is a semiconductor light-emitting element, as display elements, it has excellent performance in many characteristics such as contrast, response speed, color reproducibility, viewing angle, brightness, resolution, lifespan, luminous efficiency, or luminance.

[0005] In particular, a micro-LED display has the advantages of being able to freely adjust the size or resolution by separating and combining the screen in a modular manner and being able to implement a flexible display.

[0006] However, since a large micro-LED display requires millions or more micro-LEDs, there is a technical problem in that it is difficult to transfer the micro-LEDs to the display panel quickly and accurately.

[0007] Recently developed transfer techniques include a pick-and-place process, a laser lift-off method, and a self-assembly method.

[0008] Among them, the self-assembly method is a method in which semiconductor light-emitting elements find their assembly positions in a fluid, which is advantageous for realizing a large-screen display device.

[0009] However, research on techniques for manufacturing a display by self-assembly of micro-LEDs is still insufficient.

[0010] In particular, in the case of quickly transferring millions or more semiconductor light-emitting elements to a large display in the conventional technology, the transfer speed can be increased, but the transfer error rate may increase, which causes a technical problem of a decrease in transfer yield.

[0011] In the related art, a self-assembly transfer process using dielectrophoresis (DEP) is being attempted, but there is a problem of low self-assembly rate due to the non-uniformity of the DEP force and the like.

[0012] Meanwhile, since the anode electrode and the cathode electrode are disposed on the upper side, the lateral semiconductor light-emitting element has the advantage of being easily electrically connected. However, as the lateral semiconductor light-emitting element is reduced to a micron size to be used as a pixel (or sub-pixel) for a display, its light brightness decreases, and various methods are being studied to solve this problem.

[0013] As Figure 1 shown, a method of improving the light brightness by light reflection has been proposed by disposing a reflective layer 3 such as Al, Ag, or APC (Ag-Pd-Cu) on the lower side of the lateral semiconductor light-emitting element 1.

[0014] However, since the reflective layer 3 is made of metal, during self-assembly, the lateral semiconductor light-emitting element 1 is adsorbed on the surface of the substrate, which reduces the assembly rate. That is, through the self-assembly process, each of the plurality of lateral semiconductor light-emitting elements 1 must be assembled in the correct position. However, due to the reflective layer 3 of the lateral semiconductor light-emitting element 1, the lateral semiconductor light-emitting element 1 may be assembled at a position other than the correct position on the substrate, which reduces the assembly rate. In addition, the lateral semiconductor light-emitting element 1 assembled at the wrong position is not electrically connected, which causes lighting defects.

[0015] In addition, the bonding force between the reflective layer 3 and the epitaxial layer (semiconductor layer) in the lateral semiconductor light-emitting element 1 is very weak, and due to the collision of the plurality of lateral semiconductor light-emitting elements 1 with each other during self-assembly, the bonding force between the reflective layer 3 and the epitaxial layer (semiconductor layer) becomes even weaker, causing the reflective layer 3 to peel off from the epitaxial layer (semiconductor layer). Therefore, this results in defects in the lateral semiconductor light-emitting element 1 itself or product defects such as a display device.

[0016] Meanwhile, in order to improve the response speed of the magnet during self-assembly, a metal layer such as titanium (Ti) can be disposed on the lower side of the lateral semiconductor light-emitting element. However, since a metal layer such as titanium (Ti) has excellent light absorption ability, there is a problem of reduced light reflectivity. For example, it has been reported that more than 70% of the light directed at a metal layer such as titanium (Ti) is absorbed.

[0017] Therefore, there is an urgent need to develop a lateral semiconductor light-emitting element that can improve the assembly rate during self-assembly and minimize light absorption.

[0018] Meanwhile, no layer may be disposed on the lower side of the lateral semiconductor light-emitting element. In this case, during the manufacturing process of the lateral semiconductor light-emitting element, the epitaxial layer (semiconductor layer) is exposed to the etchant, and the epitaxial layer (semiconductor layer) is damaged by the etchant. Therefore, as the electrical characteristics or optical characteristics of the lateral semiconductor light-emitting element deteriorate, there is a problem of reduced light brightness of the display device. Summary of the Invention

[0019] Technical Problem

[0020] The object of the present embodiment is to solve the above problems and other problems.

[0021] Another object of the present embodiment is to provide a semiconductor light-emitting element and a display device capable of improving the light brightness.

[0022] In addition, another object of the present embodiment is to provide a semiconductor light-emitting element and a display device capable of solving the adsorption problem during self-assembly.

[0023] In addition, another object of the present embodiment is to provide a semiconductor light-emitting element and a display device capable of improving the assembly rate.

[0024] The technical problems of the present embodiment are not limited to the technical problems described in this project, but include those technical problems that can be understood through the description of the present invention.

[0025] Technical Solution

[0026] According to one aspect of the embodiment, in order to achieve the above or other objects, a semiconductor light-emitting element includes: a light-emitting layer having a first region and a second region surrounding the first region; a first electrode on an upper side of the first region; a second electrode on an upper side of the second region; a passivation layer surrounding the light-emitting layer; and a metal oxide layer on a lower side of the light-emitting layer; and a thickness of the metal oxide layer is less than a thickness of the passivation layer.

[0027] The thickness of the metal oxide layer may be 1 / 3 or less of the thickness of the passivation layer.

[0028] The metal oxide layer may include a conductive oxide layer. The metal oxide layer may include a dielectric oxide layer.

[0029] The metal oxide layer may include a conductive oxide layer and a dielectric oxide layer.

[0030] The conductive oxide layer may be disposed on a lower side of the light-emitting layer, and the dielectric oxide layer may be disposed on a lower side of the conductive oxide layer. The dielectric oxide layer may have a plurality of grooves.

[0031] The dielectric oxide layer may be disposed on a lower side of the light-emitting layer, and the conductive oxide layer may be disposed on a lower side of the dielectric oxide layer. The conductive oxide layer may have a plurality of grooves.

[0032] The metal oxide layer may include a plurality of first metal oxide layers and a plurality of second metal oxide layers disposed between the plurality of first metal oxide layers. The sum of the total thicknesses of the plurality of first metal oxide layers and the plurality of second metal oxide layers may be less than or equal to 1 / 2 of the thickness of the passivation layer.

[0033] The metal oxide may be disposed on a lateral portion of the light-emitting layer. The metal oxide may horizontally overlap with the passivation layer.

[0034] According to another aspect of an embodiment, a display device includes: a substrate; a reflector disposed on the substrate; an adhesive layer disposed on the reflector; a plurality of semiconductor light-emitting elements that emit different-color light on the adhesive layer; and first electrode wirings and second electrode wirings on an upper side of each of the plurality of semiconductor light-emitting elements, wherein the first electrode wirings and the second electrode wirings may be respectively connected to a first electrode and a second electrode of each of the plurality of semiconductor light-emitting elements.

[0035] Advantageous Effects

[0036] According to an embodiment, as Figure 8 shown, a metal oxide layer 218 may be disposed on a lower side of a semiconductor light-emitting element 200, and the thickness t2 of the metal oxide layer 218 may be made smaller than the thickness t1 of the passivation layer 217. The semiconductor light-emitting element 200 may be a lateral-type semiconductor light-emitting element. Thus, during self-assembly, a lower side of the semiconductor light-emitting element 200 may be attracted by a DEP force instead of being repelled, and an upper side of the semiconductor light-emitting element 200 may be repelled instead of being attracted. Thus, during self-assembly, the semiconductor light-emitting element 200 may be correctly assembled without being flipped, thereby preventing lighting defects.

[0037] According to an embodiment, when a reflective layer serving as a metal substrate in non-disclosed internal technology is disposed on a lower side of a lateral-type semiconductor light-emitting element, a problem that the lateral-type semiconductor light-emitting element is adsorbed to a backplane substrate through the reflective layer and thus the assembly rate is reduced may be solved. That is, according to an embodiment, since the hydrophilic metal oxide layer 218 is disposed on a lower side of the semiconductor light-emitting element 200, during self-assembly, the semiconductor light-emitting element 200 may not be adsorbed to a surface of the backplane substrate through the metal oxide layer 218, thereby improving the assembly rate.

[0038] According to an embodiment, when a metal layer such as Ti is provided under a lateral semiconductor light-emitting element to increase the response speed to a magnet during self-assembly in non-disclosed internal technology, the problem of reducing the light extraction efficiency due to the metal layer absorbing most of the downward-propagating light can be solved. That is, according to an embodiment, as Figure 8 shown, by providing a metal oxide layer 218 under the semiconductor light-emitting element 200 and making the thickness t2 of the metal oxide layer 218 less than the thickness t1 of the passivation layer 217, light can be transmitted rather than absorbed.

[0039] According to an embodiment, as Figure 22 shown, the metal oxide layer 218 can be provided under the semiconductor light-emitting element 200-1, the thickness t2 of the metal oxide layer 218 can be made less than the thickness t1 of the passivation layer 217, and the reflector 285-1 can be provided under the semiconductor light-emitting element 200-1 on the backplane substrate. With a display device having such a structure, at least 80% (based on the red band) or 85% (based on the green band or blue band) of the light propagating downward from the semiconductor light-emitting element 200-1 can be reflected forward, thereby increasing the light luminance.

[0040] According to an embodiment, as Figures 25 to 28 shown, the metal oxide layer 218 can include a conductive oxide layer 218-1 and a dielectric oxide layer 218-2. In this case, when the conductive oxide layer 218-1 or the dielectric oxide layer 218-2 is positioned at the lowermost layer, some of the light that has propagated downward from the active layers 212 of the semiconductor light-emitting elements 200A and 200B can be diffusely reflected and propagated forward through the plurality of grooves 218-1H and 218-2H provided at the lowermost layer, and some other light can propagate downward from the semiconductor light-emitting elements 200A and 200B and can be reflected forward by the reflectors 285-1 to 285-3 provided on the backplane substrate (see Figure 19 280). Therefore, the light extraction efficiency can be further increased, and the light luminance can be significantly increased.

[0041] According to an embodiment, as Figure 29 shown, by laminating a plurality of first metal oxide layers 218-1a to 218-1c and a plurality of second metal oxide layers 218-2a to 218-2c having different refractive indexes, the metal oxide layer 218 can be used as a reflective layer. In this case, the first metal oxide layers 218-1a to 218-1c and the second metal oxide layers 218-2a to 218-2c are not made of pure metal and have a strong bonding strength with the epitaxial layer, so that the peeling problem does not occur, and thus defects of the semiconductor light-emitting element 200C itself or product defects such as a display device can be prevented.

[0042] According to an embodiment, as Figure 30 shown, the metal oxide layer 218 may be disposed on the passivation layer 217 along the periphery of the lateral portions of the light emitting layers 211 to 213, so that the light emitting layers 211 to 213 (or the epitaxial layer) can be prevented from being damaged due to the penetration of the etchant 231, as Figure 14 shown. Accordingly, light emission failure of the semiconductor light emitting element 200D can be prevented.

[0043] From the following detailed description, the additional scope of application of the present embodiment will become apparent. However, since various changes and modifications within the spirit and scope of the embodiment can be clearly understood by those skilled in the art, the detailed description and the specific embodiments (e.g., preferred embodiments) should be understood as being given by way of example only. BRIEF DESCRIPTION OF THE DRAWINGS

[0044] Figure 1 Shows a state in which a metal reflection layer is peeled off in a semiconductor light emitting element according to non-disclosed internal technology.

[0045] Figure 2 Shows a living room of a house provided with a display device according to an embodiment.

[0046] Figure 3 is a block diagram schematically showing a display device according to an embodiment.

[0047] Figure 4 is a diagram showing Figure 3 an example of a pixel of

[0048] Figure 5 is Figure 2 an enlarged view of a first panel area in a display device of

[0049] Figure 6 Shows a manufacturing process of a display device according to an embodiment.

[0050] Figure 7 Shows a plurality of semiconductor light emitting elements manufactured at the wafer level.

[0051] Figure 8 is a cross-sectional view showing a semiconductor light emitting element according to a first embodiment.

[0052] Figure 9 is a plan view showing a first electrode and a second electrode in a semiconductor light emitting element according to a first embodiment.

[0053] Figures 10 to 14 Shows a manufacturing process of a semiconductor light emitting element according to a first embodiment.

[0054] Figure 15 Shows a process of assembling a plurality of semiconductor light-emitting elements on an interposer by performing a self-assembly process.

[0055] Figure 16 Shows the assembly rate according to voltage in each of the comparative example, Embodiment 1, and Embodiment 2.

[0056] Figures 17 to 19 Shows a process of transferring a plurality of semiconductor light-emitting elements onto a backplane substrate using a pick-and-place process.

[0057] Figure 20 Is a cross-sectional view showing an interposer according to an embodiment.

[0058] Figure 21 Is a cross-sectional view showing a display device according to an embodiment.

[0059] Figure 22 Shows an improvement in the luminance of a reflector and a metal oxide layer using semiconductor light-emitting elements in a display device according to an embodiment.

[0060] Figure 23 Shows the light reflectance in the red wavelength band in each of Embodiment 1 and Embodiment 2.

[0061] Figure 24 Shows the light reflectance in the green and blue wavelength bands in each of Embodiment 1 and Embodiment 2.

[0062] Figure 25 Is a cross-sectional view showing a semiconductor light-emitting element according to a second embodiment.

[0063] Figure 26 Is a plan view showing a dielectric oxide layer in a semiconductor light-emitting element according to a second embodiment.

[0064] Figure 27 Is a cross-sectional view showing a semiconductor light-emitting element according to a third embodiment.

[0065] Figure 28 Is a plan view showing a conductive oxide layer in a semiconductor light-emitting element according to a third embodiment.

[0066] Figure 29 Is a cross-sectional view showing a semiconductor light-emitting element according to a fourth embodiment.

[0067] Figure 30 Is a cross-sectional view showing a semiconductor light-emitting element according to a fifth embodiment.

[0068] Figure 31 Is a cross-sectional view showing a semiconductor light-emitting element according to a sixth embodiment.

[0069] The sizes, shapes, dimensions, etc. of the components shown in the drawings may be different from the actual ones. In addition, even if the same components are shown with different sizes, shapes, dimensions, etc. between the drawings, this is only an example on the drawings, and the same components have the same size, form, dimensions, etc. between the drawings. Detailed implementation mode

[0070] Hereinafter, the implementation modes disclosed in this specification will be described in detail with reference to the drawings. However, regardless of the reference numerals, the same or similar components are given the same reference numerals, and redundant descriptions thereof will be omitted. For the convenience of writing this specification, the suffixes "module" and "unit" of the components used in the following description can be used interchangeably, and they do not have different meanings or functions from each other. In addition, the drawings are for facilitating the understanding of the implementation modes disclosed in this specification, and the technical idea disclosed in this specification is not limited by the drawings. In addition, when an element (e.g., a layer, a region, or a substrate) is referred to as being "on" another element, this means that it can be directly on the other element, or there can be other intermediate elements between them.

[0071] The display device described in this specification may include a TV, a signboard, a mobile terminal such as a mobile phone or a smart phone, a computer monitor such as a laptop or a desktop computer, a head-up display (HUD) for an automobile, a backlight unit for a display, a display for VR, AR, or mixed reality (MR), a light source, etc. However, the configuration according to the implementation modes described in this specification can equally be applied to a device capable of displaying, even if it is a new product type developed in the future.

[0072] Figure 2 A living room of a house provided with a display device according to an implementation mode is shown.

[0073] Refer to Figure 2 , the display device 100 according to an implementation mode can display the states of various electronic products such as a washing machine 101, a robotic vacuum cleaner 102, an air purifier 103, etc., and can communicate with each electronic product based on IoT, and control each electronic product based on user-set data.

[0074] The display device 100 according to an implementation mode may include a flexible display manufactured on a thin and flexible substrate. This flexible display can be bent or curled like paper while maintaining the characteristics of a traditional flat panel display.

[0075] In a flexible display, visual information can be achieved by independently controlling the light emission of unit pixels arranged in a matrix. A unit pixel refers to the smallest unit for achieving one color. The unit pixels of a flexible display can be implemented by light-emitting elements. In an embodiment, the light-emitting elements can be micro LEDs or nano LEDs, but are not limited thereto.

[0076] Figure 3 is a block diagram schematically showing a display device according to an embodiment, and Figure 4 shows Figure 3 an example of a pixel in a circuit diagram.

[0077] Referring to Figure 3 and Figure 4 , a display device according to an embodiment may include a display panel 10, a driving circuit 20, a scan driving unit 30, and a power supply circuit 50.

[0078] The display device 100 of the present embodiment can drive the light-emitting elements in an active matrix (AM) mode or a passive matrix (PM) mode.

[0079] The driving circuit 20 may include a data driving unit 21 and a timing control unit 22.

[0080] The display panel 10 may be formed in a rectangular shape, but is not limited thereto. That is, the display panel 10 may be formed in a circular or elliptical shape. At least one side of the display panel 10 may be formed to be curved with a predetermined curvature.

[0081] The display panel may include a display area DA. The display area DA is an area where pixels PX are formed to display an image. The display panel may include a non-display area NDA. The non-display area NDA may be an area other than the display area DA.

[0082] As an example, the display area DA and the non-display area NDA may be defined on the same surface. For example, the non-display area NDA may surround the display area DA on the same surface together with the display area DA, but is not limited thereto.

[0083] As another example, although not shown in the figure, the display area DA and the non-display area NDA may be defined on different surfaces. For example, the display area DA may be defined on the upper surface of the substrate, and the non-display area NDA may be defined on the lower surface of the substrate. For example, the non-display area NDA may be defined on the entire area or a part of the lower surface of the substrate.

[0084] Meanwhile, although the drawings show that it is divided into a display area DA and a non-display area NDA, it may not be divided into a display area DA and a non-display area NDA. In other words, only the display area DA may exist on the upper surface of the substrate, and the non-display area NDA may not exist. In other words, the entire area of the upper surface of the substrate may be a display area DA where an image is displayed, and there may be no border area as the non-display area NDA.

[0085] The display panel 10 may include data lines (D1 to Dm, where m is an integer greater than or equal to 2), scan lines (S1 to Sn, where n is an integer greater than or equal to 2) intersecting the data lines D1 to Dm, a high-potential voltage line VDDL supplied with a high-potential voltage VDD, a low-potential voltage line VSSL supplied with a low-potential voltage VSS, and pixels PX connected to the data lines D1 to Dm and the scan lines S1 to Sn.

[0086] Each of the pixels PX may include a first sub-pixel PX1, a second sub-pixel PX2, and a third sub-pixel PX3. The first sub-pixel PX1 may emit first-color light having a first main wavelength, the second sub-pixel PX2 may emit second-color light having a second main wavelength, and the third sub-pixel PX3 may emit third-color light having a third main wavelength. The first-color light may be red light, the second-color light may be green light, and the third-color light may be blue light, but is not limited thereto. In addition, although Figure 3 each of the pixels PX is shown to include three sub-pixels, it is not limited thereto. That is, each of the pixels PX may include four or more sub-pixels.

[0087] Each of the first sub-pixel PX1, the second sub-pixel PX2, and the third sub-pixel PX3 may be connected to at least one of the data lines D1 to Dm, at least one of the scan lines S1 to Sn, and the high-potential voltage line VDDL. As Figure 4 shown, the first sub-pixel PX1 may include a light-emitting element LD, a plurality of transistors for supplying current to the light-emitting element LD, and at least one capacitor Cst.

[0088] Although not shown in the drawings, each of the first sub-pixel PX1, the second sub-pixel PX2, and the third sub-pixel PX3 may include only one light-emitting element LD and at least one capacitor Cst.

[0089] Each of the light-emitting elements LD may be a semiconductor light-emitting diode including a first electrode, a plurality of conductive-type semiconductor layers, and a second electrode. Here, the first electrode may be an anode electrode, and the second electrode may be a cathode electrode, but is not limited thereto.

[0090] The light-emitting element LD can be one of a lateral light-emitting element, a flip-chip light-emitting element, and a vertical light-emitting element.

[0091] As Figure 4 shown, the plurality of transistors may include a driving transistor DT for supplying current to the light-emitting element LD and a scanning transistor ST for supplying a data voltage to the gate electrode of the driving transistor DT. The driving transistor DT may include a gate electrode connected to the source electrode of the scanning transistor ST, a source electrode connected to a high-potential voltage line VDDL to which a high-potential voltage VDD is applied, and a drain electrode connected to the first electrode of the light-emitting element LD. The scanning transistor ST may include a gate electrode connected to a scanning line (Sk, where k is an integer satisfying 1 ≤ k ≤ n), a source electrode connected to the gate electrode of the driving transistor DT, and a drain electrode connected to a data line (Dj, where j is an integer satisfying 1 ≤ j ≤ m).

[0092] A capacitor Cst is formed between the gate electrode and the source electrode of the driving transistor DT. The storage capacitor Cst charges the difference between the gate voltage and the source voltage of the driving transistor DT.

[0093] The driving transistor DT and the scanning transistor ST may be formed as thin-film transistors. In addition, although Figure 4 it has been mainly described that the driving transistor DT and the scanning transistor ST are formed as P-type metal-oxide semiconductor field-effect transistors (MOSFETs), the present invention is not limited thereto. The driving transistor DT and the scanning transistor ST may be formed as N-type MOSFETs. In this case, the positions of the source electrode and the drain electrode of each of the driving transistor DT and the scanning transistor ST may be changed.

[0094] In addition, in Figure 4 it is shown that each of the first sub-pixel PX1, the second sub-pixel PX2, and the third sub-pixel PX3 includes a 2T1C (2 transistors - 1 capacitor) having one driving transistor DT, one scanning transistor ST, and one capacitor Cst, but the present invention is not limited thereto. Each of the first sub-pixel PX1, the second sub-pixel PX2, and the third sub-pixel PX3 may include a plurality of scanning transistors ST and a plurality of capacitors Cst.

[0095] Since the second sub-pixel PX2 and the third sub-pixel PX3 can be represented by substantially the same circuit diagram as the first sub-pixel PX1, their detailed descriptions will be omitted.

[0096] The driving circuit 20 outputs signals and voltages for driving the display panel 10. To this end, the driving circuit 20 may include a data driving unit 21 and a timing control unit 22.

[0097] The data driving unit 21 receives digital video data DATA and a source control signal DCS from the timing control unit 22. The data driving unit 21 converts the digital video data DATA into an analog data voltage according to the source control signal DCS, and supplies the converted data to data lines D1 to Dm of the display panel 10.

[0098] The timing control unit 22 receives digital video data DATA and a timing signal from a host system. The host system may be an application processor of a smart phone or a tablet PC, a monitor, a system-on-chip of a TV, etc.

[0099] The timing control unit 22 generates control signals for controlling the operation timing of the data driving unit 21 and the scan driving unit 30. The control signals may include a source control signal DCS for controlling the operation timing of the data driving unit 21 and a scan control signal SCS for controlling the operation timing of the scan driving unit 30.

[0100] The driving circuit 20 may be disposed in a non-display area NDA arranged on one side of the display panel 10. The driving circuit 20 may be formed as an integrated circuit (IC), and may be mounted on the display panel 10 in a chip-on-glass (COG) manner, a chip-on-plastic (COP) manner, or an ultrasonic bonding manner, but the present invention is not limited thereto. For example, the driving circuit 20 may be mounted on a circuit board (not shown) other than the display panel 10.

[0101] The data driving unit 21 may be mounted on the display panel 10 in a chip-on-glass (COG) manner, a chip-on-plastic (COP) manner, or an ultrasonic bonding manner, and the timing control unit 22 may be mounted on a circuit board.

[0102] The scan driving unit 30 receives a scan control signal SCS from the timing control unit 22. The scan driving unit 30 generates scan signals according to the scan control signal SCS, and supplies them to scan lines S1 to Sn of the display panel 10. The scan driving unit 30 may be formed in the non-display area NDA of the display panel 10 including a plurality of transistors. Alternatively, the scan driving unit 30 may be formed as an integrated circuit, in which case it may be mounted on a gate flexible film attached to the other side of the display panel 10.

[0103] The power supply circuit 50 may generate voltages required to drive the display panel 10 from a main power supply applied from a system board, and supply them to the display panel 10. For example, the power supply circuit 50 may generate a high-potential voltage VDD and a low-potential voltage VSS for driving the light-emitting elements LD of the display panel 10 from the main power supply, and supply them to the display panel 10. In addition, the power supply circuit 50 may generate and supply a driving voltage for driving the driving circuit 20 and the scan driving unit 30 from the main power supply.

[0104] Figure 5 is Figure 2 An enlarged view of a first panel region in a display device of

[0105] Referring to Figure 5 , the display device 100 of the present embodiment can be manufactured by mechanically and electrically connecting a plurality of panel regions (e.g., the first panel region A1) via tiling.

[0106] The first panel region A1 may include a plurality of semiconductor light-emitting elements 150 provided for each unit pixel (see PX in Figure 3 ).

[0107] Hereinafter, various embodiments for solving the above problems will be described with reference to Figures 6 to 31 . Any description omitted below can be easily understood based on the above description of Figures 1 to 5 and the corresponding drawings.

[0108] The semiconductor light-emitting elements described below may have a size of micrometers or less.

[0109] In addition, the semiconductor light-emitting elements described below may be semiconductor light-emitting elements in which a first electrode (anode electrode) and a second electrode (cathode electrode) are provided facing forward. Therefore, the semiconductor light-emitting elements described below may refer to semiconductor light-emitting elements.

[0110] Figure 6 Shows a manufacturing process of a display device according to an embodiment.

[0111] Referring to Figure 6 , the manufacturing process of the display device according to the embodiment may include a manufacturing process (S201) of semiconductor light-emitting elements, a transfer process (S202) onto an intermediate layer, and a transfer process (S203) onto a backplane substrate.

[0112] The manufacturing process (S201) of semiconductor light-emitting elements may be a process of manufacturing a large number of semiconductor light-emitting elements using a wafer-level process based on a wafer. For example, as Figure 7As shown, a large number of red semiconductor light-emitting elements 200 can be manufactured using a first wafer-level process based on the first wafer 201. Although not shown, a large number of green semiconductor light-emitting elements can be manufactured using a second wafer-level process based on a second wafer. Although not shown, a large number of blue semiconductor light-emitting elements can be manufactured using a third wafer-level process based on a third wafer. For example, the first wafer 201 can be a GaAs substrate, and the second wafer and / or the third wafer can be a sapphire substrate. Here, the wafer-level process can refer to the entire process in which semiconductor light-emitting elements are transferred from a wafer to a temporary substrate and the temporary substrate is removed. The manufacturing process (S201) of the semiconductor light-emitting element will be described in detail later with reference to Figures 10 to 14 The manufacturing process (S201) of the semiconductor light-emitting element will be described in detail.

[0113] The transfer process (S202) to the interposer can be a process in which a plurality of red semiconductor light-emitting elements, a plurality of green semiconductor light-emitting elements, and a plurality of blue semiconductor light-emitting elements are transferred to the interposer using a self-assembly process.

[0114] The transfer process (S203) to the backplane substrate can be a process in which a plurality of red semiconductor light-emitting elements, a plurality of green semiconductor light-emitting elements, and a plurality of blue semiconductor light-emitting elements on the interposer are transferred to the backplane substrate using a pick-and-place process. The transfer process (S202) to the interposer and the transfer process (S203) to the backplane substrate will be described in detail later with reference to Figures 15 to 19 The transfer process (S202) to the interposer and the transfer process (S203) to the backplane substrate will be described in detail.

[0115] [First Embodiment]

[0116] Figure 8 is a cross-sectional view showing a semiconductor light-emitting element according to the first embodiment.

[0117] Figure 9 is a plan view showing a first electrode and a second electrode in a semiconductor light-emitting element according to the first embodiment.

[0118] Referring to Figure 8 and Figure 9 , the semiconductor light-emitting element 200 according to the first embodiment can include light-emitting layers 211 to 213, a first electrode 215, a second electrode 216, a passivation layer 217, and a metal oxide layer 218.

[0119] The light-emitting layers 211 to 213 can emit light of a specific color. The light of a specific color can be determined by the semiconductor material of the light-emitting layers 211 to 213. The light of a specific color can be, for example, red light, green light, or blue light. For example, in order to emit red light, the light-emitting layers 211 to 213 can use a semiconductor material of the GaInAlP series. In order to emit green light or blue light, the light-emitting layers 211 to 213 can use a semiconductor material of the GaAlInN series.

[0120] The light-emitting layers 211 to 213 may include a plurality of semiconductor layers. For example, the light-emitting layers 211 to 213 may include at least one or more first-conductive-type semiconductor layers 211, an active layer 212, and at least one or more second-conductive-type semiconductor layers 213. The active layer 212 may be disposed on the first-conductive-type semiconductor layer 211, and the second-conductive-type semiconductor layer 213 may be disposed on the active layer 212. The first-conductive-type semiconductor layer 211 may include an n-type dopant, and the second-conductive-type semiconductor layer 213 may include a p-type dopant, but is not limited thereto.

[0121] The light-emitting layers 211 to 213 may have a first region 200a and a second region 200b surrounding the first region 200a.

[0122] The passivation layer 217 may be made of a material having excellent insulating properties to protect the light-emitting layers 211 to 213 and prevent leakage current from flowing to the lateral portions of the light-emitting layers 211 to 213. In addition, the passivation layer 217 may be appropriately assembled by making the repulsive force resist the DEP force during self-assembly, so that the lower side of the semiconductor light-emitting element 200 may face the bottom surface of the assembly hole.

[0123] The passivation layer 217 may surround the lateral portions of the light-emitting layers 211 to 213. The passivation layer 217 may be disposed on the upper side of the light-emitting layers 211 to 213. The passivation layer 217 may be disposed on the first electrode 215 and the second electrode 216 located on the light-emitting layers 211 to 213.

[0124] The first electrode 215 and the second electrode 216 may be disposed on the upper side of the light-emitting layers 211 to 213. The first electrode 215 may be disposed on the upper side of the first region 200a of the light-emitting layers 211 to 213, and the second electrode 216 may be disposed on the upper side of the second region 200b of the light-emitting layers 211 to 213. The second electrode 216 may surround the first electrode 215. The second electrode 216 may be disposed along the periphery of the lateral portion of the first electrode 215. The first electrode 215 and the second electrode 216 may be spaced apart from each other.

[0125] The first electrode 215 and the second electrode 216 may be disposed on different layers. The first electrode 215 may be disposed on the second-conductive-type semiconductor layer 213 of the light-emitting layers 211 to 213. The first electrode 215 may be in contact with the upper surface of the second-conductive-type semiconductor layer 213, but is not limited thereto. The second electrode 216 may be disposed on the first-conductive-type semiconductor layer 211 of the light-emitting layers 211 to 213. The second electrode 216 may be in contact with the upper surface of the first-conductive-type semiconductor layer 211, but is not limited thereto.

[0126] The first electrode 215 and the second electrode 216 may be positioned at different heights. The second-conductive-type semiconductor layer 213 may be positioned on the active layer 212, and the active layer 212 may be positioned on the first-conductive-type semiconductor layer 211 such that the first electrode 215 on the second-conductive-type semiconductor layer 213 may be positioned higher than the sum of the thickness of the active layer and the thickness of the second-conductive-type semiconductor layer 213 as compared with the second electrode 216 on the first-conductive-type semiconductor layer 211.

[0127] As an example, the first electrode 215 and the second electrode 216 may be formed of metal. The first electrode 215 and the second electrode 216 may be formed of different metals. Each of the first electrode 215 and the second electrode 216 may have a multilayer structure. The multilayer structure may include a magnetic layer, but is not limited thereto.

[0128] As another example, the first electrode 215 and the second electrode 216 may be made of a transparent conductive material. For example, the first electrode 215 and the second electrode 216 may be made of ITO or the like.

[0129] Meanwhile, as described above, according to non-disclosed internal technology, in order to compensate for a reduction in light luminance in a lateral-type semiconductor light-emitting element having a size of microns or less, a reflective layer made of metal is provided on the lower side of the lateral-type semiconductor light-emitting element. However, due to the adsorption of the metal to the lateral-type semiconductor light-emitting element during self-assembly, the assembly rate is reduced. In addition, since the bonding force between the epitaxial layer of the lateral-type semiconductor light-emitting element and the reflective layer is weakened, the reflective layer is peeled off.

[0130] In addition, according to non-disclosed internal technology, in order to increase the response speed of a magnet during self-assembly, a metal layer such as titanium (Ti) is provided on the lower side of the lateral-type semiconductor light-emitting element. However, a metal layer such as titanium (Ti) has excellent light absorption ability, and thus the light reflectivity is reduced.

[0131] Meanwhile, in order to easily assemble the lateral-type semiconductor light-emitting element at the correct position by DEP force during self-assembly, the region or arrangement position of the passivation layer 217 having a permittivity in the lateral-type semiconductor light-emitting element and the region or arrangement position of the metal are very important. Therefore, when the reflective layer is not provided to solve the above problems, the movement control of the lateral-type semiconductor light-emitting element may be unstable due to the DEP force, making it difficult to assemble it at the correct position. For example, the lateral-type semiconductor light-emitting element may be assembled upside down, and in this case, electrical connection by post-processing is impossible, resulting in poor lighting.

[0132] According to an embodiment, in order to solve all of the above problems, a metal oxide layer 218 may be provided on the lower side of the semiconductor light-emitting element 200.

[0133] The metal oxide layer 218 may be disposed on the lower side of the light-emitting layers 211 to 213. The metal oxide layer 218 may be disposed below the first region 200a of the light-emitting layers 211 to 213. The metal oxide layer 218 may be disposed below the second region 200b of the light-emitting layers 211 to 213. The metal oxide layer 218 may be positioned on the same horizontal line. The metal oxide layer 218 may be in contact with the lower surface of the first conductive-type semiconductor layer 211, but is not limited thereto.

[0134] The metal oxide layer 218 may have conductive or dielectric (or insulating) properties depending on its type. That is, the metal oxide layer 218 may have conductive or dielectric properties depending on the type, quantity, and / or mixing ratio of the metal combined with the oxide.

[0135] For example, the conductive oxide layer 218-1 may include ITO, SnO, AZO (ZnO:Al), BZO (ZnO:B), etc. For example, the dielectric oxide layer 218-2 may include SiO2, TiO2, Al2O3, HfO, etc.

[0136] In an embodiment, the metal oxide layer 218 may be made of a transparent material. That is, most of the light transmitted from the active layer 212 to the metal oxide layer 218 may be transmitted.

[0137] Meanwhile, when the metal oxide layer 218 becomes thick, the light transmittance may decrease. In addition, the metal oxide layer 218 may also affect the relationship with the DEP force during self-assembly, such as attractive or repulsive forces.

[0138] For example, when the metal oxide becomes thick, during self-assembly, a repulsive force may be applied to the lateral-type semiconductor light-emitting element against the DEP force, so that the semiconductor light-emitting element 200 may not be assembled at a specific position and may be disassembled.

[0139] To solve this problem, the thickness t2 of the metal oxide layer 218 in this embodiment may be smaller than the thickness t1 of the passivation layer 217. For example, the thickness t2 of the metal oxide layer 218 may be 1 / 3 or less of the thickness t1 of the passivation layer 217. Preferably, the thickness t2 of the metal oxide layer 218 may be 1 / 10 or less of the thickness t1 of the passivation layer 217. Preferably, the thickness t2 of the metal oxide layer 218 may be 1 / 50 or less of the thickness t1 of the passivation layer 217. For example, when the thickness t1 of the passivation layer 217 is 500 nm, the thickness t2 of the metal oxide layer 218 may be 10 nm or less.

[0140] According to an embodiment, the thickness t2 of the metal oxide layer 218 may be smaller than the thickness t1 of the passivation layer 217, such that the lower side of the semiconductor light-emitting element 200 may be attracted by the DEP force rather than repelled during self-assembly, and the upper side of the semiconductor light-emitting element 200 may be repelled rather than attracted. Accordingly, the lateral-type semiconductor light-emitting element may be correctly assembled without being flipped during self-assembly, thereby preventing lighting defects.

[0141] As Figure 22 shown, a reflector 285-1 may be disposed on a backplane substrate, and the semiconductor light-emitting element 200-1 may be assembled on the backplane substrate, such that a display device may be manufactured.

[0142] Thereafter, when the display device is driven and light is emitted from the semiconductor light-emitting element 200-1, the light may propagate in all directions. Among the emitted light, the light propagating downward may pass through the metal oxide layer 218 and propagate to the reflectors 285-1 to 285-3, and may be reflected by the reflectors 285-1 to 285-3 and propagate forward via the semiconductor light-emitting element 200-1.

[0143] As described above, when the metal oxide layer 218 is disposed on the lower side of the semiconductor light-emitting element 200-1 and the reflectors 285-1 to 285-3 are disposed below the semiconductor light-emitting element 200-1, it can be seen that a very high light reflectance can be achieved, as Figure 23 and Figure 24 shown.

[0144] Figure 23 shows a case where the semiconductor light-emitting element is the red lateral-type semiconductor light-emitting element 200-1, and Figure 24 shows a case where the semiconductor light-emitting element is the green lateral-type semiconductor light-emitting element 200-2 or the blue semiconductor light-emitting element 200-3. In Figure 23 and Figure 24 , in Embodiment 1, 10 nm of TiO2 may be used as the metal oxide layer 218, and in Embodiment 2, 10 nm of SiO2 may be used as the metal oxide layer 218.

[0145] As Figure 23 shown, a light reflectance capable of reflecting at least 80% of the light in the red wavelength band of 616 nm or less forward is obtained.

[0146] As Figure 24 shown, a light reflectance capable of reflecting at least 85% of the light in the green wavelength band of 530 nm or less or the light in the blue wavelength band of 463 nm or less forward is obtained.

[0147] Hereinafter, reference will be made toFigures 10 to 14 Detailed Description Figure 6 The manufacturing process (S201) of the semiconductor light-emitting element shown in .

[0148] Figures 10 to 14 The manufacturing process of the semiconductor light-emitting element according to the first embodiment is shown.

[0149] As Figure 10 shown, the light-emitting layers 211 to 213 including a plurality of semiconductor layers can be deposited on the growth substrate 210. The plurality of semiconductor layers may include at least one or more first-conductive-type semiconductor layers 211, an active layer 212 located on the first-conductive-type semiconductor layer 211, and at least one or more second-conductive-type semiconductor layers 213 located on the active layer 212.

[0150] The growth substrate 210 may vary according to the manufacture of a red semiconductor light-emitting element, a green lateral-type semiconductor light-emitting element, or a blue semiconductor light-emitting element. For example, when manufacturing a red semiconductor light-emitting element, a GaAs substrate may be used as the growth substrate 210. For example, when manufacturing a green semiconductor light-emitting element or a blue semiconductor light-emitting element, a sapphire substrate may be used as the growth substrate 210.

[0151] As Figure 11 shown, by performing a grid etching process, the chips (i.e., the light-emitting layers 211 to 213) on the growth substrate 210 are separated from each other, and a second region 200b of each of the light-emitting layers 211 to 213 may also be etched so that the upper surface of the first-conductive-type semiconductor layer 211 can be exposed.

[0152] Thereafter, a metal film may be deposited on the light-emitting layers 211 to 213 and patterned so that the first electrode 215 can be formed on the upper side of the first region 200a of the light-emitting layers 211 to 213, and the second electrode 216 can be formed on the upper side of the second region 200b of the light-emitting layers 211 to 213.

[0153] As an example, the first electrode 215 and the second electrode 216 may be formed simultaneously using the same metal by the same photolithography process.

[0154] As another example, the first electrode 215 and the second electrode 216 may be formed using separate photolithography processes with different metals from each other.

[0155] Thereafter, a passivation layer 217 may be formed on the light-emitting layers 211 to 213. After depositing an insulating film on the growth substrate 210, the insulating film corresponding to the region between the growth substrate 210 and the light-emitting layers 211 to 213 may be removed so that the passivation layer 217 is formed on the light-emitting layers 211 to 213. The passivation layer 217 may surround the lateral portions of the light-emitting layers 211 to 213 and may be formed on the upper sides of the light-emitting layers 211 to 213.

[0156] As Figure 12 shown, the light-emitting layers 211 to 213 may be flipped and then bonded to a temporary substrate 220 via a sacrificial layer 221. Although not shown, an organic film such as a polymer may be disposed between the sacrificial layer 221 and the temporary substrate 220. Thereafter, the growth substrate 210 may be removed by using an LLO process to transfer the light-emitting layers 211 to 213 onto the temporary substrate 220.

[0157] As Figure 13 shown, a metal oxide layer 218 may be formed on the upper sides of the light-emitting layers 211 to 213 exposed by removing the growth substrate 210. For example, the metal oxide layer 218 may be deposited on the upper sides of the light-emitting layers 211 to 213 by using a deposition apparatus such as PECVD, sputtering, ALD, or an electron beam. Thus, a semiconductor light-emitting device 200 having a first electrode 215, a second electrode 216, a passivation layer 217, and a metal oxide layer 218 on the light-emitting layers 211 to 213 may be manufactured.

[0158] As Figure 14 shown, an etchant 231 may be contained in a first container 230, and the semiconductor light-emitting device 200 may be placed in the first container 230 so that the sacrificial layer 221 may be removed and the semiconductor light-emitting device 200 may be separated from the temporary substrate.

[0159] Thereafter, the semiconductor light-emitting device 200 may be collected from the first container 230 and placed in a second container 240. Deionized water (DI) may be contained in the second container 240. Thus, the semiconductor light-emitting device 200 may be cleaned by the deionized water (DI) in the second container 240. Thereafter, after collecting the semiconductor light-emitting device 200 from the second container 240, a drying process may be performed.

[0160] Hereinafter, the transfer process (S202) onto an interposer shown in Figure 15 will be described in detail. Figure 6 shown will be described in detail.

[0161] Figure 15 shows a process of assembling a plurality of semiconductor light-emitting devices on an interposer by performing a self-assembly process.

[0162] As shown in Figure 15 , the fluid 251 may be filled in the chamber 250, and the intermediate layer 260 may be installed on the upper side of the chamber 250. Thereafter, the plurality of lateral semiconductor light-emitting elements 200-1 to 200-3 may fall into the chamber 250.

[0163] The intermediate layer 260 may include a substrate 261, a first assembly wiring 262, a second assembly wiring 263, an insulating layer 264, and a partition wall 265, as shown in Figure 20 .

[0164] The substrate 261 may be a support substrate for supporting the first assembly wiring 262, the second assembly wiring 263, the insulating layer 264, and the partition wall 265.

[0165] The first assembly wiring 262 may be disposed on the substrate 261. The second assembly wiring 263 may be disposed on the substrate 261.

[0166] For example, the first assembly wiring 262 and the second assembly wiring 263 may be respectively disposed on the same layer. For example, the first assembly wiring 262 and the second assembly wiring 263 may be in contact with the upper surface of the substrate 261, but are not limited thereto. For example, the first assembly wiring 262 and the second assembly wiring 263 may be respectively disposed on the same layer. For example, the first assembly wiring 262 and the second assembly wiring 263 may be respectively disposed parallel to each other. Both the first assembly wiring 262 and the second assembly wiring 263 may be used to assemble the semiconductor light-emitting elements 200-1 to 200-3 into the assembly holes 265H1 to 265H3 using a self-assembly method. That is, when self-assembly is performed, an electric field is generated between the first assembly wiring 262 and the second assembly wiring 263 by the voltage supplied to the first assembly wiring 262 and the second assembly wiring 263, and the semiconductor light-emitting elements 200-1 to 200-3 moved by a magnet may be assembled into the assembly holes 265H1 to 265H3 by the DEP force formed by the electric field. The assembly holes 265H1 to 265H3 may respectively have a diameter larger than the diameter of the semiconductor light-emitting elements 200-1 to 200-3.

[0167] Both the first assembly wiring 262 and the second assembly wiring 263 may include a plurality of metal layers. Although not shown, both the first assembly wiring 262 and the second assembly wiring 263 may include main wirings and auxiliary electrodes. The main wiring of each of the first assembly wiring 262 and the second assembly wiring 263 may be arranged longer along one direction of the substrate 261. The auxiliary electrodes of each of the first assembly wiring 262 and the second assembly wiring 263 may extend from the main wiring toward the assembly holes 265H1 to 265H3. The auxiliary electrodes may be electrically connected to the main wiring. The main wiring may be disposed on the auxiliary wiring such that the lower surface of the main wiring may contact the upper surface of the auxiliary wiring, but is not limited thereto.

[0168] Meanwhile, although not shown, the first assembly wiring 262 and the second assembly wiring 263 may be disposed on different layers.

[0169] The insulating layer 264 may be disposed on the first assembly wiring 262 and the second assembly wiring 263. For example, the insulating layer 264 may be formed of an inorganic material or an organic material. For example, the insulating layer 264 may be formed of a material having a dielectric constant related to the DEP force. For example, the higher the dielectric constant of the insulating layer 264, the greater the DEP force may be, but is not limited thereto. The insulating layer 264 may prevent the fluid from directly contacting the first assembly wiring 262 or the second assembly wiring 263, and prevent corrosion caused by the assembly holes 265H1 to 265H3 of the partition wall 265 formed thereafter during self-assembly.

[0170] The partition wall 265 may be disposed on the insulating layer 264. The insulating layer 264 may have the assembly holes 265H1 to 265H3. The assembly holes 265H1 to 265H3 may be respectively formed in a plurality of sub-pixels PX1, PX2, and PX3 of a plurality of pixels PX. That is, one assembly hole 265H1 to 265H3 may be respectively formed for each of the sub-pixels PX1, PX2, and PX3, but is not limited thereto. For example, the insulating layer 264 may be exposed within the assembly holes 265H1 to 265H3. For example, the bottom surface 158-2 of the assembly holes 265H1 to 265H3 may be the upper surface of the insulating layer 264.

[0171] The height (or thickness) of the partition wall 265 may be determined by considering the thickness of the semiconductor light-emitting elements 200-1 to 200-3.

[0172] Refer again to Figure 15, multiple semiconductor light-emitting elements 200-1 to 200-3 can move within the fluid 251 in response to the movement of the magnet 253. The magnet 253 can rotate, move in a zigzag pattern, or move in a zigzag pattern while rotating. The magnetic layer included in the first electrode 215 and / or the second electrode 216 of the lateral-type semiconductor light-emitting element can be magnetized by the magnet 253, so that the semiconductor light-emitting elements 200-1 to 200-3 can be moved toward the magnet 253.

[0173] Meanwhile, a DEP force can be formed on the intermediate layer 260. The DEP force can be formed by an AC voltage applied to the first assembly wiring 262 and the second assembly wiring 263 disposed in each of the assembly holes 265H1 to 265H3. The intensity of the DEP force may be very strong within the assembly holes 265H1 to 265H3 and may be very weak or zero outside the assembly holes.

[0174] The multiple semiconductor light-emitting elements 200-1 to 200-3 moved by the magnet 253 can be pulled by the DEP force formed in the corresponding assembly holes 265H1 to 265H3 and assembled in the corresponding assembly holes 265H1 to 265H3.

[0175] As an example, multiple red semiconductor light-emitting elements 200-1, multiple green semiconductor light-emitting elements 200-2, and multiple blue semiconductor light-emitting elements 200-3 can be sequentially assembled into multiple sub-pixels PX1, PX2, and PX3 of each of the multiple pixels PX on the substrate 261, respectively.

[0176] As another example, multiple red semiconductor light-emitting elements 200-1, multiple green semiconductor light-emitting elements 200-2, and multiple blue semiconductor light-emitting elements 200-3 can be assembled into multiple sub-pixels PX1, PX2, and PX3 of each of the multiple pixels PX on the substrate 261 simultaneously. For this purpose, multiple red semiconductor light-emitting elements 200-1, multiple green semiconductor light-emitting elements 200-2, and multiple blue semiconductor light-emitting elements 200-3 can be dropped into the fluid in the chamber 250 and mixed. Subsequently, the same self-assembly process can be performed so that multiple red semiconductor light-emitting elements 200-1, multiple green semiconductor light-emitting elements 200-2, and multiple blue semiconductor light-emitting elements 200-3 can be assembled into multiple sub-pixels PX1, PX2, and PX3 of each of the multiple pixels PX on the substrate 261 simultaneously.

[0177] For simultaneous self-assembly, the red semiconductor light-emitting element 200-1, the green semiconductor light-emitting element 200-2, and the blue semiconductor light-emitting element 200-3 can each have exclusivity relative to one another. That is, the shapes or sizes of the red semiconductor light-emitting element 200-1, the green semiconductor light-emitting element 200-2, and the blue semiconductor light-emitting element 200-3 can be different from each other. For example, the red semiconductor light-emitting element 200-1 can have a circular shape, the green semiconductor light-emitting element 200-2 can have a first elliptical shape (having a first minor axis and a first major axis), and the blue semiconductor light-emitting element 200-3 can have a second elliptical shape. At this time, the second elliptical shape can have a second minor axis smaller than the first minor axis and a second major axis larger than the first major axis.

[0178] Meanwhile, as described above, according to non-disclosed internal technology, a metal layer such as titanium (Ti) is provided on the lower side of the lateral-type semiconductor light-emitting element to increase the response speed of the magnet during self-assembly, but the light reflectivity is reduced due to the metal layer such as titanium (Ti).

[0179] According to an embodiment, as Figure 8 shown, a metal oxide layer 218 can be provided on the lower side of the semiconductor light-emitting element 200, and the thickness of the metal oxide layer 218 can be made smaller than the thickness of the passivation layer 217, so that the response speed of the magnet 253 can be increased during self-assembly, and the assembly rate can be increased by receiving a strong influence of the DEP force (i.e., attractive force).

[0180] Figure 16 The assembly rate according to voltage in each of the comparative example, Embodiment 1, and Embodiment 2 is shown.

[0181] In Figure 16 , the comparative example has a metal layer such as titanium (Ti) provided on the lower side of the semiconductor light-emitting element, and in Embodiment 1, the metal oxide layer 218 provided on the lower side of the semiconductor light-emitting element 200 can be made of TiO2, and in Embodiment 2, the metal oxide layer 218 provided on the upper side of the semiconductor light-emitting element 200 can be made of SiO2.

[0182] As Figure 16 shown, when the AC voltage applied to the first assembly wiring 262 and the second assembly wiring 263 is 3V or higher, the assembly rate in Embodiment 1 and Embodiment 2 can be higher than or equal to the assembly rate of the comparative example. From this, it can be seen that even when using the metal oxide layer 218 of Embodiment 1 and Embodiment 2 to replace the metal layer such as Ti, a higher assembly rate is shown compared to the comparative example.

[0183] Meanwhile, according to an embodiment, as Figure 8As shown, the metal oxide layer 218 may be disposed on the lower side of the semiconductor light-emitting element 200. Since the metal oxide layer 218 has hydrophilicity, the semiconductor light-emitting element 200 will not be adsorbed on the surface of the interposer 260 during self-assembly, so that the assembly rate can be increased.

[0184] At the same time, referring back Figure 15 , after performing the self-assembly process, a plurality of semiconductor light-emitting elements 200-1 to 200-3 are assembled on the interposer 260. The interposer 260 is detached from the chamber 250, and a drying process and a cleaning process are performed, and the interposer 260 can be dried and cleaned.

[0185] Hereinafter, with reference to Figures 17 to 19 will be described in detail Figure 6 the transfer process (S203) onto the backplane substrate as shown in.

[0186] Figures 17 to 19 shows a process of transferring a plurality of semiconductor light-emitting elements onto a backplane substrate using a pick-and-place process.

[0187] As Figure 17 shown, when the interposer 260 moves from the outside to a platform (not shown), the stamp 270 can be lowered and pressed, so that a plurality of lateral semiconductor light-emitting elements 200-1 to 200-3 on the interposer 260 can be attached to the protruding regions 271-1 to 271-3 of the stamp 270. At this time, the adhesive force of the lower surface of each of the protruding regions 271-1 to 271-3 can be greater than the adhesive force of the interposer 260 on which a plurality of semiconductor light-emitting elements 200-1 to 200-3 are assembled.

[0188] The plurality of protruding regions 271-1 to 271-3 of the stamp 270 may be positioned to correspond to the plurality of semiconductor light-emitting elements 200-1 to 200-3 on the interposer 260 respectively. A plurality of semiconductor light-emitting elements 200-1 to 200-3 can be attached to the plurality of protruding regions 271-1 to 271-3 of the stamp 270, as many as the number of the protruding regions 271-1 to 271-3 of the stamp 270.

[0189] As Figure 18 shown, the stamp 270 can be raised. At this time, a plurality of semiconductor light-emitting elements 200-1 to 200-3 can be attached to each of the plurality of protruding regions 271-1 to 271-3 of the raised stamp 270.

[0190] As Figure 19 shown, the stamp 270 can be moved and positioned on the backplane substrate 280.

[0191] The backplane substrate 280 may include a plurality of pixels PX, and each of the plurality of pixels PX may include a plurality of sub-pixels PX1 to PX3.

[0192] A plurality of pixel driving units 282-1 to 282-3, a first insulating layer 284, a plurality of reflectors 285-1 to 285-3, and a second insulating layer 286 may be disposed on the substrate 280. The pixel driving units 282-1 to 282-3 may be disposed among the plurality of sub-pixels PX1 to PX3 to operate the light emission of the corresponding semiconductor light-emitting elements 200-1 to 200-3, but are not limited thereto.

[0193] A plurality of reflectors 285-1 to 285-3 may be disposed among the plurality of sub-pixels PX1 to PX3. The reflectors 285-1 to 285-3 may be made of metal, but are not limited thereto. In the figure, the plurality of reflectors 285-1 to 285-3 are separated from each other, but they may be integrally formed with each other. The plurality of reflectors 285-1 to 285-3 may be respectively disposed below the corresponding semiconductor light-emitting elements 200-1 to 200-3 to reflect the light from the semiconductor light-emitting elements 200-1 to 200-3 forward.

[0194] The first insulating layer 284 and / or the second insulating layer 286 may be made of different insulating materials, but are not limited thereto.

[0195] The second insulating layer 286 may be an adhesive layer. The second insulating layer 286 may transfer the plurality of semiconductor light-emitting elements 200-1 to 200-3 on the stamper 270 to the backplane substrate 280. That is, the stamper 270 may be lowered, pressed, and then raised again, so that the plurality of semiconductor light-emitting elements 200-1 to 200-3 on the stamper 270 can be transferred to the backplane substrate 280. At this time, since the adhesion of the backplane substrate 280, that is, the adhesion of the second insulating layer 286, is greater than the adhesion of the protruding regions 271-1 to 271-3, the plurality of semiconductor light-emitting elements 200-1 to 200-3 on the stamper 270 can be attached to the second insulating layer 286 of the backplane substrate 280, so that the plurality of semiconductor light-emitting elements 200-1 to 200-3 can be separated from the stamper 270.

[0196] Thereafter, electrical connection with the plurality of semiconductor light-emitting elements 200-1 to 200-3 may be performed through post-processing. This will be described later with reference to Figure 21 This.

[0197] Figure 21 is a cross-sectional view showing a display device according to an embodiment. Figure 21 Shows Figure 19The first sub-pixel PX1 among the first sub-pixel PX1 to the third sub-pixel PX3 on the backplane substrate 280 shown in the figure. Except that the semiconductor materials of the light-emitting layers 211 to 213 of the plurality of semiconductor light-emitting elements 200-1 to 200-3 are different, the second sub-pixel PX2 and the third sub-pixel PX3 may have the same structure as that of the first sub-pixel PX1.

[0198] Referring to Figure 21 , the display device 300 according to the embodiment may include a backplane substrate 280, semiconductor light-emitting elements 200-1, a third insulating layer 287, a first electrode wiring 288, and a second electrode wiring 289.

[0199] Although only the red lateral semiconductor light-emitting element 200-1 is shown in the figure, the red semiconductor light-emitting element (see Figure 19 200-1), the green semiconductor light-emitting element 200-2, and the blue semiconductor light-emitting element 200-3 may be respectively disposed in the plurality of sub-pixels of each of the plurality of pixels of the backplane substrate 280. At the same time, the green semiconductor light-emitting element 200-2 may be replaced by a green vertical semiconductor light-emitting element or a green flip-chip type semiconductor light-emitting element. In addition, the blue semiconductor light-emitting element 200-3 may be replaced by a blue vertical semiconductor light-emitting element or a blue flip-chip type semiconductor light-emitting element.

[0200] Since the semiconductor light-emitting elements 200-1 to 200-3 are transferred onto the backplane substrate 280 as Figures 17 to 19 described in detail, its detailed description will be omitted.

[0201] As Figures 17 to 19 shown, after the semiconductor light-emitting elements 200-1 to 200-3 are transferred onto the backplane substrate 280, a third insulating layer 287 may be formed. The third insulating layer 287 may be formed of an organic material, but is not limited thereto.

[0202] The third insulating layer 287 is a planarization layer, and its upper surface may have a straight plane. Since the upper surface of the third insulating layer 287 has a straight plane, the first electrode wiring 288 and the second electrode wiring 289 provided on the third insulating layer 287 may be formed with a uniform thickness.

[0203] Although the drawing shows that the upper surface of the third insulating layer 287 is disposed on the upper side of the semiconductor light-emitting element 200-1, the upper surface of the third insulating layer 287 may not be disposed on the upper side of the semiconductor light-emitting element 200-1. That is, even if the third insulating layer 287 is disposed on the backplane substrate 280, the upper side of the semiconductor light-emitting element 200-1 may be exposed to the outside. For example, the upper surface of the third insulating layer 287 may be positioned on the same horizontal line as the upper surface of the semiconductor light-emitting element 200-1.

[0204] The first electrode wiring 288 and the second electrode wiring 289 may be disposed on the third insulating layer 287. The first electrode wiring 288 and the second electrode wiring 289 may be electrically insulated from each other by being spaced apart from each other. The first electrode wiring 288 and the second electrode wiring 289 may be formed simultaneously using the same material by the same photolithography process, but are not limited thereto. The first electrode wiring 288 and the second electrode wiring 289 may be formed of a transparent conductive material such as ITO. The first electrode wiring 288 and the second electrode wiring 289 may be formed of an opaque metal, but may be thin enough to maintain a light transmittance of 80% or higher.

[0205] The first electrode wiring 288 and the second electrode wiring 289 may be electrically connected to the first electrode 215 and the second electrode 216 of the semiconductor light-emitting element 200-1 through the third insulating layer 287, respectively. Although not shown, the first electrode wiring 288 and the second electrode wiring 289 may be directly electrically connected to the first electrode 215 and the second electrode 216 of the semiconductor light-emitting element 200-1 without passing through the third insulating layer 287, respectively. That is, since the third insulating layer 287 is not formed on the upper side of the semiconductor light-emitting element 200-1, the upper side of the semiconductor light-emitting element 200-1 may be exposed to the outside. In this case, the first electrode wiring 288 and the second electrode wiring 289 may be electrically connected to the first electrode 215 and the second electrode 216 located on the upper side of the semiconductor light-emitting element 200-1 through the passivation layer 217, respectively.

[0206] According to an embodiment, as Figure 8 shown, the metal oxide layer 218 may be disposed under the semiconductor light-emitting element 200, and the thickness t2 of the metal oxide layer 218 may be made smaller than the thickness t1 of the passivation layer 217. Therefore, during self-assembly, the lower side of the semiconductor light-emitting element 200 may be attracted by the DEP force instead of being repelled, and the upper side of the semiconductor light-emitting element 200 may be repelled instead of being attracted. Therefore, since the lateral semiconductor light-emitting element is correctly assembled without being flipped during self-assembly, lighting failure can be prevented.

[0207] According to non-disclosed internal technology, when a reflective layer made of metal is provided on the lower side of a lateral semiconductor light-emitting element, the lateral semiconductor light-emitting element is adsorbed to the backplane substrate through the reflective layer, and the assembly rate is reduced. According to an embodiment, a metal oxide layer 218 having hydrophilicity can be provided on the lower side of the semiconductor light-emitting element, so that the semiconductor light-emitting element 200-1 can be prevented from being adsorbed to the surface of the backplane substrate 280 through the metal oxide layer 218 during self-assembly, thereby improving the assembly rate.

[0208] According to non-disclosed internal technology, when a metal layer such as Ti is provided on the lower side of a semiconductor light-emitting element to increase the response speed to a magnet during self-assembly, the metal layer absorbs most of the light propagating downward, resulting in a reduction in light extraction efficiency. According to an embodiment, as Figure 8 shown, a metal oxide layer 218 can be provided on the lower side of the semiconductor light-emitting element 200, and the thickness t2 of the metal oxide layer 218 can be made smaller than the thickness t1 of the passivation layer 217, so that light can be transmitted rather than absorbed.

[0209] According to an embodiment, as Figure 22 shown, a metal oxide layer 218 can be provided on the lower side of the semiconductor light-emitting element 200-1, the thickness t2 of the metal oxide layer 218 can be made smaller than the thickness t1 of the passivation layer 217, and a reflector 285-1 can be provided on the backplane substrate 280 below the semiconductor light-emitting element 200-1. In a display device having such a structure, at least 80% (based on the red wavelength band) or 85% (based on the green or blue wavelength band) of the light propagating downward from the semiconductor light-emitting element 200-1 can be reflected forward, thereby increasing the light luminance.

[0210] [Second Embodiment]

[0211] Figure 25 is a cross-sectional view showing a semiconductor light-emitting element according to the second embodiment. Figure 26 is a plan view showing a dielectric oxide layer 218-2 in the semiconductor light-emitting element according to the second embodiment.

[0212] Except for the metal oxide layer 218, the second embodiment is the same as the first embodiment (see Figure 8 ). In the second embodiment, components having the same shape, structure, and / or function as those in the first embodiment are given the same reference numerals, and their detailed descriptions will be omitted.

[0213] Refer to Figure 25 and Figure 26, the semiconductor light-emitting element 200A according to the second embodiment may include a light-emitting layer 211 to 213, a first electrode 215, a second electrode 216, a passivation layer 217, and a metal oxide layer 218. The semiconductor light-emitting element 200A according to the second embodiment may be a red lateral semiconductor light-emitting element, a green semiconductor light-emitting element, and / or a blue semiconductor light-emitting element.

[0214] In an embodiment, the metal oxide layer 218 may include a conductive oxide layer 218-1 and a dielectric oxide layer 218-2.

[0215] The conductive oxide layer 218-1 may be disposed below the lower side of the light-emitting layer 211 to 213. The conductive oxide layer 218-1 may be disposed on the lower side of the light-emitting layer 211 to 213. The conductive oxide layer 218-1 may be disposed on the lower side of the first conductive-type semiconductor layer 211. The conductive oxide layer 218-1 may be in contact with the lower surface of the first conductive-type semiconductor layer 211, but is not limited thereto. The conductive oxide layer 218-1 may have the same shape as the lower surface of the first conductive-type semiconductor layer 211. The conductive oxide layer 218-1 may have the same size (or area) as the lower surface of the first conductive-type semiconductor layer 211, but is not limited thereto. For example, the conductive oxide layer 218-1 may include ITO, SnO, AZO (ZnO:Al), BZO (ZnO:B), etc.

[0216] The dielectric oxide layer 218-2 may be disposed on the lower side of the conductive oxide layer 218-1. The dielectric oxide layer 218-2 may be in contact with the lower surface of the conductive oxide layer 218-1, but is not limited thereto. The dielectric oxide layer 218-2 may have the same shape as the lower surface of the conductive oxide layer 218-1. The dielectric oxide layer 218-2 may have the same size (or area) as the lower surface of the conductive oxide layer 218-1, but is not limited thereto. For example, the dielectric oxide layer 218-2 may include SiO2, TiO2, Al2O3, HfO, etc.

[0217] Meanwhile, the dielectric oxide layer 218-2 may have a plurality of grooves 218-2H. As Figure 26 shown, the plurality of grooves 218-2H may have a circular shape, but is not limited thereto. The plurality of grooves 218-2H may be formed to penetrate the dielectric oxide layer 218-2 and expose the lower surface of the conductive oxide layer 218-1, but is not limited thereto. The thickness t2 of the dielectric oxide layer 218-2 is λ / 4n, so that the diffuse reflection of light can be enhanced.

[0218] According to the second embodiment, some of the light that has propagated downward from the active layer 212 of the light-emitting layers 211 to 213 can be diffusely reflected and propagated forward by a plurality of grooves 218-2H provided in the dielectric oxide layer 218-2, and some of the light can propagate downward from the semiconductor light-emitting element 200A and be reflected forward by the reflector plates 285-1 to 285-3 provided on the backplane substrate. Therefore, the light extraction efficiency can also be improved, and the light luminance can be significantly increased.

[0219] [Third Embodiment]

[0220] Figure 27 FIG. is a cross-sectional view showing a semiconductor light-emitting element according to the third embodiment. Figure 28 FIG. is a plan view showing the conductive oxide layer 218-1 in the semiconductor light-emitting element according to the third embodiment.

[0221] Except for the metal oxide layer 218, the third embodiment is the same as the first embodiment or the second embodiment. Specifically, except for the arrangement order of the conductive oxide layer 218-1 and the dielectric oxide layer 218-2 of the metal oxide layer 218, the third embodiment is the same as the second embodiment. In the third embodiment, components having the same shape, structure, and / or function as those in the first embodiment or the second embodiment are given the same reference numerals, and their detailed descriptions will be omitted.

[0222] Referring to Figure 27 and Figure 28 , the semiconductor light-emitting element 200B according to the third embodiment may include light-emitting layers 211 to 213, a first electrode 215, a second electrode 216, a passivation layer 217, and a metal oxide layer 218. The semiconductor light-emitting element 200B according to the third embodiment may be a red lateral-type semiconductor light-emitting element, a green semiconductor light-emitting element, and / or a blue semiconductor light-emitting element.

[0223] In the present embodiment, the metal oxide layer 218 may include a dielectric oxide layer 218-2 and a conductive oxide layer 218-1.

[0224] The dielectric oxide layer 218-2 may be disposed under the light-emitting layers 211 to 213. The dielectric oxide layer 218-2 may be disposed on the lower side of the light-emitting layers 211 to 213. The dielectric oxide layer 218-2 may be disposed on the lower side of the first-conductive-type semiconductor layer 211. The dielectric oxide layer 218-2 may be in contact with the lower surface of the first-conductive-type semiconductor layer 211, but is not limited thereto. The dielectric oxide layer 218-2 may have the same shape as the lower surface of the first-conductive-type semiconductor layer 211. The dielectric oxide layer 218-2 may have the same size (or area) as the lower surface of the first-conductive-type semiconductor layer 211, but is not limited thereto. For example, the dielectric oxide layer 218-2 may include SiO2, TiO2, Al2O3, HfO, etc.

[0225] The conductive oxide layer 218-1 may be disposed under the lower side of the dielectric oxide layer 218-2. The conductive oxide layer 218-1 may be in contact with the lower surface of the dielectric oxide layer 218-2, but is not limited thereto. The conductive oxide layer 218-1 may have the same shape as the lower surface of the dielectric oxide layer 218-2. The conductive oxide layer 218-1 may have the same size (or area) as the lower surface of the dielectric oxide layer 218-2, but is not limited thereto. For example, the conductive oxide layer 218-1 may include ITO, SnO, AZO (ZnO:Al), BZO (ZnO:B), etc.

[0226] Meanwhile, the conductive oxide layer 218-1 may have a plurality of grooves 218-1H. As Figure 28 shown, the plurality of grooves 218-1H may have a circular shape, but is not limited thereto. The plurality of grooves 218-1H may be formed to penetrate the conductive oxide layer 218-1 and expose the lower surface of the dielectric oxide layer 218-2, but is not limited thereto. The thickness t2 of the conductive oxide layer 218-1 is λ / 4n, such that the diffuse reflection of light can be activated.

[0227] According to the third embodiment, some of the light propagating downward from the active layer 212 of the light-emitting layers 211 to 213 through the plurality of grooves 218-1H provided in the conductive oxide layer 218-1 can be diffusely reflected and propagated forward, and some other light can propagate downward from the semiconductor light-emitting element 200B and be forward-reflected by the reflector plates 285-1 to 285-3 provided on the backplane substrate. Therefore, the light extraction efficiency can also be improved, and the light luminance can be significantly increased.

[0228] [Fourth Embodiment]

[0229] Figure 29 is a cross-sectional view showing a semiconductor light-emitting element according to the fourth embodiment.

[0230] The fourth embodiment is the same as the first to third embodiments except for the metal oxide layer 218. In the fourth embodiment, components having the same shape, structure, and / or function as those in the first to third embodiments are given the same reference numerals, and their detailed descriptions will be omitted.

[0231] Referring to Figure 29 , the semiconductor light-emitting element 200C according to the fourth embodiment may include a light-emitting layer 211 to 213, a first electrode 215, a second electrode 216, a passivation layer 217, and a metal oxide layer 218. The semiconductor light-emitting element 200C according to the fourth embodiment may be a red lateral-type semiconductor light-emitting element, a green semiconductor light-emitting element, and / or a blue semiconductor light-emitting element.

[0232] In the embodiment, the metal oxide layer 218 may include a plurality of first metal oxide layers 218-1a to 218-1c and a plurality of second metal oxide layers 212-2a to 218-2c. For example, the first metal oxide layers 218-1a to 218-1c and the second metal oxide layers 218-2a to 218-2c may be dielectric oxide layers. For example, the dielectric oxide layer may include SiO2, TiO2, Al2O3, HfO, etc. For example, among the materials constituting the dielectric oxide layer, the first metal oxide layers 218-1a to 218-1c and the second metal oxide layers 218-2a to 218-2c may have different refractive indexes. For example, the first metal oxide layers 218-1a to 218-1c may include SiO2, and the second metal oxide layers 218-2a to 218-2c may include TiO2, but it is not limited thereto. For example, the metal oxide layer 218 may be configured in 5 to 30 pairs, with the first metal oxide layers 218-1a to 218-1c and the second metal oxide layers 212-2a to 218-2c as a pair.

[0233] The total thickness of the plurality of first metal oxide layers 218-1a to 218-1c or the total thickness of the plurality of second metal oxide layers 218-2a to 218-2c may be 1 / 5 or less of the thickness of the passivation layer 217. The sum of the total thickness of the plurality of first metal oxide layers 218-1a to 218-1c and the total thickness of the plurality of second metal oxide layers 218-2a to 218-2c may be less than or equal to 1 / 2 of the thickness of the passivation layer 217.

[0234] According to the fourth embodiment, by laminating a plurality of first metal oxide layers 218-1a to 218-1c and a plurality of second metal oxide layers 218-2a to 218-2c having different refractive indexes, the metal oxide layer 218 can be used as a reflective layer. In this case, the first metal oxide layers 218-1a to 218-1c and the second metal oxide layers 218-2a to 218-2c may not be made of pure metal and have a strong bonding strength with the epitaxial layer, so that no peeling problem occurs, and thus defects of the semiconductor light-emitting element 200C itself or product defects such as a display device can be prevented.

[0235] [Fifth Embodiment]

[0236] Figure 30 is a cross-sectional view showing a semiconductor light-emitting element according to the fifth embodiment.

[0237] Except for the metal oxide layer 218, the fifth embodiment is the same as the first to fourth embodiments. In the fifth embodiment, components having the same shape, structure, and / or function as those in the first to fourth embodiments are given the same reference numerals, and their detailed descriptions will be omitted.

[0238] Referring to Figure 30 , the semiconductor light-emitting element 200D according to the fifth embodiment may include a light-emitting layer 211 to 213, a first electrode 215, a second electrode 216, a passivation layer 217, and a metal oxide layer 218. The semiconductor light-emitting element 200D according to the fifth embodiment may be a red lateral-type semiconductor light-emitting element, a green semiconductor light-emitting element, and / or a blue semiconductor light-emitting element.

[0239] In the present embodiment, the metal oxide layer 218 may be provided on the lower side of the light-emitting layer 211 to 213. In addition, the metal oxide layer 218 may be provided on the lateral portions of the light-emitting layer 211 to 213. For example, the metal oxide layer 218 may be provided on the lateral surface of the first conductive-type semiconductor layer 211.

[0240] Meanwhile, the passivation layer 217 may be provided on the lateral portions of the light-emitting layer 211 to 213. For example, the passivation layer 217 may be provided on the lateral surface of the first conductive-type semiconductor layer 211. In this case, the metal oxide layer 218 may be provided on the passivation layer 217 located on the lateral portions of the light-emitting layer 211 to 213. That is, the metal oxide layer 218 may be provided on the passivation layer 217 along the periphery of the lateral portions of the light-emitting layer 211 to 213. For example, the metal oxide layer 218 may overlap the passivation layer 217 horizontally.

[0241] According to the fifth embodiment, as Figure 14As shown, the metal oxide layer 218 may be disposed on the passivation layer 217 along the periphery of the lateral portions of the light-emitting layers 211 to 213, so that damage to the light-emitting layers 211 to 213 (or epitaxial layers) due to the penetration of the etchant 231 can be prevented. Accordingly, light emission failure of the semiconductor light-emitting element 200D can be prevented.

[0242] [Sixth Embodiment]

[0243] Figure 31 is a cross-sectional view showing a semiconductor light-emitting element according to the sixth embodiment.

[0244] Except for the shapes of the light-emitting layers 211 to 213, the sixth embodiment is the same as the first to fifth embodiments. In the sixth embodiment, components having the same shapes, structures, and / or functions as those in the first to fifth embodiments are given the same reference numerals, and detailed descriptions thereof will be omitted.

[0245] Referring to Figure 31 , the semiconductor light-emitting element 200E according to the sixth embodiment may include light-emitting layers 211 to 213, a first electrode 215, a second electrode 216, a passivation layer 217, and a metal oxide layer 218. The semiconductor light-emitting element 200E according to the sixth embodiment may be a red lateral-type semiconductor light-emitting element, a green semiconductor light-emitting element, and / or a blue semiconductor light-emitting element.

[0246] The light-emitting layers 211 to 213 may have a first region 200a and a second region 200b surrounding the first region 200a.

[0247] A recess 219 may be formed in the first region 200a of the light-emitting layers 211 to 213. The recess 219 may have a circular shape, but is not limited thereto.

[0248] The upper surface of the first region 200a, i.e., the bottom surface of the recess 219, may be positioned differently from the upper surface of the second region 200b of the light-emitting layers 211 to 213. That is, the bottom surface of the recess 219 and the upper surface of the second region 200b of the light-emitting layers 211 to 213 may be positioned on different horizontal lines. The bottom surface of the recess 219 may be positioned lower than the upper surface of the second region 200b of the light-emitting layers 211 to 213.

[0249] The upper surface of the first-conductive-type semiconductor layer 211 may be exposed through the recess 219. For example, the bottom surface of the recess 219 may be the upper surface of the first-conductive-type semiconductor layer 211. The upper surface of the second-conductive-type semiconductor layer 213 may be exposed through the second region 200b of the light-emitting layers 211 to 213. The upper surface of the second region 200b of the light-emitting layers 211 to 213 may be the upper surface of the second-conductive-type semiconductor layer 213.

[0250] The first electrode 215 and the second electrode 216 may be disposed on the upper side of the light-emitting layers 211 to 213. The first electrode 215 may be disposed on the upper side of the second region 200b of the light-emitting layers 211 to 213, and the second electrode 216 may be disposed in the recess 219. The first electrode 215 may be in contact with the second region 200b of the light-emitting layers 211 to 213, that is, the upper surface of the second-conductive-type semiconductor layer 213, and the second electrode 216 may be in contact with the bottom surface of the recess 219, that is, the upper surface of the first-conductive-type semiconductor layer 211.

[0251] In the first to fifth embodiments, the upper surface of the first region 200a of the light-emitting layers 211 to 213 may be the upper surface of the second-conductive-type semiconductor layer 213, and the upper surface of the second region 200b of the light-emitting layers 211 to 213 may also be the upper surface of the first-conductive-type semiconductor layer 211. Conversely, in the sixth embodiment, the upper surface of the first region 200a of the light-emitting layers 211 to 213, that is, the bottom surface of the recess 219, may be the upper surface of the first-conductive-type semiconductor layer 211, and the upper surface of the second region 200b of the light-emitting layers 211 to 213 may be the upper surface of the second-conductive-type semiconductor layer 213.

[0252] In the first to fifth embodiments, the drive current flows from the central region (first region 200a) of the light-emitting layers 211 to 213 to the edge region (second region 200b). In the sixth embodiment, the drive current may flow from the edge region (second region 200b) of the light-emitting layers 211 to 213 to the central region (first region 200a).

[0253] In the first to fifth embodiments, the size of the second electrode 216 may be larger than the size of the first electrode 215. In the sixth embodiment, the size of the first electrode 215 may be larger than the size of the second electrode 216.

[0254] Meanwhile, the above display device may be a display panel. That is, in this embodiment, the display device and the display panel may be understood to have the same meaning. In this embodiment, the actual display device may include a display panel and a controller (or processor) that can control the display panel to display an image.

[0255] The above detailed description should not be construed as restrictive in all respects, but rather as illustrative. The scope of the present embodiment should be determined by a reasonable interpretation of the appended claims, and all changes within the equivalent scope of the present embodiment are included within the scope of the present embodiment.

[0256] Industrial Applicability

[0257] The present embodiment can be applied to the display field for displaying images or information. The present embodiment can be applied to the display field for using semiconductor light-emitting elements to display images or information. The semiconductor light-emitting element can be a micron-scale semiconductor light-emitting element or a nano-scale semiconductor light-emitting element.

[0258] For example, the present embodiment can be applied to televisions, signs, mobile terminals such as mobile phones or smartphones, computer monitors for computers such as laptop computers or desktop computers, head-up displays (HUDs) for automobiles, backlight units for displays, displays for VR, AR, or mixed reality (MR), light sources, etc.

Claims

1. A semiconductor light-emitting element, comprising: a light-emitting layer having a first region and a second region surrounding the first region; a first electrode on an upper side of the first region; a second electrode on an upper side of the second region; a passivation layer surrounding the light-emitting layer; and a metal oxide layer on a lower side of the light-emitting layer, wherein a thickness of the metal oxide layer is less than a thickness of the passivation layer.

2. The semiconductor light-emitting element according to claim 1, wherein, The thickness of the metal oxide layer is 1 / 3 or less of the thickness of the passivation layer.

3. The semiconductor light-emitting element according to claim 1, wherein, The metal oxide layer includes a conductive oxide layer.

4. The semiconductor light-emitting element according to claim 1, wherein, The metal oxide layer includes a dielectric oxide layer.

5. The semiconductor light-emitting device according to claim 1, wherein, The metal oxide layer includes: a conductive oxide layer; and a dielectric oxide layer.

6. The semiconductor light-emitting element according to claim 5, wherein, The conductive oxide layer is disposed on the lower side of the light-emitting layer, and the dielectric oxide layer is disposed on the lower side of the conductive oxide layer.

7. The semiconductor light-emitting device according to claim 6, wherein, The dielectric oxide layer has a plurality of grooves.

8. The semiconductor light-emitting element according to claim 5, wherein, The dielectric oxide layer is disposed on the lower side of the light-emitting layer, and the conductive oxide layer is disposed on the lower side of the dielectric oxide layer.

9. The semiconductor light-emitting device according to claim 8, wherein, The conductive oxide layer has a plurality of grooves.

10. The semiconductor light-emitting element according to claim 1, wherein, The metal oxide layer includes: a plurality of first metal oxide layers; and a plurality of second metal oxide layers located between the plurality of first metal oxide layers.

11. The semiconductor light-emitting element according to claim 10, wherein, A sum of a total thickness of the plurality of first metal oxide layers and a total thickness of the plurality of second metal oxide layers is less than or equal to 1 / 2 of the thickness of the passivation layer.

12. The semiconductor light-emitting device according to claim 1, wherein, The metal oxide is disposed on a lateral portion of the light-emitting layer.

13. The semiconductor light-emitting element according to claim 12, wherein, The metal oxide horizontally overlaps with the passivation layer.

14. A display device, comprising: a substrate; a reflector on the substrate; an adhesive layer on the reflector; a plurality of semiconductor light-emitting elements configured to emit lights of different colors on the adhesive layer; and a first electrode wiring and a second electrode wiring on an upper side of each of the plurality of semiconductor light-emitting elements, wherein the first electrode wiring and the second electrode wiring are respectively connected to a first electrode and a second electrode of each of the plurality of semiconductor light-emitting elements, and wherein each of the plurality of semiconductor light-emitting elements includes the semiconductor light-emitting element according to any one of claims 1 to 13.

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