Pixel circuit and display device including same

Abstract

A pixel circuit according to an embodiment and a display device including the same are disclosed. The pixel circuit includes: a driving element including a first electrode connected to a first power supply line, a gate electrode connected to a first node, and a second electrode connected to a second node; a first switching element configured to apply a data voltage to a first node in response to a first gate signal; a second switching element configured to connect a third node to a second node in response to a reset signal or a first gate signal; a third switching element configured to connect the sense line to a third node in response to a second gate signal; a fourth switching element configured to connect a second power supply line to a third node in response to a third gate signal; a capacitor connected between the first node and the second node; and a light emitting element connected between the second node and the third node.

Description

[0001] Cross - reference to related applications

[0002] This application claims priority and the benefit of Korean Patent Application No. 10 - 2023 - 0193950, filed on December 28, 2023, the entire disclosure of which is incorporated herein by reference. Technical field

[0003] The present invention relates to a pixel circuit and a display device including the pixel circuit. Background art

[0004] Display devices include liquid crystal display (LCD) devices, electroluminescent display devices, field - emission display (FED) devices, plasma display panels (PDPs), etc.

[0005] According to the material of the light - emitting layer, electroluminescent display devices are classified into inorganic light - emitting display devices and organic light - emitting display devices. An active - matrix organic light - emitting display device includes an organic light - emitting diode (hereinafter referred to as "OLED") that emits light by itself and has advantages such as fast response speed, high luminous efficiency, high brightness, and wide viewing angle.

[0006] Some display devices, such as liquid crystal display devices or organic light - emitting display devices, include: a display panel including a plurality of sub - pixels; a driver that outputs drive signals for driving the display panel; a power supply that generates power to be supplied to the display panel or the driver; and so on. The driver includes: a gate driver that provides gate signals such as scan signals and light - emitting signals to the display panel; and a data driver that provides data signals to the display panel. Summary of the invention

[0007] Each of a plurality of pixels includes an OLED and a driving element that provides a current flowing to the OLED according to the gate - source voltage Vgs. In addition to the driving element, the degradation of the OLED can also cause afterimages to appear on the screen, so various mechanisms capable of sensing the degradation information of the OLED have been proposed.

[0008] However, the operating voltage of the OLED cannot be directly sensed, and the degradation trend is sensed by using the relationship of the operating point between the driving element and the OLED. If this degradation trend is sensed, the characteristics of the driving element cannot be completely excluded, and thus work for compensating this is required.

[0009] The present invention aims to solve all the above - mentioned needs and problems.

[0010] The present invention provides a pixel circuit and a display device including the pixel circuit.

[0011] It should be noted that the object of the present invention is not limited to the above object, and other objects of the present invention will be clear to those of ordinary skill in the art according to the following description.

[0012] The pixel circuit according to an embodiment of the present invention may include: a driving element including a first electrode connected to a first power supply line, a gate connected to a first node, and a second electrode connected to a second node; a first switching element configured to apply a data voltage to the first node in response to a first gate signal; a second switching element configured to connect a third node to the second node in response to a reset signal or the first gate signal; a third switching element configured to connect a sensing line to the third node in response to a second gate signal; a fourth switching element configured to connect a second power supply line to the third node in response to a third gate signal; a capacitor connected between the first node and the second node; and a light-emitting element connected between the second node and the third node.

[0013] The pixel circuit according to an embodiment of the present invention may include: a driving element including a first electrode connected to a first power supply line, a gate connected to a first node, and a second electrode connected to a second node; a first switching element configured to apply a data voltage to the first node in response to a first gate signal; a second switching element configured to connect a sensing line to the second node in response to a second gate signal; a third switching element configured to connect the sensing line to a third node in response to a third gate signal; a fourth switching element configured to connect a second power supply line to the third node in response to a fourth gate signal; a capacitor connected between the first node and the second node; and a light-emitting element connected between the second node and the third node.

[0014] A display device according to an embodiment of the present invention may include: a pixel array in which a plurality of data lines, a plurality of gate lines, and a plurality of pixel circuits are provided; a data driver configured to output data voltages to the plurality of data lines; and a gate driver configured to output gate signals to the plurality of gate lines, wherein each of the plurality of pixel circuits includes: a driving element including a first electrode connected to a first power supply line, a gate connected to a first node, and a second electrode connected to a second node; a first switching element configured to apply a data voltage to the first node in response to a first gate signal; a second switching element configured to connect a sensing line to the second node in response to a reset signal; a third switching element configured to connect the sensing line to a third node in response to a second gate signal; a fourth switching element configured to connect a second power supply line to the third node in response to a third gate signal; a capacitor connected between the first node and the second node; and a light-emitting element connected between the second node and the third node.

[0015] A display device according to an embodiment of the present invention may include: a pixel array in which a plurality of data lines, a plurality of gate lines, and a plurality of pixel circuits are provided; a data driver configured to output data voltages to the plurality of data lines; and a gate driver configured to output gate signals to the plurality of gate lines, wherein each of the plurality of pixel circuits includes: a driving element including a first electrode connected to a first power supply line, a gate connected to a first node, and a second electrode connected to a second node; a first switching element configured to apply a data voltage to the first node in response to a first gate signal; a second switching element configured to connect the sensing line to the second node in response to a second gate signal; a third switching element configured to connect the sensing line to a third node in response to a third gate signal; a fourth switching element configured to connect a second power supply line to the third node in response to a fourth gate signal; a capacitor connected between the first node and the second node; and a light-emitting element connected between the second node and the third node.

[0016] According to the present invention, the operating voltage of the light-emitting element can be directly sensed in a state where the characteristics of the driving element are completely excluded by additionally configuring a switching element for sensing the operating voltage of the light-emitting element.

[0017] Even in a structure where sensing lines are shared, the characteristics of the light-emitting elements of each pixel can be extracted by applying a data voltage with a relatively high voltage level to the pixel circuits to be sensed and applying a data voltage with a relatively low voltage level to the pixel circuits not to be sensed.

[0018] According to the present invention, since pixel circuits can be selectively sensed, low-power driving can be achieved.

[0019] The effects of the present invention are not limited to the above effects, and other effects not mentioned will be clearly understood by those of ordinary skill in the art from the following description and the appended claims. BRIEF DESCRIPTION OF THE DRAWINGS

[0020] The above and other objects, features, and advantages of the present invention will become more apparent to those of ordinary skill in the art from the exemplary embodiments described in detail with reference to the accompanying drawings, in which:

[0021] Figure 1 is a block diagram showing a display device according to an embodiment of the present invention;

[0022] Figure 2 is a diagram showing the time of entering the sensing mode in the driving sequence of the display device;

[0023] Figure 3 is a diagram showing a pixel circuit and a compensation circuit according to a first embodiment of the present invention;

[0024] Figure 4 is a diagram Figure 3 showing the driving timing of the display mode of the pixel circuit shown;

[0025] Figures 5A to 5C is an illustration according to Figure 4 , the operation of the pixel circuit;

[0026] Figure 6 is a diagram Figure 3 showing the driving timing of the first sensing mode of the pixel circuit shown;

[0027] Figures 7A to 7C is an illustration according to Figure 6 , the operation of the pixel circuit;

[0028] Figure 8 is a diagram Figure 3 showing the driving timing of the second sensing mode of the pixel circuit shown;

[0029] Figures 9A to 9D is an illustration according to Figure 8 , the operation of the pixel circuit;

[0030] Figure 10 is a diagram showingFigure 3 Diagram of a modified pixel circuit of the first embodiment shown;

[0031] Figure 11 Diagram showing a pixel circuit and a compensation circuit according to a second embodiment of the present invention;

[0032] Figure 12 Illustrates Figure 11 Diagram of the display mode driving timing of the pixel circuit shown;

[0033] Figures 13A to 13C Describes according to Figure 12 , operation of the pixel circuit;

[0034] Figure 14 Illustrates Figure 11 Diagram of the first sensing mode driving timing of the pixel circuit shown;

[0035] Figures 15A to 15C Describes according to Figure 14 , operation of the pixel circuit;

[0036] Figure 16 Illustrates Figure 11 Diagram of the second sensing mode driving timing of the pixel circuit shown;

[0037] Figures 17A to 17D Describes according to Figure 16 , operation of the pixel circuit;

[0038] Figure 18 Diagram showing a pixel circuit and a compensation circuit according to a third embodiment of the present invention;

[0039] Figures 19A to 19C Describes Figure 18 , operation of each mode of the pixel circuit shown;

[0040] Figure 20 Shows Figure 18 Diagram of a modified pixel circuit of the third embodiment shown;

[0041] Figure 21 Diagram showing a pixel circuit and a compensation circuit according to a fourth embodiment of the present invention;

[0042] Figures 22A to 22C Describes Figure 21 , operation of each mode of the pixel circuit shown. Detailed Description

[0043] The advantages and features of the present invention and the methods for realizing them will become clear through the preferred embodiments described in detail in conjunction with the accompanying drawings. However, the present invention is not limited to the embodiments described below, but can be implemented in different forms. These embodiments are provided only to make the disclosure of the present invention complete and to fully convey the scope of the present invention to those of ordinary skill in the art. The present invention is defined by the disclosed claims.

[0044] The shapes, sizes, proportions, angles, quantities, etc. disclosed in the drawings used to describe the embodiments of the present invention are merely exemplary. Therefore, the present invention is not limited to the items shown in the drawings. Throughout this specification, the same reference numerals refer to the same components. In addition, when determining that a detailed description of related known technologies may unnecessarily obscure the gist of the present invention, the detailed description thereof will be omitted.

[0045] When using terms such as "including", "having", "comprising", etc. mentioned in the present invention, other components may be added, unless "only" is used. The case where a component is expressed in the singular includes the plural form, unless otherwise clearly specified.

[0046] When interpreting elements, it should be understood that even without a separate and clear description, the error range is included.

[0047] In the case of describing the positional relationship, for example, when the positional relationship between two parts is described as "on...", "on the upper part", "on the lower part", "after", etc., one or more other parts may be provided between these two parts, unless "immediately" or "directly" is used.

[0048] Although the first, second, etc. are used to describe each element, these elements are not limited by these terms. These terms are only used to distinguish one element from other elements. Therefore, within the technical spirit of the present invention, the first element mentioned below may also be the second element.

[0049] The same reference numerals may refer to substantially the same elements throughout the present invention.

[0050] The following embodiments may be combined or combined with each other partially or wholly, and may be connected and operated in various ways technically. The embodiments may be implemented independently of each other, or implemented in association with each other.

[0051] Hereinafter, the embodiments of the present invention will be described in detail with reference to the accompanying drawings.

[0052] In the display device of the present invention, the pixel circuit and the gate driving circuit may include a plurality of transistors. The transistors may be implemented as oxide thin film transistors (oxide TFTs) including oxide semiconductors, low temperature polycrystalline silicon TFTs including low temperature polycrystalline silicon (LTPS), etc.

[0053] A transistor is a three - electrode element including a gate, a source, and a drain. The source is the electrode that supplies carriers to the transistor. In a transistor, carriers start to flow from the source. The drain is the electrode through which carriers exit the transistor. In a transistor, carriers flow from the source to the drain. In the case of an n - channel transistor, since the carriers are electrons, the source voltage is a voltage lower than the drain voltage, so that electrons can flow from the source to the drain. The n - channel transistor has a current direction from the drain to the source. In the case of a p - channel transistor (p - channel metal - oxide semiconductor (PMOS)), since the carriers are holes, the source voltage is higher than the drain voltage, so that holes can flow from the source to the drain. In a p - channel transistor, since holes flow from the source to the drain, the current flows from the source to the drain. It should be noted that the source and drain of a transistor are not fixed. For example, the source and drain can change according to the applied voltage. Therefore, the present invention is not limited by the source and drain of the transistor. In the following description, the source and drain of the transistor will be referred to as the first electrode and the second electrode.

[0054] The gate signal swings between a gate - on voltage and a gate - off voltage. The gate - on voltage is set to a voltage higher than the threshold voltage of the transistor, and the gate - off voltage is set to a voltage lower than the threshold voltage of the transistor.

[0055] The transistor turns on in response to the gate - on voltage and turns off in response to the gate - off voltage. In the case of an n - channel transistor, the gate - on voltage can be a gate - high voltage, and the gate - off voltage can be a gate - low voltage. In the case of a p - channel transistor, the gate - on voltage can be a gate - low voltage, and the gate - off voltage can be a gate - high voltage.

[0056] Figure 1 is a block diagram showing a display device according to an embodiment of the present invention. Figure 2 is a diagram showing the time when entering the sensing mode in the driving sequence of the display device.

[0057] Refer to Figure 1 , a display device according to an embodiment of the present invention includes a display panel 100 and a display - panel driving circuit for writing pixel data to the pixels of the display panel 100. In addition, the display device includes a power supply 150.

[0058] The display panel 100 may be a panel having a rectangular structure including a length in the X - axis direction, a width in the Y - axis direction, and a thickness in the Z - axis direction, but is not limited thereto. For example, the display panel 100 may be a heterogeneous panel in which at least a part thereof is curved or elliptical.

[0059] The display area AA of the display panel 100 includes a display array for displaying an input image. The pixel array includes: a plurality of data lines 102; a plurality of gate lines 103 intersecting the data lines 102; and a plurality of pixels 101 arranged in a matrix form. The display panel 100 may further include a power supply line commonly connected to the pixels. The power supply line may be commonly connected to the pixel circuit to supply the voltage required to drive the pixel 101 to the pixel 101.

[0060] Each pixel 101 may be divided into a red sub-pixel, a green sub-pixel, and a blue sub-pixel to achieve color. Each pixel may further include a white sub-pixel. Each sub-pixel includes a pixel circuit for driving a light-emitting element. The light-emitting element may include an OLED or an inorganic light-emitting diode (LED). Each pixel circuit is connected to a data line, a gate line, and a power supply line. In the following description, a pixel may be interpreted as a sub-pixel.

[0061] Pixels may be arranged as actual color pixels and Pentile pixels. Pentile pixels can achieve a higher resolution than actual color pixels by driving two sub-pixels with different colors as one pixel 101 and using a preset pixel rendering algorithm. Such a pixel rendering algorithm can utilize the colors of light emitted from adjacent pixels to compensate for insufficient color rendering in each pixel.

[0062] Each pixel may include at least one first light-emitting element that emits light in a first mode and a second light-emitting element that emits light in a second mode. Each pixel 101 emits light from the first light-emitting element with a wider viewing angle in the first mode and emits light from the second light-emitting element with a narrower viewing angle in the second mode.

[0063] The display area AA includes a plurality of pixel rows L1 to Ln. Each of the pixel rows L1 to Ln includes a row of pixels arranged in the row direction (X-axis direction) in the pixel array of the display panel 100. Those pixels arranged in one pixel row share the gate line 103. Pixels arranged in the column direction Y along the data line direction share the same data line 102. A horizontal period is the time obtained by dividing one frame period by the total number of pixel rows L1 to Ln.

[0064] The display panel 100 may be implemented using a non-transmissive display panel or a transmissive display panel. The transmissive display panel can be applied to a transparent display device, where an image is displayed on the screen and actual objects in the background are visible. The display panel 100 may be made of a flexible display panel.

[0065] The power supply 150 receives an input voltage applied from the host system 300 and outputs voltages required to drive the pixels 101 of the display panel 100 and the display panel driving circuit. To this end, the power supply 150 may include a DC-DC converter. The DC-DC converter may include a charge pump, a rectifier, a buck converter, a boost converter, etc. The power supply 150 may output a constant voltage (or a DC voltage) via the DC-DC converter, such as a gate-on voltage, a gate-off voltage, a pixel driving voltage, a cathode voltage, a reference voltage, and an IC driving voltage for the display panel driving circuit. The gate-on voltage and the gate-off voltage may be supplied to the level shifter 140 and the gate driver 120. Voltages such as the pixel driving voltage, the cathode voltage, and the reference voltage may be supplied to the pixels 101 via power lines commonly connected to the pixels 101.

[0066] The power supply 150 may further include a gamma voltage generator. The gamma voltage generator receives a high-potential reference voltage and a low-potential reference voltage and outputs a plurality of gamma reference voltages divided at specific intervals on a preset gamma curve, for example, a 2.2 gamma curve. The gamma reference voltages are supplied to the data driver 110. In the data driver 110, the gamma reference voltages are subdivided into gray-scale voltages by a voltage dividing circuit. The gamma voltage generator may be implemented using a programmable gamma circuit (which can adjust the level of each gamma reference voltage according to digital data). The timing controller 130, the host system 300, or a separate external device may update the digital data stored in the register of the programmable gamma circuit via a communication interface.

[0067] The display panel driving circuit writes pixel data of an input image to the pixels 101 of the display panel 100 under the control of the timing controller 130. The display panel driving circuit includes a data driver 110 and a gate driver 120.

[0068] The display panel driving circuit may further include a touch sensor driver for driving a touch sensor. The touch sensor driver is not shown in Figure 1 The data driver 110 and the touch sensor driver may be integrated into one source driver IC.

[0069] The data driver 110 receives pixel data of an input image from the timing controller 130 as a digital signal and outputs a data voltage. The data driver 110 may receive gamma reference voltages and generate gamma compensation voltages for each gray scale via a voltage dividing circuit. The gamma compensation voltages for each gray scale are supplied to digital-to-analog converters (hereinafter referred to as "DACs") provided in each channel of the data driver 110.

[0070] The data driver 110 samples and latches the digital data received from the timing controller 130, and then inputs the digital data to the DAC. Here, the digital data includes the pixel data of the input image. In addition, the digital data may include mode selection data for selecting the first mode and the second mode. The DAC converts the pixel data into a gamma-compensated voltage and outputs the data voltage of the pixel data.

[0071] In the first sensing mode for sensing or measuring the threshold voltage of the driving element in the pixel circuit, the data driver 110 may apply a data voltage of a predetermined voltage level to the sensing circuit selected for sensing, and may apply a data voltage of 0V or a data voltage of a black gray level to the pixel circuits not selected.

[0072] In the second sensing mode for sensing or measuring the threshold voltage of the light-emitting element in the pixel circuit, the data driver 110 may apply a data voltage of the maximum voltage level or a data voltage generated using the maximum gamma voltage to the sensing circuit selected for sensing, and may apply a data voltage of 0V or a data voltage of a black gray level to the pixel circuits not selected.

[0073] The gate driver 120 may be formed on the display panel 100 together with the wirings and circuit elements in the display area AA. The gate driver 120 may be disposed in at least one of the left and right non-display areas NA outside the display area AA of the display panel 100, or at least a part thereof may be disposed inside the display area AA.

[0074] The gate driver 120 may be disposed in the non-display area NA on both sides of the display panel 100 (with the display area AA of the display panel interposed therebetween) to provide gate pulses on both sides of the gate line 103 in accordance with the double feeding method. In another embodiment, the gate driver 120 may be disposed in at least one of the left and right non-display areas NA of the display panel 100 to provide a gate signal to the gate line 103 in accordance with the single feeding method. The gate driver 120 sequentially outputs pulses of the gate signal to the gate line 103 under the control of the timing controller 130. The gate driver 120 may sequentially provide the gate signal to the gate line 103 by shifting the pulses of the gate signal using a shift register. When a plurality of gate signals are applied to each pixel, the gate driver 120 may include a plurality of shift registers. The gate signal may include a scan signal input to the pixel circuit via a plurality of gate lines and a light-emitting signal (or EM signal).

[0075] The timing controller 130 receives digital video data of an input image and a timing signal synchronized with this data from the host system 300. The timing signal may include a vertical synchronization signal Vsync, a horizontal synchronization signal Hsync, and a data enable signal DE. Since the vertical period and the horizontal period can be known by counting the data enable signal DE, the vertical synchronization signal Vsync and the horizontal synchronization signal Hsync may be omitted. The horizontal synchronization signal Hsync and the data enable signal DE have a period of one horizontal period (1H).

[0076] The timing controller 130 may control the display panel driving circuit by generating a data timing control signal for the operation timing of the controller data driver 110 and a gate timing control signal for the operation timing of controlling the gate driver 120 based on the timing signals Vsync, Hsync, and DE received from the host system 300. The timing controller 130 may synchronize the data driver 110 and the gate driver 120 by controlling the operation timing of the display panel driving circuit.

[0077] The gate timing control signal output from the timing controller 130 may be input to the shift register of the gate driver 120 via the level shifter 140. The level shifter 140 may convert the voltage of the gate timing control signal received from the timing controller 130 into a swing width between the gate on voltage and the gate off voltage and provide it to the gate driver 120.

[0078] The host system 300 may include a motherboard of one of a television system, a set-top box, a navigation system, a personal computer (PC), a vehicle system, a mobile terminal, and a wearable terminal. The host system 300 may scale an image signal from a video source according to the resolution of the display panel 100 and transmit it to the timing controller 130 together with the timing signal.

[0079] The host system 300 may transmit a mode signal having different logic values in a first mode and a second mode to the timing controller 130 together with the image signal at least once per frame.

[0080] The display panel driving circuit writes the pixel data of the input image into the pixel 101 by scanning the pixels in the display mode under the control of the timing controller 130. In the display mode, the input image is reproduced on the display area AA. The sensing circuit senses the threshold voltage of the driving elements in all the sub-pixels by sensing the sub-pixels in the display area AA row by row in the sensing mode.

[0081] The display device can enter the sensing mode according to at least one of the following sequences: the power-on (power on) sequence ON RF for applying power to the display device; the vertical blanking time VB during the display time; and the power-off (power off) sequence OFF RS in which the power-off switch of the display device is turned on, as Figure 2 shown. The vertical blanking time VB is a blank period within one frame period that does not include the active period AT, during which the pixel data of the input image is written to the pixels. During the vertical blanking time VB, no pixel data is input to the data driver 110 and no pixel data is written to the sub-pixels. During the active period AT, the pixel data is input to the data driver, and the data voltage output from the data driver 110 is charged into the sub-pixels, thereby writing the pixel data to the sub-pixels.

[0082] In the power-off sequence, after the power-off switch is turned on, the sensing circuit is further driven for a predetermined period of time to sense the threshold voltage of the driving element in each sub-pixel, and then stops its driving when the power is cut off. During the sensing time, the sensing data output from the sensing channel of the data driver 110 is transmitted to the timing controller 130.

[0083] Figure 3 is a diagram showing a pixel circuit and a compensation circuit according to a first embodiment of the present invention.

[0084] Referring to Figure 3 , the pixel circuit according to the first embodiment includes: a light-emitting element EL; a driving element DT that supplies current to the light-emitting element EL; a plurality of switching elements T1 to T4 that switch the current path connected to the driving element DT; and a capacitor Cst that stores the gate-source voltage of the driving element DT. The driving element DT and the plurality of switching elements T1 to T4 can be implemented as n-channel TFTs, but are not limited thereto.

[0085] The light-emitting element EL emits light through the current applied via the channel of the driving element DT according to the gate-source voltage Vgs of the driving element DT that changes based on the data voltage Vdata. The light-emitting element EL can be implemented as an OLED including an organic compound layer formed between an anode and a cathode. The organic compound layer may include a hole injection layer HIL, a hole transport layer HTL, a light-emitting layer EML, an electron transport layer ETL, and an electron injection layer EIL, but is not limited thereto. The anode of the light-emitting element EL is connected to the driving element DT via a second node n2, and the cathode of the light-emitting element EL is connected to a low-potential power supply voltage line 42 to which a low-potential power supply voltage EVSS is applied.

[0086] The OLED used as the light-emitting element EL can be a tandem structure in which multiple light-emitting layers are stacked. The OLED with a tandem structure can improve the brightness and lifespan of the pixel.

[0087] The driving element DT drives the light-emitting element EL by supplying current to the light-emitting element EL according to the gate-source voltage Vgs. The driving element DT includes a gate connected to the first node n1, a first electrode (or drain) connected to a pixel driving voltage line or a first power supply line 41 to which the pixel driving voltage EVDD is applied, and a second electrode (or source) connected to the second node n2.

[0088] The first switching element T1 conducts according to the gate conduction voltage of the first gate signal SCAN, and connects the data line DL to the first node n1 to supply the data voltage Vdata to the first node n1. The first switching element T1 includes a gate to which the first gate signal SCAN is applied, a first electrode connected to the data line DL, and a second electrode connected to the first node n1.

[0089] The second switching element T2 conducts according to the reset signal RESET, and connects the second node n2 to the third node n3. The second switching element T2 includes a gate to which the reset signal RESET is applied, a first electrode connected to the second node n2, and a second electrode connected to the third node n3.

[0090] The third switching element T3 conducts according to the gate conduction voltage of the second gate signal SENSE, and connects the sense line SL or the third power supply line 43 to the third node n3 to supply a reference voltage to the third node n3. The third switching element T3 includes a gate to which the second gate signal SENSE is applied, a first electrode connected to the third node n3, and a second electrode connected to the third power supply line 43 to which the reference voltage is applied.

[0091] The fourth switching element T4 conducts according to the gate conduction voltage of the third gate signal EM, and connects a pixel base voltage line (or a low-potential power supply voltage line) or a second power supply line 42 to which the pixel base voltage (or low-potential power supply voltage) EVSS is applied to the third node n3. The fourth switching element T4 includes a gate to which the third gate signal EM is applied, a first electrode connected to the third node n3, and a second electrode connected to the second power supply line 42.

[0092] The capacitor Cst can be connected between the first node n1 and the second node n2. The capacitor Cst can be charged with the gate-source voltage Vgs of the driving element DT.

[0093] The compensation circuit may include a sensing unit 111 connected to a pixel circuit in each pixel. The sensing unit 111 may sense the electrical characteristics of the pixel via a sensing line SL. Here, the electrical characteristics of the pixel may include the threshold voltage of a driving element and the threshold voltage of a light-emitting element.

[0094] The sensing unit 111 may be provided in the data driver 110 together with a digital-to-analog converter DAC.

[0095] The sensing unit 111 may sense the electrical characteristics of the light-emitting element and the driving element of each pixel. The sensing unit 111 may include an analog-to-digital converter ADC, a first switch SPRE, and a second switch SAM.

[0096] In the display mode, the first switch SPRE connected to a reference voltage line to which a reference voltage Vprer is applied or the third power supply line 43 is turned on, and the second switch SAM is turned off, so that the reference voltage Vprer may be supplied to the pixel circuit via the sensing line SL.

[0097] In the sensing mode after the power is turned off, the first switch SPRE is turned off, and the second switch SAM connected to the analog-to-digital converter ADC is turned on, so that the current flowing through the channel of the driving element DT, or the threshold voltage of the driving element DT and the operating voltage of the light-emitting element EL may be sensed via the sensing line SL. The current flowing through the sensing line SL may be converted into digital data via the analog-to-digital converter ADC, and the converted digital data may be transmitted to the timing controller. The digital data is sensing data including the threshold voltage Vth of the driving element DT and the operating voltage of the light-emitting element. The operating voltage of the light-emitting element may be the threshold voltage of the light-emitting element.

[0098] Figure 4 is a diagram Figure 3 showing the display mode driving timing of the pixel circuit shown. Figures 5A to 5C is to illustrate according to Figure 4 the operation of the pixel circuit.

[0099] Referring to Figure 4 in the display mode after the power of the display device is turned on, the pixel circuit may be driven in the order of an initialization and data writing period Tini / w, a boosting period Tboost, and a light-emitting period Tem.

[0100] In the display mode, the first switch SPRE is turned on, and the second switch SAM remains in the off state.

[0101] Referring to Figure 4 and 5A, during the initialization and data writing period Tini / w, the fourth switching element T4 is turned off, and the first to third switching elements T1 to T3 are turned on, so that the data voltage Vdata is supplied to the first node n1, and the second node n2 is initialized to the reference voltage Vprer.

[0102] Refer to Figure 4 and 5B , during the boosting period Tboost, the first to third switching elements T1 to T3 are turned off, and the fourth switching element T4 is turned on, so that the voltage of the first node n1 can be boosted.

[0103] Refer to Figure 4 and 5C , during the light emitting period Tem, the first to third switching elements T1 to T3 are turned off, and the fourth switching element T4 remains turned on, so that current can flow through the driving element DT via the pixel driving voltage, and thus the light emitting element EL can emit light.

[0104] Figure 6 is a diagram Figure 3 showing the driving timing of the first sensing mode of the pixel circuit shown. Figures 7A to 7C is an illustration according to Figure 6 , the operation of the pixel circuit.

[0105] Refer to Figure 6 , in the first sensing mode after the power of the display device is turned off, the pixel circuit can be driven in the order of the initialization and data writing period Tini / w, the sensing period Ts, and the sampling period Tsam.

[0106] In the first sensing mode, the threshold voltage of the driving element DT can be sensed via the sensing line SL. During the entire period of the first sensing mode, the first switching element T1, the second switching element T2, and the third switching element T3 can be turned on, and the fourth switching element T4 can be turned off.

[0107] Refer to Figure 6 and 7A , during the initialization and data writing period Tini / w, the second switch SAM is turned off, the first switch SPRE is turned on, the fourth switching element T4 is turned off, and the first to third switching elements T1 to T3 are turned on, so that the data voltage Vdata is supplied to the first node n1, and the reference voltage Vprer is supplied to the second node n2.

[0108] Refer to Figure 6 and 7B , during the sensing period Ts, the first switch SPRE is switched to the off state, and the supply of the reference voltage Vref to the second node n2 is blocked. Therefore, the voltage of the second node n2 rises through the pixel driving voltage EVDD.

[0109] Refer toFigure 6 and 7C During the sampling period Tsam, the second switch SAM is switched to the conducting state, and the threshold voltage of the driving element DT is sampled via the sensing line SL.

[0110] The sampled threshold voltage of the driving element DT can be converted into digital data by an analog-to-digital converter ADC in the data driver, and the converted digital data can be transmitted to the timing controller.

[0111] Figure 8 is a diagram Figure 3 showing the driving timing of the second sensing mode of the pixel circuit shown. Figures 9A to 9D is an illustration according to Figure 8 showing the operation of the pixel circuit.

[0112] Referring to Figure 8 in the second sensing mode after the power supply of the display device is turned off, the pixel circuit can be driven in the order of the initialization and data writing period Tini / w, the programming period Tp, the sensing period Ts, and the sampling period Tsam.

[0113] In the second sensing mode, the threshold voltage of the light-emitting element EL can be sensed via the sensing line SL.

[0114] Referring to Figure 8 and 9A in the initialization and data writing period Tini / w, the second switch SAM is turned off, the first switch SPRE is turned on, the fourth switching element T4 is turned off, and the first to third switching elements T1 to T3 are turned on, so that the data voltage Vdata is supplied to the first node n1, and the reference voltage Vprer is supplied to the second node n2. In this case, the reference voltage Vprer can be, for example, in the range of 0 to 1V, but is not limited thereto. In addition, as the data voltage Vdata, a relatively high voltage is used so that the driving element can be used as a switching element. For example, the data voltage Vdata can be about 16V.

[0115] In the second sensing mode, the data voltage Vdata applied to the selected pixel circuit to be sensed can be the data voltage of the maximum voltage level or the data voltage generated by using the maximum gamma voltage. The data voltage applied to the unselected pixel circuit can be the data voltage of 0V or the data voltage of the black gray level.

[0116] Since data voltages of different voltage levels are applied to the corresponding pixel circuits according to whether they are selected for sensing, sensing for each pixel is possible even if the sensing line is shared.

[0117] Referring to Figure 8 and 9B, during the programming period Tp, the first switching element T1, the second switching element T2, and the fourth switching element T4 are turned off, and the third switching element T3 is turned on, so that the light-emitting element EL emits light, the voltage of the second node n2 rises until it reaches the pixel driving voltage EVDD, and the voltage of the third node n3 remains at the reference voltage Vprer.

[0118] Referring to Figure 8 and 9C , during the sensing period Ts, the first switch SPRE is switched to the off state, the first switching element T1, the second switching element T2, and the fourth switching element T4 are turned off, and the third switching element T3 remains in the on state, so that the sensing line becomes a floating state, and the voltage of the sensing line rises until the light-emitting element emits light and then turns off.

[0119] Referring to Figure 8 and 9D , during the sampling period Tsam, the second switch SAM is switched to the on state, and the threshold voltage of the light-emitting element EL is sampled via the sensing line SL.

[0120] The sampled threshold voltage of the light-emitting element EL can be converted into digital data by the analog-to-digital converter ADC in the data driver, and the converted digital data can be transmitted to the timing controller.

[0121] Figure 10 is a diagram showing Figure 3 a modified pixel circuit of the first embodiment shown in

[0122] Referring to Figure 10 , the modified pixel circuit of the first embodiment includes: a light-emitting element EL; a driving element DT that supplies current to the light-emitting element EL; a plurality of switching elements T1 to T4 that switch the current path connected to the driving element DT; and a capacitor Cst that stores the gate-source voltage of the driving element DT.

[0123] Figure 10 The modified pixel circuit of the first embodiment shown in

[0124] can be configured such that the first gate signal SCAN that is not the reset signal RESET is applied to the gate of the second switching element T2.

[0125] Figure 11 is a diagram showing a pixel circuit and a compensation circuit according to the second embodiment of the present invention.

[0126] Referring to Figure 11, a pixel circuit according to the second embodiment includes: a light-emitting element EL; a driving element DT that supplies current to the light-emitting element EL; a plurality of switching elements T1 to T4 that switch a current path connected to the driving element DT; and a capacitor Cst that stores the gate-source voltage of the driving element DT. The driving element DT and the plurality of switching elements T1 to T4 can be implemented as n-channel TFTs, but are not limited thereto.

[0127] The light-emitting element EL emits light by a current applied through the channel of the driving element DT according to the gate-source voltage Vgs of the driving element DT that changes based on the data voltage Vdata.

[0128] The driving element DT drives the light-emitting element EL by supplying current to the light-emitting element EL according to the gate-source voltage Vgs. The driving element DT includes a gate connected to a first node n1, a first electrode (or drain) connected to a pixel driving voltage line or a first power supply line 41 to which a pixel driving voltage EVDD is applied, and a second electrode (or source) connected to a second node n2.

[0129] The first switching element T1 conducts according to the gate conduction voltage of the first gate signal SCAN, and connects the data line DL to the first node n1 to supply the data voltage Vdata to the first node n1. The first switching element T1 includes a gate to which the first gate signal SCAN is applied, a first electrode connected to the data line DL, and a second electrode connected to the first node n1.

[0130] The second switching element T2 conducts according to the second gate signal SENSE1, and connects the sense line SL to the second node n2 to supply the reference voltage Vprer to the second node n2. The second switching element T2 includes a gate to which the second gate signal SENSE1 is applied, a first electrode connected to the second node n2, and a second electrode connected to the sense line SL.

[0131] The third switching element T3 conducts according to the gate conduction voltage of the third gate signal SENSE2, and connects the sense line SL to the third node n3 to supply the reference voltage to the third node n3. The third switching element T3 includes a gate to which the third gate signal SENSE2 is applied, a first electrode connected to the third node n3, and a second electrode connected to the sense line SL.

[0132] The fourth switching element T4 conducts according to the gate conduction voltage of the fourth gate signal EM, and connects the pixel base voltage line or the second power supply line 42 to which the pixel base voltage EVSS is applied to the third node n3. The fourth switching element T4 includes a gate to which the fourth gate signal EM is applied, a first electrode connected to the third node n3, and a second electrode connected to the second power supply line 42.

[0133] The capacitor Cst can be connected between the first node n1 and the second node n2. The capacitor Cst can be charged with the gate-source voltage Vgs of the driving element DT.

[0134] The compensation circuit may include a sensing unit 111 connected to the pixel circuit in each pixel. The sensing unit 111 can sense the electrical characteristics of the pixel via the sensing line SL.

[0135] The sensing unit 111 can be provided in the data driver 110 together with the DAC.

[0136] The sensing unit 111 can sense the electrical characteristics of the light-emitting element and the driving element of each pixel. The sensing unit 111 may include an analog-to-digital converter ADC, a first switch SPRE, and a second switch SAM.

[0137] In the display mode, the first switch SPRE connected to the reference voltage line to which the reference voltage Vprer is applied or the third power supply line 43 is turned on, and the second switch SAM is turned off, so that the reference voltage Vprer can be supplied to the pixel circuit via the sensing line SL.

[0138] In the sensing mode after the power is turned off, the first switch SPRE is turned off, and the second switch SAM connected to the analog-to-digital converter ADC is turned on, so that the current flowing through the channel of the driving element DT, or the threshold voltage of the driving element DT and the threshold voltage of the light-emitting element EL can be sensed via the sensing line SL. The current flowing through the sensing line SL can be converted into digital data via the analog-to-digital converter ADC, and the converted digital data can be transmitted to the timing controller.

[0139] Figure 12 is a diagram Figure 11 showing the display mode driving timing of the pixel circuit shown. Figures 13A to 13C is an illustration according to Figure 12 the operation of the pixel circuit.

[0140] Referring to Figure 12 in the display mode after the power of the display device is turned on, the pixel circuit can be driven in the order of the initialization and data writing period Tini / w, the boosting period Tboost, and the light-emitting period Tem.

[0141] In the display mode, the first switch SPRE is turned on, and the second switch SAM remains off.

[0142] Referring to Figure 12 and 13A in the initialization and data writing period Tini / w, the fourth switching element T4 is turned off, and the first to third switching elements T1 to T3 are turned on, so that the data voltage Vdata is supplied to the first node n1, and the second node n2 is initialized to the reference voltage Vprer.

[0143] Reference Figure 12 and 13B During the boosting period Tboost, the first to third switching elements T1 to T3 are turned off and the fourth switching element T4 is turned on, so that the voltage of the first node n1 can be boosted.

[0144] Reference Figure 12 and 13C During the light emitting period Tem, the first to third switching elements T1 to T3 are turned off and the fourth switching element T4 remains turned on, so that current can flow through the driving element DT via the pixel driving voltage, whereby the light emitting element EL can emit light.

[0145] Figure 14 is a diagram Figure 11 showing the driving timing of the first sensing mode of the pixel circuit shown. Figures 15A to 15C is a diagram for explaining Figure 14 the operation of the pixel circuit according to

[0146] Reference Figure 14 In the first sensing mode after the power supply of the display device is turned off, the pixel circuit can be driven in the order of the initialization and data writing period Tini / w, the sensing period Ts, and the sampling period Tsam.

[0147] In the first sensing mode, the threshold voltage of the driving element DT can be sensed via the sensing line SL.

[0148] Reference Figure 14 and 15A During the initialization and data writing period Tini / w, the second switch SAM is turned off, the first switch SPRE is turned on, the fourth switching element T4 is turned off, and the first to third switching elements T1 to T3 are turned on, so that the data voltage Vdata is supplied to the first node n1 and the reference voltage Vprer is supplied to the second node n2.

[0149] Reference Figure 14 and 15B During the sensing period Ts, the first switch SPRE is switched to the off state, and the supply of the reference voltage Vref to the second node n2 is blocked. Therefore, the voltage of the second node n2 rises through the pixel driving voltage EVDD.

[0150] Reference Figure 14 and 15C During the sampling period Tsam, the second switch SAM is switched to the on state, and the threshold voltage of the driving element DT is sampled via the sensing line SL.

[0151] The sampled threshold voltage of the driving element DT can be converted into digital data by an analog-to-digital converter ADC in the data driver, and the converted digital data can be transmitted to the timing controller.

[0152] Figure 16 It is a diagram Figure 11 showing the driving timing of the second sensing mode of the pixel circuit shown. Figures 17A to 17D It is an illustration according to Figure 16 the operation of the pixel circuit.

[0153] Referring to Figure 16 , in the second sensing mode after the power supply of the display device is turned off, the pixel circuit can be driven in the order of the initialization and data writing period Tini / w, the programming period Tp, the sensing period Ts, and the sampling period Tsam.

[0154] In the second sensing mode, the threshold voltage of the light-emitting element EL can be sensed via the sensing line SL.

[0155] Referring to Figure 16 and 17A , in the initialization and data writing period Tini / w, the second switch SAM is turned off, the first switch SPRE is turned on, the fourth switching element T4 is turned off, and the first to third switching elements T1 to T3 are turned on, so that the data voltage Vdata is supplied to the first node n1, and the reference voltage Vprer is supplied to the second node n2.

[0156] In the second sensing mode, the data voltage Vdata applied to the selected pixel circuit to be sensed can be the data voltage of the maximum voltage level or the data voltage generated by using the maximum gamma voltage. The data voltage applied to the unselected pixel circuit can be the data voltage of 0V or the data voltage of the black gray level.

[0157] Referring to Figure 16 and 17B , in the programming period Tp, the first switching element T1, the second switching element T2, and the fourth switching element T4 are turned off, and the third switching element T3 is turned on, so that the light-emitting element EL emits light, the voltage of the second node n2 rises until it reaches the pixel driving voltage EVDD, and the voltage of the third node n3 remains the reference voltage Vprer.

[0158] Referring to Figure 16 and 17C , in the sensing period Ts, the first switch SPRE is switched to the off state, the first switching element T1, the second switching element T2, and the fourth switching element T4 are turned off, and the third switching element T3 remains in the on state, so that the sensing line becomes a floating state, and the voltage of the sensing line rises until the light-emitting element emits light and then turns off.

[0159] Referring to Figure 16 and 17D, during the sampling period Tsam, the second switch SAM is switched to the conductive state, and the threshold voltage of the light-emitting element EL is sampled via the sensing line SL.

[0160] The sampled threshold voltage of the light-emitting element EL can be converted into digital data by an analog-to-digital converter ADC in the data driver, and the converted digital data can be transmitted to the timing controller.

[0161] Figure 18 FIG. is a diagram showing a pixel circuit and a compensation circuit according to a third embodiment of the present invention. Figures 19A to 19C is for explaining Figure 18 the operation of each mode of the pixel circuit shown.

[0162] Referring to Figure 18 , the pixel circuit according to the third embodiment includes: a light-emitting element EL; a driving element DT that supplies current to the light-emitting element EL; a plurality of switching elements T1 to T4 that switch a current path connected to the driving element DT; and a capacitor Cst that stores the gate-source voltage of the driving element DT. The driving element DT and the plurality of switching elements T1 to T4 can be implemented as p-channel TFTs, but are not limited thereto.

[0163] The light-emitting element EL emits light by a current applied via the channel of the driving element DT according to the gate-source voltage Vgs of the driving element DT that changes based on the data voltage Vdata.

[0164] The driving element DT drives the light-emitting element EL by supplying current to the light-emitting element EL according to the gate-source voltage Vgs. The driving element DT includes a gate connected to the first node n1, a first electrode (or source) connected to the second node n2, and a second electrode (or drain) connected to the pixel base voltage line or the second power supply line 42 to which the pixel base voltage is applied.

[0165] The first switching element T1 conducts according to the gate conduction voltage of the first gate signal SCAN, and connects the data line DL to the first node n1 to supply the data voltage Vdata to the first node n1. The first switching element T1 includes a gate to which the first gate signal SCAN is applied, a first electrode connected to the data line DL, and a second electrode connected to the first node n1.

[0166] The second switching element T2 conducts according to the reset signal RESET, and connects the second node n2 to the third node n3. The second switching element T2 includes a gate to which the reset signal RESET is applied, a first electrode connected to the third node n3, and a second electrode connected to the second node n2.

[0167] The third switching element T3 turns on according to the gate conduction voltage of the second gate signal SENSE, and connects the sense line SL to the third node n3 to supply a reference voltage Vprer to the third node n3. The third switching element T3 includes a gate to which the second gate signal SENSE is applied, a first electrode connected to the third node n3, and a second electrode connected to the sense line SL.

[0168] The fourth switching element T4 turns on according to the gate conduction voltage of the third gate signal EM, and connects the pixel driving voltage line or the first power supply line 41 to which the pixel driving voltage EVDD is applied to the third node n3. The fourth switching element T4 includes a gate to which the third gate signal EM is applied, a first electrode connected to the first power supply line 41, and a second electrode connected to the third node n3.

[0169] The capacitor Cst can be connected between the first node n1 and the second node n2. The capacitor Cst can be charged with the gate-source voltage Vgs of the driving element DT.

[0170] The compensation circuit may include a sensing unit 111 connected to the pixel circuit in each pixel. The sensing unit 111 can sense the electrical characteristics of the pixel via the sense line SL.

[0171] The sensing unit 111 can be provided in the data driver 110 together with the digital-to-analog converter DAC.

[0172] The sensing unit 111 can sense the electrical characteristics of the light-emitting element and the driving element of each pixel. The sensing unit 111 may include an analog-to-digital converter ADC, a first switch SPRE, and a second switch SAM.

[0173] In the display mode, the first switch SPRE connected to the reference voltage line or the third power supply line 43 to which the reference voltage Vprer is applied turns on, and the second switch SAM turns off, so that the reference voltage Vprer can be supplied to the pixel circuit via the sense line SL.

[0174] In the sensing mode after the power is turned off, the first switch SPRE turns off, and the second switch SAM connected to the analog-to-digital converter ADC turns on, so that the current flowing through the channel of the driving element DT, or the threshold voltage of the driving element DT and the operating voltage of the light-emitting element EL can be sensed via the sense line SL. The current flowing through the sense line SL can be converted into digital data via the analog-to-digital converter ADC, and the converted digital data can be transmitted to the timing controller.

[0175] Since the pixel circuit according to the third embodiment is driven with the same structure and the same operating mechanism as the pixel circuit according to the first embodiment, except that it is implemented with p-channel TFTs, the detailed description of the driving method will be omitted.

[0176] Reference Figure 19A , in the display mode after the power supply of the display device is turned on, the pixel circuit can be driven in the order of the initialization and data writing period Tini / w, the boosting period Tboost, and the light emission period Tem. Thus, the light emitting element EL can emit light to display an image on the screen.

[0177] Reference Figure 19B , in the first sensing mode after the power supply of the display device is turned off, the pixel circuit can be driven in the order of the initialization and data writing period Tini / w, the sensing period Ts, and the sampling period Tsam. The threshold voltage of the driving element DT can be sensed via the sensing line SL.

[0178] Reference Figure 19C , in the second sensing mode after the power supply of the display device is turned off, the pixel circuit can be driven in the order of the initialization and data writing period Tini / w, the programming period Tp, the sensing period Ts, and the sampling period Tsam. The threshold voltage of the light emitting element EL can be sensed via the sensing line SL.

[0179] Figure 20 is a diagram showing Figure 18 the modified pixel circuit of the third embodiment shown.

[0180] Reference Figure 20 , the modified pixel circuit of the third embodiment includes: a light emitting element EL; a driving element DT that supplies current to the light emitting element EL; a plurality of switching elements T1 to T4 that switch the current path connected to the driving element DT; and a capacitor Cst that stores the gate-source voltage of the driving element DT.

[0181] Figure 20 The modified pixel circuit shown in

[0182] can be configured such that a first gate signal SCAN that is not a reset signal RESET is applied to the gate of the second switching element T2.

[0183] Figure 21 is a diagram showing the pixel circuit and the compensation circuit according to the fourth embodiment of the present invention. Figures 22A to 22C is to explain Figure 21 the operation of each mode of the pixel circuit shown.

[0184] Reference Figure 21, the pixel circuit according to the fourth embodiment includes: a light-emitting element EL; a driving element DT that supplies current to the light-emitting element EL; a plurality of switching elements T1 to T4 that switch the current path connected to the driving element DT; and a capacitor Cst that stores the gate-source voltage of the driving element DT. The driving element DT and the plurality of switching elements T1 to T4 can be implemented as p-channel TFTs, but are not limited thereto.

[0185] The light-emitting element EL emits light by the current applied through the channel of the driving element DT based on the gate-source voltage Vgs of the driving element DT that changes according to the data voltage Vdata.

[0186] The driving element DT drives the light-emitting element EL by supplying current to the light-emitting element EL according to the gate-source voltage Vgs. The driving element DT includes a gate connected to the first node n1, a first electrode (or source) connected to the second node n2, and a second electrode (or drain) connected to a pixel base voltage line or a second power supply line 42 to which a pixel base voltage is applied.

[0187] The first switching element T1 conducts according to the gate conduction voltage of the first gate signal SCAN, and connects the data line DL to the first node n1 to supply the data voltage Vdata to the first node n1. The first switching element T1 includes a gate to which the first gate signal SCAN is applied, a first electrode connected to the data line DL, and a second electrode connected to the first node n1.

[0188] The second switching element T2 conducts according to the second gate signal SENSE1, and connects the sense line SL to the second node n2 to apply a reference voltage Vprer to the second node n2. The second switching element T2 includes a gate to which the second gate signal SENSE1 is applied, a first electrode connected to the second node n2, and a second electrode connected to the sense line SL.

[0189] The third switching element T3 conducts according to the gate conduction voltage of the third gate signal SENSE2, and connects the sense line SL to the third node n3 to supply the reference voltage Vprer to the third node n3. The third switching element T3 includes a gate to which the third gate signal SENSE2 is applied, a first electrode connected to the third node n3, and a second electrode connected to the sense line SL.

[0190] The fourth switching element T4 conducts according to the gate conduction voltage of the fourth gate signal EM, and connects a pixel driving voltage line or a first power supply line 41 to which a pixel driving voltage EVDD is applied to the third node n3. The fourth switching element T4 includes a gate to which the fourth gate signal EM is applied, a first electrode connected to the first power supply line 41, and a second electrode connected to the third node n3.

[0191] The capacitor Cst can be connected between the first node n1 and the second node n2. The capacitor Cst can be charged with the gate-source voltage Vgs of the driving element DT.

[0192] The compensation circuit can include a sensing unit 111 connected to the pixel circuit in each pixel. The sensing unit 111 can sense the electrical characteristics of the pixel via the sensing line SL.

[0193] The sensing unit 111 can be provided in the data driver 110 together with the digital-to-analog converter DAC.

[0194] The sensing unit 111 can sense the electrical characteristics of the light-emitting element and the driving element of each pixel. The sensing unit 111 can include an analog-to-digital converter ADC, a first switch SPRE, and a second switch SAM.

[0195] In the display mode, the first switch SPRE connected to the reference voltage line to which the reference voltage Vprer is applied or the third power supply line 43 is turned on, and the second switch SAM is turned off, so that the reference voltage Vprer can be supplied to the pixel circuit via the sensing line SL.

[0196] In the sensing mode after the power supply is turned off, the first switch SPRE is turned off, and the second switch SAM connected to the analog-to-digital converter ADC is turned on, so that the current flowing through the channel of the driving element DT, or the threshold voltage of the driving element DT and the threshold voltage of the light-emitting element EL can be sensed via the sensing line SL. The current flowing through the sensing line SL can be converted into digital data via the analog-to-digital converter ADC, and the converted digital data can be transmitted to the timing controller.

[0197] Since the pixel circuit according to the fourth embodiment is driven with the same structure and the same operating mechanism as the pixel circuit according to the second embodiment, except that it is implemented with p-channel TFTs, the detailed description of the driving method will be omitted.

[0198] Refer to Figure 22A , in the display mode after the power supply of the display device is turned on, the pixel circuit can be driven in the order of the initialization and data writing period Tini / w, the boosting period Tboost, and the light-emitting period Tem, whereby the light-emitting element EL can emit light to display an image on the screen.

[0199] Refer to Figure 22B , in the first sensing mode after the power supply of the display device is turned off, the pixel circuit can be driven in the order of the initialization and data writing period Tini / w, the sensing period Ts, and the sampling period Tsam, and the threshold voltage of the driving element DT can be sensed via the sensing line SL.

[0200] Refer to Figure 22C, in a second sensing mode after the power supply of the display device is turned off, the pixel circuit may be driven in the order of an initialization and data writing period Tini / w, a programming period Tp, a sensing period Ts, and a sampling period Tsam, and the threshold voltage of the light emitting element EL may be sensed via a sensing line SL.

[0201] Although embodiments of the present invention have been described in more detail with reference to the accompanying drawings, the present invention is not limited thereto, and the present invention may be implemented in many different forms without departing from the technical concept of the present invention. Therefore, the embodiments disclosed in the present invention are provided for illustrative purposes only, and these embodiments are not intended to limit the technical concept of the present invention. The scope of the technical concept of the present invention is not limited thereto. Therefore, it should be understood that the above embodiments are illustrative in all respects and do not limit the present invention.

Claims

1. A pixel circuit, comprising: a driving element including a first electrode connected to a first power line, a gate connected to a first node, and a second electrode connected to a second node; a first switching element configured to apply a data voltage to the first node in response to a first gate signal; a second switching element configured to connect the third node to the second node in response to a reset signal or the first gate signal; a third switching element configured to connect the sensing line to the third node in response to a second gate signal; a fourth switching element configured to connect the second power line to the third node in response to a third gate signal; a capacitor connected between the first node and the second node; as well as A light emitting element is connected between the second node and the third node.

2. The pixel circuit according to claim 1, wherein the pixel circuit is configured to: in a first sensing mode for measuring a threshold voltage of the driving element, drive in the order of an initialization and data writing period, a sensing period, and a sampling period, During the entire period of the first sensing mode, the first switching element, the second switching element and the third switching element are turned on, and the fourth switching element is turned off.

3. The pixel circuit according to claim 1, wherein the pixel circuit is configured to: in a second sensing mode for measuring a threshold voltage of the light emitting element, be driven in the order of an initialization and data writing period, a programming period, a sensing period, and a sampling period, During the initialization and data writing period, the first switch element, the second switch element and the third switch element are turned on, and the fourth switch element is turned off. During the programming period, the first switch element, the second switch element and the fourth switch element are all turned off, and the third switch element is turned on. During the sampling period, the third switch remains turned on, and the first switch element, the second switch element and the fourth switch element are all turned off. 4 . The pixel circuit of claim 3 , wherein in the second sensing mode, the data voltage applied to the first node is a data voltage corresponding to a maximum gamma voltage.

5. The pixel circuit according to claim 1 , wherein the first switching element comprises a gate to which the first gate signal is applied, a first electrode connected to a data line to which the data voltage is applied, and a second electrode connected to the first node, wherein the second switch element includes a gate to which the reset signal or the first gate signal is applied, a first electrode connected to the second node, and a second electrode connected to the third node, wherein the third switching element includes a gate to which the second gate signal is applied, a first electrode connected to the third node, and a second electrode connected to the sensing line, The fourth switching element includes a gate to which the third gate signal is applied, a first electrode connected to the third node, and a second electrode connected to the second power line.

6. A pixel circuit comprising: a driving element including a first electrode connected to a first power line, a gate connected to a first node, and a second electrode connected to a second node; a first switching element configured to apply a data voltage to the first node in response to a first gate signal; a second switching element configured to connect the sensing line to the second node in response to a second gate signal; a third switching element configured to connect the sensing line to a third node in response to a third gate signal; a fourth switching element configured to connect the second power line to the third node in response to a fourth gate signal; a capacitor connected between the first node and the second node; as well as A light emitting element is connected between the second node and the third node.

7. The pixel circuit according to claim 6, wherein the first switching element comprises a gate to which the first gate signal is applied, a first electrode connected to a data line to which the data voltage is applied, and a second electrode connected to the first node, The second switch element includes a gate to which the second gate signal is applied, a first electrode connected to the second node, and a second electrode connected to the sensing line. wherein the third switching element includes a gate to which the third gate signal is applied, a first electrode connected to the third node, and a second electrode connected to the sensing line, The fourth switching element includes a gate to which the fourth gate signal is applied, a first electrode connected to the third node, and a second electrode connected to the second power line.

8. A display device, comprising: A pixel array, in which a plurality of data lines, a plurality of gate lines and a plurality of pixel circuits are arranged; a data driver configured to output data voltages to the plurality of data lines; as well as a gate driver configured to output gate signals to the plurality of gate lines, Each of the plurality of pixel circuits comprises: a driving element including a first electrode connected to a first power line, a gate connected to a first node, and a second electrode connected to a second node; a first switching element configured to apply a data voltage to the first node in response to a first gate signal; a second switching element configured to connect the third node to the second node in response to a reset signal; a third switching element configured to connect the sensing line to the third node in response to a second gate signal; a fourth switching element configured to connect the second power line to the third node in response to a third gate signal; a capacitor connected between the first node and the second node; and A light emitting element is connected between the second node and the third node.

9. The display device according to claim 8, wherein the data driver comprises a sensing portion configured to sense threshold voltages of the driving element and the light emitting element via the sensing line, The sensing unit comprises: a first switch connected between the sensing line and a third power line; an ADC configured to convert a voltage sensed from the sensing line into digital data; as well as A second switch is connected between the ADC and the sensing line.

10. The display device according to claim 9, wherein the pixel circuit is configured to: in a first sensing mode for measuring a threshold voltage of the driving element, drive in the order of an initialization and data writing period, a sensing period, and a sampling period, During the initialization and data writing period, the first switch is turned on and the second switch is turned off. wherein during the sensing period, both the first switch and the second switch are turned off, During the sampling period, the first switch is turned off and the second switch is turned on.

11. The display device according to claim 10, wherein the data driver is configured as: applying a data voltage of a predetermined voltage level to a pixel circuit selected for sensing in the first sensing mode; and A data voltage of 0V or a data voltage of a black gray level is applied to unselected pixel circuits.

12. The display device according to claim 9, wherein the pixel circuit is configured to: in a second sensing mode for measuring a threshold voltage of the light emitting element, be driven in the order of an initialization and data writing period, a programming period, a sensing period, and a sampling period, During the initialization and data writing period and the programming period, the first switch is turned on and the second switch is turned off. wherein during the sensing period, both the first switch and the second switch are turned off, During the sampling period, the first switch is turned off and the second switch is turned on.

13. The display device according to claim 12, wherein the data driver is configured as: applying a data voltage generated by using a maximum gamma voltage to a pixel circuit selected for sensing in the second sensing mode; and A data voltage of 0V or a data voltage of a black gray level is applied to unselected pixel circuits.

14. A display device, comprising: A pixel array, in which a plurality of data lines, a plurality of gate lines and a plurality of pixel circuits are arranged; a data driver configured to output data voltages to the plurality of data lines; as well as a gate driver configured to output gate signals to the plurality of gate lines, Each of the plurality of pixel circuits comprises: a driving element including a first electrode connected to a first power line, a gate connected to a first node, and a second electrode connected to a second node; a first switching element configured to apply a data voltage to the first node in response to a first gate signal; a second switching element configured to connect the sensing line to the second node in response to a second gate signal; a third switching element configured to connect the sensing line to a third node in response to a third gate signal; a fourth switching element configured to connect the second power line to the third node in response to a fourth gate signal; a capacitor connected between the first node and the second node; and A light emitting element is connected between the second node and the third node.

15. The display device according to claim 14, wherein the data driver is configured as: In a first sensing mode for measuring a threshold voltage of the driving element, applying a data voltage of a predetermined voltage level to a pixel circuit selected for sensing; and A data voltage of 0V or a data voltage of a black gray level is applied to unselected pixel circuits.

16. The display device according to claim 14, wherein the data driver is configured as: in a second sensing mode for measuring a threshold voltage of the light emitting element, applying a data voltage generated by using a maximum gamma voltage to a pixel circuit selected for sensing; and A data voltage of 0V or a data voltage of a black gray level is applied to unselected pixel circuits.

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