Method and device for converting questions and answers into arithmetic gate circuits

By converting the questions and answers into coordinates and finally into arithmetic gate circuits, complex conversion problems in the prior art are solved, and concise and efficient zero-knowledge proof generation is achieved.

CN120238308APending Publication Date: 2025-07-01SHENZHEN INST OF ADVANCED TECH
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Patent Information

Application Number
CN202311837503.X
Authority / Receiving Office
CN · China
Patent Type
Applications(China)
Current Assignee / Owner
Filing Date
2023-12-28
Publication Date
2025-07-01

AI Technical Summary

Technical Problem

In the prior art, the method of converting ordinary question-and-answer to arithmetic gate circuit is more complicated, resulting in the conversion process of zero-knowledge proof not being concise enough.

Method used

By converting the questions and answers into coordinates, using the MD5 algorithm to generate a unique 128-bit value, forming the coordinates (x,y), and then converting the coordinates into a polynomial expression, and finally converting them into an arithmetic gate circuit.

Benefits of technology

The process of converting questions and answers into arithmetic gate circuits is simplified, making the generation of zero-knowledge proofs more concise and efficient.

✦ Generated by Eureka AI based on patent content.

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Abstract

The invention relates to the technical field of information, in particular to a method and device for converting questions and answers into arithmetic gate circuits. The method comprises the following steps: converting a question and an answer corresponding to the question into coordinates, converting the coordinates into an expression mode using a polynomial, and then converting the polynomial into an arithmetic gate circuit. According to the application, the daily questions are converted into the coordinate questions, and finally the coordinate questions are expressed by using the arithmetic gate circuit, so that the zero-knowledge proof is generated by using the arithmetic gate circuit, and the daily questions are converted through the coordinate mode, so that the mode of converting the questions and answers into the arithmetic gate circuit is simpler.
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Description

Technical Field

[0001] The present invention relates to the field of information technology, and in particular, to a method and device for converting questions and answers into arithmetic gate circuits. Background Art

[0002] The starting point of zero-knowledge proof is generally arithmetic gate circuits. How to convert daily problems into arithmetic gate circuits has become a difficult point. In the prior art, the method of converting ordinary questions and answers into arithmetic gate circuit representations is relatively complex. Therefore, it is of great significance to provide a relatively simple way to convert zero-knowledge proofs into arithmetic gate circuits. Summary of the Invention

[0003] Embodiments of the present invention provide a method and device for converting questions and answers into arithmetic gate circuits, so as to at least solve the problem that the method of converting ordinary questions and answers into arithmetic gate circuits in the prior art is relatively complex.

[0004] The technical problem of untimely equipment failure handling.

[0005] According to an embodiment of the present invention, a method for converting questions and answers into arithmetic gate circuits is provided, including the following steps:

[0006] Convert the question and the answer corresponding to the question into a coordinate representation;

[0007] Convert the coordinates into a polynomial representation;

[0008] Convert the polynomial into an arithmetic gate circuit.

[0009] In one embodiment, converting the question and the answer corresponding to the question into a coordinate representation specifically includes:

[0010] Use the MD5 algorithm to assign values to the question and the answer corresponding to the question. Among them, MD5 is a message digest algorithm. Assign the question as x = MD5(question), and assign the answer as y = MD5(answer);

[0011] Organize the question and the answer into the form of coordinates (x, y).

[0012] In one embodiment, converting the coordinates into a polynomial representation specifically includes:

[0013] Represent n coordinates (x, y) in the form of a point set, and the point set form is:

[0014] f{(x1,y1),(x2,y2),...,(x n-1 ,y n-1 ),(x n ,y n )};

[0015] Convert the point set form into the coefficient form of a polynomial. The polynomial is:

[0016] f(n) = a(n)x n + a(n - 1)x n-1 +... + a(1)x n + a(0).

[0017] In one embodiment, converting the polynomial into arithmetic gates specifically includes:

[0018] Convert an n - degree polynomial into an arithmetic gate circuit of f(n) = xf(n - 1)+a(0).

[0019] An apparatus for converting questions and answers into arithmetic gate circuits. The apparatus includes:

[0020] A coordinate conversion module for converting questions and the corresponding answers into coordinate expressions;

[0021] A polynomial conversion module for converting coordinates into polynomial expressions;

[0022] A gate circuit conversion module for converting polynomials into arithmetic gate circuits.

[0023] In one embodiment, the coordinate conversion module includes:

[0024] An assignment unit for assigning values to questions and the corresponding answers using the MD5 algorithm. Here, MD5 is a message - digest algorithm. Assign the question as = MD5(question) and the answer as = MD5(answer);

[0025] Organize the questions and answers into the coordinate (x, y) form.

[0026] In one embodiment, the polynomial conversion module includes:

[0027] A point set conversion unit for representing n coordinates (x, y) in point set form. The point set form is:

[0028] f{(x1, y1), (x2, y2),..., (x n-1 , y n-1 ), (x n , y n )};

[0029] A polynomial conversion unit for converting the point set form into the coefficient form of a polynomial. The polynomial is:

[0030] f(n) = a(n)x n + a(n - 1)x n-1 +... + a(1)xn +a(0).

[0031] A computer-readable medium stores one or more programs that can be executed by one or more processors to implement the steps in the method of converting a question and an answer into arithmetic logic gates as described in any one of the above.

[0032] A terminal device includes: a processor, a memory, and a communication bus; the memory stores a computer-readable program executable by the processor;

[0033] The communication bus enables connection and communication between the processor and the memory;

[0034] When the processor executes the computer-readable program, it implements the steps in the method of converting a question and an answer into arithmetic logic gates as described in any one of the above.

[0035] In the embodiments of the present invention, the method and device for converting a question and an answer into arithmetic logic gates convert the question and the corresponding answer into coordinates, convert the coordinates into a polynomial expression, and then convert the polynomial into arithmetic logic gates. This application converts daily questions into coordinate problems and finally uses arithmetic logic gates for expression, so as to facilitate the generation of zero-knowledge proofs using arithmetic logic gates. By converting daily questions in the form of coordinates, the method of converting questions and answers into arithmetic logic gates is made more concise. BRIEF DESCRIPTION OF THE DRAWINGS

[0036] The drawings described herein are used to provide a further understanding of the present invention and form a part of this application. The schematic embodiments of the present invention and their descriptions are used to explain the present invention and do not constitute an improper limitation of the present invention. In the drawings:

[0037] Figure 1 is a flowchart of the method for converting a question and an answer into arithmetic logic gates according to the present invention;

[0038] Figure 2 is a block diagram of the device for converting a question and an answer into arithmetic logic gates according to the present invention;

[0039] Figure 3 is a process diagram of converting coordinates into arithmetic logic gates according to the present invention;

[0040] Figure 4 is a schematic diagram of the principle of converting a polynomial into arithmetic logic gates according to the present invention;

[0041] Figure 5 is a diagram of the terminal device according to the present invention. DETAILED DESCRIPTION OF THE EMBODIMENTS

[0042] To enable those skilled in the art to better understand the solution of the present invention, the technical solutions in the embodiments of the present invention will be clearly and completely described below in conjunction with the accompanying drawings in the embodiments of the present invention. Obviously, the described embodiments are only a part of the embodiments of the present invention, rather than all the embodiments. All other embodiments obtained by those of ordinary skill in the art based on the embodiments of the present invention without creative efforts shall fall within the protection scope of the present invention.

[0043] It should be noted that the terms "first", "second", etc. in the specification and claims of the present invention and the above-mentioned drawings are used to distinguish similar objects, and are not necessarily used to describe a specific order or sequence. It should be understood that such data can be interchanged under appropriate circumstances so that the embodiments of the present invention described herein can be implemented in an order other than those illustrated or described herein. In addition, the terms "comprising" and "having" and any variations thereof are intended to cover non-exclusive inclusion. For example, a process, method, system, product or device comprising a series of steps or units is not necessarily limited to those steps or units clearly listed, but may include other steps or units not clearly listed or inherent to these processes, methods, products or devices.

[0044] Embodiment 1

[0045] According to an embodiment of the present invention, a method for converting questions and answers into arithmetic logic circuits is provided. Refer to Figure 1 , Figure 3 and Figure 4 , which includes the following steps:

[0046] S100: Convert the question and the corresponding answer into a coordinate representation;

[0047] S200: Convert the coordinates into a polynomial representation;

[0048] S300: Convert the polynomial into an arithmetic logic circuit.

[0049] This application converts daily questions into coordinate problems and finally uses arithmetic logic circuits for representation, so as to facilitate the generation of zero-knowledge proofs using arithmetic logic circuits, making the method of converting questions and answers into arithmetic logic circuits more concise.

[0050] In an embodiment, converting the question and the corresponding answer into a coordinate representation specifically includes:

[0051] Use the MD5 algorithm to assign values to the question and the corresponding answer. Among them, MD5 is a message digest algorithm. Assign the question as x = MD5(question), and assign the answer as y = MD5(answer);

[0052] Organize the questions and answers in the form of coordinates (x, y).

[0053] Specifically, in this embodiment, the MD5 algorithm is used to convert the Q&A into coordinates. MD5 is a message digest algorithm that generates a unique 128-bit (16-byte) value. By introducing the MD5 algorithm, a fixed value is generated for the message digest of the text. In the embodiment, it can be set that x = MD5(question) and y = MD5(answer). For example, the coordinates (x, y) correspond to the message digest (question) and the message digest (answer) respectively; a daily question contains a question and an answer. The message digests are respectively made for the question and the answer to obtain two digest results, and these results are spliced into a coordinate (x, y). In this way, the question and the answer are converted into the coordinates of (x, y), and thus the question and the answer can be represented by y = f(x).

[0054] In one embodiment, the conversion of coordinates into polynomial expressions specifically includes:

[0055] Express n coordinates (x, y) in the form of a point set, and the point set form is:

[0056] f{(x1,y1),(x2,y2),...,(x n-1 ,y n-1 ),(x n ,y n )};

[0057] Convert the point set form into the coefficient form of a polynomial. The polynomial is:

[0058] f(n) = a(n)x n +a(n - 1)x n-1 +...+a(1)x n +a(0).

[0059] Specifically, there are two expression forms for polynomials, the coefficient expression form and the point set expression form. For example, two points determine a straight line, and the straight line is y = ax + b, that is, a unary polynomial, and this straight line can be written as {(x1,y1),(x2,y2)}. Three points can determine a parabola, and so on. n points can determine an nth-order polynomial. In this embodiment, the number of questions corresponds to the number of coordinate points. Since a polynomial can be expressed in the form of a point set and then converted into the coefficient form through the point set form.

[0060] In one embodiment, the conversion of a polynomial into an arithmetic gate circuit specifically includes:

[0061] Convert an n-level polynomial into an arithmetic gate circuit of f(n) = xf(n - 1) + a(0).

[0062] Specifically, an n-degree polynomial f(n) can be represented as an arithmetic gate circuit using f(n-1), and then f(n-1) can be represented as an arithmetic gate circuit using f(n-2). By analogy, f(n) can be represented as an arithmetic gate circuit. For example, f(n) = xf(n-1) + a(0), f(n-1) = xf(n-2) + a(1), and so on. By analogy, f(n) can be represented by an arithmetic gate circuit.

[0063] Reference Figure 3 and Figure 4 , the process of converting a polynomial into the form of an arithmetic gate circuit will be described in detail below:

[0064] Step 1, map the problem x to the corresponding answer y:

[0065]

[0066] Step 2, n coordinates (x, y) can be used to construct a polynomial:

[0067] f{(x1,y1),(x2,y2),...,(x n-1 ,y n-1 ),(x n ,y n )}

[0068] Step 3, the coefficient form of an n-degree polynomial:

[0069] f(n) = a(n)x n + a(n-1)x n-1 +... + a(1)x n + a(0)

[0070] Step 4, an n-degree polynomial can be converted into the form of an arithmetic gate circuit:

[0071] f(n) = xf(n-1) + a(0)

[0072] Among them, how an n-degree polynomial is converted into an arithmetic gate circuit refers to Figure 4 . The present invention has a certain generality for converting problems and answers into arithmetic gate circuits, so as to facilitate the generation of zero-knowledge proofs using arithmetic gate circuits.

[0073] Embodiment 2

[0074] According to another embodiment of the present invention, a device for converting a problem and an answer into an arithmetic gate circuit is provided. Refer to Figures 2 to 4 , including:

[0075] A coordinate conversion module 100 for converting a problem and the answer corresponding to the problem into a coordinate representation;

[0076] The polynomial conversion module 200 is used to convert coordinates into a polynomial expression form.

[0077] The gate circuit conversion module 300 is used to convert the polynomial into an arithmetic gate circuit.

[0078] This application converts daily problems into coordinate problems and finally uses arithmetic gate circuits for expression, so as to facilitate the generation of zero-knowledge proofs using arithmetic gate circuits, making the method of converting problems and answers into arithmetic gate circuits more concise.

[0079] In one embodiment, the coordinate conversion module includes:

[0080] The assignment unit is used to assign values to the problem and the corresponding answer of the problem by using the MD5 algorithm. Among them, MD5 is a message digest algorithm, assigning the problem as = MD5(problem) and the answer as = MD5(answer);

[0081] Organize the problem and the answer into the coordinate (x, y) form.

[0082] Specifically, in this embodiment, the MD5 algorithm is used to convert the question and answer into coordinates. MD5 is a message digest algorithm that generates a unique 128-bit (16-byte) value. By introducing the MD5 algorithm, a fixed value is generated for the message digest of the text. In the embodiment, it can be set that x = MD5(problem) and y = MD5(answer). For example, the coordinates (x, y) respectively correspond to the message digest (problem) and the message digest (answer); the daily problem contains the problem and the answer. The message digests are respectively made for the problem and the answer to obtain two digest results, and these results are spliced into a coordinate (x, y). In this way, the problem and the answer are converted into the coordinates of (x, y), and thus the problem and the answer can be represented by y = f(x).

[0083] In one embodiment, the polynomial conversion module includes:

[0084] The point set conversion unit is used to represent n coordinates (x, y) in the form of a point set. The form of the point set is:

[0085] f{(x1,y1),(x2,y2),...,(x n-1 ,y n-1 ),(x n ,y n )};

[0086] The polynomial conversion unit is used to convert the point set form into the coefficient form of the polynomial. The polynomial is:

[0087] f(n) = a(n)x n +a(n - 1)x n-1 +...+a(1)x n+a(0).

[0088] Specifically, a polynomial has two expression forms, the coefficient expression form and the point set expression form. For example, two points determine a straight line, which is y = ax + b, that is, a unary polynomial, and this straight line can be written as {(x1, y1), (x2, y2)}. Three points can determine a parabola, and so on. n points can determine an nth-order polynomial. The number of problems in this embodiment corresponds to the number of coordinate points. Since a polynomial can be expressed in point set form and then converted into coefficient form through the point set form.

[0089] Embodiment 3

[0090] Based on the above method of converting problems and answers into arithmetic gate circuits, this embodiment provides a computer-readable storage medium. The computer-readable storage medium stores one or more programs, and the one or more programs can be executed by one or more processors to implement the steps in the method of converting problems and answers into arithmetic gate circuits as described in the above embodiments.

[0091] Embodiment 4

[0092] A terminal device includes: a processor, a memory, and a communication bus; a computer-readable program that can be executed by the processor is stored on the memory; the communication bus realizes the connection and communication between the processor and the memory; when the processor executes the computer-readable program, it implements the steps in the above method of converting problems and answers into arithmetic gate circuits.

[0093] Based on the above method of converting problems and answers into arithmetic gate circuits, this application provides a terminal device, as Figure 5 shown, which includes at least one processor 20; a display screen 21; and a memory 22, and may further include a communication interface 23 and a bus 24. Among them, the processor 20, the display screen 21, the memory 22, and the communication interface 23 can complete mutual communication through the bus 24. The display screen 21 is set to display a preset user guidance interface in the initial setting mode. The communication interface 23 can transmit information. The processor 20 can call the logical instructions in the memory 22 to execute the method in the above embodiments.

[0094] In addition, when the logical instructions in the above-mentioned memory 22 are implemented in the form of a software functional unit and sold or used as an independent product, they can be stored in a computer-readable storage medium.

[0095] The memory 22 is configured as a computer-readable storage medium and can be set to store software programs and computer-executable programs, such as program instructions or modules corresponding to the methods in the embodiments of the present disclosure. The processor 20 executes functional applications and data processing by running the software programs, instructions, or modules stored in the memory 22, that is, implements the methods in the above embodiments.

[0096] The memory 22 may include a program storage area and a data storage area. Among them, the program storage area may store an operating system and application programs required for at least one function; the data storage area may store data created according to the use of the terminal device, etc. In addition, the memory 22 may include high-speed random access memory and may also include non-volatile memory. For example, various media such as USB flash drives, external hard drives, read-only memory (ROM), random access memory (RAM), magnetic disks, or optical discs that can store program codes may also be transient storage media.

[0097] In addition, the specific processes of loading and executing multiple instructions by the instruction processor in the above storage medium and terminal device have been described in detail in the above methods and will not be repeated here one by one.

[0098] The above are only the preferred embodiments of the present invention. It should be noted that for those of ordinary skill in the art, without departing from the principle of the present invention, several improvements and refinements can be made, and these improvements and refinements should also be regarded as the protection scope of the present invention.

Claims

1. A method for converting questions and answers into arithmetic logic circuits, characterized in that, The method includes the following steps: Convert the question and the answer corresponding to the question into a coordinate representation; Convert the coordinates into a polynomial representation; Convert the polynomial into an arithmetic gate circuit.

2. The method according to claim 1 for converting questions and answers into arithmetic logic circuits, characterized in that, The conversion of the question and the answer corresponding to the question into a coordinate representation specifically includes: Use the MD5 algorithm to assign values to the question and the answer corresponding to the question. Among them, the MD5 is a message digest algorithm. Assign the question as x = MD5(question), and assign the answer as y = MD5(answer); Organize the question and the answer into the form of coordinates (x, y).

3. The method for converting questions and answers into arithmetic logic circuits according to claim 2, wherein, The conversion of the coordinates into a polynomial representation specifically includes: Represent n coordinates (x, y) in the form of a point set, and the form of the point set is: f{(x1,y1),(x2,y2),...,(x n-1 ,y n-1 ),(x n ,y n )}; Convert the form of the point set into the coefficient form of a polynomial, and the polynomial is: f(n) = a(n)x n + a(n - 1)x n-1 +... + a(1)x n + a(0).

4. The method for converting questions and answers into arithmetic gates according to claim 3, characterized in that The conversion of the polynomial into an arithmetic gate circuit specifically includes: Convert the n-level polynomial into the arithmetic gate circuit of f(n)=xf(n - 1)+a(0).

5. A device for converting questions and answers into arithmetic logic circuits, characterized in that, The device includes: A coordinate conversion module for converting the question and the answer corresponding to the question into a coordinate representation; A polynomial conversion module for converting the coordinates into a polynomial representation; A gate circuit conversion module for converting the polynomial into an arithmetic gate circuit.

6. The device for converting questions and answers into arithmetic logic circuits according to claim 5, characterized in that, The coordinate conversion module includes: An assignment unit for using the MD5 algorithm to assign values to the question and the answer corresponding to the question. Among them, the MD5 is a message digest algorithm. Assign the question as = MD5(question), and assign the answer as = MD5(answer); Organize the question and the answer into the form of coordinates (x, y).

7. The device for converting questions and answers into arithmetic logic circuits according to claim 6, characterized in that, The polynomial conversion module includes: A point set conversion unit for representing n coordinates (x, y) in the form of a point set, and the form of the point set is: f{(x1,y1),(x2,y2),...,(x n-1 ,y n-1 ),(x n ,y n )}; A polynomial conversion unit for converting the form of the point set into the coefficient form of a polynomial, and the polynomial is: f(n) = a(n)x n + a(n - 1)x n-1 +... + a(1)x n + a(0).

8. A computer-readable medium, characterized in that, The computer-readable storage medium stores one or more programs, and the one or more programs can be executed by one or more processors to implement the steps in the method of converting questions and answers into arithmetic gate circuits as described in any one of claims 1-4.

9. A terminal device, characterized in that, Includes: A processor, a memory, and a communication bus; The memory stores a computer-readable program executable by the processor; The communication bus realizes the connection and communication between the processor and the memory; When the processor executes the computer-readable program, it implements the steps in the method of converting questions and answers into arithmetic gate circuits as described in any one of claims 1-4.