Light-emitting display device

By designing the light transmitting part, the first emitting part and the second emitting part in the light emitting display device, and combining the configuration of the pixel circuit and the protective layer, the problem of difficulty in realizing transparent and stereoscopic image display in the prior art is solved, and a richer display effect is achieved.

CN120239486APending Publication Date: 2025-07-01LG DISPLAY CO LTD
View PDF 0 Cites 0 Cited by

Patent Information

Application Number
CN202411911972.6
Authority / Receiving Office
CN · China
Patent Type
Applications(China)
Current Assignee / Owner
Priority Date
2023-12-28
Filing Date
2024-12-24
Publication Date
2025-07-01

AI Technical Summary

Technical Problem

It is difficult for existing light emitting display devices to realize transparent and stereoscopic image display, and there is also a problem of viewing angle limitation.

Method used

A light emitting display device including a light transmitting part, a first emitting part and a second emitting part is designed, and transparent and stereoscopic image display is realized by configuring these components at the pattern part and using a pixel circuit and a protective layer.

Benefits of technology

The function of a transparent display device is realized, and users can see things or backgrounds on the back surface of the display device and can display three-dimensional images, enhancing the display effect.

✦ Generated by Eureka AI based on patent content.

Smart Images

  • Figure CN120239486A_ABST
    Figure CN120239486A_ABST
Patent Text Reader

Abstract

A light emitting display device includes a substrate and a plurality of pixels on the substrate, each pixel including a plurality of sub-pixels. Each of the plurality of sub-pixels includes a light transmissive portion, a first emission portion at a first side of the light transmissive portion, and a second emission portion at a second side of the light transmissive portion different from the first side of the light transmissive portion. Each of the first emission portion and the second emission portion is inclined from the light transmission portion.
Need to check novelty before this filing date? Find Prior Art

Description

[0001] Cross - reference to related applications

[0002] This application claims the benefit and priority of Korean Patent Application No. 10 - 2023 - 0194556, filed on December 28, 2023. For all purposes, the entire content of the Korean patent application is incorporated herein by reference as if fully set forth herein. Technical Field

[0003] The present disclosure relates to a light - emitting display device for displaying an image. Background Art

[0004] The light - emitting display device exhibits a high response speed while maintaining low power consumption. Different from a liquid - crystal display device, the light - emitting display device is a self - emissive display device and does not require a separate light source. Therefore, generally, there is no problem with the viewing angle. Thus, the light - emitting display device has received attention as a next - generation flat - panel display device. For example, the light - emitting display device displays an image by the light emission of a light - emitting device, and the light - emitting device includes an emission layer between two electrodes.

[0005] Recently, active research has been conducted on a transparent display device that enables a user (or viewer) to see things or a background located at the rear surface of the display device. The transparent display device can be divided into a light - transmission part that completely transmits incident light and an emission part that emits light. The user (or viewer) can see things or a background located at the rear surface of the transparent display device through the light - transmission part. Summary of the Invention

[0006] Accordingly, aspects of the present disclosure aim to provide a light - emitting display device that substantially eliminates one or more problems caused by the limitations and disadvantages of the related art.

[0007] Aspects of the present disclosure aim to provide a light - emitting display device including a light - transmission part.

[0008] Another aspect of the present disclosure aims to provide a light - emitting display device that may include a light - transmission part and may implement a stereoscopic image.

[0009] Aspects of the present disclosure are not limited to the foregoing, but other aspects not described herein will be clearly understood by those skilled in the art from the description herein.

[0010] To achieve these and other advantages and aspects of the present disclosure, as embodied and broadly described herein, in one or more aspects, a light-emitting display device includes: a substrate and a plurality of pixels on the substrate, each pixel including a plurality of sub-pixels, each of the plurality of sub-pixels including: a light-transmitting portion; a first emitting portion at a first side of the light-transmitting portion; and a second emitting portion at a second side of the light-transmitting portion different from the first side of the light-transmitting portion. Each of the first emitting portion and the second emitting portion is inclined from the light-transmitting portion.

[0011] According to one or more embodiments of the present disclosure, the second emitting portion is located at a second side of the light-transmitting portion opposite to the first side of the light-transmitting portion, and each of the first emitting portion and the second emitting portion is configured to be inclined with respect to the substrate.

[0012] According to one or more embodiments of the present disclosure, each of the plurality of sub-pixels includes: a pixel circuit connected to the first emitting portion and the second emitting portion; a protective layer covering the pixel circuit; a pattern portion above the protective layer; and a light-emitting device above the pattern portion. The first emitting portion and the second emitting portion are disposed at the pattern portion.

[0013] According to one or more embodiments of the present disclosure, the pattern portion includes: an upper surface, a first ramp surface at a first side of the upper surface, and a second ramp surface at a second side of the upper surface different from the first side. The light-transmitting portion is located at the upper surface of the pattern portion, and the first emitting portion is located at the first ramp surface of the pattern portion. The second emitting portion is located at the second ramp surface of the pattern portion.

[0014] A light-emitting display device according to one or more embodiments of the present disclosure includes: a substrate and a plurality of pixels above the substrate, the plurality of pixels including a plurality of sub-pixels, each of the plurality of sub-pixels including a light-transmitting portion and a plurality of emitting portions, the plurality of emitting portions being arranged adjacent to the light-transmitting portion and being inclined with respect to the substrate.

[0015] According to one or more embodiments of the present disclosure, the plurality of emitting portions includes: a first ramp emitting portion at a first side of the light-transmitting portion; and a second ramp emitting portion at a second side of the light-transmitting portion different from the first side of the light-transmitting portion. Each of the first ramp emitting portion and the second ramp emitting portion is inclined with respect to the substrate.

[0016] According to one or more embodiments of the present disclosure, each of the plurality of sub-pixels includes: a pixel circuit connected to the first ramp emitting portion and the second ramp emitting portion; a protective layer covering the pixel circuit; a pattern portion above the protective layer; and a light-emitting device above the pattern portion. The first ramp emitting portion and the second ramp emitting portion are disposed at the pattern portion.

[0017] According to one or more embodiments of the present disclosure, the pattern portion includes: an upper surface, a first ramp surface at a first side of the upper surface, and a second ramp surface at a second side of the upper surface different from the first side. The light transmissive portion is located at the upper surface of the pattern portion, the first ramp emission portion is located at the first ramp surface of the pattern portion, and the second ramp emission portion is located at the second ramp surface of the pattern portion.

[0018] According to one or more embodiments of the present disclosure, the upper surface of the pattern portion includes a flat surface, and / or an angle between the upper surface of the protective layer and each of the first ramp surface and the second ramp surface of the pattern portion is an acute angle.

[0019] According to one or more embodiments of the present disclosure, the pattern portion includes: a first pattern layer above the protective layer; a groove portion at the first pattern layer and overlapping with the light transmissive portion; and a second pattern layer at the groove portion. The upper surface of the pattern portion includes an upper side surface of the first pattern layer and an upper side surface of the second pattern layer, and the first pattern layer includes a first ramp surface and a second ramp surface.

[0020] The light-emitting display device according to one or more embodiments of the present disclosure may include a light transmissive portion, thereby implementing a transparent display device.

[0021] The light-emitting display device according to one or more embodiments of the present disclosure may include a light transmissive portion and may display a stereoscopic image, thereby implementing a transparent display device or a transparent stereoscopic image display device. For example, the light-emitting display device (or the transparent display device or the transparent stereoscopic image display device) according to one or more embodiments of the present disclosure may implement (or display) a stereoscopic image based on a light field mode (or a light field type).

[0022] Other aspects, features, and advantages of the present disclosure are set forth in the present disclosure and will become apparent from, or may be learned by, practicing the inventive concept provided herein. Other aspects, features, and advantages of the present disclosure may be realized and obtained through the description provided in the present disclosure including the claims and the drawings.

[0023] In addition, other devices, methods, features, and advantages will be apparent or will become apparent to those skilled in the art upon viewing the drawings and detailed description herein. All such devices, methods, features, and advantages are intended to be included within this specification, within the scope of the present disclosure, and protected by the appended claims. Nothing in this section should be construed as a limitation on the claims. Additional aspects and advantages are discussed in connection with the embodiments of the present disclosure below.

[0024] It should be understood that both the foregoing description and the following description of the present disclosure are exemplary and explanatory, and are intended to provide further explanation of the claimed disclosure. BRIEF DESCRIPTION OF THE DRAWINGS

[0025] The drawings, which are incorporated herein and constitute a part of this disclosure, are included to provide a further understanding of the present disclosure, and show aspects and embodiments of the present disclosure and, together with the description, serve to explain the principles of the present disclosure.

[0026] Figure 1 is a view schematically showing a light-emitting display device according to an exemplary embodiment of the present disclosure.

[0027] Figure 2 shows Figure 1 a plan view of one pixel shown.

[0028] Figure 3 shows Figure 2 an equivalent circuit diagram of the first sub-pixel shown.

[0029] Figure 4 is a cross-sectional view taken along line I-I' shown Figure 2 in the figure.

[0030] Figure 5 is a cross-sectional view taken along line II-II' shown Figure 2 in the figure.

[0031] Figure 6 is Figure 5 an enlarged view of a part "A" shown.

[0032] Figure 7 is a cross-sectional view taken along line II-II' shown Figure 2 in the figure.

[0033] Figure 8 is a cross-sectional view taken along line II-II' shown Figure 2 in the figure.

[0034] Figure 9 is a cross-sectional view taken along line II-II' shown Figure 2 in the figure.

[0035] Figure 10 shows Figure 1 another plan view of one pixel shown.

[0036] Figure 11 shows Figure 10 an equivalent circuit diagram of the first sub-pixel shown.

[0037] Figure 12 is a cross-sectional view taken along Figure 10 the line III-III' shown.

[0038] Throughout the drawings and the detailed description, unless otherwise described, the same reference numerals should be understood to refer to the same elements, features, and structures. For clarity, illustration, and convenience, the dimensions, lengths, and thicknesses of layers, regions, and elements, and their descriptions may be exaggerated. Detailed Description

[0039] Reference will now be made in detail to the embodiments of the present disclosure, examples of which are illustrated in the drawings. Wherever possible, the same reference numerals will be used throughout the drawings to refer to the same or like parts. The advantages and features of the present disclosure and the methods of achieving them will be clarified by the following embodiments described with reference to the drawings. However, the present disclosure may be embodied in different forms and should not be construed as limited to the embodiments set forth herein. Rather, these embodiments are provided so that this disclosure will be thorough and complete, and will fully convey the scope of the present disclosure to those skilled in the art.

[0040] The shapes, dimensions, ratios, angles, and numbers disclosed in the drawings used to describe the embodiments of the present disclosure are merely examples, and thus the present disclosure is not limited to the details shown. Similar reference numerals always refer to similar elements. In the following description, when the detailed description of related known functions or configurations is determined to unnecessarily obscure the gist of the present disclosure, the detailed description will be omitted.

[0041] In cases where "comprising", "having", and "including" are used in the description of this specification, another component may be added unless "only" is used. Unless otherwise indicated, terms in the singular form may include the plural form.

[0042] When interpreting an element, although the error range is not explicitly described, the element is interpreted to include the error range.

[0043] When describing a positional relationship, for example, when the positional relationship between two components is described as "on", "above", "below", and "adjacent to", unless "only" or "directly" is used, one or more other components may be provided between the two components.

[0044] When describing a temporal relationship, for example, when the time sequence is described as "after", "subsequently", "then", and "before", unless "only" or "directly" is used, discontinuous cases may be included.

[0045] It will be understood that although the terms "first", "second", etc. may be used herein to describe various elements, these elements should not be limited by these terms. These terms are only used to distinguish one element from another. For example, without departing from the scope of the present disclosure, a first element may be referred to as a second element, and similarly, a second element may be referred to as a first element.

[0046] When describing the elements of the present disclosure, terms such as "first", "second", "A", "B", "(a)", "(b)", etc. may be used. These terms are intended to identify the corresponding elements from other elements, and these terms are not used to define the nature, basis, order, or number of the elements. For the expression that an element "is connected", "is coupled", or "is in contact" with another element, unless otherwise specified, the element can not only be directly connected, coupled, or in contact with another element, but also be indirectly connected, coupled, or in contact with another element, with one or more intermediate elements inserted between the elements.

[0047] The term "at least one" should be understood to include any and all combinations of one or more of the associated listed items. For example, the meaning of "at least one of the first item, the second item, and the third item" represents all combinations of two or more items selected from the first item, the second item, and the third item, as well as the first item, the second item, or the third item.

[0048] The "X-axis direction", "Y-axis direction", and "Z-axis direction" should not be interpreted only by the geometric relationship of being perpendicular to each other, and can have a wider directivity within the range where the elements of the present disclosure can function.

[0049] As can be fully understood by those skilled in the art, the features of various embodiments of the present disclosure can be partially or wholly coupled or combined with each other, and can interoperate with each other in various ways and be technically driven. The embodiments of the present disclosure can be executed independently of each other, or can be executed together in a mutually dependent relationship.

[0050] Hereinafter, exemplary embodiments of a light-emitting display device according to the present disclosure will be described in detail with reference to the accompanying drawings. For ease of description, the scale of each element shown in the drawings is different from the actual scale, and thus is not limited to the scale shown in the drawings.

[0051] Figure 1 is a view schematically showing a light-emitting display device according to an exemplary embodiment of the present disclosure.

[0052] Refer to Figure 1, the light-emitting display device according to an embodiment of the present disclosure may be a flexible light-emitting display device, an organic light-emitting display device, a flexible organic light-emitting display device, or a light field display device, etc., but the embodiments of the present disclosure are not limited thereto. For example, the light-emitting display device according to an embodiment of the present disclosure may include an electronic device set or a device set (or an equipment set), such as a notebook computer, a television, a computer monitor, an equipment device including automotive equipment or another type of device for a vehicle, or a mobile electronic device such as a smart phone or an electronic tablet, which is a complete product (or a final product) including a display panel.

[0053] The light-emitting display device or the light-emitting display panel according to one or more embodiments of the present disclosure may be applied to or included in any electronic device. The light-emitting display device or the light-emitting display panel according to one or more embodiments of the present disclosure may be applied to or included in a mobile device, a video phone, a smart watch, a watch phone, a wearable device, a foldable device, a rollable device, a bendable device, a flexible device, a curved device, an electronic notepad, an e-book, a portable multimedia player (PMP), a personal digital assistant (PDA), an MP3 player, a mobile medical device, a desktop personal computer (PC), a laptop PC, a netbook computer, a workstation, a navigation device, an automotive navigation device, an automotive display device, automotive equipment, a television, a game console, a notebook computer, a monitor, a photographic device, a handy camera, and household appliances, etc. In addition, the light-emitting display device or the light-emitting display panel according to one or more embodiments of the present disclosure may be applied to or included in a wallpaper display device, a signage device, a window-type display device, a smart display window, a smart mirror or a two-way information transmission device, a transparent display device, a stereoscopic image display device, or a transparent stereoscopic image display device, but the embodiments of the present disclosure are not limited thereto.

[0054] The light-emitting display device according to an embodiment of the present disclosure may include a display panel 10.

[0055] The display panel 10 may include a substrate 100. The substrate 100 includes thin film transistors, and the substrate 100 may be a first substrate, a base substrate, a lower substrate, a transparent glass substrate, a transparent plastic substrate, or a base member.

[0056] The display panel 10 or the substrate 100 may include a display area (or a display portion) DA and a non-display area (or a non-display portion). The display area DA is an area for displaying an image, and may be disposed at a central area of the display panel 10. The non-display area is an area for not displaying an image, and may be configured to surround the display area DA.

[0057] The display panel 10 includes a plurality of pixels P disposed (or configured) on a substrate 100. The display panel 10 or the substrate 100 includes a plurality of pixels P disposed (or configured) at a display area DA. Each of the plurality of pixels P may include a plurality of sub-pixels SP. Each of the plurality of pixels P may be disposed (or arranged) along a first direction (X) and a second direction Y that intersects the first direction X. For example, in the present disclosure, the first direction X may be the X-axis direction or the horizontal direction of the display panel 10 or the substrate 100. The second direction Y may be the Y-axis direction or the vertical direction of the display panel 10 or the substrate 100.

[0058] Each of the plurality of sub-pixels SP may be defined as a point light source that emits light. At least three sub-pixels SP that are disposed adjacent to each other among the plurality of sub-pixels SP may configure a pixel (or unit pixel) P. According to an embodiment, at least four sub-pixels may configure one pixel P, and the at least four sub-pixels are disposed to emit different colors and are disposed adjacent to each other among the plurality of sub-pixels SP. One pixel P may include a red sub-pixel (or first sub-pixel), a blue sub-pixel (or second sub-pixel), a white sub-pixel (or third sub-pixel), and a green sub-pixel (or fourth sub-pixel), but is not limited thereto. According to another embodiment, one pixel P may include three sub-pixels SP, and the three sub-pixels SP are disposed to emit different colors and are disposed adjacent to each other among the plurality of sub-pixels SP. For example, one pixel P may include a red sub-pixel (or first sub-pixel), a blue sub-pixel (or second sub-pixel), and a green sub-pixel (or third sub-pixel).

[0059] Each of the plurality of sub-pixels SP according to an embodiment of the present disclosure may include a plurality of emission portions (or emission regions). For example, each of the plurality of sub-pixels SP may include a light transmission portion and a plurality of emission portions. For example, each of the plurality of sub-pixels SP may include a light transmission portion and a plurality of emission portions, and the plurality of emission portions are disposed adjacent to the light transmission portion and are inclined with respect to the substrate 100. For example, each of the plurality of sub-pixels SP may include: a light transmission portion (or light transmission region); a first emission portion (or first view emission portion) located on a first side of the light transmission portion; and a second emission portion (or second view emission portion) located on a second side of the light transmission portion, the second side being different from or opposite to the first side.

[0060] According to an embodiment of the present disclosure, the light transmissive portion may be disposed at a first region (or middle region) of each of the plurality of sub-pixels SP. The first emission portion may be disposed at a second region (or a side region or an edge region of the first region) of each of the plurality of sub-pixels SP. The second emission portion may be disposed at a third region (or the other side region or the other edge region of the first region) of each of the plurality of sub-pixels SP. For example, the first emission portion and the second emission portion may be arranged (or configured) to be parallel to the light transmissive portion located therebetween.

[0061] According to an embodiment of the present disclosure, the angle of the light emitted from each of the first emission portion and the second emission portion may be different from the angle of the light transmitted through the light transmissive portion. For example, the light transmissive surface of the light transmissive portion may be parallel to the substrate 100, and the light extraction surface (or emission surface) of each of the first emission portion and the second emission portion may be inclined or sloped with respect to the substrate 100. For example, the light transmissive portion may be configured to transmit light in a direction perpendicular to the surface of the substrate 100, and the first emission portion and the second emission portion may be configured to output light in a direction inclined with respect to the surface of the substrate 100.

[0062] According to an embodiment of the present disclosure, each of the first emission portion and the second emission portion may be inclined or sloped with respect to the light transmissive portion. Each of the first emission portion and the second emission portion may be configured to be inclined with respect to the substrate 100. For example, the light transmissive portion may include a flat structure disposed above a flat surface, and the first emission portion and the second emission portion may include a ramp structure or an inclined structure disposed above a ramp surface inclined with respect to the flat surface. For example, the first emission portion and the second emission portion may include a ramp structure or an inclined structure disposed above a ramp surface inclined with respect to the substrate 100.

[0063] The light-emitting display device according to an embodiment of the present disclosure may include a light transmissive portion and a plurality of emission portions configured at each of the plurality of sub-pixels SP. Therefore, a user (or viewer) may see an image displayed by the plurality of emission portions through the light transmissive portion and may see things or a background disposed at the rear surface of the transparent display device. In addition, the light-emitting display device according to an embodiment of the present disclosure may display a stereoscopic image by individual light emission of a main emission portion and each of a plurality of sub-emission portions respectively configured in each of the plurality of sub-pixels SP. Therefore, a stereoscopic image (e.g., a stereoscopic image of a light field mode (or light field type)) may be realized (or displayed) or a stereoscopic image may be provided to a user (or viewer). Accordingly, the light-emitting display device according to an embodiment of the present disclosure may implement a transparent display device or a transparent stereoscopic image display device.

[0064] The display panel 10 may further include an opposing substrate (or a relative substrate) 300. The opposing substrate 300 may be configured to encapsulate (or seal) a display area DA disposed above the substrate 100. For example, the opposing substrate 300 may be oppositely joined to the substrate 100 using an adhesive member (or a transparent adhesive). The opposing substrate 300 may be an upper substrate, a second substrate, or an encapsulation substrate. For example, the opposing substrate 300 may include a transparent material that enables a light transmissive portion to transmit light. For example, the opposing substrate 300 may be configured as a transparent glass material or a transparent plastic material.

[0065] The light-emitting display device according to an embodiment of the present disclosure may further include a driving circuit unit 30.

[0066] The driving circuit unit 30 may be configured to display an image corresponding to image data supplied from a display driving system (or a host system) in each pixel P.

[0067] The driving circuit unit 30 according to an embodiment of the present disclosure may include a gate driving circuit 31, a plurality of flexible circuit films 33, a plurality of driving integrated circuits (ICs) 35, a printed circuit board (PCB) 37, and a control circuit unit 39.

[0068] The gate driving circuit 31 may be disposed (or configured) in a non-display area NDA of the substrate 100 and may be connected to a plurality of sub-pixels SP. The gate driving circuit 31 according to an embodiment of the present disclosure may be integrated with one side non-display area or both side non-display areas of the substrate 100 according to a manufacturing process of thin film transistors and may be connected to a plurality of sub-pixels SP. For example, the gate driving circuit 31 may include a generally well-known shift register.

[0069] Each of the plurality of flexible circuit films 33 may be configured to be electrically connected between the PCB 37 and a pad portion disposed at one edge portion of the substrate 100. Each of the plurality of flexible circuit films 31 according to an embodiment of the present disclosure may be a tape carrier package (TCP) or a chip on film (COF), but is not limited thereto.

[0070] Each of the plurality of driving ICs 35 can be individually mounted on (or at) a corresponding flexible circuit film 33 among the plurality of flexible circuit films 33. Each of the plurality of driving ICs 35 can receive a data control signal and sub-pixel data provided from the control circuit unit 39, convert the sub-pixel data into an analog data voltage based on the sub-pixel according to the data control signal, and supply the analog data voltage to the corresponding sub-pixel SP. For example, each of the plurality of driving ICs 35 can generate a plurality of gray-scale voltages by using a plurality of reference gamma voltages provided from the PCB 37, and can select a gray-scale voltage corresponding to the sub-pixel data from the plurality of gray-scale voltages as the data voltage based on the sub-pixel, so as to output the selected data voltage.

[0071] Each of the plurality of driving ICs 35 can sequentially sense eigenvalue of a driving thin film transistor disposed at the sub-pixel SP through a plurality of reference voltage lines connected to each of the plurality of sub-pixels SP provided (or configured) on the substrate 100, generate sensed raw data corresponding to the sensed value, and provide the sensed raw data to the control circuit unit 39.

[0072] The PCB 37 can be electrically connected to each of the plurality of flexible circuit films 33. The PCB 37 can be used to transmit signals and voltages between components of the driving circuit unit 30.

[0073] The control circuit unit 39 can be mounted on the PCB 37, and can receive image data and a timing synchronization signal provided from the display driving system through a user connector provided at the PCB 37. Alternatively, the control circuit unit 39 can not be mounted on the PCB 37, but can be configured in the display driving system, or can be mounted on a separate control board connected between the PCB 37 and the display driving system.

[0074] The control circuit unit 39 can generate each of a data control signal and a gate control signal based on the timing synchronization signal, control the driving timing of each of the driving ICs 35 based on the data control signal, and control the driving timing of the gate driving circuit 31 based on the gate control signal. For example, the timing synchronization signal can include a vertical synchronization signal, a horizontal synchronization signal, a data enable signal, and a main clock (or dot clock).

[0075] The control circuit unit 39 can arrange the image data based on the timing synchronization signal to match the pixel arrangement structure provided at the display area DA, generate pixel data, and can be configured to provide the generated pixel data to each of the plurality of driving ICs 35.

[0076] According to an embodiment of the present disclosure, when the pixel P includes a white sub-pixel that emits white light, the control circuit unit 39 may extract white pixel data based on digital image data (e.g., red input data, green input data, and blue input data to be respectively supplied to the corresponding pixel P), reflect offset data based on the extracted white pixel data into each of the red input data, green input data, and blue input data to calculate red pixel data, green pixel data, and blue pixel data, and arrange the calculated red pixel data, green pixel data, blue pixel data, and white pixel data according to the pixel arrangement structure to supply the arranged pixel data to each of the driving ICs 35.

[0077] According to an embodiment of the present disclosure, the control circuit unit 39 may generate sub-pixel-based sub-pixel data corresponding to each of the plurality of sub-pixels SP based on the red input data, green input data, and blue input data to be respectively supplied to the plurality of sub-pixels SP, and supply the sub-pixel-based sub-pixel data to each of the plurality of driving ICs 35. Each of the plurality of driving ICs 35 may convert the sub-pixel-based sub-pixel data provided from the control circuit unit 39 into a sub-pixel-based data voltage and supply the sub-pixel-based data voltage to the corresponding sub-pixel SP.

[0078] According to another embodiment of the present disclosure, the control circuit unit 39 may generate a plurality of emission data corresponding to each of the plurality of sub-pixels SP based on the red input data, green input data, and blue input data to be respectively supplied to the plurality of sub-pixels SP, and supply the plurality of emission data to each of the plurality of driving ICs 35. For example, the control circuit unit 39 may generate first field data (or first emission data or first viewing data) and second field data (or second emission data or second viewing data) respectively corresponding to the plurality of sub-pixels SP, and supply the first field data and the second field data to each of the plurality of driving ICs 35. Each of the plurality of driving ICs 35 may respectively convert the first field data and the second field data provided from the control circuit unit 39 into a first field data voltage (or first sub-field data voltage or first viewing data voltage) and a second field data voltage (or second sub-field data voltage or second viewing data voltage) and supply the first field data voltage and the second field data voltage to the corresponding sub-pixel SP.

[0079] According to another embodiment of the present disclosure, the control circuit unit 39 may generate sub-pixel-based sub-pixel data corresponding to each of the plurality of sub-pixels SP based on the normal driving mode of the light-emitting display device and supply the sub-pixel-based sub-pixel data to each of the plurality of sub-pixels SP. In addition, the control circuit unit 39 may generate first field data and second field data corresponding to each of the plurality of sub-pixels SP based on the light field driving mode (or stereoscopic image display mode) of the light-emitting display device and supply the first field data and the second field data to each of the plurality of driving ICs 35.

[0080] Figure 2 is a plan view showing Figure 1 a pixel shown above.

[0081] Referring to Figure 1 and Figure 2 , in a light-emitting display device (or a light-emitting display panel) according to an embodiment of the present disclosure, each of the plurality of pixels P may include a plurality of sub-pixels SP1 to SP4.

[0082] Each of the plurality of pixels P may include a first sub-pixel SP1 to a fourth sub-pixel SP4 adjacent to each other along a first direction X. For example, each of the plurality of pixels P may include a red sub-pixel SP1, a blue sub-pixel SP2, a white sub-pixel SP3, and a green sub-pixel SP4, but is not limited thereto according to an embodiment of the present disclosure. For example, each of the plurality of pixels P may include a red sub-pixel SP1, a white sub-pixel SP2, a blue sub-pixel SP3, and a green sub-pixel SP4, but is not limited thereto according to an embodiment of the present disclosure. Each of the first sub-pixel SP1 to the fourth sub-pixel SP4 may be configured to have different sizes (or areas) from each other.

[0083] Each of the plurality of pixels P may be connected to a gate line GL, a driving voltage line PL, first to fourth data lines DL1 to DL4, and a reference voltage line RL.

[0084] The gate line GL may be set (or configured) to be parallel to the first direction X. The gate line GL may be configured to be commonly connected to the plurality of sub-pixels SP1 to SP4 arranged along the first direction X. For example, the gate line GL may include a first gate line GLa and a second gate line GLb. The first gate line GLa and the second gate line GLb may extend along the first direction X and may be set (or configured) to be spaced apart from each other along a second direction Y. For example, the first gate line GLa and the second gate line GLb may be configured to be commonly connected to the plurality of sub-pixels SP1 to SP4 arranged along the first direction X. The gate line GL may be electrically connected to a gate driving circuit 31 and may be configured to supply a gate signal supplied from the gate driving circuit 31 to the plurality of sub-pixels SP1 to SP4.

[0085] The driving voltage line PL may be set (or configured) to be parallel to the second direction Y. The driving voltage line PL may be configured to be commonly connected to the plurality of sub-pixels SP1 to SP4. For example, the display panel 10 may include a plurality of driving voltage lines PL extending along the second direction Y and spaced apart from each other along the first direction X. The plurality of pixels P may be disposed between the plurality of driving voltage lines PL.

[0086] The first data line DL1 to the fourth data line DL4 may extend along the second direction Y, and may be arranged (or configured) to be spaced apart from each other along the first direction X. For example, the first data line DL1 to the fourth data line DL4 may be configured to be electrically connected to different sub-pixels SP1 to SP4 in the pixel P. According to an embodiment, the first data line DL1 and the second data line DL2 may be arranged in parallel between the first sub-pixel SP1 and the second sub-pixel SP2. The third data line DL3 and the fourth data line DL4 may be arranged in parallel between the third sub-pixel SP3 and the fourth sub-pixel SP4. The first data line DL1 to the fourth data line DL4 may be electrically connected to a plurality of driving ICs 35, and may be configured to supply data signals supplied from the plurality of driving ICs 35 to the plurality of sub-pixels SP1 to SP4.

[0087] The reference voltage line RL may be arranged (or configured) to extend along the second direction Y. The reference voltage line RL may be configured to be commonly connected to the plurality of sub-pixels SP1 to SP4. According to an embodiment, the reference voltage line RL may be arranged between the second sub-pixel SP2 and the third sub-pixel SP3, but is not limited thereto. The reference voltage line RL may be used as a sensing line for sensing changes in the characteristics of the driving thin film transistors provided in the sub-pixels SP1 to SP4 and / or changes in the characteristics of the light emitting device from the outside in the sensing driving mode of the pixel P.

[0088] Each of the first sub-pixel SP1 to the fourth sub-pixel SP4 may be configured to display an image according to a gate signal supplied from an adjacent gate line GL and a data signal supplied from an adjacent data line DL.

[0089] Each of the first sub-pixel SP1 to the fourth sub-pixel SP4 may include an emission region EA and a circuit region CA. The emission region EA may be provided on one side (or upper side) of the sub-pixel regions SPA1 to SPA4. The emission regions EA of each of the first sub-pixel SP1 to the fourth sub-pixel SP4 may have different sizes (or areas) from each other, but are not limited thereto. For example, the emission region EA may be an opening region (or opening region area) or a light emitting region (or light emitting area). According to an embodiment, the emission region EA of the third sub-pixel SP3 may have the largest size among the emission regions EA of the first sub-pixel SP1 to the fourth sub-pixel SP4, the emission region EA of the fourth sub-pixel SP4 may have the smallest size among the emission regions EA of the first sub-pixel SP1 to the fourth sub-pixel SP4, and the emission region EA of the first sub-pixel SP1 may have a size smaller than that of the emission region EA of the third sub-pixel SP3 and larger than that of each of the emission regions EA of the second sub-pixel SP2 and the fourth sub-pixel SP4. In addition, the emission region EA of the second sub-pixel SP2 may have a size larger than that of the emission region EA of the fourth sub-pixel SP4.

[0090] The circuit area CA of each of the first to fourth sub-pixels SP1 to SP4 may be spatially separated from the emission area EA within the sub-pixel areas SPA1 to SPA4. For example, the circuit area CA may be provided on the other side (or the lower side) of the sub-pixel areas SPA1 to SPA4, but is not limited thereto. For example, at least a part of the circuit area CA may overlap with the emission area EA within the sub-pixel areas SPA1 to SPA4. For example, the circuit area CA may overlap with the entire emission area EA within the sub-pixel areas SPA1 to SPA4, or may be provided under (or below) the emission area EA within the sub-pixel areas SPA1 to SPA4. For example, the circuit area CA may be a non-emission area (or non-emitting region) or a non-opening area (or non-opening region).

[0091] Each of the first to fourth sub-pixels SP1 to SP4 according to an embodiment of the present disclosure may include a light transmissive portion TP at the emission area EA of each of the sub-pixel areas SPA1 to SPA4 and a plurality of emission portions EP1 and EP2. The emission area EA of each of the first to fourth sub-pixels SP1 to SP4 may include a plurality of emission portions EP1 and EP2.

[0092] The light transmissive portion TP may have a size (or area) different from that of each of the plurality of emission portions EP1 and EP2. The light transmissive portion TP may have a size (or area) larger than that of each of the plurality of emission portions EP1 and EP2. The plurality of emission portions EP1 and EP2 may have the same size (or area), or may have different sizes (or areas).

[0093] The plurality of emission portions EP1 and EP2 may be configured to be inclined from the light transmissive portion TP. The plurality of emission portions EP1 and EP2 may be configured to be inclined with respect to one or more of the light transmissive portion TP and the substrate 100. For example, the plurality of emission portions EP1 and EP2 may be configured to be inclined at an obtuse angle from the light transmissive portion TP, or may be configured to be inclined at an acute angle with respect to the substrate 100.

[0094] The light output angles in the partial areas of the light transmissive portion TP and the plurality of emission portions EP1 and EP2 may be different. The light output angle in the light transmissive portion TP may be different from the light output angle in the plurality of emission portions EP1 and EP2. For example, the light transmissive portion TP may be configured to transmit (or output) light in a direction perpendicular to the surface of the substrate 100, and the plurality of emission portions EP1 and EP2 may be configured to output light in a direction inclined with respect to the surface of the substrate 100.

[0095] Each of the first sub-pixel SP1 to the fourth sub-pixel SP4 according to an embodiment of the present disclosure may include a light transmissive portion TP, a first emission portion (or a first light emitting portion or a first light emitting part) EP1, and a second emission portion (or a second light emitting portion or a second light emitting part) EP2. For example, each of the first sub-pixel SP1 to the fourth sub-pixel SP4 may include a light transmissive portion TP disposed at a first region of the sub-pixel regions SPA1 to SPA4, a first emission portion EP1 disposed at a second region of the sub-pixel regions SPA1 to SPA4, and a second emission portion EP2 disposed at a third region of the sub-pixel regions SPA1 to SPA4. For example, in each of the sub-pixel regions SPA1 to SPA4, the first region may be a central region or an intermediate region, the second region may be a side region of the first region, an edge region, a first edge region, and the third region may be the other side region of the first region, another edge region, a second edge region.

[0096] Each of the light transmissive portion TP, the first emission portion EP1, and the second emission portion EP2 may have a width parallel to the first direction X and a length parallel to the second direction Y. For example, the short side of each of the light transmissive portion TP, the first emission portion EP1, and the second emission portion EP2 may be parallel to the horizontal direction of the display panel 10 or the substrate 100. The long side of each of the light transmissive portion TP, the first emission portion EP1, and the second emission portion EP2 may be parallel to the vertical direction of the display panel 10 or the substrate 100. The light transmissive portion TP, the first emission portion EP1, and the second emission portion EP2 may be arranged (or disposed or configured) in parallel. The light transmissive portion TP may be disposed between the first emission portion EP1 and the second emission portion EP2. The first emission portion EP1 and the second emission portion EP2 may be arranged (or configured) to be parallel to the light transmissive portion TP therebetween, and may be arranged (or configured) to be inclined with respect to the substrate 100.

[0097] Some of the light transmissive portion TP, the first emission portion EP1, and the second emission portion EP2 may have different sizes (or areas). For example, the light transmissive portion TP may have a size (or area) larger than the size (or area) of each of the plurality of emission portions EP1 and EP2. The plurality of emission portions EP1 and EP2 may have the same size (or area) or different sizes (or areas), but are not limited thereto. For example, the light transmissive portion TP may have a size equal to the sum of the size of the first emission portion EP1 and the size of the second emission portion EP2, or may have a size larger than the sum of the size of the first emission portion EP1 and the size of the second emission portion EP2.

[0098] According to an embodiment of the present disclosure, the light transmissive portion TP may be arranged (or configured) to face or be parallel to the surface (or front surface or light output surface) of the substrate 100. The light transmissive surface of the light transmissive portion TP may be arranged (or configured) to face or be parallel to the surface of the substrate 100. The light transmissive portion TP may be configured to transmit light in a direction perpendicular to the surface (or front surface or light output surface) of the substrate 100.

[0099] Each of the first emission portion EP1 and the second emission portion EP2 may be inclined or ramped from the light transmissive portion TP. Each of the first emission portion EP1 and the second emission portion EP2 may be inclined or ramped with respect to the substrate 100. Each of the first emission portion EP1 and the second emission portion EP2 may be ramped or inclined at the same angle with respect to the light transmissive portion TP and / or the substrate 100. The light extraction surface (or emission surface) of each of the first emission portion EP1 and the second emission portion EP2 may be inclined or ramped from the light extraction surface (or emission surface) of the light transmissive portion TP. The light extraction surface (or emission surface) of each of the first emission portion EP1 and the second emission portion EP2 may be inclined or ramped with respect to the surface (or front surface or light output surface) of the substrate 100. Each of the first emission portion EP1 and the second emission portion EP2 may be configured to output light in a direction ramped or inclined with respect to the surface (or front surface or light output surface) of the substrate 100.

[0100] According to an embodiment of the present disclosure, the light transmissive portion TP may be a transmissive portion, a light transmissive region, a flat light transmissive region or a central light transmissive portion, a transparent portion, a transparent region, a flat transparent portion, a flat transparent region or a central transparent portion. The first emission portion EP1 may be a first sub - emission portion, a first side emission portion, a first ramp emission portion, a first viewing emission portion or a first edge emission portion. The second emission portion EP2 may be a second sub - emission portion, a second side emission portion, a second ramp emission portion, a second viewing emission portion or a second edge emission portion.

[0101] According to an embodiment of the present disclosure, each of the plurality of first sub - pixels SP1 to fourth sub - pixels SP4 may include a pixel electrode PE disposed at each of the sub - pixel regions SPA1 to SPA4.

[0102] The pixel electrode PE may include a plurality of pixel electrodes or a first pixel electrode PE1 and a second pixel electrode PE2 arranged in parallel in the sub - pixel regions SPA1 to SPA4 (or within the sub - pixel regions SPA1 to SPA4). The first emission portion EP1 and the second emission portion EP2 may be implemented (or configured) by the first pixel electrode PE1 and the second pixel electrode PE2. For example, the first emission portion EP1 may correspond to the first pixel electrode PE1, and the second emission portion EP2 may correspond to the second pixel electrode PE2.

[0103] In the emission region EA of each of the sub-pixel regions SPA1 to SPA4 (or within the emission region EA of each of the sub-pixel regions SPA1 to SPA4), the first pixel electrode PE1 and the second pixel electrode PE2 can be separated or spaced apart from each other by the light transmission portion TP. For example, the first pixel electrode PE1 and the second pixel electrode PE2 can be arranged (or configured) to be parallel to each other, with the light transmission portion TP located between the first pixel electrode PE1 and the second pixel electrode PE2.

[0104] One end of each of the first pixel electrode PE1 and the second pixel electrode PE2 can be electrically connected to the electrode connection line ECL. For example, in the sub-pixel regions SPA1 to SPA4 (or within the sub-pixel regions SPA1 to SPA4), each of the first pixel electrode PE1 and the second pixel electrode PE2 can protrude or extend from the electrode connection line ECL. The electrode connection line ECL can be commonly connected to one end of each of the first pixel electrode PE1 and the second pixel electrode PE2. For example, the electrode connection line ECL can be arranged (or configured) at the circuit region CA.

[0105] Each of the plurality of sub-pixels or the first sub-pixel SP1 to the fourth sub-pixel SP4 can include a pixel circuit PC, which is arranged (or configured) above the substrate 100 of the circuit region CA.

[0106] The pixel circuit PC configured at each of the plurality of sub-pixels or the first sub-pixel SP1 to the fourth sub-pixel SP4 can be configured to supply data current to the plurality of pixel electrodes or the first pixel electrode PE1 and the second pixel electrode PE2 arranged at the corresponding sub-pixels SP1 to sub-pixel SP4. For example, the pixel circuit PC can be configured to supply data current to the plurality of pixel electrodes or the first pixel electrode PE1 and the second pixel electrode PE2 simultaneously.

[0107] The pixel circuit PC can be configured to be connected to the corresponding gate line GL, the corresponding driving voltage line PL, the corresponding data lines DL1 to DL4, and the corresponding reference voltage line RL. For example, the pixel circuit PC can be electrically connected to the driving voltage line PL through the power connection line PCL, and can be electrically connected to the reference voltage line RL through the reference power connection line RCL.

[0108] The pixel circuit PC may be configured to supply a data current corresponding to a data voltage supplied through each of the corresponding data lines DL1 to DL4 to the corresponding plurality of pixel electrodes or the first pixel electrode PE1 and the second pixel electrode PE2 in response to a gate signal supplied to the corresponding gate line GL. Accordingly, the plurality of light-emitting portions or the first light-emitting portion EP1 and the second light-emitting portion EP2 may emit light simultaneously using the data current supplied to the plurality of light-emitting portions or the first light-emitting portion EP1 and the second light-emitting portion EP1.

[0109] Each of the plurality of gate lines GL may be commonly connected to the pixel circuit PC disposed in each of the plurality of sub-pixels or the first sub-pixel SP1 to the fourth sub-pixel SP4. The plurality of data lines DL1 to DL4 may be respectively disposed in the plurality of sub-pixels or the first sub-pixel SP1 to the fourth sub-pixel SP4 and may be connected to the corresponding pixel circuit PC. For example, each of the plurality of sub-pixels or the first sub-pixel SP1 to the fourth sub-pixel SP4 may include one pixel circuit PC, one gate line GL, and one data line DL.

[0110] Figure 3 is a diagram showing Figure 2 the equivalent circuit diagram of the first sub-pixel shown.

[0111] Referring to Figure 2 and Figure 3 , the first sub-pixel SP1 according to an embodiment of the present disclosure may include a light-emitting device ED and a pixel circuit PC.

[0112] The light-emitting device ED may be disposed (or configured) at each of the plurality of light-emitting portions or the first light-emitting portion EP1 and the second light-emitting portion EP2. The light-emitting device ED may be disposed (or configured) in each of the plurality of sub-pixels SP1 to SP4 in each of the plurality of light-emitting portions or the first light-emitting portion EP1 and the second light-emitting portion EP2 except for the light-transmitting portion TP. For example, the light-emitting device ED may not be disposed (or configured) at the light-transmitting portion TP in each of the plurality of sub-pixels SP1 to SP4.

[0113] The light-emitting device ED of each of the plurality of light-emitting portions or the first light-emitting portion EP1 and the second light-emitting portion EP2 may include a pixel electrode PE (or an anode electrode), an emission layer EL above the pixel electrode PE, and a common electrode (or a cathode electrode) CE above the emission layer EL. For example, the light-emitting device ED of the first light-emitting portion EP1 may include a first pixel electrode PE1, an emission layer EL above the first pixel electrode PE1, and a common electrode CE above the emission layer EL. The light-emitting device ED of the second light-emitting portion EP2 may include a second pixel electrode PE2, an emission layer EL above the second pixel electrode PE2, and a common electrode CE above the emission layer EL.

[0114] According to an embodiment of the present disclosure, the emission layer EL of the light-emitting device ED may be a common layer commonly provided (or configured) at a plurality of emission portions or the first emission portion EP1 and the second emission portion EP2. Accordingly, the light-emitting device ED disposed at the first sub-pixel SP1 (or each of the plurality of sub-pixels SP1 to SP4) may include a plurality of pixel electrodes or a first pixel electrode PE1 and a second pixel electrode PE2, an emission layer EL above the plurality of pixel electrodes or the first pixel electrode PE1 and the second pixel electrode PE2, and a common electrode CE above the emission layer EL.

[0115] According to another embodiment of the present disclosure, the emission layer EL of the light-emitting device ED may be an organic emission layer, a quantum dot emission, or an inorganic emission layer. For example, the emission layer EL may include a hole functional layer, an organic emission layer disposed on the hole functional layer, and an electron functional layer disposed on the organic emission layer. For example, the emission layer EL of the light-emitting device ED may be changed to an inorganic light-emitting diode or a micro light-emitting diode.

[0116] A pixel circuit PC according to another embodiment of the present disclosure may include a first switching transistor Tsw1, a second switching transistor Tsw2, a driving transistor Tdr, and a storage capacitor Cst.

[0117] Each of the transistors Tsw1, the transistor Tsw2, and the transistor Tdr of the pixel circuit PC may be formed of a thin film transistor (TFT), and at least one of the thin film transistors Tsw1, the thin film transistor Tsw2, and the thin film transistor Tdr may be an amorphous silicon TFT, a polycrystalline silicon TFT, an oxide TFT, or an organic TFT. For example, in the pixel circuit PC, some of the first switching transistor Tsw1, the second switching transistor Tsw2, and the driving transistor Tdr may be thin film transistors including a semiconductor layer (or an active layer) made of low-temperature polycrystalline silicon (LTPS) having excellent response characteristics, and some of the first switching transistor Tsw1, the second switching transistor Tsw2, and the driving transistor Tdr may be thin film transistors including a semiconductor layer (or an active layer) made of an oxide having excellent cut-off current characteristics.

[0118] The first switching transistor Tsw1 may include a gate electrode (or control electrode) connected to the first gate line GLa, a first electrode connected to the data line DL adjacent thereto, and a second electrode connected to the gate electrode of the driving transistor Tdr. The gate electrode of the first switching transistor Tsw1 may be a protruding region protruding from one side of the first gate line GLa. The first switching transistor Tsw1 may be turned on according to the first gate signal supplied to the first gate line GLa, and supply the data voltage supplied from the adjacent data line DL to the gate electrode of the driving transistor Tdr. For example, in the first switching transistor Tsw1, the first electrode may be a source electrode, and the second electrode may be a drain electrode, but is not limited thereto. The first electrode may be a drain electrode, and the second electrode may be a source electrode.

[0119] The second switching transistor Tsw2 may include a gate electrode (or control electrode) connected to the second gate line GLb, a first electrode connected to the source electrode of the driving transistor Tdr, and a second electrode connected to the reference voltage line RL adjacent thereto. The second switching transistor Tsw2 may supply the reference voltage supplied from the reference voltage line RL to the source electrode of the driving transistor Tdr according to the second gate signal supplied to the second gate line GLb in the display mode. In addition, the second transistor Tsw2 may be turned on according to the second gate signal supplied to the second gate line GLb in the sensing mode, and supply the current output from the driving transistor Tdr to the adjacent reference voltage line RL, or connect the source electrode of the driving transistor Tdr to the adjacent reference voltage line RL. For example, in the second switching transistor Tsw2, the first electrode may be a source electrode, and the second electrode may be a drain electrode, but is not limited thereto. The first electrode may be a drain electrode, and the second electrode may be a source electrode.

[0120] The storage capacitor Cst may be formed between the gate electrode and the source electrode of the driving transistor Tdr. The storage capacitor Cst may include a first capacitor electrode provided with the gate electrode GE of the driving transistor Tdr, a second capacitor electrode composed of the source electrode of the driving transistor Tdr, and a dielectric layer formed at the overlapping region between the first capacitor electrode and the second capacitor electrode. The storage capacitor Cst may charge (or store) the differential voltage between the gate electrode and the source electrode of the driving transistor Tdr, and turn on the driving transistor Tdr according to the charged voltage.

[0121] The driving transistor Tdr may include a gate electrode connected to a second electrode of the first switching transistor Tsw1, a source electrode connected to a first electrode of the second switching transistor Tsw2, and a drain electrode connected to a driving voltage line PL through a power connection line PCL. The source electrode of the driving transistor Tdr may be electrically connected to the first pixel electrode PE1 and the second pixel electrode PE2 through an electrode connection line ECL. Accordingly, the driving transistor Tdr is turned on according to the voltage of the storage capacitor Cst, and controls the amount of current flowing from the driving voltage line PL to the light-emitting device ED.

[0122] Figure 4 is a cross-sectional view taken along Figure 2 the line I-I' shown, Figure 5 is a cross-sectional view taken along Figure 2 the line II-II' shown, and Figure 6 is Figure 5 an enlarged view of the portion "A" shown.

[0123] Referring to Figure 2 , Figure 4 and Figure 5 , a light-emitting display device (or a light-emitting display panel) according to an embodiment of the present disclosure may include a pixel circuit layer 110, a protective layer 130, a pattern portion 150, and a light-emitting device ED disposed above a substrate 100.

[0124] The pixel circuit layer 110 may include a buffer layer 111, a pixel circuit PC, and a passivation layer 119.

[0125] The buffer layer 111 may be disposed at the entire first surface 100a of the substrate 100. The buffer layer 111 may prevent or at least reduce the diffusion of materials contained in the substrate 100 to the transistor layer during high-temperature processing in the manufacture of thin-film transistors, or may prevent external water or moisture from penetrating into the light-emitting device ED. For example, the buffer layer 111 may be made of an inorganic insulating material.

[0126] The pixel circuit PC may include a driving thin-film transistor Tdr disposed in a circuit region CA of each sub-pixel SP1 to SP4 (or each sub-pixel region SPA1 to SP4). The driving thin-film transistor Tdr may include an active layer 112, a gate insulating layer 113, a gate electrode 114, an interlayer insulating layer 115, a drain electrode 117a, and a source electrode 117b.

[0127] The active layer 112 may be configured with a semiconductor material based on any one of amorphous silicon, polycrystalline silicon, oxides, and organic materials. The active layer 112 may include a channel region, a drain region, and a source region.

[0128] The gate insulating layer 113 may be formed over the channel region of the active layer 112. In an embodiment, the gate insulating layer 113 may be formed in an island shape over the channel region of the active layer 112, or may be formed (or disposed) over the entire front surface of the buffer layer 111 or the substrate 100 including the active layer 112. For example, the gate insulating layer 113 may be made of an inorganic insulating material.

[0129] The gate electrode 114 may be formed (or disposed) over the gate insulating layer 113 to overlap with the channel region of the active layer 112.

[0130] The interlayer insulating layer 115 may be formed (or disposed) over the gate electrode 114 and the drain and source regions of the active layer 112. The interlayer insulating layer 115 may be formed (or disposed) to cover the gate electrode 114 and the drain and source regions of the active layer 112. For example, the interlayer insulating layer 115 may be formed (or disposed) at the entire front surface of the buffer layer 111 or the substrate 100. For example, the interlayer insulating layer 115 may be made of an inorganic insulating material.

[0131] The drain electrode 117a may be formed (or disposed) over the interlayer insulating layer 115 to be electrically connected to the drain region of the active layer 112. The source electrode 117b may be formed (or disposed) over the interlayer insulating layer 115 to be electrically connected to the source region of the active layer 112.

[0132] The pixel circuit PC may further include the first switching thin film transistor, the second switching thin film transistor, and the storage capacitor Cst described with reference to Figure 3 The first switching thin film transistor, the second switching thin film transistor, and the storage capacitor Cst may be formed (or disposed) together with the driving thin film transistor Tdr in the circuit region CA.

[0133] The passivation layer 119 may be formed (or disposed) over the substrate 100 to cover the pixel circuit PC. For example, the passivation layer 119 may be formed (or disposed) to cover the drain electrode 117a and the source electrode 117b of the driving thin film transistor Tdr and the interlayer insulating layer 115. For example, the passivation layer 119 may be made of an inorganic insulating material.

[0134] The protective layer 130 may be formed (or disposed) over the substrate 100 to cover the pixel circuit layer 110 or the passivation layer 119. The protective layer 130 may be formed (or disposed) to have a relatively large thickness, and may provide a flat surface (or planarized surface) 130a over the pixel circuit layer 110 or the passivation layer 119. For example, the protective layer 130 may be made of an organic material such as photoacrylic, benzocyclobutene, polyimide, and fluororesin. For example, the protective layer 130 may be an insulating layer, an organic material layer, the topmost insulating layer, a planarizing layer, or a coating layer.

[0135] The pattern portion 150 may be formed (or disposed) above the protective layer 130 at the emission region EA of each of the plurality of sub-pixels SP1 to SP4. The pattern portion 150 may be formed (or disposed) above the flat surface 130a of the protective layer 130 at the emission region EA of each of the plurality of sub-pixels SP1 to SP4. For example, the pattern portion 150 may be formed (or disposed) above the flat surface 130a of the protective layer 130 at the emission region EA to have a flat surface and a ramp surface. The pattern portion 150 may protrude from the flat surface 130a of the protective layer 130 at the emission region EA of each of the plurality of sub-pixels SP1 to SP4. For example, the pattern portion 150 may protrude from the flat surface 130a of the protective layer 130 at the emission region EA to have a flat surface and a ramp surface. For example, the pattern portion 150 may include a cross-sectional structure having a trapezoidal shape. For example, the pattern portion 150 may protrude from the flat surface 130a of the protective layer 130 at the emission region EA of each of the plurality of sub-pixels SP1 to SP4 to include a cross-sectional structure having a trapezoidal shape. For example, the pattern portion 150 may be formed (or configured) of the same material as the protective layer 130, but is not limited thereto. For example, the pattern portion 150 may be a protruding portion or a protruding pattern portion.

[0136] The pattern portion 150 according to an embodiment of the present disclosure may include a first surface 150a, a second surface 150b, and a third surface 150c.

[0137] The first surface 150a may be the top surface, upper surface, uppermost surface, or light-transmitting surface of the pattern portion 150. For example, the first surface 150a may be a flat surface or a flat surface parallel to the first surface 100a of the substrate 100. The first surface 150a may be disposed (or configured) at the central region of the emission region EA.

[0138] The second surface 150b may be disposed (or configured) at the first side of the first surface 150a. The second surface 150b may have a cross-sectional structure different from that of the first surface 150a. The second surface 150b may be a ramp surface that slopes or inclines from the first side of the first surface 150a. For example, the angle (or interior angle) between the second surface 150b and the first surface 150a may be an obtuse angle. For example, the angle (or interior angle) between the second surface 150b and the upper surface (or flat surface) 130a of the protective layer 130 may be an acute angle. The second surface 150b may be inclined or ramped with respect to the first surface 100a of the substrate 100. The second surface 150b may be disposed (or configured) at a side region or a first edge region of the emission region EA. For example, the second surface 150b may be a side surface, a side ramp surface, a side inclined surface, a first ramp surface, or a first inclined surface of the pattern portion 150.

[0139] The third surface 150c may be disposed (or configured) at a second side of the first surface 150a different from or opposite to the first side. The third surface 150c may have a cross-sectional structure different from that of the first surface 150a. The third surface 150c may be a ramp surface that slopes or inclines from the second side of the first surface 150a. For example, the angle (or interior angle) between the third surface 150c and the first surface 150a may be an obtuse angle. For example, the angle (or interior angle) between the third surface 150c and the upper surface (or flat surface) 130a of the protective layer 130 may be an acute angle. The third surface 150c may be inclined or ramped with respect to the first surface 100a of the substrate 100. The third surface 150c may be disposed (or configured) at the other region or the second edge region of the emission region EA. For example, the second surface 150b and the third surface 150c may have a symmetric structure with respect to the first surface 150a. For example, the third surface 150c may be the other surface, the other ramp surface, the other inclined surface, the second ramp surface, or the second inclined surface of the pattern portion 150.

[0140] According to an embodiment of the present disclosure, the emission region EA of each of the plurality of sub-pixels SP1 to SP4 may include a first region to a third region through the pattern portion 150. For example, the emission region EA may include a first region corresponding (or overlapping) to the first surface 150a of the pattern portion 150, a second region corresponding (or overlapping) to the second surface 150b of the pattern portion 150, and a third region corresponding (or overlapping) to the third surface 150c of the pattern portion 150. For example, in the emission region EA, the first region may be a main region, a central region, an intermediate region, a transmissive region, or a light transmissive region, the second region may be a first sub-region, a side region, or a first edge region, and the third region may be a second sub-region, the other region, or a second edge region.

[0141] The light emitting device ED may be formed (or configured) above the pattern portion 150. The light emitting device ED may be formed (or configured) above the pattern portion 150 and the protective layer 130. For example, the light emitting device ED may be configured to emit light toward the substrate 100 according to the bottom emission type, but is not limited thereto according to an embodiment of the present disclosure. For example, the light emitting device ED may be a light emitting device layer or a common emission layer (or common light emitting layer).

[0142] The light emitting device ED according to an embodiment of the present disclosure may include a pixel electrode PE, an emission layer EL, and a common electrode CE. For example, the pixel electrode PE may be a first electrode, an anode electrode, or a transparent pixel electrode. The common electrode CE may be a second electrode, a cathode electrode, an opposing electrode (or opposite electrode), or a reflective electrode.

[0143] The pixel electrode PE may be formed (or disposed) over the pattern portion 150. The pixel electrode PE may be formed (or disposed) over the pattern portion 150 and may be formed (or disposed) over a portion of the protective layer 130 adjacent to the pattern portion 150. One end of the pixel electrode PE may be electrically connected to the source electrode 117b (or the drain electrode 117a) of the driving thin film transistor Tdr. One end of the pixel electrode PE adjacent to the circuit region CA may be electrically connected to the source electrode 117b of the driving thin film transistor Tdr through an electrode contact hole ECH provided in the protective layer 130 and the passivation layer 119.

[0144] According to an embodiment of the present disclosure, the pixel electrode PE at the emission area EA of each of the plurality of sub-pixels SP1 to SP4 may include a first pixel electrode PE1 and a second pixel electrode PE2.

[0145] The first pixel electrode PE1 may be formed (or disposed) over the second surface (or the first ramp surface) 150b of the pattern portion 150. The first pixel electrode PE1 may have a size larger than the size of the second surface 150b of the pattern portion 150. For example, a first edge portion of the first pixel electrode PE1 adjacent to the first surface of the pattern portion 150 may contact an edge portion of the first surface 150a of the pattern portion 150. For example, a second edge portion of the first pixel electrode PE1 opposite to the first edge portion may contact a portion of the protective layer 130 adjacent to the pattern portion 150. A central portion between the first edge portion and the second edge portion of the first pixel electrode PE1 may contact the second surface 150b of the pattern portion 150 and may be inclined or ramped to correspond to the second surface 150b of the pattern portion 150.

[0146] The second pixel electrode PE2 may be formed (or disposed) over the third surface (or the second ramp surface) 150c of the pattern portion 150. The second pixel electrode PE2 may have a size larger than the size of the third surface 150c of the pattern portion 150. For example, a first edge portion of the second pixel electrode PE2 adjacent to the first surface of the pattern portion 150 may contact another edge portion of the first surface 150a of the pattern portion 150. For example, a second edge portion of the second pixel electrode PE2 opposite to the first edge portion may contact a portion of the protective layer 130 adjacent to the pattern portion 150. A central portion between the first edge portion and the second edge portion of the second pixel electrode PE2 may contact the third surface 150c of the pattern portion 150 and may be inclined or ramped to correspond to the third surface 150c of the pattern portion 150.

[0147] According to an embodiment of the present disclosure, each of the first pixel electrode PE1 and the second pixel electrode PE2 may be spaced apart from each other (or electrically disconnected) at the emission region EA and may be commonly connected to the pixel circuit PC at the circuit region CA. For example, the pixel circuit PC configured at each of the plurality of sub-pixels SP1 to SP4 may include a thin film transistor (TFT) Tdr commonly connected to the first pixel electrode PE1 and the second pixel electrode PE2.

[0148] According to an embodiment of the present disclosure, one end of each of the first pixel electrode PE1 and the second pixel electrode PE2 adjacent to the circuit region CA may be electrically connected to the electrode connection line ECL. The electrode connection line ECL may be electrically connected to the source electrode 117b (or the drain electrode 117a) of the driving thin film transistor Tdr. The electrode connection line ECL may be electrically connected to the source electrode 117b of the driving thin film transistor Tdr through an electrode contact hole ECH provided in the protective layer 130 and the passivation layer 119. Accordingly, each of the first pixel electrode PE1 and the second pixel electrode PE2 may be commonly connected to the source electrode 117b of the driving thin film transistor Tdr through the electrode connection line ECL.

[0149] The pixel electrode PE or the first pixel electrode PE1 and the second pixel electrode PE2 and the electrode connection line ECL may be made of a transparent conductive material such as a transparent conductive oxide (TCO). For example, the pixel electrode PE or the first pixel electrode PE1 and the second pixel electrode PE2 and the electrode connection line ECL may include indium tin oxide (ITO) or indium zinc oxide (IZO), but is not limited thereto.

[0150] The emission layer EL can be formed (or disposed) above the pixel electrode PE. The emission layer EL can be formed (or disposed) above the first pixel electrode PE1 and the second pixel electrode PE2, and can be in direct contact with each of the first pixel electrode PE1 and the second pixel electrode PE2. In addition, the emission layer EL can be formed (or disposed) above the protective layer 130 and the pixel electrode PE or the first pixel electrode PE1 and the second pixel electrode PE2. The emission layer EL can be a common layer commonly formed (or disposed) at each of a plurality of sub-pixels SP1 to SP4. For example, the emission layer EL can be formed (or disposed) at other regions of each of the plurality of sub-pixels SP1 to SP4 except for the light transmission portion TP. For example, the emission layer EL can not be provided (or disposed) at the light transmission portion TP in each of the plurality of sub-pixels SP1 to SP4. For example, the region of the emission layer EL corresponding (or overlapping) to the light transmission portion TP of each of the plurality of sub-pixels SP1 to SP4 can be removed. For example, the emission layer EL can include an opening portion (or opening region or removal region) corresponding (or overlapping) to the light transmission portion TP of each of the plurality of sub-pixels SP1 to SP4.

[0151] The emission layer EL according to an embodiment of the present disclosure can include two or more organic emission layers configured to emit white light. For example, the emission layer EL can include a stacked structure in which two or more organic emission layers are stacked. For example, the emission layer EL can include a stacked structure in which a first organic emission layer and a second organic emission layer are stacked. As an embodiment, the emission layer EL can include a first organic emission layer and a second organic emission layer to emit white light by mixing a first light and a second light. For example, the first organic emission layer can include any one of a blue organic emission layer, a green organic emission layer, a red organic emission layer, a yellow organic emission layer, and a yellow-green organic emission layer to emit the first light. For example, the second organic emission layer can include an organic emission layer capable of emitting a second light to obtain white light in the emission layer EL by mixing the first light of the blue organic emission layer, the green organic emission layer, the red organic emission layer, the yellow organic emission layer, or the yellow-green organic emission layer. The emission layer EL according to another embodiment can include any one of a blue organic emission layer, a green organic emission layer, and a red organic emission layer. In addition, the emission layer EL can include a charge generation layer between the first organic emission layer and the second organic emission layer.

[0152] According to another embodiment of the present disclosure, each of the plurality of sub-pixels SP1 to SP4 may include an emission layer EL formed (or configured) to emit light of different colors. For example, the emission layer EL of the first sub-pixel SP1 may include a red organic emission layer. The emission layer EL of the second sub-pixel SP2 may include a blue organic emission layer. The emission layer EL of the third sub-pixel SP3 may include two or more organic emission layers for emitting white light. The emission layer EL of the fourth sub-pixel SP4 may include a green organic emission layer.

[0153] According to another embodiment of the present disclosure, when each of the plurality of pixels P includes a red sub-pixel SP1, a blue sub-pixel SP2, and a green sub-pixel SP4, the emission layer EL of the red sub-pixel SP1 may include a red organic emission layer, the emission layer of the blue sub-pixel SP2 may include a blue organic emission layer, and the emission layer EL of the green sub-pixel SP4 may include a green organic emission layer.

[0154] The common electrode CE may be formed (or configured) above the emission layer EL. The common electrode CE may be formed (or configured) above the emission layer EL and may be in direct contact with the emission layer EL. The common electrode CE may be formed (or configured) at other regions of each of the plurality of sub-pixels SP1 to SP4 except for the light transmission portion TP. For example, the common electrode CE may not be provided (or configured) at the light transmission portion TP in each of the plurality of sub-pixels SP1 to SP4. For example, a region of the common electrode CE corresponding (or overlapping) to the light transmission portion TP of each of the plurality of sub-pixels SP1 to SP4 may be removed. For example, the common electrode CE may include an opening portion (or opening region or removal region) corresponding (or overlapping) to the light transmission portion TP of each of the plurality of sub-pixels SP1 to SP4.

[0155] The common electrode CE according to an embodiment of the present disclosure may include a metal material having a high reflectivity to reflect incident light emitted from the emission layer EL toward the substrate 100. The common electrode CE may include an opaque conductive material having a high reflectivity. For example, the common electrode CE may include a single-layer structure or a multi-layer structure of any one material selected from aluminum (Al), silver (Ag), molybdenum (Mo), titanium (Ti), or copper (Cu) or an alloy of two or more materials selected from aluminum (Al), silver (Ag), molybdenum (Mo), titanium (Ti), or copper (Cu). For example, the common electrode CE may be formed in a three-layer structure of IZO / MoTi / ITO or ITO / MoTi / ITO, or may be formed in a four-layer structure of ITO / Cu / MoTi / ITO, but the embodiments of the present disclosure are not limited thereto.

[0156] The light-emitting device ED can generate light in response to the current supplied from the pixel circuit PC and thus can emit light. According to an embodiment of the present disclosure, the pixel electrode PE, the emission layer EL, and the common electrode CE formed above the pattern portion 150 can configure (or implement) the first emission portion EP1 and the second emission portion EP2.

[0157] The first emission portion EP1 can include the first pixel electrode PE1, the emission layer EL, and the common electrode CE formed (or configured) above the second surface (or the first ramp surface) 150b of the pattern portion 150. The first emission portion EP1 can emit light through the light emission of the emission layer EL according to the current applied from the pixel circuit PC to the first pixel electrode PE1.

[0158] The second emission portion EP2 can include the second pixel electrode PE2, the emission layer EL, and the common electrode CE formed (or configured) above the third surface (or the second ramp surface) 150c of the pattern portion 150. The second emission portion EP2 can emit light through the light emission of the emission layer EL according to the current applied from the pixel circuit PC to the second pixel electrode PE2.

[0159] The emission layer EL at each of the first emission portion EP1 and the second emission portion EP2 can emit light simultaneously when the current is commonly supplied from the driving thin-film transistor Tdr of the pixel circuit PC to the first pixel electrode PE1 and the second pixel electrode PE2 through the electrode connection line ECL.

[0160] According to an embodiment of the present disclosure, the light transmission portion TP can be provided (or configured) at the first surface 150a of the pattern portion 150 having a flat structure (or a planarized structure), and thus the light (or the first light or the transmitted light) TL passing through (or transmitting through) the light transmission portion TP can be output in a direction perpendicular to the first surface 100a of the substrate 100. Therefore, a user (or a viewer) can see the things or the background provided at the rear surface or the front surface of the light-emitting display device through the light transmission portion TP of each of the plurality of sub-pixels SP.

[0161] According to an embodiment of the present disclosure, the first emission unit EP1 may include an emission layer EL having a ramp structure disposed (or configured) above the first pixel electrode PE1, and thus light (or second light or first viewing angle light) L1 emitted from the emission layer EL of the first emission unit EP1 may be output in a direction inclined with respect to the first surface 100a of the substrate 100. For example, the light L1 emitted from the first emission unit EP1 may be output from the second surface 150b of the pattern unit 150 in a direction inclined with respect to the first surface 100a of the substrate 100. In addition, the light L1 emitted from the first emission unit EP1 may be output in a direction inclined with respect to the first surface 100a of the substrate 100 due to the refractive index difference at the first ramp surface 150b of the pattern unit 150. Therefore, the light output angle of the light L1 emitted from the first emission unit EP1 may be different from the angle of the light TL passing through the light transmission unit TP.

[0162] According to an embodiment of the present disclosure, as Figure 6 shown, a first angle (or interior angle) θ1 between the upper surface (or flat surface) 130a of the protective layer 130 and the second surface 150b of the pattern unit 150 may be an acute angle. For example, the light extraction efficiency of the light L1 emitted from the first emission unit EP1 may be determined based on the first angle θ1. For example, with respect to the light output surface (or light extraction surface) 100b of the substrate 100, the light extraction efficiency of the light L1 emitted from the first emission unit EP1 may be affected by: the angle of the light emitted from the first emission unit EP1, the angle of the light emitted from the first emission unit EP1 to the pattern unit 150, and the angle of the light emitted from the light output surface 100b of the substrate 100 to the outside. For example, the first angle θ1 may be set such that the angle of the light L1 emitted from the first emission unit EP1 and output to the outside of the light output surface 100b of the substrate 100 is greater than 30 degrees and less than 45 degrees, and thus the light extraction efficiency of the light L1 emitted from the first emission unit EP1 may be increased or maximized.

[0163] According to an embodiment of the present disclosure, the first angle θ1 may be equal to each other at each of the plurality of sub-pixels SP1 to SP4, but the embodiments of the present disclosure are not limited thereto. For example, the first angle θ1 may be different at one or more of the plurality of sub-pixels SP1 to SP4. For example, the first angle θ1 may be different at each of the red sub-pixel, blue sub-pixel, white sub-pixel, and green sub-pixel. That is, the first angle θ1 may be different for each sub-pixel.

[0164] According to an embodiment of the present disclosure, the second emission part EP2 may include an emission layer EL having a ramp structure disposed (or configured) above the second pixel electrode PE2, and thus the light (or third light or second viewing angle light) L2 emitted from the emission layer EL of the second emission part EP2 may be output in a direction inclined with respect to the first surface 100a of the substrate 100. For example, the light L2 emitted from the second emission part EP2 may be output from the third surface 150c of the pattern part 150 in a direction inclined with respect to the first surface 100a of the substrate 100. In addition, the light L2 emitted from the second emission part EP2 may be output in a direction inclined with respect to the first surface 100a of the substrate 100 due to the refractive index difference at the second ramp surface 150c of the pattern part 150. Accordingly, the light output angle of the light L2 emitted from the second emission part EP2 may be different from the angle of the light TL passing through the light transmission part TP.

[0165] According to an embodiment of the present disclosure, a second angle (or inner angle) θ2 between the upper surface (or flat surface) 130a of the protective layer 130 and the third surface 150c of the pattern part 150 may be an acute angle. For example, the second angle θ2 may be equal to or different from the first angle θ1 described above with reference to Figure 6 For example, similar to the first angle θ1 described above with reference to Figure 6 The second angle θ2 may be set such that the angle of the light L2 emitted from the second emission part EP2 and output to the outside of the light output surface 100b of the substrate 100 is greater than 30 degrees and less than 45 degrees, and thus the light extraction efficiency of the light L2 emitted from the second emission part EP2 may be improved or maximized.

[0166] The light-emitting display device (or light-emitting display panel) according to an embodiment of the present disclosure may further include a bank layer 170.

[0167] The bank layer 170 may be formed (or configured) to cover the edge portions of each of the plurality of emission parts or each of the first emission part EP1 and the second emission part EP2 at each of the plurality of sub-pixels SP or the entire light transmission part TP. The bank layer 170 may be formed of an organic material (e.g., a benzocyclobutene (BCB)-based resin, an acrylic-based resin, a polyimide resin, etc.). For example, the bank layer 170 may be formed of a transparent material and may be a transparent bank.

[0168] According to an embodiment of the present disclosure, as Figure 5As shown, the bank layer 170 may be formed (or configured) to cover all of the light transmissive portions TP of each of the plurality of sub-pixels SP. For example, in each of the plurality of sub-pixels SP, the bank layer 170 may be formed above the first surface 150a of the pattern portion 150 and may be configured to cover all of the first surface 150a of the pattern portion 150. The bank layer 170 disposed above the first surface 150a of the pattern portion 150 may provide a flat surface above the first surface 150a of the pattern portion 150 and may thus minimize changes in the optical path passing through the light transmissive portion TP.

[0169] According to an embodiment of the present disclosure, as Figure 4 and Figure 5 shown, the bank layer 170 may be formed (or configured) to cover the edge portions of each of the pixel electrodes PE at each of the plurality of sub-pixels SP. In each of the plurality of sub-pixels SP, the bank layer 170 may be formed (or configured) to cover the edge portions of each of the first pixel electrode PE1 and the second pixel electrode PE2. For example, the bank layer 170 disposed above the first surface 150a of the pattern portion 150 may be formed (or configured) to cover the edge portions of each of the first pixel electrode PE1 and the second pixel electrode PE2 adjacent to the light transmissive portion TP. In addition, the bank layer 170 may be formed above the protective layer 130 between adjacent sub-pixels SP1 to SP4.

[0170] According to an embodiment of the present disclosure, the light transmissive portion TP may correspond to another portion of the first surface 150a of the pattern portion 150 except for the edge portion covered by the bank layer 170 and may have a first width W1 in the first direction X. The first emission portion EP1 may correspond to another portion of the first pixel electrode PE1 except for the edge portion covered by the bank layer 170 and may have a second width W2 in the first direction X. The second emission portion EP2 may correspond to another portion of the second pixel electrode PE2 except for the edge portion covered by the bank layer 170 and may have a third width W3 in the first direction X. For example, the first width W1 of the light transmissive portion TP may be greater than the second width W2 of the first emission portion EP1 and the third width W3 of the second emission portion EP2. The second width W2 of the first emission portion EP1 and the third width W3 of the second emission portion EP2 may be equal to each other. The first width W1 of the light transmissive portion TP may be equal to the sum of the second width W2 of the first emission portion EP1 and the third width W3 of the second emission portion EP2, but is not limited thereto. For example, the first width W1 of the light transmissive portion TP may be greater than or less than the sum of the second width W2 of the first emission portion EP1 and the third width W3 of the second emission portion EP2.

[0171] A light-emitting display device (or a light-emitting display panel) according to an embodiment of the present disclosure may further include a non-emitting portion NEP corresponding to the bank layer 170. For example, an emission region EA of each of the plurality of pixels P may further include a first non-emitting portion NEP1 corresponding to the bank layer 170 between the light-transmitting portion TP and the first emission portion EP1, a second non-emitting portion NEP2 corresponding to the bank layer 170 between the light-transmitting portion TP and the second emission portion EP2, and a third non-emitting portion NEP3 corresponding to the bank layer 170 between adjacent sub-pixels SP1 to SP4.

[0172] According to an embodiment of the present disclosure, an emission layer EL of the light-emitting device ED may be formed (or disposed) above the pixel electrode PE and the bank layer 170. For example, the bank layer 170 may be formed between the emission layer EL and the pixel electrode PE, or may be formed between the emission layer EL and the protective layer 130.

[0173] A light-emitting display device (or a light-emitting display panel) according to an embodiment of the present disclosure may further include a color filter layer 120.

[0174] The color filter layer 120 may be disposed between the substrate 100 and the protective layer 130 to overlap at least one emission region EA. The color filter layer 120 according to an embodiment of the present disclosure may be disposed between the passivation layer 119 and the protective layer 130 to overlap the emission region EA. The color filter layer 120 according to another embodiment of the present disclosure may be disposed between the interlayer insulating layer 115 and the passivation layer 119, or may be disposed between the substrate 100 and the interlayer insulating layer 115 to overlap the emission region EA.

[0175] The color filter layer 120 may have a size larger than that of the emission region EA. For example, when the color filter layer 120 has a size larger than that of the emission region EA, light leakage of light traveling toward adjacent sub-pixels SP1 to SP4 through its interior may be reduced or minimized.

[0176] The color filter layer 120 according to an embodiment of the present disclosure may include color filters that transmit only wavelengths of colors provided in each of the sub-pixels SP1 to SP4 of light emitted (or extracted) from the light-emitting device ED toward the substrate 100. For example, the color filter layer 120 may transmit red wavelengths, green wavelengths, or blue wavelengths. For example, the color filter layer 120 provided at the first sub-pixel SP1 may include a red color filter 121, the color filter layer 120 provided at the second sub-pixel SP2 may include a blue color filter 122, and the color filter layer 120 provided at the fourth sub-pixel SP4 may include a green color filter 123. The third sub-pixel SP3 may not include the color filter layer 120, or may include a transparent material to compensate for a step difference between adjacent pixels, thereby emitting white light.

[0177] According to another embodiment of the present disclosure, when each of the plurality of pixels P includes a red sub-pixel SP1, a blue sub-pixel SP2, and a green sub-pixel SP4, the color filter layer 120 may be omitted.

[0178] The light-emitting display device (or light-emitting display panel) according to an embodiment of the present disclosure may further include a packaging unit 200.

[0179] The packaging unit 200 may be formed above the substrate 100 to cover the light-emitting device ED. The packaging unit 200 may be formed above the common electrode CE of the light-emitting device ED. For example, the packaging unit 200 may surround the display area. The packaging unit 200 may protect the thin film transistor and the emission layer EL, etc. from external impacts, and prevent oxygen or / and water (or moisture) and particles from penetrating into the emission layer EL.

[0180] The packaging unit 200 according to an embodiment of the present disclosure may include a plurality of inorganic packaging layers. In addition, the packaging unit 200 may further include at least one organic packaging layer disposed between the plurality of inorganic packaging layers. The organic packaging layer may be represented as a particle stacking layer.

[0181] The light-emitting display device (or light-emitting display panel) according to an embodiment of the present disclosure may further include a counter substrate 300. The counter substrate 300 may be configured to be coupled to the packaging unit 200. The counter substrate 300 may be made of a transparent glass material or a transparent plastic material.

[0182] According to an embodiment of the present disclosure, the packaging unit 200 may be changed into a filler that integrally surrounds (or completely surrounds) the display area DA. In this case, the filler may be used to bond the counter substrate 300 to the substrate 100. The filler may include an absorption material that absorbs oxygen or / and water (or moisture). For example, when the packaging unit 200 includes a plurality of inorganic packaging layers, the counter substrate 300 may be omitted.

[0183] The light-emitting display device (or light-emitting display panel) according to an embodiment of the present disclosure may further include a polarization member 400.

[0184] The polarization member 400 may be configured to block external light reflected by the pixel circuit PC, etc. For example, the polarization member 400 may be configured as a circular polarization member or a circular polarization film. The polarization member 400 may be disposed at the light output surface (or second surface or rear surface) 100b of the substrate 100, or coupled to the light output surface (or second surface or rear surface) 100b of the substrate 100 using a coupling member (or transparent adhesive member).

[0185] As described above, in the light-emitting display device according to an embodiment of the present disclosure, external light may pass through (or penetrate) the light-transmitting portion TP of each of the plurality of sub-pixels SP, and thus may provide an object or background provided at the rear surface or the front surface of the light-emitting display device to a user (or viewer) through the light-transmitting portion TP. For example, the user (or viewer) may see an object or background provided at the rear surface or the front surface of the light-emitting display device through the light-transmitting portion TP of each of the plurality of sub-pixels SP, and may see an image based on the light L1 and the light L2 respectively emitted from the first light-emitting portion EP1 and the second light-emitting portion EP2 of each of the plurality of sub-pixels SP. Therefore, the light-emitting display device according to an embodiment of the present disclosure may implement a transparent display device.

[0186] Figure 7 is taken along Figure 2 Another cross-sectional view taken along the line II-II' shown in Figure 7 shows an embodiment implemented by modifying the pattern portion at the light-emitting display device (or light-emitting display panel) described above with reference to Figures 2 to 6 Therefore, in the following description of Figure 7 other elements are denoted by like reference numerals except for the pattern portion and related elements, and a repeated description thereof is omitted. Figures 2 to 6 The description of the light-emitting display device (or light-emitting display panel) shown in Figure 7 may be included in the description of the light-emitting display device (or light-emitting display panel) shown in

[0187] Referring to Figure 2 and Figure 7 in a light-emitting display device (or light-emitting display panel) according to another embodiment of the present disclosure, the pattern portion 150 may include a first pattern layer 151, a groove portion 153, and a second pattern layer 155.

[0188] The pattern portion 150 may be formed (or disposed) above the protective layer 130. The pattern portion 150 may be formed (or disposed) above the flat surface 130a of the protective layer 130 in the emission region EA to have a flat surface 150a, a slope surface 150b, and a slope surface 150c. For example, the pattern portion 150 may protrude from the flat surface 130a of the protective layer 130 to have a flat surface 150a, a slope surface 150b, and a slope surface 150c. For example, the pattern portion 150 may protrude from the flat surface 130a of the protective layer 130 to include a cross-sectional structure having a trapezoidal shape. For example, the first pattern layer 151 may be a protruding portion or a protruding pattern portion.

[0189] The first pattern layer 151 according to an embodiment of the present disclosure may include an upper surface (or upper side surface) 151a, a first side surface 151b, and a second side surface 151c. Each of the upper surface 151a, the first side surface 151b, and the second side surface 151c of the first pattern layer 151 may be the same as or substantially the same as each of the first surface 150a, the second surface 150b, and the third surface 150c of the pattern portion 150 described above with reference to Figures 4 to 6 and thus a repeated description thereof will be omitted. The first side surface 151b of the first pattern layer 151 may be the first ramp surface 150b of the pattern portion 150, and the second side surface 151c of the first pattern layer 151 may be the second ramp surface 150c of the pattern portion 150.

[0190] The groove portion 153 may be located at the first pattern layer 151 and may be configured to overlap with the light transmission portion TP. The groove portion 153 may be formed (or configured) to be recessed (or concave) from the upper surface 151a of the first pattern layer 151. The groove portion 153 may include a first ramp surface 153a and a second ramp surface 153b. For example, the groove portion 153 may include a cross-sectional structure having a trapezoidal shape including the first ramp surface 153a and the second ramp surface 153b.

[0191] The first ramp surface (or first inclined surface) 153a may be inclined or ramped with respect to the upper surface 151a of the first pattern layer 151 (or the first surface 150a of the pattern portion 150) and / or the substrate 100. The first ramp surface 153a may be spaced apart from the first side surface 151b of the first pattern layer 151 (or the second surface 150b of the pattern portion 150). The first ramp surface 153a may be parallel to the first side surface 151b of the first pattern layer 151 (or the second surface 150b of the pattern portion 150), but is not limited thereto. For example, the first ramp surface 153a may overlap with the bank layer 170 covering the edge portion of the first emission portion EP1, but is not limited thereto. For example, the first ramp surface 153a may overlap with the edge portion of the light transmission portion TP to be spaced apart from the first emission portion EP1. For example, a part of the first ramp surface 153a may overlap with the first pixel electrode PE1 of the first emission portion EP1, but is not limited thereto and may not overlap with the first pixel electrode PE1 of the first emission portion EP1. For example, the first ramp surface 153a may be a side surface, a side ramp surface, a side inclined surface, a first ramp surface, a first inclined surface, or a first light refraction surface of the first pattern layer 151.

[0192] According to an embodiment of the present disclosure, a third angle (or interior angle) θ3 between the first ramp surface 153a and the flat surface 130a of the protective layer 130 may be equal to or different from a first angle (or interior angle) θ1 between the first side surface 151b of the first pattern layer 151 (or the second surface 150b of the pattern portion 150) and the flat surface 130a of the protective layer 130. The third angle θ3 may be less than or equal to the first angle θ1. For example, the third angle θ3 may be less than or equal to the first angle θ1 within an acute angle range. The third angle θ3 may be equal to each other at each of the plurality of sub-pixels SP1 to SP4, but the embodiments of the present disclosure are not limited thereto. For example, the third angle θ3 may be different at one or more of the plurality of sub-pixels SP1 to SP4. For example, the third angle θ3 may be different at each of a red sub-pixel, a blue sub-pixel, a white sub-pixel, and a green sub-pixel. That is, the third angle θ3 may be different for each sub-pixel.

[0193] The second ramp surface (or second inclined surface) 153b may be inclined or ramped with respect to the upper surface 151a of the first pattern layer 151 (or the first surface 150a of the pattern portion 150) and / or the substrate 100. The second ramp surface 153b may be spaced apart from the second side surface 151c of the first pattern layer 151 (or the third surface 150c of the pattern portion 150). The second ramp surface 153b may be parallel to the second side surface 151c of the first pattern layer 151 (or the third surface 150c of the pattern portion 150), but is not limited thereto. For example, the second ramp surface 153b may overlap with the bank layer 170 covering the edge portion of the second emission portion EP2, but is not limited thereto. For example, the second ramp surface 153b may overlap with the edge portion of the light transmission portion TP to be spaced apart from the second emission portion EP2. For example, a part of the second ramp surface 153b may overlap with the second pixel electrode PE2 of the second emission portion EP2, but is not limited thereto and may not overlap with the second pixel electrode PE2 of the second emission portion EP2. For example, the second ramp surface 153b may be the other side surface, the other ramp surface, the other inclined surface, the second ramp surface, the second inclined surface, or the second light refraction surface of the first pattern layer 151.

[0194] According to an embodiment of the present disclosure, a fourth angle (or interior angle) θ4 between the second ramp surface 153b and the flat surface 130a of the protective layer 130 may be equal to or different from a second angle (or interior angle) θ2 between the second side surface 151c of the first pattern layer 151 (or the third surface 150c of the pattern portion 150) and the flat surface 130a of the protective layer 130. The fourth angle θ4 may be less than or equal to the second angle θ2. For example, the fourth angle θ4 may be less than or equal to the second angle θ2 within an acute angle range. The fourth angle θ4 may be equal to each other at each of the plurality of sub-pixels SP1 to SP4, but embodiments of the present disclosure are not limited thereto. For example, the fourth angle θ4 may be different at one or more of the plurality of sub-pixels SP1 to SP4. For example, the fourth angle θ4 may be different at each of a red sub-pixel, a blue sub-pixel, a white sub-pixel, and a green sub-pixel. That is, the fourth angle θ4 may be different for each sub-pixel.

[0195] The second pattern layer 155 may be formed (or configured) to prevent color mixing between the light L1 emitted from the first emission unit EP1 and the light L2 emitted from the second emission unit EP2. In addition, the second pattern layer 155 may be formed (or configured) to block the optical path between the light L1 emitted from the first emission unit EP1 and the light L2 emitted from the second emission unit EP2. The second pattern layer 155 may be formed (or configured) at the groove portion 153. The second pattern layer 155 may be formed (or configured) to be filled into the groove portion 153.

[0196] The upper surface (or upper side surface) 155a of the second pattern layer 155 may be provided (or configured) as a flat surface. The upper surface 155a of the second pattern layer 155 may form (or configure) the first surface 150a of the pattern portion 150. For example, the first surface (or upper surface) 150a of the pattern portion 150 may include the upper surface 151a of the first pattern layer 151 and the upper surface 155a of the second pattern layer 155. For example, the first surface (or upper surface) 150a of the pattern portion 150 may be provided (or configured) as a flat surface by the upper surface 151a of the first pattern layer 151 and the upper surface 155a of the second pattern layer 155. The upper surface 155a of the second pattern layer 155 may be covered by the bank layer 170.

[0197] The first pattern layer 151 and the second pattern layer 155 may be formed (or configured) to have different refractive indices. The first pattern layer 151 and the second pattern layer 155 may be formed (or configured) by organic materials having different refractive indices. For example, the refractive index of the second pattern layer 155 may be lower than the refractive index of the first pattern layer 151. For example, the second pattern layer 155 may be formed (or configured) with a material or an organic material having a refractive index lower than that of the first pattern layer 151. For example, the first pattern layer 151 may be a high refractive layer or a high refractive pattern layer. The second pattern layer 155 may be a low refractive layer or a low refractive pattern layer. For example, the first pattern layer 151 may be formed (or configured) with the same material as the protective layer 130, but is not limited thereto.

[0198] According to an embodiment of the present disclosure, the light L1 emitted from the first emission portion EP1 and the light L2 emitted from the second emission portion EP2 may be output in an inclined direction relative to the first surface 100a of the substrate 100 due to the refractive index difference between the first pattern layer 151 and the second pattern layer 152 of the pattern portion 150. For example, the light L1 emitted from the first emission portion EP1 may be output in an inclined direction relative to the first surface 100a of the substrate 100 due to the refractive index difference at the first slope surface 153a of the groove portion 153. The light L2 emitted from the second emission portion EP2 may be output in an inclined direction relative to the first surface 100a of the substrate 100 due to the refractive index difference at the second slope surface 153b of the groove portion 153.

[0199] According to an embodiment of the present disclosure, light L1 emitted from the first emission part EP1 traveling to the second emission part EP2 may be blocked by the second pattern layer 155. Light L2 emitted from the second emission part EP2 traveling to the first emission part EP1 may be blocked by the second pattern layer 155. Therefore, color mixing between the light L1 emitted from the first emission part EP1 and the light L2 emitted from the second emission part EP2 may be prevented or minimized.

[0200] According to the above reference Figure 2 and Figure 7 Another embodiment of the present disclosure described herein can provide a light-emitting display device according to the above reference Figures 2 to 6 The effect of the light emitting display device of the embodiment of the present disclosure described above is the same as that of the light emitting display device, and color mixing between the light L1 emitted from the first emission part EP1 and the light L2 emitted from the second emission part EP2 may be prevented or minimized by the second pattern layer 155 .

[0201] Refer to above Figure 2 and Figure 7In the description of the pattern portion 150 described above, the groove portion 153 has been described as including a trapezoidal cross-sectional structure that includes a first ramp surface 153a and a second ramp surface 153b of the groove portion 153, but embodiments of the present disclosure are not limited thereto. For example, as Figure 8 shown, the groove portion 153 of the pattern portion 150 may be configured to include a curved structure.

[0202] Referring to Figure 2 and Figure 8 , according to another embodiment of the present disclosure, the groove portion 153 may be formed (or configured) to be recessed from the upper surface 151a of the first pattern layer 151 that overlaps with the light transmission portion TP (or the first surface 150a of the pattern portion 150). The groove portion 153 may be formed (or configured) to be recessed (or made concave) from the upper surface 151a of the first pattern layer 151 (or the first surface 150a of the pattern portion 150) to include a curved surface 153c. For example, the groove portion 153 may include a cross-sectional structure that includes the curved surface 153c. For example, the groove portion 153 may include a semi-circular cross-sectional shape, a semi-elliptical cross-sectional shape, or a parabolic cross-sectional shape. The second pattern layer 155 may be filled into the groove portion 153.

[0203] According to another embodiment of the present disclosure, the light L1 emitted from the first light emitting portion EP1 may be output in a direction inclined with respect to the first surface 100a of the substrate 100 due to the refractive index difference on the curved surface 153c of the groove portion 153. The light L2 emitted from the second light emitting portion EP2 may be output in a direction inclined with respect to the first surface 100a of the substrate 100 due to the refractive index difference on the curved surface 153c of the groove portion 153.

[0204] According to another embodiment of the present disclosure, the light L1 emitted from the first emitting portion EP1 traveling to the second emitting portion EP2 may be blocked by the second pattern layer 155 filled in the groove portion 153. The light L2 emitted from the second emitting portion EP2 traveling to the first emitting portion EP1 may be blocked by the second pattern layer 155 filled in the groove portion 153. Therefore, color mixing between the light L1 emitted from the first emitting portion EP1 and the light L2 emitted from the second emitting portion EP2 can be prevented or minimized.

[0205] According to another embodiment of the present disclosure described above with reference to Figure 2 and Figure 8 , the light emitting display device may provide the same as that according to the above with reference to Figures 2 to 6The light-emitting display device according to the described embodiments of the present disclosure has the same effects, and color mixing between the light L1 emitted from the first emission part EP1 and the light L2 emitted from the second emission part EP2 can be prevented or minimized by the second pattern layer 155.

[0206] Figure 9 is another cross-sectional view taken along the Figure 2 line II-II' shown in. Figure 9 shows an embodiment achieved by modifying the bank layer in the light-emitting display device (or light-emitting display panel) described above with reference to Figures 2 to 6 . Therefore, in the following description of Figure 9 , other elements are denoted by similar reference numerals except for the bank layer and related elements, and repeated descriptions thereof are omitted. Figures 2 to 6 The description of the light-emitting display device (or light-emitting display panel) shown in may be included in the description of the light-emitting display device (or light-emitting display panel) shown in Figure 9 .

[0207] Referring to Figure 2 and Figure 9 , in a light-emitting display device (or light-emitting display panel) according to another embodiment of the present disclosure, the bank layer 170 may be formed (or configured) to cover the edge portions of each of the plurality of emission parts or the first emission part EP1 and the second emission part EP2, and the edge portions of the light-transmitting portions TP at each of the plurality of sub-pixels SP.

[0208] The bank layer 170 according to another embodiment of the present disclosure may be formed only at the edge portions of the light-transmitting portion TP in the light-transmitting portion TP, without covering the entire light-transmitting portion TP. For example, the bank layer 170 may be formed only at the edge portions of the light-transmitting portion TP except for the central portion of the light-transmitting portion TP. For example, the bank layer 170 may be formed only at the edge portions of the light-transmitting portion TP and not formed at the central portion of the light-transmitting portion TP. For example, the bank layer 170 according to another embodiment of the present disclosure may include a structure in which other portions (or the central portion of the light-transmitting portion TP) of the light-transmitting portion TP have been removed at the bank layer 170 formed to cover the entire light-transmitting portion TP described above with reference to Figures 4 to 6 . Therefore, the bank layer 170 provided at the light-transmitting portion TP may include an opening (or light-transmitting hole) overlapping or corresponding to the light-transmitting portion TP. For example, the light-transmitting portion TP may be defined by the bank layer 170 and may have a size (or area) corresponding to the opening of the bank layer 170.

[0209] According to another embodiment of the present disclosure, the bank layer 170 may be formed (or configured) to cover only the edge portions of each of the plurality of emission portions or the first emission portion EP1 and the second emission portion EP2. For example, the bank layer 170 may not be formed (or configured) at the light transmission portion TP, but may be formed (or configured) to cover only the edge portions of each of the plurality of emission portions or the first emission portion EP1 and the second emission portion EP2.

[0210] The bank layer 170 according to another embodiment of the present disclosure may include: a first bank pattern 171 formed to cover the edge portion of the first emission portion EP1 at each of the plurality of sub-pixels SP1 to SP4; a second bank pattern 172 formed to cover the edge portion of the second emission portion EP2 at each of the plurality of sub-pixels SP1 to SP4; and a third bank pattern 173 between the plurality of sub-pixels SP1 to SP4.

[0211] The first bank pattern 171 may be formed (or configured) to cover the edge portion of the first pixel electrode PE1 at the first emission portion EP1 of each of the plurality of sub-pixels SP1 to SP4. The second bank pattern 172 may be formed (or configured) to cover the edge portion of the second pixel electrode PE2 at the second emission portion EP2 of each of the plurality of sub-pixels SP1 to SP4. For example, the bank layer 170 may be formed (or configured) to cover other portions except the central portion of the light transmission portion TP, the central portion of the first emission portion EP1, and the central portion of the second emission portion EP2.

[0212] The bank layer 170 according to another embodiment of the present disclosure may be formed of an organic material such as a benzocyclobutene (BCB)-based resin, an acrylic-based resin, or a polyimide resin. For example, the bank layer 170 may be formed of a transparent material and may be a transparent bank, but is not limited thereto. For example, the bank layer 170 may be formed only at the edge portion of the light transmission portion TP and not at the entire light transmission portion TP, and thus may be formed (or configured) of a transparent material, a translucent material, or an opaque material. For example, the bank layer 170 may be a transparent bank layer or a black bank layer. For example, the bank layer 170 may be disposed in a photosensitizer including a black pigment, and in this case, the bank layer 170 may be used as a light blocking member disposed between adjacent sub-pixels SP or adjacent emission portions EP1 and EP2.

[0213] According to another embodiment of the present disclosure, the light emitting device ED above the pattern portion 150 may be formed (or configured) at other portions except the central portion of the light transmission portion TP.

[0214] The emission layer EL of the light-emitting device ED on the pattern portion 150 may be formed to surround the bank layer 170 adjacent to the light-transmitting portion TP. For example, regions of the emission layer EL corresponding (or overlapping) to the light-transmitting portion TP of each of the plurality of sub-pixels SP1 to SP4 may be removed. For example, the emission layer EL may include an opening portion (or opening region or removal region) corresponding (or overlapping) to the light-transmitting portion TP of each of the plurality of sub-pixels SP1 to SP4.

[0215] The common electrode CE of the light-emitting device ED above the pattern portion 150 may be formed to surround the emission layer EL, which surrounds the bank layer 170 adjacent to the light-transmitting portion TP. For example, one end of each of the emission layer EL and the common electrode CE of the light-emitting device ED adjacent to the light-transmitting portion TP may directly contact the first surface 150a of the pattern portion 150. For example, regions of the common electrode CE corresponding (or overlapping) to the light-transmitting portion TP of each of the plurality of sub-pixels SP1 to SP4 may be removed. For example, the common electrode CE may include an opening portion (or opening region or removal region) corresponding (or overlapping) to the light-transmitting portion TP of each of the plurality of sub-pixels SP1 to SP4.

[0216] According to another embodiment of the present disclosure, the encapsulation portion 200 may be formed above the substrate 100 to cover the light-emitting device ED. The encapsulation portion 200 may be formed above the common electrode CE of the light-emitting device ED. For example, the encapsulation portion 200 may directly contact the first surface 150a of the pattern portion 150 at the light-transmitting portion TP of each of the plurality of sub-pixels SP1 to SP4.

[0217] According to the above reference Figure 2 and Figure 9 The light-emitting display device according to another embodiment of the present disclosure described above may provide the same effects as the light-emitting display device according to the embodiment of the present disclosure described above with reference to Figures 2 to 6 and the bank layer 170 may not be provided at the light-transmitting portion TP, and thus, the light transmittance of the light-transmitting portion TP may be increased.

[0218] The bank layer 170 described above with reference to Figure 2 and Figure 9 may be similarly applied to the bank layer 170 described above with reference to Figure 7 and Figure 8 and thus, the repeated description thereof is omitted. In this case, Figure 7 and Figure 8The bank layer 170 shown in [the figure] may be configured to cover an edge portion of the second pattern layer 155 of the pattern portion 150, and a central portion of the second pattern layer 155 may be covered by the encapsulation portion 200. For example, an upper surface 155a of the second pattern layer 155 overlapping with the light transmission portion TP may be in direct contact with the encapsulation portion 200.

[0219] Figure 10 is a view showing Figure 1 another plan view of one pixel shown in [the figure], Figure 11 is a view showing Figure 10 an equivalent circuit diagram of the first sub-pixel shown in [the figure], and Figure 12 is a cross-sectional view taken along Figure 10 line III-III’ shown in [the figure]. Figure 10 A cross-sectional view of line I-I’ shown in [the figure] is shown in Figure 4 and Figure 12 an enlarged view of a portion “A” shown in [the figure] is shown in Figure 6 [the figure]. Figures 10 to 12 shows an embodiment achieved by modifying data lines and pixel circuits of each of a plurality of sub-pixels in the light-emitting display device (or light-emitting display panel) described above with reference to Figures 2 to 6 [the figure]. Therefore, in the following description of Figures 10 to 12 [the figure], elements other than data lines, pixel circuits, and related elements are denoted by similar reference numerals, and their repeated description is omitted. Figures 2 to 6 The description of the light-emitting display device (or light-emitting display panel) shown in [the figure] may be included in the description of the light-emitting display device (or light-emitting display panel) shown in Figures 10 to 12 [the figure].

[0220] Referring to Figure 4 and Figures 10 to 12 [the figure], a light-emitting display device (or light-emitting display panel) according to another embodiment of the present disclosure may be configured to implement (or display) a stereoscopic image, for example, by a light field mode (or light field type). For example, a light-emitting display device according to another embodiment of the present disclosure may display a stereoscopic image by individual light emission of each of a plurality of emission portions EP1 and EP2 disposed at each of a plurality of sub-pixels SP, and thus may implement (or display) a stereoscopic image (for example, a stereoscopic image based on a light field mode (or light field type)), or may provide a stereoscopic image to a user (or viewer).

[0221] In a light-emitting display device according to another embodiment of the present disclosure, each of the plurality of data lines DL1 to DL4 may include a plurality of sub-data lines DLa and DLb corresponding to a plurality of emission units EP1 and EP2 disposed at each of the plurality of sub-pixels SP, respectively. For example, each of the first data line DL1 to the fourth data line DL4 disposed at the plurality of sub-pixels SP may include a first sub-data line DLa and a second sub-data line DLb corresponding to the first emission unit EP1 and the second emission unit EP2, respectively. For example, the first data line DL1 disposed at the first sub-pixel SP1 may include a first sub-data line DLa and a second sub-data line DLb connected to the first emission unit EP1 and the second emission unit EP2, respectively. For example, each of the plurality of data lines or the first data line DL1 to the fourth data line DL4 may include a plurality of sub-data lines DLa and DLb equal to the number of the emission units EP1 and EP2 disposed at one sub-pixel SP.

[0222] The plurality of sub-data lines or the first sub-data line DLa and the second sub-data line DLb may be set (or configured) to be electrically disconnected from each other within one sub-pixel region SPA1 to SPA4.

[0223] According to an embodiment of the present disclosure, each of the first sub-data line DLa and the second sub-data line DLb may be set to overlap with the bank layer 170 at each of the plurality of sub-pixels SP. For example, with respect to the thickness direction Z of the substrate 100, in the first sub-pixel SP1 and the third sub-pixel SP3 (or odd sub-pixels), the first sub-data line DLa may be set to overlap with the bank layer 170 covering the edge portion of the first pixel electrode PE1 at the first emission unit EP1, and the second sub-data line DLb may be set to overlap with the bank layer 170 covering the edge portion of the second pixel electrode PE2 at the second emission unit EP2. For example, with respect to the thickness direction Z of the substrate 100, in the second sub-pixel SP2 and the fourth sub-pixel SP4 (or even sub-pixels), the first sub-data line DLa may be set to overlap with the bank layer 170 covering the edge portion of the first pixel electrode PE1 at the first emission unit EP1, and the second sub-data line DLb may be set to overlap with the bank layer 170 covering the edge portion of the second pixel electrode PE2 at the second emission unit EP2. For example, the second sub-data line DLb at the first sub-pixel SP1 and the third sub-pixel SP3 may be set to be adjacent to the first sub-data line DLa at the second sub-pixel SP2 and the fourth sub-pixel SP4.

[0224] According to another embodiment of the present disclosure, each of the plurality of sub-pixels SP may include two data lines. Accordingly, each of the plurality of sub-pixels SP may include a first data line corresponding to a first sub-data line DLa and a second data line corresponding to a second sub-data line DLb. For example, each of the plurality of sub-pixels SP may include a first sub-data line (or first data line) DLa electrically connected to a first pixel circuit PCa and a second sub-data line (or second data line) DLb electrically connected to a second pixel circuit PCb. Thus, according to Figures 10 to 12 the light-emitting display device according to another embodiment of the present disclosure shown in Figures 2 to 6 may include twice as many data lines as the data lines of the light-emitting display device according to the embodiment of the present disclosure shown in

[0225] In a light-emitting display device according to another embodiment of the present disclosure, a pixel circuit PC disposed at each of the plurality of sub-pixels SP may be configured to be separately connected to a plurality of emission units EP1 and EP2.

[0226] A pixel circuit PC according to another embodiment of the present disclosure may include a plurality of pixel circuits PCa and PCb separately connected to a plurality of emission units EP1 and EP2. For example, the pixel circuit PC may include a first pixel circuit PCa and a second pixel circuit PCb configured to be separately connected to a first emission unit EP1 and a second emission unit EP2.

[0227] According to an embodiment of the present disclosure, a pixel circuit PC disposed at each of the plurality of sub-pixels SP1 to SP4 may include: a first pixel circuit PCa including a driving TFT Tdr electrically connected to a first pixel electrode PE1 of a first emission unit EP1; and a second pixel circuit PCb including a driving TFT Tdr electrically connected to a second pixel electrode PE2 of a second emission unit EP2.

[0228] According to an embodiment of the present disclosure, each of the first pixel electrode PE1 and the second pixel electrode PE2 may be spaced apart from each other (or electrically disconnected) at an emission region EA and a circuit region CA, and may be separately connected to the first pixel circuit PCa and the second pixel circuit PCb at the circuit region CA. For example, one end of the first pixel electrode PE1 may extend into the circuit region CA and may be electrically connected to the driving thin-film transistor Tdr of the first pixel circuit PCa. One end of the second pixel electrode PE2 may extend into the circuit region CA and may be electrically connected to the driving thin-film transistor Tdr of the second pixel circuit PCb.

[0229] The first pixel circuit PCa can be electrically connected to the gate line GL, the first sub-data line DLa, electrically connected to the driving voltage line PL through the power connection line PCL, and electrically connected to the reference voltage line RL through the reference power connection line RCL. The first pixel circuit PCa can be configured to supply a first field data current corresponding to the first field data voltage supplied through the first sub-data line DLa to the first pixel electrode PE1 in response to a gate signal supplied to the corresponding gate line GL. Accordingly, the first light-emitting unit EP1 can emit light using the first field data current supplied from the first pixel circuit PCa to the first pixel electrode PE1.

[0230] The second pixel circuit PCb can be electrically connected to the gate line GL, the second sub-data line DLb, electrically connected to the driving voltage line PL through the power connection line PCL, and electrically connected to the reference voltage line RL through the reference power connection line RCL. The second pixel circuit PCb can be configured to supply a second field data current corresponding to the second field data voltage supplied through the second sub-data line DLb to the second pixel electrode PE2 in response to a gate signal supplied to the corresponding gate line GL. Accordingly, the second light-emitting unit EP2 can emit light using the second field data current supplied from the second pixel circuit PCb to the second pixel electrode PE2.

[0231] According to an embodiment of the present disclosure, each of the first pixel circuit PCa and the second pixel circuit PCb may include a first switching transistor Tsw1, a second switching transistor Tsw2, a driving transistor Tdr, and a storage capacitor Cst. Each of the first pixel circuit PCa and the second pixel circuit PCb may be the same as or substantially the same as the pixel circuit PC described above with reference to Figure 3 and Figure 4 described, and thus a repetitive description thereof is omitted.

[0232] Each of the plurality of gate lines GL may be commonly connected to the first pixel circuit PCa and the second pixel circuit PCb disposed at each of the plurality of sub-pixels or the first sub-pixel SP1 to the fourth sub-pixel SP4.

[0233] Among each of the plurality of data lines or the first data line DL1 to the fourth data line DL4, the first sub-data line DLa may be electrically connected to the first pixel circuit PCa, and may supply the first field data voltage provided from the driving IC 35 described above with reference to Figure 1 to the first pixel circuit PCa. The second sub-data line DLb may be electrically connected to the second pixel circuit PCb, and may supply the second field data voltage provided from the driving IC 35 to the second pixel circuit PCb.

[0234] According to an embodiment of the present disclosure, the first emitting unit EP1 may display a first viewing angle image VI1 corresponding to a first field data voltage, and the second emitting unit EP2 may display a second viewing angle image VI2 corresponding to a second field data voltage. For example, when the light-emitting display device is in a normal driving mode, the first viewing angle image VI1 and the second viewing angle image VI2 respectively displayed by the first emitting unit EP1 and the second emitting unit EP2 may be identical to each other, and in this case, the viewing angle may be increased or magnified. For example, when the light-emitting display device is in a light field driving mode (or a stereoscopic image display mode), the first viewing angle image VI1 and the second viewing angle image VI2 respectively displayed by the first emitting unit EP1 and the second emitting component EP2 may be different, and thus a stereoscopic image in the light field mode may be realized by each of the first viewing angle image VI1 and the second viewing angle image VI2. For example, the first viewing angle image VI1 may be a first side image, a first side viewing angle image, a right-eye image, or a first viewer image. The second viewing angle image VI2 may be a second side image, a second side viewing angle image, a left-eye image, or a second viewer image.

[0235] According to another embodiment of the present disclosure described above with reference to Figures 10 to 12 the light-emitting display device may provide the same effect as that of the light-emitting display device according to the embodiment of the present disclosure described above with reference to Figures 2 to 6 and may implement (or display) a stereoscopic image (e.g., a stereoscopic image in the light field mode) by using the images displayed by each of the plurality of emitting units.

[0236] According to another embodiment of the present disclosure, the pattern unit 150 described above with reference to Figure 7 may be applied to the pattern unit 150 of the light-emitting display device according to another embodiment of the present disclosure described above with reference to Figures 10 to 12 For example, Figure 12 the pattern unit 150 shown in Figure 7 may include the first pattern layer 151, the groove portion 153, and the second pattern layer 155 described above with reference to

[0237] According to another embodiment of the present disclosure, the pattern unit 150 described above with reference to Figure 7 and Figure 8 may be applied to the pattern unit 150 of the light-emitting display device according to another embodiment of the present disclosure described above with reference to Figures 10 to 12 For example, Figure 12 the pattern unit 150 shown in Figure 7 and Figure 8 may include the first pattern layer 151, the groove portion 153, and the second pattern layer 155 described above with reference to

[0238] According to another embodiment of the present disclosure, the bank layer 170 described above with reference to Figure 9 can be applied to the bank layer 170 of a light-emitting display device according to another embodiment of the present disclosure described above with reference to Figures 10 to 12 . For example, Figure 12 the bank layer 170 shown in Figure 9 may not be provided (or configured) at the light-transmitting portion TP described above with reference to

[0239] , and thus a repeated description thereof is omitted. The above-described features, structures, and effects of the present disclosure are included in at least one embodiment of the present disclosure, but are not limited to only one embodiment. In addition, the features, structures, and effects described in at least one embodiment of the present disclosure can be achieved by those skilled in the art through combinations or modifications of other embodiments. Therefore, the content associated with combinations and modifications should be construed as being within the scope of the present disclosure.

[0240] It will be apparent to those skilled in the art that various modifications and variations can be made in the present disclosure without departing from the spirit or scope of the present disclosure. Therefore, it is intended that the present disclosure cover modifications and variations of the present disclosure as long as they come within the scope of the appended claims and their equivalents.

Claims

1. A light-emitting display device, comprising: substrate; as well as A plurality of pixels on the substrate, each pixel comprising a plurality of sub-pixels, Wherein, each of the plurality of sub-pixels comprises: a light transmission portion; a first emitting portion at a first side of the light transmitting portion; and a second emitting portion at a second side of the light transmitting portion different from the first side of the light transmitting portion, and Wherein, each of the first emitting portion and the second emitting portion is inclined from the light transmitting portion.

2. The light emitting display device according to claim 1, in, The second emitting portion is located at a second side of the light transmitting portion opposite to the first side of the light transmitting portion, and Wherein, each of the first emitting portion and the second emitting portion is configured to be inclined relative to the substrate.

3. The light emitting display device according to claim 1, in, Each of the plurality of sub-pixels comprises: a pixel circuit connected to the first emission section and the second emission section; a protective layer covering the pixel circuit; a pattern portion above the protective layer; and a light emitting device above the pattern portion, and Wherein, the first emitting portion and the second emitting portion are arranged at the pattern portion.

4. The light emitting display device according to claim 3, wherein: The pattern portion includes: an upper surface, a first slope surface at a first side of the upper surface, and a second slope surface at a second side of the upper surface different from the first side; The light transmission portion is located on the upper surface of the pattern portion; The first emitting portion is located at a first slope surface of the pattern portion; and The second emitting portion is located at a second slope surface of the pattern portion.

5. The light emitting display device according to claim 4, wherein: The light emitting device comprises: a first pixel electrode, the first pixel electrode being located at a first slope surface of the pattern portion; a second pixel electrode, the second pixel electrode being located at a second slope surface of the pattern portion; an emission layer, the emission layer being above the first pixel electrode and the second pixel electrode; and A common electrode is located above the emission layer.

6. The light emitting display device according to claim 5, further comprising: a plurality of gate lines, the plurality of gate lines being commonly connected to a pixel circuit of each of the plurality of sub-pixels; as well as a plurality of data lines, the plurality of data lines being disposed at each of the plurality of sub-pixels and connected to the pixel circuit, Wherein, the pixel circuit includes a driving thin film transistor commonly connected to the first pixel electrode and the second pixel electrode.

7. The light emitting display device according to claim 5, wherein: The pixel circuit of each sub-pixel of the plurality of sub-pixels comprises: a first pixel circuit, the first pixel circuit comprising a driving thin film transistor electrically connected to the first pixel electrode; and A second pixel circuit includes a driving thin film transistor electrically connected to the second pixel electrode.

8. The light emitting display device according to claim 7, further comprising a gate line commonly connected to the first pixel circuit and the second pixel circuit provided at each of the plurality of sub-pixels, in, Each of the plurality of sub-pixels further comprises: a first data line electrically connected to the first pixel circuit; and A second data line is electrically connected to the second pixel circuit.

9. The light emitting display device according to any one of claims 1 to 8, further comprising: a bank layer covering the edge portions of the first emitting portion and the second emitting portion and the entire emitting portion, or A bank layer covers edge portions of the first and second emitting portions and an edge portion of the light transmitting portion.

10. The light emitting display device according to any one of claims 4 to 8, wherein: The upper surface of the pattern portion includes a flat surface, and / or An angle between the upper surface of the protection layer and each of the first and second slope surfaces of the pattern part is an acute angle.

11. A light emitting display device according to any one of claims 4 to 8, in, The pattern portion comprises: a first pattern layer, the first pattern layer being above the protective layer; a groove portion at the first pattern layer and overlapping the light transmission portion; and a second pattern layer, the second pattern layer being located at the groove portion, The upper surface of the pattern portion includes an upper side surface of the first pattern layer and an upper side surface of the second pattern layer, and Wherein, the first pattern layer includes the first slope surface and the second slope surface.

12. The light emitting display device according to claim 11, in, The first pattern layer and the second pattern layer have different refractive indices, or Wherein, the refractive index of the second pattern layer is lower than the refractive index of the first pattern layer.

13. The light emitting display device according to claim 11, wherein: The groove portion includes a slope surface or a curved surface.

14. A light emitting display device according to any one of claims 1 to 8, wherein: The first emitting unit displays a first viewing angle image, The second emitting unit displays a second viewing angle image, and The first-view image and the second-view image are equal to or different from each other.

15. A light-emitting display device, comprising: substrate; as well as A plurality of pixels on the substrate, the plurality of pixels comprising a plurality of sub-pixels, Wherein, each of the plurality of sub-pixels comprises: a light transmitting portion; and A plurality of emitting portions are provided adjacent to the light transmitting portion and are inclined relative to the substrate.

16. The light emitting display device according to claim 15, in, The plurality of transmitting units include: a first sloped emitting portion at a first side of the light transmitting portion; and a second sloped emitting portion at a second side of the light transmitting portion different from the first side of the light transmitting portion, and Wherein, each of the first sloped emission portion and the second sloped emission portion is inclined relative to the substrate.

17. The light emitting display device according to claim 16, in, Each of the plurality of sub-pixels further comprises: a pixel circuit connected to the first slope emission section and the second slope emission section; a protective layer covering the pixel circuit; a pattern portion above the protective layer; and a light emitting device above the pattern portion, and The first slope emission portion and the second slope emission portion are arranged at the pattern portion.

18. The light emitting display device according to claim 17, wherein: The pattern portion includes: an upper surface, a first slope surface at a first side of the upper surface, and a second slope surface at a second side of the upper surface different from the first side; The light transmission portion is located on the upper surface of the pattern portion; The first sloped emission portion is located at a first sloped surface of the pattern portion; and The second slope emission portion is located at a second slope surface of the pattern portion.

19. The light emitting display device according to claim 18, wherein: The light emitting device comprises: a first pixel electrode, the first pixel electrode being located at a first slope surface of the pattern portion; a second pixel electrode, the second pixel electrode being located at a second slope surface of the pattern portion; an emission layer, the emission layer being above the first pixel electrode and the second pixel electrode; and A common electrode is located above the emission layer.

20. The light emitting display device according to claim 19, further comprising: a gate line, the gate line being commonly connected to a pixel circuit of each of the plurality of sub-pixels; as well as a plurality of data lines, the plurality of data lines being disposed at each of the plurality of sub-pixels and connected to the pixel circuit, Wherein, the pixel circuit includes a driving thin film transistor commonly connected to the first pixel electrode and the second pixel electrode.

21. The light emitting display device according to claim 19, further comprising a gate line connected to a pixel circuit of each of the plurality of sub-pixels, in, The pixel circuit comprises: a first pixel circuit, the first pixel circuit comprising a driving thin film transistor electrically connected to the first pixel electrode; and a second pixel circuit, the second pixel circuit comprising a driving thin film transistor electrically connected to the second pixel electrode, Wherein, each of the plurality of sub-pixels further comprises: a first data line electrically connected to the first pixel circuit; and a second data line, the second data line being electrically connected to the second pixel circuit, and The gate line is commonly connected to a first pixel circuit and a second pixel circuit of each sub-pixel in the plurality of sub-pixels.

22. The light-emitting display device according to any one of claims 15 to 21, further comprising: a bank layer covering the edge portion of the emitting portion and the entire emitting portion, or A bank layer covers an edge portion of the emitting portion and an edge portion of the light transmitting portion.

23. A light emitting display device according to any one of claims 18 to 21, wherein: The upper surface of the pattern portion includes a flat surface, and / or An angle between the upper surface of the protection layer and each of the first and second slope surfaces of the pattern part is an acute angle.

24. A light emitting display device according to any one of claims 18 to 21, in, The pattern portion comprises: a first pattern layer, the first pattern layer being above the protective layer; a groove portion at the first pattern layer and overlapping the light transmission portion; and a second pattern layer, the second pattern layer being located at the groove portion, The upper surface of the pattern portion includes an upper side surface of the first pattern layer and an upper side surface of the second pattern layer, and Wherein, the first pattern layer includes the first slope surface and the second slope surface.

25. The light emitting display device according to claim 24, in, The first pattern layer and the second pattern layer have different refractive indices, or Wherein, the refractive index of the second pattern layer is lower than the refractive index of the first pattern layer.

26. The light emitting display device according to claim 24, wherein: The groove portion includes a slope surface or a curved surface.

27. A light-emitting display device, comprising: substrate; as well as A plurality of pixels on the substrate, each pixel comprising a plurality of sub-pixels, Wherein, each of the plurality of sub-pixels comprises: a light transmission portion; a first emitting portion, the first emitting portion being at a first side of the light transmitting portion; a second emitting portion at a second side of the light transmitting portion different from the first side of the light transmitting portion, and A pattern portion is disposed in an emission region of a sub-pixel, The pattern portion includes: an upper surface, a first slope surface at a first side of the upper surface, and a second slope surface at a second side of the upper surface different from the first side; Wherein, the light transmission portion is located on the upper surface of the pattern portion; Wherein, the first emitting portion is located at the first slope surface of the pattern portion; wherein the second emitting portion is located at the second slope surface of the pattern portion, and Wherein, each of the first emitting portion and the second emitting portion is inclined from the light transmitting portion.