Locomotive converter equipment sensor signal acquisition circuit and method

Abstract

The invention provides a locomotive converter equipment sensor signal acquisition circuit and method, and relates to the technical field of rail transit, signal input is carried out through a Vin analog quantity port, an electromagnetic interference signal is introduced into an analog signal ground through an EMC module, current is converted into a voltage signal through an I / V module, and the current is converted into the voltage signal. The filter high-frequency filter is used for filtering high-frequency interference signals, the operational amplifier module (or with offset voltage) is used for amplifying the signals, the ADC module is used for collecting analog quantity signals, and the Isolation module is used for isolating driving signals between the controller and the AD module. Filtering and collecting of analog signals are achieved through the FPGA, data are stored in the cache RAM, and then the data are transmitted to the DSP master controller through a user bus. According to the invention, efficient and accurate acquisition of analog quantity signals is realized through modification of a basic circuit and improvement of a filtering method.

Description

Technical Field

[0001] The present invention relates to the technical field of rail transit, and particularly to a sensor signal acquisition circuit and method for a locomotive converter device. Background Art

[0002] In the field of rail transit, the converter device is a key component to ensure the normal operation of the train. The converter device judges the working state of the system by collecting various analog signals, such as voltage sensors, current sensors, temperature sensors, air flow sensors, etc. After these analog signals are converted by analog-to-digital conversion (ADC), the hardware circuit or control software identifies whether the amplitude or change rate exceeds the preset range, so as to complete instructions such as fault protection and alarm. Accurately collecting analog signals is crucial for ensuring the normal function of the converter device. However, various types of noise errors are often introduced during the conversion of analog signals into digital signals, affecting the signal acquisition accuracy of the circuit system. Therefore, the performance, accuracy and stability of analog signal acquisition are crucial for the converter device.

[0003] In the field of rail transit, for the actual working environments of different vehicles, different equipment suppliers have set sampling and protection functions in their hardware circuits, and directly collect analog signals through external controller devices. For example, some analog acquisition modules use differential input mode to collect signals. Compared with single-ended input acquisition, the differential input mode can effectively suppress the influence of external common-mode noise on the circuit, thereby improving the accuracy of the acquisition circuit. In addition, some high-precision analog acquisition circuits divide the full-scale voltage acquisition range of the analog-to-digital converter (ADC) into multiple gears, realizing variable-range acquisition of analog signals and improving the accuracy of analog signal acquisition.

[0004] Although the existing analog signal acquisition technologies have improved the accuracy and stability of signal acquisition to a certain extent, there are still some defects. First, the existing acquisition circuits are not highly versatile. They are usually designed according to specific requirements and are difficult to meet the needs of different vehicle models and working environments. Second, the noise errors introduced during the conversion of analog signals are still difficult to completely eliminate. Especially in complex working environments, these noise errors will further affect the accuracy of signal acquisition. In addition, when the existing acquisition circuits face multi-channel signal acquisition, complex hardware and software configurations are often required, increasing the complexity and cost of the system. Therefore, a more general, high-precision and stable analog signal acquisition method is needed to meet the application requirements of rail transit converter devices in different environments. Summary of the Invention

[0005] In view of this, the present invention provides a sensor signal acquisition circuit and method for a locomotive converter device, which realizes efficient and accurate acquisition of analog signals through the modification of the basic circuit and the improvement of the filtering method.

[0006] To this end, the present invention provides the following technical solutions:

[0007] On the one hand, the present invention provides a sensor signal acquisition circuit for a locomotive converter device, including: an EMC circuit, an I / V module, a Filter high-frequency filter, an operational amplifier module, an ADC module, an Isolation module, an FPGA, and a DSP master controller; where:

[0008] The EMC circuit includes: a first capacitor C11 and a second capacitor C12 connected in series, and an analog signal ground is connected between C11 and C12;

[0009] The I / V module includes: a first resistor R1, a second resistor R2, and a third resistor R3 connected in parallel across the series circuit of C11 and C12, and the two ends of the series circuit of C11 and C12 are respectively two input terminals Vin- and Vin+;

[0010] The operational amplifier module includes: an operational amplifier;

[0011] The Filter high-frequency filter includes: four operational amplifier peripheral circuits, and the four operational amplifier peripheral circuits include: a first Y1 module, a second Y1 module, a first Y f module and a second Y f module. The first Y1 module and the second Y1 module are connected in series, and the ground is connected between the first Y1 module and the second Y1 module. The first end of the first Y1 module is connected to the Vin- terminal, and the first end of the second Y1 module is connected to the Vin+ terminal; the second end of the first Y1 module is connected to the inverting input terminal of the operational amplifier, and the second end of the second Y1 module is connected to the non-inverting input terminal of the operational amplifier; the first Y f module is connected between the inverting input terminal and the output terminal of the operational amplifier, and the second Y f module is connected between the non-inverting input terminal of the operational amplifier and the reference source adjustment module. A sixteenth resistor R29 is connected between the output terminal of the operational amplifier and the ground;

[0012] Among them, the first Y1 module and the second Y1 module have symmetric characteristics. The first Y1 module includes a series of a fourth resistor R11, a fifth resistor R12, and a sixth resistor R13, and a third capacitor C12 whose first end is connected between R11 and R12 and whose second end is grounded; the second Y1 module includes a series of a seventh resistor R21, an eighth resistor R22, and a ninth resistor R23, and a fourth capacitor C22 whose first end is connected between R21 and R22 and whose second end is grounded; the second end of C12 is connected to the second end of C22 to form a series structure between the first Y1 module and the second Y1 module;

[0013] The first Y f module and the second Y f module have symmetric characteristics. The first Yf The module includes a tenth resistor R14, an eleventh resistor R15, and a fifth capacitor C13 connected in parallel; the second Y f The module includes a twelfth resistor R24, a thirteenth resistor R25, and a sixth capacitor C13 connected in parallel;

[0014] The reference source adjustment module includes a fourteenth resistor R26 with its first end connected to the second Y f module and its second end connected to the 3.3V power supply, and a fifteenth resistor R27 with its first end connected to the second Y f module and its second end grounded.

[0015] Furthermore, the ADC module uses an LTC2366HS6, which is a high-precision, low-power 24-bit analog-to-digital converter. The output end of the operational amplifier is connected to the analog signal input pin VIN, the power supply module is connected to the positive power input pin VDD, and the chip select pin CS, the data output pin SDATA, and the clock input pin SCLK are respectively connected to the Isolation module; the power supply module includes a seventh capacitor C14, an eighth capacitor C15, and a seventeenth resistor R16 connected in parallel.

[0016] Furthermore, the configuration of the operational amplifier gain is achieved by adjusting R15 and R25, the adjustment of the reference source is achieved by configuring R26 and R27, the conversion of the current signal to a voltage signal is achieved by configuring R1, R2, and R3, and the adjustment of the low-pass filter inflection point frequency is achieved by configuring C12, C13, C22, and C23.

[0017] Furthermore, C11 and C21 use a 1nF capacitor in the 24V system and a 47pF capacitor in the 72V and 110V systems.

[0018] Furthermore, the Y1 gain:

[0019]

[0020] T1 = R14 * C13;

[0021] Feedback Y f Gain:

[0022]

[0023] T2 = (23) * R11 * C11;

[0024] where C11 = C12;

[0025] The transfer function of the operational amplifier circuit is:

[0026]

[0027] Among them, the inflection point frequency is calculated as follows:

[0028]

[0029] Based on the inflection point frequency set by the Shannon theorem and the resistance values of R11 and R14, calculate the capacitance values of C12, C22, C13, and C23.

[0030] Furthermore, the operational amplifier uses OPA340UA.

[0031] Furthermore, the FPGA controls the acquisition of the data obtained by hardware filtering the analog signal through the ADC module, then stores the data in the buffer RAM, and transmits the data to the DSP master controller through the user bus. The DSP master controller realizes the denoising output of the analog signal through the improved wavelet threshold filtering algorithm. The improved wavelet threshold filtering algorithm includes:

[0032] S1. Select the wavelet basis to decompose the signal with noise, and calculate the wavelet coefficients of n layers after decomposition.

[0033] S2. Use the threshold calculation method to calculate the n-layer signal with noise.

[0034] S3. Reconstruct the wavelet coefficients to obtain a high-precision signal.

[0035] Among them, the expression of the improved wavelet threshold function is as follows:

[0036]

[0037] Among them, ω is the coefficient of the original signal, and λ is the threshold. The wavelet estimation coefficient of the denoised signal. The adjustment factors are a and b.

[0038] The wavelet threshold selection includes: estimating the mean square error σ of the wavelet coefficients of different layers as the noise changes at different scales i , and calculating the corresponding threshold i represents the decomposition scale, and adjusts the threshold through In(1 + i), and finally obtains the threshold λ at different decomposition scales i which is:

[0039]

[0040] In the formula, σ i is expressed as:

[0041]

[0042] Furthermore, it also includes: using the signal-to-noise ratio SNR and the root mean square error RMSE as the filtering performance criteria.

[0043] In another aspect, the present invention also provides a method for collecting sensor signals of a locomotive converter equipment, which uses the above-mentioned circuit for collecting sensor signals of a locomotive converter equipment to collect sensor signals of a locomotive converter equipment.

[0044] Advantages and positive effects of the present invention:

[0045] (1) Through circuit design, the power of the sampling resistor can be configured, and the filtering frequency can be configured according to the sampling frequency, reducing the design workload of analog signals and improving the efficiency of analog signal acquisition design.

[0046] (2) Through the cooperation of the voltage bias of the analog signal acquisition circuit and the sampling resistor, the acquisition of AC signals can be directly achieved within the positive level range.

[0047] (3) Through the improved wavelet threshold filtering algorithm, the signal is effectively filtered, and the validity of the original input signal is ensured. Description of the Drawings

[0048] In order to more clearly illustrate the technical solutions in the embodiments of the present invention or the prior art, the following will briefly introduce the drawings required for use in the description of the embodiments or the prior art. Obviously, the drawings in the following description are some embodiments of the present invention. For those of ordinary skill in the art, other drawings can be obtained based on these drawings without creative efforts.

[0049] Figure 1 It is a structural block diagram of a circuit for collecting sensor signals of a locomotive converter equipment in an embodiment of the present invention;

[0050] Figure 2 It is a circuit diagram of analog signal acquisition in an embodiment of the present invention;

[0051] Figure 3 It is a signal flow chart of wavelet threshold algorithm processing in an embodiment of the present invention;

[0052] Figure 4 It is a software threshold function diagram in the prior art;

[0053] Figure 5 It is a hardware threshold function diagram in the prior art;

[0054] Figure 6 It is a comparison diagram of software threshold function, hard threshold function and the improved threshold function of the present invention;

[0055] Figure 7 It is a schematic diagram of a sampled waveform with noise input in an embodiment of the present invention;

[0056] Figure 8 It is a schematic diagram of the filtered sampled waveform in an embodiment of the present invention. Detailed implementation manners

[0057] In order to enable those skilled in the art to better understand the solution of the present invention, the technical solutions in the embodiments of the present invention will be clearly and completely described below in conjunction with the accompanying drawings in the embodiments of the present invention. Obviously, the described embodiments are only a part of the embodiments of the present invention, rather than all the embodiments. Based on the embodiments of the present invention, all other embodiments obtained by those of ordinary skill in the art without creative efforts shall fall within the protection scope of the present invention.

[0058] It should be noted that the terms "first", "second", etc. in the description and claims of the present invention and the above-mentioned drawings are used to distinguish similar objects, and are not necessarily used to describe a specific order or sequence. It should be understood that such data can be interchanged under appropriate circumstances so that the embodiments of the present invention described herein can be implemented in an order other than those illustrated or described herein. In addition, the terms "comprising" and "having" and any variations thereof are intended to cover non-exclusive inclusion. For example, a process, method, system, product or device comprising a series of steps or units is not necessarily limited to those steps or units clearly listed, but may include other steps or units not clearly listed or inherent to these processes, methods, products or devices.

[0059] In the rail transit industry, the sensor signals of the converter equipment are generally current signals. In this embodiment, the current signal input is used to illustrate the sensor signal acquisition circuit of the locomotive converter equipment of the present invention.

[0060] As Figure 1 shown, a sensor signal acquisition circuit for a locomotive converter equipment in an embodiment of the present invention includes: an EMC circuit, an I / V module, a Filter high-frequency filter, an operational amplifier module, an ADC module, an Isolation module, an FPGA, and a DSP main controller; where:

[0061] The EMC module introduces electromagnetic interference signals into the analog signal ground;

[0062] The I / V module realizes the conversion of current to voltage signal;

[0063] The Filter high-frequency filter realizes the filtering of high-frequency interference signals;

[0064] The operational amplifier module (or with an offset voltage) amplifies the signal;

[0065] The ADC module realizes the acquisition of analog signals;

[0066] The Isolation module realizes the isolation of drive signals between the controller and the AD module;

[0067] The FPGA realizes the filtering and acquisition of analog signals, saves the data in the buffer RAM, and then transmits the data to the DSP master controller through the user bus.

[0068] Specifically, in accordance with the EN61000-4 standard, in order to meet the EMC requirements of product design, EMC filtering is achieved by using shielded wires and simple common-mode capacitors. As Figure 2 shown, the signal acquisition circuit includes an EMC circuit and an I / V module. The EMC circuit includes: a first capacitor C11 and a second capacitor C21 connected in series, and an analog signal ground is connected between C11 and C21. The I / V module includes: a first resistor R1, a second resistor R2, and a third resistor R3 connected in parallel across the series circuit of C11 and C21, and the two ends of the series circuit of C11 and C21 are respectively two input terminals Vin- and Vin+.

[0069] Among them, C11 and C21 will introduce electromagnetic noise into the external chassis ground. According to experience, a 1nF capacitor is used in the 24V system, a 47pF capacitor is used in the 72V and 110V systems, and a relatively good filtering effect can be achieved during the EMC test. The signal input is generally a current signal, and a signal sampling resistor is required to convert the current signal into a voltage signal, and different power signals are collected in parallel through the precision resistors R1, R2, and R3.

[0070] The signal acquisition circuit also includes a Filter high-frequency filter and an operational amplifier module. The operational amplifier module includes an operational amplifier, and the operational amplifier can use OPA340UA. The Filter high-frequency filter includes four operational amplifier peripheral circuits. The four operational amplifier peripheral circuits include: a first Y1 module, a second Y1 module, a first Y f module and a second Y f module. The first Y1 module and the second Y1 module are connected in series, and the ground is connected between the first Y1 module and the second Y1 module. The first end of the first Y1 module is connected to the Vin- terminal, and the first end of the second Y1 module is connected to the Vin+ terminal; the second end of the first Y1 module is connected to the inverting input terminal of the operational amplifier, and the second end of the second Y1 module is connected to the non-inverting input terminal of the operational amplifier; the first Y f module is connected between the inverting input terminal and the output terminal of the operational amplifier, and the second Y f module is connected between the non-inverting input terminal of the operational amplifier and the reference source adjustment module. A sixteenth resistor R29 is connected between the output terminal of the operational amplifier and the ground.

[0071] Among them, the first Y1 module and the second Y1 module have symmetric characteristics. The first Y1 module includes a fourth resistor R11, a fifth resistor R12, and a sixth resistor R13 connected in series, and a third capacitor C12 with its first end connected between R11 and R12 and its second end grounded; the second Y1 module includes a seventh resistor R21, an eighth resistor R22, and a ninth resistor R23 connected in series, and a fourth capacitor C22 with its first end connected between R21 and R22 and its second end grounded; the second end of C12 is connected to the second end of C22 to form a series structure between the first Y1 module and the second Y1 module.

[0072] The first Y f module, the second Y f module has symmetric characteristics. The first Y f module includes a tenth resistor R14, an eleventh resistor R15, and a fifth capacitor C13 connected in parallel; the second Y f module includes a twelfth resistor R24, a thirteenth resistor R25, and a sixth capacitor C13 connected in parallel.

[0073] The reference source adjustment module includes a fourteenth resistor R26 with its first end connected to the second Y f module and its second end connected to the 3.3V power supply, and a fifteenth resistor R27 with its first end connected to the second Y f module and its second end grounded.

[0074] Among them, only simple modifications are required for the peripheral circuit of the core operational amplifier module. The configuration of the operational amplifier gain can be achieved by adjusting R15 and R25, the adjustment of the reference source can be achieved by configuring R26 and R27, the conversion of the current signal to a voltage signal can be achieved by configuring R1, R2, and R3, and the adjustment of the inflection point frequency of the low-pass filter can be achieved by configuring C12, C13, C22, and C23.

[0075] The signal acquisition circuit further includes an ADC module, an Isolation module, and an FPGA connected in sequence; among them, the ADC module can adopt LTC2366HS6. LTC2366HS6 is a high-precision, low-power 24-bit analog-to-digital converter, including six pins: a positive power supply input pin VDD, a ground pin GND, an analog signal input pin VIN, a chip select pin CS, a data output pin SDATA, and a clock input pin SCLK. The output end of the operational amplifier is connected to VIN, the power supply module is connected to VDD, and CS, SDATA, and SCLK are respectively connected to the Isolation module. Among them, the power supply module includes a seventh capacitor C14, an eighth capacitor C15, and a seventeenth resistor R16 connected in parallel.

[0076] The relevant parameters are calculated as follows:

[0077] On the rail transit converter equipment, a sampling frequency of 1 MHz can meet the requirements, and higher-frequency noise needs to be filtered out. According to the Shannon theorem, the maximum bandwidth needs to be half of the sampling frequency. Since the filtering of analog signals is not perfect, after filtering out the high-frequency noise, the corner frequency of the filter can be set to 235 KHz.

[0078] Among them, in the peripheral circuit of the operational amplifier:

[0079] Y1 gain:

[0080]

[0081] T1 = R14 * C13;

[0082] Feedback Y f Gain:

[0083]

[0084] T2 = (23) * R11 * C11;

[0085] Among them, C11 = C12;

[0086] The transfer function of the operational amplifier circuit is as follows:

[0087]

[0088] Among them, the corner frequency calculation:

[0089]

[0090] According to the Shannon theorem mentioned above, the set corner frequency is 235 kHz. Given R11 = R14 = 10 KΩ, the capacitance values can be calculated:

[0091] C13 = C23 = 68 pF;

[0092] C12 = C22 = 100 pF.

[0093] In the above embodiments, in the analog signal acquisition circuit, high-power and low-power acquisitions can be flexibly achieved by configuring sampling resistors to adapt to application scenarios with different power requirements. To ensure the purity of the signal, the acquired analog signals are subjected to high-frequency filtering to effectively remove high-frequency interference. At the same time, by setting an appropriate bias voltage, accurate acquisition of AC signals can be achieved, ensuring the integrity and accuracy of the signals.

[0094] Further, in the embodiments of the present invention, an improved software filtering algorithm is also used to achieve the denoising output of analog signals. In a specific implementation, the FPGA controls the ADC module to collect the data of the analog signal after hardware filtering, and then stores the data in the buffer RAM. The data is transmitted to the DSP master controller through the user bus, and the DSP master controller performs corresponding data processing through the improved wavelet threshold filtering algorithm.

[0095] Filtering the input signal by using the improved wavelet threshold algorithm is mainly a process of filtering and denoising the signal according to the frequency distribution characteristics of the signal and noise. The specific implementation steps are as Figure 3 shown, including:

[0096] S1. Select the wavelet basis to decompose the signal containing noise, and calculate the wavelet coefficients of the decomposed n layers through calculation;

[0097] S2. Calculate the n-layer signal containing noise by using the threshold calculation method;

[0098] S3. Reconstruct the wavelet coefficients to obtain a high-precision signal.

[0099] a. Improvement of the wavelet threshold function:

[0100] Wavelet threshold denoising is a classic filtering method. By quantifying the wavelet coefficients from the first layer to the nth layer after decomposition with a suitable threshold, the noise signal is removed by using its decorrelation. The quantization processing methods mainly include hard threshold quantization and soft threshold quantization.

[0101] The formula of the hard threshold function is:

[0102]

[0103] The formula of the soft threshold function is:

[0104]

[0105] The value range quantization function graph is as Figure 4 、 Figure 5 shown. The wavelet coefficients of the hard threshold function have insufficient continuity and will jump at ±λ. There will be burrs and spikes in the denoised signal, the signal is not stable enough, the continuity is not good, and the processing effect is not ideal. The wavelet coefficients of the soft threshold function have better continuity of change, and can maximize the preservation of the original boundary details of the reconstructed signal. However, due to the increase of wavelet coefficients, local phenomena such as the disappearance of the signal boundary detail module will occur, which will affect the original effective signal and cause some useful signals to be filtered out.

[0106] The present invention combines the above classical filtering methods and improves the deficiencies therein. By introducing the exponential function and adjustable parameters a and b, a denoising algorithm for a two-parameter flexible adjustable wavelet threshold function with continuity, small constant deviation and high-order differentiability is proposed. To a certain extent, this function can process small signals. The main thing is to reduce the jump at the threshold point. The expression of the improved threshold function is as follows:

[0107]

[0108] where ω is the coefficient of the original signal and λ is the threshold. The wavelet estimation coefficient of the denoised signal. The adjustment factors are a and b. As Figure 6 shown in the schematic diagram of the curves of the classical soft and hard threshold functions and the improved threshold function.

[0109] Through the detailed analysis of the parity, continuity, asymptote, constant difference, high-order differentiability and threshold adjustment of the function, through the threshold adjustment parameters a and b, the flexible adjustment of the threshold function can be realized, and it can be applied to different occasions.

[0110] b. Wavelet threshold selection:

[0111] The selection of the wavelet denoising threshold has a great influence on filtering. If the threshold is selected too small, the filtering is incomplete; if the threshold is too large, the effective signal may be filtered out in the quantization stage, resulting in signal distortion. From the perspective of noise distribution, the noise of the wavelet coefficients in the first layer is the most, and the noise rapidly decreases as the wavelet decomposition layer deepens. Therefore, with the change of noise at different scales, the mean square error σ i of the wavelet coefficients of different layers is estimated, and the corresponding threshold (i represents the decomposition scale) is calculated, and the threshold is adjusted by In(1 + i), and finally the threshold λ i at different decomposition scales is obtained as:

[0112]

[0113] In the formula, σ i is expressed as:

[0114]

[0115] As can be seen from the above, according to the distribution law of noise, when i is the first layer, In(1 + i) < 1, so the filtering effect on the noise in the first layer is the best; when i > 1, In(1 + i) > 1, so as the decomposition layer i becomes larger, the finally estimated threshold will relatively decrease, and the consistent effect on noise is better.

[0116] c. Denoising evaluation index:

[0117] The present invention uses the signal-to-noise ratio SNR and the root mean square error RMSE as the filtering performance criteria. The larger the SNR and the smaller the RMSE, the larger the proportion of the effective signal component, the smoother the signal oscillation, and the more ideal the noise reduction effect. Conversely, the noise reduction is not ideal. The calculation formulas for the signal ratio and the root mean square error are as follows:

[0118]

[0119] where f(y) is the signal after noise reduction, f(i) is the signal before noise reduction, and n is the signal length.

[0120] By the above method, by giving a sine wave signal of 2V and adding noise, and setting the decomposition level to 5 at the same time, the noise removal effect is remarkable and the signal is stable. The noise removal effect is as Figure 7 、 Figure 8 shown.

[0121] In the above embodiment, an improved software filtering algorithm is adopted to further remove the noise in the analog signal, realize a more stable and reliable signal output, and thus improve the performance and reliability of the whole device.

[0122] In another embodiment, the present invention also provides a method for collecting sensor signals of a locomotive converter equipment. The circuit for collecting sensor signals of the locomotive converter equipment in the above embodiment is used to collect sensor signals of the locomotive converter equipment. Specifically: the signal is input through the Vin analog port, the electromagnetic interference signal is introduced into the analog signal ground through the EMC module, the current is converted into a voltage signal through the I / V module, the high-frequency interference signal is filtered through the Filter high-frequency filter, the signal is amplified through the operational amplifier module (or with an offset voltage), the analog signal is collected through the ADC module, then the driving signal isolation between the controller and the AD module is realized through the Isolation module, the analog signal is filtered and collected through the FPGA and the data is stored in the cache RAM, and then the data is transmitted to the DSP main controller through the user bus.

[0123] Finally, it should be noted that: the above embodiments are only used to illustrate the technical solutions of the present invention, rather than to limit it; although the present invention has been described in detail with reference to the foregoing embodiments, those of ordinary skill in the art should understand that: they can still modify the technical solutions recorded in the foregoing embodiments, or perform equivalent replacements on some or all of the technical features; and these modifications or replacements do not make the essence of the corresponding technical solutions deviate from the scope of the technical solutions of the embodiments of the present invention.

Claims

1. A sensor signal acquisition circuit for a locomotive converter equipment, characterized in that, It includes: EMC circuit, I / V module, Filter high-frequency filter, operational amplifier module, ADC module, Isolation module, FPGA and DSP main controller; among which: The EMC circuit includes: a first capacitor C11 and a second capacitor C12 connected in series, and an analog signal ground is connected between C11 and C12; The I / V module includes: a first resistor R1, a second resistor R2 and a third resistor R3 connected in parallel across the series circuit of C11 and C12, and the two ends of the series circuit of C11 and C12 are respectively two input terminals Vin- and Vin+; The operational amplifier module includes: an operational amplifier; The Filter high-frequency filter includes: four operational amplifier peripheral circuits, and the four operational amplifier peripheral circuits include: a first Y1 module, a second Y1 module, a first Y f module and a second Y f module. The first Y1 module and the second Y1 module are connected in series, and a ground connection is made between the first Y1 module and the second Y1 module. The first end of the first Y1 module is connected to the Vin- terminal, and the first end of the second Y1 module is connected to the Vin+ terminal; the second end of the first Y1 module is connected to the inverting input terminal of the operational amplifier, and the second end of the second Y1 module is connected to the non-inverting input terminal of the operational amplifier; the first Y f module is connected between the inverting input terminal and the output terminal of the operational amplifier, and the second Y f module is connected between the non-inverting input terminal of the operational amplifier and the reference source adjustment module; a sixteenth resistor R29 is connected between the output terminal of the operational amplifier and the ground; Among them, the first Y1 module and the second Y1 module have symmetric characteristics. The first Y1 module includes a series of a fourth resistor R11, a fifth resistor R12 and a sixth resistor R13, a third capacitor C12 with its first end connected between R11 and R12 and its second end grounded; the second Y1 module includes a series of a seventh resistor R21, an eighth resistor R22 and a ninth resistor R23, a fourth capacitor C22 with its first end connected between R21 and R22 and its second end grounded; the second end of C12 is connected to the second end of C22 to form a series structure between the first Y1 module and the second Y1 module; The first Y f module, the second Y f module has a symmetric feature. The first Y f module includes a tenth resistor R14, an eleventh resistor R15, and a fifth capacitor C13 connected in parallel; The second Y f module includes a twelfth resistor R24, a thirteenth resistor R25, and a sixth capacitor C13 connected in parallel; The reference source adjustment module includes a fourteenth resistor R26 with its first end connected to the second Y f module and its second end connected to the 3.3V power supply, and a fifteenth resistor R27 with its first end connected to the second Y f module and its second end grounded.

2. The sensor signal acquisition circuit of a locomotive converter equipment according to claim 1, characterized in that The ADC module uses LTC2366HS6. LTC2366HS6 is a high-precision, low-power 24-bit analog-to-digital converter. The output terminal of the operational amplifier is connected to the analog signal input pin VIN, the power supply module is connected to the positive power input pin VDD, and the chip select pin CS, data output pin SDATA, and clock input pin SCLK are respectively connected to the Isolation module; among which the power supply module includes a seventh capacitor C14, an eighth capacitor C15, and a seventeenth resistor R16 connected in parallel.

3. The sensor signal acquisition circuit of a locomotive converter equipment according to claim 1, characterized in that, The configuration of the operational amplifier gain is achieved by adjusting R15 and R25, the reference source adjustment is achieved by configuring R26 and R27, the conversion of the current signal to a voltage signal is achieved by configuring R1, R2 and R3, and the adjustment of the low-pass filter inflection point frequency is achieved by configuring C12, C13, C22 and C23.

4. The sensor signal acquisition circuit of a locomotive converter device according to claim 1, characterized in that, C11 and C21 use 1nF capacitors in the 24V system and 47pF capacitors in the 72V and 110V systems.

5. A sensor signal acquisition circuit for a locomotive converter device according to claim 3, characterized in that Y1 gain: T1 = R14 * C13; Feedback Y f Gain: T2 = (23) * R11 * C11; where C11 = C12; The transfer function of the operational amplifier circuit is: Among which the inflection point frequency calculation: Based on the inflection point frequency set by the Shannon theorem and the resistance values of R11 and R14, calculate the capacitance values of C12, C22, C13 and C23.

6. The sensor signal acquisition circuit of a locomotive converter device according to claim 1, characterized in that The operational amplifier uses OPA340UA.

7. The sensor signal acquisition circuit of a locomotive converter device according to claim 1, characterized in that The FPGA controls the acquisition of the data after hardware filtering of the analog signal through the ADC module, then saves the data in the buffer RAM, and transmits the data to the DSP main controller through the user bus. The DSP main controller realizes the denoising output of the analog signal through the improved wavelet threshold filtering algorithm; The improved wavelet threshold filtering algorithm includes: S1. Decompose the signal containing noise using the wavelet basis selected from the wavelet bases, and obtain the wavelet coefficients of n layers after decomposition by calculation; S2. Calculate the n-layer signals with noise using a threshold calculation method; S3. Reconstruct the wavelet coefficients to obtain a high-precision signal; Among them, the expression of the improved wavelet threshold function is as follows: where ω is the coefficient of the original signal and λ is the threshold value, the wavelet estimation coefficient of the denoised signal. The adjustment factors are a and b; Wavelet threshold selection includes: estimating the mean square deviation σ of wavelet coefficients at different layers as the noise changes at different scales i , calculating the corresponding threshold i represents the decomposition scale, and the threshold is adjusted by In(1 + i), and finally the threshold λ at different decomposition scales is obtained i which is: where σ i is expressed as:

8. The sensor signal acquisition circuit of a locomotive converter device according to claim 7, characterized in that, It also includes: Adopt the signal-to-noise ratio SNR and the root mean square error RMSE as the filtering performance criteria.

9. A method for collecting sensor signals of a locomotive converter equipment, characterized in that, Use the sensor signal acquisition circuit of the locomotive converter equipment described in any one of claims 1 to 8 to collect the sensor signals of the locomotive converter equipment.

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