Dynamic modeling method and system for service life of insulated gate bipolar transistor power device

Abstract

The invention provides a dynamic modeling method and system for the service life of an insulated gate bipolar transistor power device. The method comprises the following steps: acquiring electrical parameters of an insulated gate bipolar transistor under different load currents; extracting an electrothermal coupling relation between electrical performance and junction temperature in the insulated gate bipolar transistor; determining fatigue damage degrees of the insulated gate bipolar transistor in different simulation stages according to correlation characteristics of thermal fatigue among different junction regions in the insulated gate bipolar transistor; determining the life degradation amount of the insulated gate bipolar transistor in different simulation stages according to the fatigue damage degree of the insulated gate bipolar transistor in different simulation stages and the electrothermal coupling relationship between the electrical performance and junction temperature in the insulated gate bipolar transistor; and carrying out dynamic simulation on the operation life of the insulated gate bipolar transistor based on the life degradation amount of the insulated gate bipolar transistor in different simulation stages. By adopting the scheme of the invention, the dynamic modeling of the service life of the insulated gate bipolar transistor under the influence of the heat effect can be realized.

Description

Technical Field

[0001] This application relates to the field of dynamic modeling technology. More specifically, this application relates to a method and system for dynamically modeling the life of an insulated gate bipolar transistor power device. Background Art

[0002] Dynamic modeling is a method for describing and predicting the behavior of a system over time, and is widely used in various fields such as engineering, physics, and economics. By establishing a mathematical model, dynamic modeling considers the interactions between various factors within the system and reflects its dynamic evolution process. Dynamic modeling can capture the non-linear and time-varying characteristics of the system due to changes in the external environment and initial conditions. Common dynamic modeling methods include ordinary differential equations, difference equations, control theory, system identification, time series data analysis, etc. These methods can be used to simulate the time response of the system, perform state prediction, fault diagnosis, and optimal design. In the life modeling of power devices, dynamic modeling technology can dynamically adjust according to different operating states and environmental changes of power devices, providing more accurate life prediction and performance evaluation.

[0003] In the existing dynamic modeling of the life of insulated gate bipolar transistor power devices, machine learning and deep learning algorithms are used to extract life-related features from historical operation data, and then a mathematical model is established to simulate the aging process of power devices. However, as the usage time increases, the performance of insulated gate bipolar transistors is gradually affected by thermal effects under various environments and operating conditions. Thermal effects will accelerate the degradation of insulated gate bipolar transistors, resulting in a significant reduction in the service life of insulated gate bipolar transistors. Therefore, how to achieve dynamic modeling of the service life of insulated gate bipolar transistors under the influence of thermal effects has become a difficult problem faced by the industry. Summary of the Invention

[0004] This application provides a method and system for dynamically modeling the life of an insulated gate bipolar transistor power device, which can achieve dynamic modeling of the service life of an insulated gate bipolar transistor under the influence of thermal effects.

[0005] In a first aspect, this application provides a method for dynamically modeling the life of an insulated gate bipolar transistor power device, including the following steps: Obtain the electrical parameters of the insulated gate bipolar transistor under different load currents; Extract the electrothermal coupling relationship between the electrical performance and the junction temperature inside the insulated gate bipolar transistor from all the electrical parameters; Determine the fatigue damage degree of the insulated gate bipolar transistor in different simulation stages according to the junction temperature fluctuation of the insulated gate bipolar transistor under different load currents and the correlation characteristics of thermal fatigue between different junction regions inside the insulated gate bipolar transistor; Determine the life degradation amount of the insulated gate bipolar transistor in different simulation stages based on the fatigue damage degree of the insulated gate bipolar transistor and the electrothermal coupling relationship between the electrical performance and the junction temperature in the insulated gate bipolar transistor in different simulation stages; Dynamically simulate the operating life of the insulated gate bipolar transistor based on the life degradation amount of the insulated gate bipolar transistor in different simulation stages.

[0006] In some embodiments, extracting the electrothermal coupling relationship between the electrical performance and the junction temperature in the insulated gate bipolar transistor from all electrical parameters specifically includes: Obtain the junction temperature data of each semiconductor node in the insulated gate bipolar transistor under different load currents; Perform dependency analysis on all electrical parameters and all junction temperature data to obtain the dependency relationship between the electrical performance and the junction temperature in the insulated gate bipolar transistor; Determine the thermal feedback of the electrical performance in the insulated gate bipolar transistor through all electrical parameters; Determine the electrothermal coupling relationship between the electrical performance and the junction temperature in the insulated gate bipolar transistor according to the thermal feedback of the electrical performance in the insulated gate bipolar transistor and the dependency relationship.

[0007] In some embodiments, determining the fatigue damage degree of the insulated gate bipolar transistor in different simulation stages according to the junction temperature fluctuation of the insulated gate bipolar transistor under different load currents and the correlation characteristics of thermal fatigue between different junction regions in the insulated gate bipolar transistor specifically includes: Segment the electrical parameters of the insulated gate bipolar transistor under different load currents by time to obtain the electrical data segments of the insulated gate bipolar transistor in different time periods; Determine the cumulative damage amount of thermal fatigue of the insulated gate bipolar transistor in different simulation stages through the electrical data segments of the insulated gate bipolar transistor in different time periods and the correlation characteristics of thermal fatigue between different junction regions in the insulated gate bipolar transistor; Obtain the junction temperature data of each semiconductor node in the insulated gate bipolar transistor under different load currents, and then determine the junction temperature fluctuation of the insulated gate bipolar transistor under different load currents; Determine the fatigue damage degree of the insulated gate bipolar transistor in different simulation stages according to the cumulative damage amount of thermal fatigue of the insulated gate bipolar transistor in different simulation stages and the junction temperature fluctuation of the insulated gate bipolar transistor under different load currents.

[0008] In some embodiments, determining the life degradation amount of the insulated gate bipolar transistor in different simulation stages based on the fatigue damage degree of the insulated gate bipolar transistor and the electrothermal coupling relationship between the electrical performance and the junction temperature in the insulated gate bipolar transistor specifically includes: Perform a linear fit on the fatigue damage degree of the insulated gate bipolar transistor in different simulation stages to obtain a fitting curve of the fatigue damage degree; Determine the life degradation amount of the insulated gate bipolar transistor in different simulation stages according to the fitting curve of the fatigue damage degree and the electrothermal coupling relationship between the electrical performance and the junction temperature in the insulated gate bipolar transistor.

[0009] In some embodiments, dynamically simulating the operating life of the insulated gate bipolar transistor based on the life degradation amount of the insulated gate bipolar transistor in different simulation stages specifically includes: Set the initial simulation state of the life of the insulated gate bipolar transistor; Simulate the operating life of the insulated gate bipolar transistor according to the initial simulation state of the life of the insulated gate bipolar transistor and the life degradation amount of the insulated gate bipolar transistor in each simulation stage to obtain the remaining life of the insulated gate bipolar transistor in each simulation stage; Determine the life decay curve of the insulated gate bipolar transistor through the remaining life of the insulated gate bipolar transistor in all simulation stages.

[0010] In some embodiments, the types of the load current include a constant load current, a pulsed load current, a dynamic load current, and an overload current.

[0011] In some embodiments, different junction regions in the insulated gate bipolar transistor include a drift region, an emitter region, a collector region, and a parasitic diode.

[0012] In a second aspect, the present application provides a system for dynamically modeling the life of an insulated gate bipolar transistor power device, including: An acquisition module, configured to acquire electrical parameters of the insulated gate bipolar transistor under different load currents; A processing module, configured to extract the electrothermal coupling relationship between the electrical performance and the junction temperature in the insulated gate bipolar transistor from all electrical parameters; The processing module is further configured to determine the fatigue damage degree of the insulated gate bipolar transistor in different simulation stages according to the junction temperature fluctuation of the insulated gate bipolar transistor under different load currents and the correlation characteristics of thermal fatigue between different junction regions in the insulated gate bipolar transistor; The processing module is further configured to determine the life degradation amount of the insulated gate bipolar transistor in different simulation stages through the fatigue damage degree of the insulated gate bipolar transistor in different simulation stages and the electrothermal coupling relationship between the electrical performance and the junction temperature in the insulated gate bipolar transistor; An execution module, configured to dynamically simulate the operating life of the insulated gate bipolar transistor based on the life degradation amount of the insulated gate bipolar transistor in different simulation stages.

[0013] In a third aspect, the present application provides a computer device, which includes a memory and a processor. The memory stores code, and the processor is configured to obtain the code and execute the above-mentioned method for dynamically modeling the life of an insulated gate bipolar transistor power device.

[0014] In a fourth aspect, the present application provides a computer-readable storage medium storing a computer program, and when the computer program is executed by a processor, it implements the above-mentioned method for dynamically modeling the life of an insulated gate bipolar transistor power device.

[0015] The technical solutions provided by the embodiments disclosed in the present application have the following beneficial effects: In the method and system for dynamically modeling the life of an insulated gate bipolar transistor power device provided by the present application, by obtaining the electrical parameters of the insulated gate bipolar transistor under different load currents; extracting the electrothermal coupling relationship between the electrical performance and the junction temperature inside the insulated gate bipolar transistor from all the electrical parameters; determining the fatigue damage degree of the insulated gate bipolar transistor in different simulation stages according to the association characteristics between the junction temperature fluctuation of the insulated gate bipolar transistor under different load currents and the thermal fatigue between different junction regions inside the insulated gate bipolar transistor; determining the life degradation amount of the insulated gate bipolar transistor in different simulation stages through the fatigue damage degree of the insulated gate bipolar transistor in different simulation stages and the electrothermal coupling relationship between the electrical performance and the junction temperature inside the insulated gate bipolar transistor; dynamically simulating the operating life of the insulated gate bipolar transistor based on the life degradation amount of the insulated gate bipolar transistor in different simulation stages.

[0016] It can be seen that in this application, the life degradation amount of the insulated gate bipolar transistor in different simulation stages can be determined by the fatigue damage degree of the insulated gate bipolar transistor in different simulation stages and the electro-thermal coupling relationship between the electrical performance and the junction temperature in the insulated gate bipolar transistor. Among them, first, in practical applications, the change in the electrical performance of the insulated gate bipolar transistor will in turn affect the junction temperature. By extracting the electro-thermal coupling relationship between the electrical performance and the junction temperature, this feedback mechanism can be quantified, so as to accurately estimate the speed and degree of life degradation in the simulation. Secondly, by determining the correlation characteristics between the junction temperature fluctuation and the thermal fatigue, the thermal fatigue situation of the insulated gate bipolar transistor in each simulation stage can be accurately evaluated, making the simulation results more accurately reflect the performance of the insulated gate bipolar transistor under the influence of the thermal effect. Then, the fatigue damage degree of the insulated gate bipolar transistor in different simulation stages is quantified through the electro-thermal coupling relationship between the electrical performance and the junction temperature in the insulated gate bipolar transistor, and the life degradation amount of the insulated gate bipolar transistor in different simulation stages is obtained. Among them, the life degradation amount represents the decay parameter of the working life of the insulated gate bipolar transistor simulated under the influence of the thermal effect in the simulation stage. Finally, the operating life of the insulated gate bipolar transistor is dynamically simulated based on the life degradation amount of the insulated gate bipolar transistor in different simulation stages. To sum up, the solution of this application can realize the dynamic modeling of the service life of the insulated gate bipolar transistor under the influence of the thermal effect. BRIEF DESCRIPTION OF THE DRAWINGS

[0017] Figure 1 is an exemplary flowchart of a method for dynamically modeling the life of an insulated gate bipolar transistor power device according to some embodiments of the present application; Figure 2 is a schematic flowchart for determining the fatigue damage degree of an insulated gate bipolar transistor according to some embodiments of the present application; Figure 3 is a schematic flowchart for realizing dynamic simulation according to some embodiments of the present application; Figure 4 is a schematic structural diagram of a system for dynamically modeling the life of an insulated gate bipolar transistor power device according to some embodiments of the present application; Figure 5 is a schematic structural diagram of a computer device for realizing a method for dynamically modeling the life of an insulated gate bipolar transistor power device according to some embodiments of the present application. DETAILED DESCRIPTION OF THE EMBODIMENTS

[0018] In order to better understand the technical solution of the present application, the technical solution of the present application will be described in detail below in conjunction with the accompanying drawings of the specification and specific embodiments.

[0019] Reference Figure 1, This figure is an exemplary flowchart of a method for dynamically modeling the lifespan of an insulated gate bipolar transistor power device according to some embodiments of the present application. The method 100 for dynamically modeling the lifespan of an insulated gate bipolar transistor power device mainly includes the following steps: In step 101, obtain the electrical parameters of the insulated gate bipolar transistor under different load currents.

[0020] It should be noted that the types of load currents described in the present application include constant load current, pulsed load current, dynamic load current, and overload current. Among them, the constant load current means that the load current remains constant and usually operates within a predetermined range. The pulsed load current means that the load current fluctuates in a pulsed manner within a short period of time, increasing and decreasing periodically. The dynamic load current means that the load current changes dynamically over time or with the load condition and is not constant, which can be linearly or non-linearly changed. The overload current means that the load current exceeds the rated current of the device within a short period of time.

[0021] In addition, it should be noted that the electrical parameters described in the present application are composed of the conduction voltage, conduction loss, and reverse recovery time of the insulated gate bipolar transistor at one-hour intervals in the most recent month. Among them, the conduction voltage represents the voltage between the collector and the emitter of the insulated gate bipolar transistor in the on state. The conduction loss represents the power loss generated by the current flowing through the conduction voltage in the on state of the insulated gate bipolar transistor. The reverse recovery time represents the duration of the transition state during the turn-off process of the insulated gate bipolar transistor. In specific implementation, obtain the electrical parameters of the insulated gate bipolar transistor under different load currents from the data acquisition system of the insulated gate bipolar transistor.

[0022] In step 102, extract the electrothermal coupling relationship between the electrical performance and the junction temperature inside the insulated gate bipolar transistor from all the electrical parameters.

[0023] In some embodiments, the extraction of the electrothermal coupling relationship between the electrical performance and the junction temperature inside the insulated gate bipolar transistor from all the electrical parameters can be implemented by the following steps: Obtain the junction temperature data of each semiconductor node inside the insulated gate bipolar transistor under different load currents; Perform a dependency analysis on all the electrical parameters and all the junction temperature data to obtain the dependency relationship between the electrical performance and the junction temperature inside the insulated gate bipolar transistor; Determine the thermal feedback of the electrical performance inside the insulated gate bipolar transistor through all the electrical parameters; Determine the electrothermal coupling relationship between the electrical performance and the junction temperature inside the insulated gate bipolar transistor according to the thermal feedback of the electrical performance inside the insulated gate bipolar transistor and the dependency relationship.

[0024] It should be noted that the junction temperature data in this application consists of the temperatures of the semiconductor junctions inside the insulated gate bipolar transistor at one-hour intervals in the most recent month, and the temperature of the semiconductor junction inside the insulated gate bipolar transistor can be obtained through a micro-thermistor.

[0025] In specific implementation, a dependency analysis is performed on all electrical parameters and all junction temperature data to obtain the dependency relationship between the electrical performance and the junction temperature inside the insulated gate bipolar transistor. The following method can be used to achieve this, that is: First, calculate the Pearson correlation coefficients between the electrical parameters of the insulated gate bipolar transistor under different load currents and the junction temperature data of each semiconductor junction inside the insulated gate bipolar transistor under the corresponding load currents respectively. Then, calculate the average value of all the obtained Pearson correlation coefficients, and use the obtained average value as the dependency relationship between the electrical performance and the junction temperature inside the insulated gate bipolar transistor. In other embodiments, other methods can also be used to achieve this, which is not limited here.

[0026] It should be noted that the dependency relationship in this application represents a parameter that correlates the electrical parameters and the temperature of the semiconductor junction.

[0027] In specific implementation, the thermal feedback of the electrical performance inside the insulated gate bipolar transistor can be determined through all the electrical parameters by the following method: Select a load current as the selected load current, and then select the maximum conduction voltage, the minimum conduction voltage, the maximum conduction loss, the minimum conduction loss, and the minimum reverse recovery time from the electrical parameters of the insulated gate bipolar transistor under the selected load current. Divide the difference between the maximum conduction voltage and the minimum conduction voltage by the difference between the maximum conduction loss and the minimum conduction loss, and then divide the obtained value by the minimum reverse recovery time, and use the obtained value as the thermal feedback of the insulated gate bipolar transistor under the selected load current. Continue to determine the thermal feedback of the insulated gate bipolar transistor under the remaining load currents. Then, sum up the thermal feedback of the insulated gate bipolar transistor under different load currents, and use the obtained sum value as the thermal feedback of the electrical performance inside the insulated gate bipolar transistor. In other embodiments, other methods can also be used to achieve this, which is not limited here.

[0028] It should be noted that the thermal feedback in this application is a parameter that reflects the thermal response characteristics of the insulated gate bipolar transistor under dynamic electro-thermal conditions.

[0029] In specific implementation, the electrothermal coupling relationship between the electrical performance and the junction temperature in the insulated gate bipolar transistor can be determined according to the thermal feedback of the electrical performance in the insulated gate bipolar transistor and the dependency relationship by the following method, that is: multiplying the thermal feedback of the electrical performance in the insulated gate bipolar transistor by the dependency relationship between the electrical performance and the junction temperature in the insulated gate bipolar transistor, and using the obtained product value as the electrothermal coupling relationship between the electrical performance and the junction temperature in the insulated gate bipolar transistor. In other embodiments, other methods can also be used for implementation, which will not be elaborated here.

[0030] It should be noted that the electrothermal coupling relationship described in this application represents a parameter for measuring the interaction between the electrical performance and the thermal behavior in the insulated gate bipolar transistor. The interaction means that the change in the electrical performance affects the junction temperature, and the change in the junction temperature in turn affects the electrical performance. Among them, the electrical performance includes current, voltage, power loss, etc., and the thermal behavior includes junction temperature, heat flux density, etc.

[0031] In step 103, the fatigue damage degree of the insulated gate bipolar transistor in different simulation stages is determined according to the junction temperature fluctuation of the insulated gate bipolar transistor under different load currents and the correlation characteristics of thermal fatigue between different junction regions in the insulated gate bipolar transistor.

[0032] In some embodiments, refer to Figure 2 As shown in the figure, which is a schematic flow chart for determining the fatigue damage degree of the insulated gate bipolar transistor in some embodiments of this application. In this embodiment, the fatigue damage degree of the insulated gate bipolar transistor in different simulation stages can be determined according to the junction temperature fluctuation of the insulated gate bipolar transistor under different load currents and the correlation characteristics of thermal fatigue between different junction regions in the insulated gate bipolar transistor by the following steps: Segment the electrical parameters of the insulated gate bipolar transistor over time under different load currents to obtain electrical data segments of the insulated gate bipolar transistor in different time periods; Determine the cumulative damage amount of thermal fatigue of the insulated gate bipolar transistor in different simulation stages through the electrical data segments of the insulated gate bipolar transistor in different time periods and the correlation characteristics of thermal fatigue between different junction regions in the insulated gate bipolar transistor; Obtain the junction temperature data of each semiconductor node in the insulated gate bipolar transistor under different load currents, and then determine the junction temperature fluctuation of the insulated gate bipolar transistor under different load currents; Determine the fatigue damage degree of the insulated gate bipolar transistor in different simulation stages according to the cumulative damage amount of thermal fatigue of the insulated gate bipolar transistor in different simulation stages and the junction temperature fluctuation of the insulated gate bipolar transistor under different load currents.

[0033] In specific implementation, the electrical parameters of the insulated gate bipolar transistor under different load currents are segmented by time to obtain the electrical data segments of the insulated gate bipolar transistor in different time periods. The following method can be used to achieve this, that is: in chronological order, the electrical parameters of the insulated gate bipolar transistor under different load currents are divided into data segments of different time periods, and all the obtained data segments are used as electrical data segments. Among them, the electrical data segment includes the electrical parameters of different load currents in the same time period. The time period is set to 12 hours. In other embodiments, other methods can also be used to achieve this, which will not be elaborated here.

[0034] It should be noted that the correlation feature of thermal fatigue in this application represents the feature that the temperature gradients in different junction regions of the insulated gate bipolar transistor affect each other to generate thermal stress. It can be obtained by acquiring the temperature gradient data of different junction regions, calculating the Pearson correlation coefficient of the temperature gradient data of every two junction regions, calculating the mean value of all the obtained Pearson correlation coefficients, and using the obtained mean value as the correlation feature of thermal fatigue.

[0035] In addition, it should also be noted that the different junction regions in the insulated gate bipolar transistor include a drift region, an emitter region, a collector region, and a parasitic diode. The drift region is one of the most critical junction regions in the insulated gate bipolar transistor, located between the N-type semiconductor and the P-type semiconductor, forming a PN junction. The emitter region is usually composed of a P-type semiconductor, forming a PN junction with the drift region. During operation, current flows from the emitter region into the drift region. The temperature and current changes in the emitter region will affect the switching characteristics and performance of the device. The collector region is usually composed of an N-type semiconductor, responsible for receiving the current from the emitter region and leading the current to the external circuit. The insulated gate bipolar transistor also contains a parasitic diode junction region, which is a diode formed by the N-type drift region and the P-type emitter region. This diode plays a role in carrying the reverse current during the turn-off process.

[0036] It should also be noted that each time period in this application corresponds to a simulation stage.

[0037] In specific implementation, the cumulative damage amount of thermal fatigue of the insulated gate bipolar transistor in different simulation stages can be determined by the correlation characteristics between the electrical data segments of the insulated gate bipolar transistor in different time periods and the thermal fatigue between different junction regions in the insulated gate bipolar transistor, which can be implemented in the following manner: Select a time period as the selected time period, divide the conduction voltage at each moment in the electrical data segment of the selected time period by the conduction loss at the corresponding moment, where each moment represents one hour, then sum up all the obtained division values, further multiply the obtained sum value by the correlation characteristics of thermal fatigue between different junction regions in the insulated gate bipolar transistor, and use the obtained multiplication value as the cumulative damage amount of thermal fatigue of the insulated gate bipolar transistor in the simulation stage corresponding to the selected time period. Continue to determine the cumulative damage amount of thermal fatigue of the insulated gate bipolar transistor in the simulation stage corresponding to the remaining time periods. In other embodiments, other methods can also be used for implementation, which are not limited herein.

[0038] It should be noted that the cumulative damage amount described in this application represents a parameter for simulating the cumulative damage generated by the insulated gate bipolar transistor under the repeated action of thermal stress in the simulation stage.

[0039] In specific implementation, the junction temperature data of each semiconductor node in the insulated gate bipolar transistor under different load currents can be obtained, and then the junction temperature fluctuation of the insulated gate bipolar transistor under different load currents can be determined by the following method: Select a load current as the selected load current, calculate the standard deviation of the junction temperature data of each semiconductor node in the insulated gate bipolar transistor under the selected load current, so as to obtain a plurality of standard deviations, and use the obtained standard deviations as the junction temperature fluctuation of the insulated gate bipolar transistor under the selected load current. Continue to determine the junction temperature fluctuation of the insulated gate bipolar transistor under the remaining load currents. In other embodiments, other methods can also be used for implementation, which are not limited herein.

[0040] It should be noted that the junction temperature fluctuation described in this application represents the overall fluctuation degree of the temperature between the semiconductor junction regions inside the insulated gate bipolar transistor.

[0041] When specifically implemented, the fatigue damage degree of the insulated gate bipolar transistor in different simulation stages can be determined according to the cumulative damage amount of the thermal fatigue of the insulated gate bipolar transistor described in different simulation stages and the junction temperature fluctuation of the insulated gate bipolar transistor under different load currents, which can be achieved in the following way: select the maximum cumulative damage amount and the minimum cumulative damage amount from the cumulative damage amounts of the thermal fatigue of the insulated gate bipolar transistor in different simulation stages, then subtract the minimum cumulative damage amount from the maximum cumulative damage amount, and use the obtained value as the cumulative damage offset amount. Further, divide the cumulative damage amount of the thermal fatigue of the insulated gate bipolar transistor in each simulation stage by the cumulative damage offset amount, then multiply the obtained values by the sum of the junction temperature fluctuations of the insulated gate bipolar transistor under different load currents, and use the obtained multiplied values as the fatigue damage degree of the insulated gate bipolar transistor in each simulation stage.

[0042] It should be noted that the fatigue damage degree described in this application represents the damage degree of the insulated gate bipolar transistor affected by thermal fatigue during the simulation process.

[0043] In step 104, the life degradation amount of the insulated gate bipolar transistor in different simulation stages is determined according to the fatigue damage degree of the insulated gate bipolar transistor in different simulation stages and the electrothermal coupling relationship between the electrical performance and the junction temperature in the insulated gate bipolar transistor.

[0044] In some embodiments, the life degradation amount of the insulated gate bipolar transistor in different simulation stages can be determined according to the fatigue damage degree of the insulated gate bipolar transistor in different simulation stages and the electrothermal coupling relationship between the electrical performance and the junction temperature in the insulated gate bipolar transistor, which can be achieved by the following steps: Perform linear fitting on the fatigue damage degrees of the insulated gate bipolar transistor in different simulation stages to obtain a fitting curve of the fatigue damage degree; Determine the life degradation amount of the insulated gate bipolar transistor in different simulation stages according to the fitting curve of the fatigue damage degree and the electrothermal coupling relationship between the electrical performance and the junction temperature in the insulated gate bipolar transistor.

[0045] When specifically implemented, performing linear fitting on the fatigue damage degrees of the insulated gate bipolar transistor in different simulation stages to obtain a fitting curve of the fatigue damage degree can be achieved in the following way: use an existing linear fitting algorithm (such as the least squares support vector machine algorithm) to perform linear fitting on all the fatigue damage degrees, and use the obtained curve as the fitting curve of the fatigue damage degree, and use the values on the fitting curve as the fatigue damage degree fitting values. And each fatigue damage degree fitting value corresponds to a fatigue damage degree. In other embodiments, other methods can also be used to achieve this, which is not limited here.

[0046] It should be noted that each fatigue damage degree in this application corresponds to a simulation stage.

[0047] In specific implementation, to determine the life degradation amount of the insulated gate bipolar transistor at different simulation stages according to the fitting curve of the fatigue damage degree and the electrothermal coupling relationship between the electrical performance and the junction temperature in the insulated gate bipolar transistor, the following method can be adopted, that is: select a simulation stage as the selected simulation stage, subtract the fatigue damage degree fitting value corresponding to the selected simulation stage on the fitting curve from the fatigue damage degree corresponding to the selected simulation stage, then multiply the obtained subtracted value by the electrothermal coupling relationship between the electrical performance and the junction temperature in the insulated gate bipolar transistor, and use the obtained multiplied value as the life degradation amount of the insulated gate bipolar transistor at the selected simulation stage. Continue to determine the life degradation amount of the insulated gate bipolar transistor at the remaining simulation stages. In other embodiments, other methods can also be used to implement this, which will not be elaborated here.

[0048] It should be noted that the life degradation amount described in this application represents the decay parameter of the operating life of the insulated gate bipolar transistor simulated under the influence of thermal effects at the simulation stage.

[0049] In step 105, based on the life degradation amount of the insulated gate bipolar transistor at different simulation stages, the operating life of the insulated gate bipolar transistor is dynamically simulated.

[0050] In some embodiments, with reference to Figure 3 As shown, this figure is a schematic flowchart of implementing dynamic simulation in some embodiments of this application. In this embodiment, to dynamically simulate the operating life of the insulated gate bipolar transistor based on the life degradation amount of the insulated gate bipolar transistor at different simulation stages, the following steps can be adopted: First, in step 1051, set the initial simulation state of the life of the insulated gate bipolar transistor; Secondly, in step 1052, based on the initial simulation state of the life of the insulated gate bipolar transistor and the life degradation amount of the insulated gate bipolar transistor at each simulation stage, simulate the operating life of the insulated gate bipolar transistor to obtain the remaining life of the insulated gate bipolar transistor at each simulation stage; Then, in step 1053, determine the life decay curve of the insulated gate bipolar transistor through the remaining life of the insulated gate bipolar transistor at all simulation stages.

[0051] It should be noted that the initial simulation state described in this application includes initial electrical parameters (such as conduction voltage, conduction loss, reverse recovery time), initial thermal parameters (such as junction temperature, thermal resistance, thermal current), initial working environment (such as ambient temperature, operating load current, switching frequency), etc.

[0052] In specific implementation, first, set the initial simulation state of the insulated gate bipolar transistor (IGBT) life in the simulation toolbox of MATLAB (such as Simulink), and then set the life degradation amount of the IGBT in each simulation stage. Then, simulate the operating life of the IGBT. After the simulation is completed, obtain the remaining life of the IGBT in each simulation stage. Second, use the plotting function of MATLAB to plot the curve of the remaining life of the IGBT in each simulation stage, and use the obtained curve as the life degradation curve of the IGBT. In other embodiments, other methods can also be used to achieve this, which will not be elaborated here.

[0053] It should be noted that the life degradation curve described in this application represents the curve of the remaining life of the IGBT declining with time.

[0054] In addition, on the other hand of this application, in some embodiments, this application provides a dynamic life modeling system for insulated gate bipolar transistor power devices. Refer to Figure 4 , this figure is a schematic structural diagram of the dynamic life modeling system for insulated gate bipolar transistor power devices according to some embodiments of this application. The dynamic life modeling system 400 for insulated gate bipolar transistor power devices includes: an acquisition module 401, a processing module 402, and an execution module 403, which are described as follows: Acquisition module 401, in this application, the acquisition module 401 is mainly used to acquire the electrical parameters of the insulated gate bipolar transistor under different load currents; Processing module 402, in this application, the processing module 402 is used to extract the electrothermal coupling relationship between the electrical performance and the junction temperature inside the insulated gate bipolar transistor from all the electrical parameters; It should be noted that the processing module 402 in this application is also used to determine the fatigue damage degree of the insulated gate bipolar transistor in different simulation stages according to the junction temperature fluctuation of the insulated gate bipolar transistor under different load currents and the correlation characteristics of thermal fatigue between different junction regions inside the insulated gate bipolar transistor; In addition, the processing module 402 in this application is also used to determine the life degradation amount of the insulated gate bipolar transistor in different simulation stages through the fatigue damage degree of the insulated gate bipolar transistor in different simulation stages and the electrothermal coupling relationship between the electrical performance and the junction temperature inside the insulated gate bipolar transistor; Execution module 403, in this application, the execution module 403 is mainly used to dynamically simulate the operating life of the insulated gate bipolar transistor based on the life degradation amount of the insulated gate bipolar transistor in different simulation stages.

[0055] In addition, the present application also provides a computer device, which includes a memory and a processor. The memory stores code, and the processor is configured to obtain the code and execute the above-mentioned method for dynamically modeling the life of an insulated gate bipolar transistor power device.

[0056] In some embodiments, referring to Figure 5 , this figure is a schematic structural diagram of a computer device for implementing the method for dynamically modeling the life of an insulated gate bipolar transistor power device according to some embodiments of the present application. The method for dynamically modeling the life of an insulated gate bipolar transistor power device in the above embodiments can be implemented by Figure 5 the computer device shown. The computer device 500 includes at least one processor 501, a communication bus 502, a memory 503, and at least one communication interface 504.

[0057] The processor 501 can be a general-purpose central processing unit (CPU), or an application-specific integrated circuit (ASIC), or one or more for controlling the execution of the method for dynamically modeling the life of an insulated gate bipolar transistor power device in the present application.

[0058] The communication bus 502 can be used to transfer information between the above components.

[0059] The memory 503 can be a read-only memory (ROM) or other types of static storage devices that can store static information and instructions, a random access memory (RAM), or other types of dynamic storage devices that can store information and instructions. It can also be an electrically erasable programmable read-only memory (EEPROM), a compact disc read-only memory (CD-ROM), or other optical disc storage (including compressed optical discs, laser discs, optical discs, digital versatile discs, Blu-ray discs, etc.), a magnetic disk, or other magnetic storage devices, or any other medium that can be used to carry or store the desired program code in the form of instructions or data structures and can be accessed by a computer, but is not limited thereto. The memory 503 can exist independently and be connected to the processor 501 through the communication bus 502. The memory 503 can also be integrated with the processor 501.

[0060] Among them, the memory 503 is used to store the program code for executing the solution of this application, and is controlled and executed by the processor 501. The processor 501 is used to execute the program code stored in the memory 503. The program code may include one or more software modules. The methods described in the above method embodiments can be implemented by one or more software modules in the processor 501 and the program code in the memory 503.

[0061] The communication interface 504 uses any device such as a transceiver to communicate with other devices or communication networks, such as Ethernet, radio access network (RAN), wireless local area networks (WLAN), etc.

[0062] In a specific implementation, as an embodiment, the computer device may include multiple processors, and each of these processors may be a single-core (single-CPU) processor or a multi-core (multi-CPU) processor. The processor here may refer to one or more devices, circuits, and / or processing cores for processing data (such as computer program instructions).

[0063] The above computer device may be a general-purpose computer device or a special-purpose computer device. In a specific implementation, the computer device may be a desktop computer, a laptop computer, a network server, a personal digital assistant (PDA), a mobile phone, a tablet computer, a wireless terminal device, a communication device, or an embedded device. The embodiments of this application do not limit the type of the computer device.

[0064] In addition, this application also provides a computer-readable storage medium, which stores a computer program, and when the computer program is executed by a processor, it implements the above-mentioned method for dynamically modeling the life of an insulated gate bipolar transistor power device.

[0065] Although the preferred embodiments of this application have been described, those skilled in the art can make additional changes and modifications to these embodiments once they learn the basic creative concept. Therefore, the appended claims are intended to be construed as including the preferred embodiments and all changes and modifications falling within the scope of this application.

[0066] Obviously, those skilled in the art can make various changes and modifications to this application without departing from the spirit and scope of this application. Thus, if these modifications and variations of this application fall within the scope of the claims of this application and their equivalent technologies, this application is also intended to include these changes and modifications.

Claims

1. A dynamic modeling method for the lifespan of an insulated gate bipolar transistor power device, characterized in that It includes the following steps: Obtain the electrical parameters of the insulated gate bipolar transistor under different load currents; Extract the electrothermal coupling relationship between the electrical performance and the junction temperature inside the insulated gate bipolar transistor from all the electrical parameters; Determine the fatigue damage degree of the insulated gate bipolar transistor in different simulation stages according to the correlation characteristics between the junction temperature fluctuation of the insulated gate bipolar transistor under different load currents and the thermal fatigue between different junction regions inside the insulated gate bipolar transistor; Determine the life degradation amount of the insulated gate bipolar transistor in different simulation stages through the fatigue damage degree of the insulated gate bipolar transistor in different simulation stages and the electrothermal coupling relationship between the electrical performance and the junction temperature inside the insulated gate bipolar transistor; Dynamically simulate the operating life of the insulated gate bipolar transistor based on the life degradation amount of the insulated gate bipolar transistor in different simulation stages.

2. The method according to claim 1, characterized in that, Specifically, extracting the electrothermal coupling relationship between the electrical performance and the junction temperature inside the insulated gate bipolar transistor from all the electrical parameters includes: Obtain the junction temperature data of each semiconductor node inside the insulated gate bipolar transistor under different load currents; Conduct a dependency analysis on all the electrical parameters and all the junction temperature data to obtain the dependency relationship between the electrical performance and the junction temperature inside the insulated gate bipolar transistor; Determine the thermal feedback of the electrical performance inside the insulated gate bipolar transistor through all the electrical parameters; Determine the electrothermal coupling relationship between the electrical performance and the junction temperature inside the insulated gate bipolar transistor according to the thermal feedback of the electrical performance inside the insulated gate bipolar transistor and the dependency relationship.

3. The method according to claim 1, wherein Specifically, determining the fatigue damage degree of the insulated gate bipolar transistor in different simulation stages according to the correlation characteristics between the junction temperature fluctuation of the insulated gate bipolar transistor under different load currents and the thermal fatigue between different junction regions inside the insulated gate bipolar transistor includes: Segment the electrical parameters of the insulated gate bipolar transistor under different load currents by time to obtain the electrical data segments of the insulated gate bipolar transistor in different time periods; Determine the cumulative damage amount of the thermal fatigue of the insulated gate bipolar transistor in different simulation stages through the electrical data segments of the insulated gate bipolar transistor in different time periods and the correlation characteristics between the thermal fatigue between different junction regions inside the insulated gate bipolar transistor; Obtain the junction temperature data of each semiconductor node inside the insulated gate bipolar transistor under different load currents, and further determine the junction temperature fluctuation of the insulated gate bipolar transistor under different load currents; Determine the fatigue damage degree of the insulated gate bipolar transistor in different simulation stages according to the cumulative damage amount of the thermal fatigue of the insulated gate bipolar transistor in different simulation stages and the junction temperature fluctuation of the insulated gate bipolar transistor under different load currents.

4. The method according to claim 1, wherein Specifically, determining the life degradation amount of the insulated gate bipolar transistor in different simulation stages through the fatigue damage degree of the insulated gate bipolar transistor in different simulation stages and the electrothermal coupling relationship between the electrical performance and the junction temperature inside the insulated gate bipolar transistor includes: Conduct a linear fitting on the fatigue damage degree of the insulated gate bipolar transistor in different simulation stages to obtain the fitting curve of the fatigue damage degree; Determine the life degradation amount of the insulated gate bipolar transistor at different simulation stages according to the fitting curve of the fatigue damage degree and the electro-thermal coupling relationship between the electrical performance and the junction temperature in the insulated gate bipolar transistor.

5. The method according to claim 1, characterized in that, Dynamically simulating the operating life of the insulated gate bipolar transistor based on the life degradation amount of the insulated gate bipolar transistor at different simulation stages specifically includes: Set the initial simulation state of the life of the insulated gate bipolar transistor; Simulate the operating life of the insulated gate bipolar transistor according to the initial simulation state of the life of the insulated gate bipolar transistor and the life degradation amount of the insulated gate bipolar transistor at each simulation stage, and obtain the remaining life of the insulated gate bipolar transistor at each simulation stage; Determine the life decay curve of the insulated gate bipolar transistor through the remaining life of the insulated gate bipolar transistor in all simulation stages.

6. The method according to claim 1, wherein The types of the load current include constant load current, pulse load current, dynamic load current, and overload current.

7. The method according to claim 1, characterized in that, The different junction regions in the insulated gate bipolar transistor include a drift region, an emitter region, a collector region, and a parasitic diode.

8. An insulated gate bipolar transistor power device lifetime dynamic modeling system, characterized in that, Include: An acquisition module, configured to acquire the electrical parameters of the insulated gate bipolar transistor under different load currents; A processing module, configured to extract the electro-thermal coupling relationship between the electrical performance and the junction temperature in the insulated gate bipolar transistor from all electrical parameters; The processing module is further configured to determine the fatigue damage degree of the insulated gate bipolar transistor in different simulation stages according to the junction temperature fluctuation of the insulated gate bipolar transistor under different load currents and the correlation characteristics of thermal fatigue between different junction regions in the insulated gate bipolar transistor; The processing module is further configured to determine the life degradation amount of the insulated gate bipolar transistor in different simulation stages through the fatigue damage degree of the insulated gate bipolar transistor in different simulation stages and the electro-thermal coupling relationship between the electrical performance and the junction temperature in the insulated gate bipolar transistor; An execution module, configured to dynamically simulate the operating life of the insulated gate bipolar transistor based on the life degradation amount of the insulated gate bipolar transistor at different simulation stages.

9. A computer device, comprising a memory and a processor, the memory storing a computer program, characterized in that, When the processor executes the computer program, it implements the method for dynamically modeling the life of the insulated gate bipolar transistor power device according to any one of claims 1 to 7.

10. A computer-readable storage medium storing a computer program, characterized in that, When the computer program is executed by the processor, it implements the method for dynamically modeling the life of the insulated gate bipolar transistor power device according to any one of claims 1 to 7.

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