A detection method and system for smart chips in circuit boards

Abstract

The present invention relates to the field of smart chip detection technology, and specifically to a detection method and system for smart chips in circuit boards. The present invention obtains smart chip image data and reference target image data, obtains a positioning target, amplifies the two image data to make them consistent, performs positioning and establishes a two-dimensional coordinate system, and divides the two images according to functional areas; obtains the coordinates of a target to be detected and the coordinates of a reference target; locates a first detection target and a first reference target according to the coordinates, and detects a first detection result according to an image recognition algorithm; locates a second detection target and a second reference target according to the coordinates, and determines a second detection result according to a dynamic path algorithm; this method can accurately locate smaller detection targets, and can also detect corresponding chip internal circuit connections. The identified target coordinates can also reduce missed detections and false detections, thereby improving the accuracy of smart chip detection.

Description

Technical Field

[0001] The present invention relates to the technical field of smart chip detection, and in particular to a detection method and system for a smart chip in a circuit board. Background Art

[0002] As one of the core components of current smart integrated circuits, the quality of smart chips determines whether the entire smart integrated circuit can operate normally and accurately. Most existing technologies lack effective image recognition and coordinate system construction mechanisms, making it difficult to accurately spatially map smart chip images. As a result, the subsequent detection process cannot achieve refined regional analysis and identification position matching, which reduces the accuracy of smart chip quality detection.

[0003] To this end, a method and system for detecting smart chips in circuit boards are proposed. Summary of the Invention

[0004] The purpose of the present invention is to provide a detection method and system for smart chips in circuit boards, which obtains smart chip image data and reference target image data, obtains a positioning target, amplifies the two image data to make them consistent, performs positioning and establishes a two-dimensional coordinate system, and divides the two images according to functional areas; obtains the coordinates of the target to be detected and the coordinates of the reference target; locates the first detection target and the first reference target according to the coordinates, and detects the first detection result according to the image recognition algorithm; locates the second detection target and the second reference target according to the coordinates, and determines the second detection result according to the dynamic path algorithm; this method can accurately locate smaller detection targets, and can also detect the corresponding chip internal circuit connections. The identified target coordinates can also reduce missed detections and false detections, thereby improving the accuracy of smart chip detection.

[0005] To achieve the above object, the present invention provides the following technical solutions:

[0006] A method for detecting a smart chip in a circuit board, comprising:

[0007] Acquiring smart chip image data and first reference target image data;

[0008] positioning the first reference target image data using the smart chip image data, establishing a two-dimensional coordinate system for the smart chip image data and the first reference target image data, and dividing the smart chip image data and the first reference target image data into a plurality of smart chip detection areas and a plurality of reference detection areas;

[0009] Acquire a first coordinate set and a second coordinate set of the smart chip detection area based on the two-dimensional coordinate system and the smart chip detection area; acquire a first reference coordinate set and a second reference coordinate set of the reference detection area based on the two-dimensional coordinate system and the reference detection area;

[0010] Calculating a first similarity between the first coordinate set and the first reference coordinate set, and obtaining a first detection target and a first reference target based on the first similarity; identifying and comparing the first detection target and the first reference target to generate a first detection result;

[0011] Acquire a second detection target through the second coordinate set, and acquire a second reference target through the second reference coordinate set; calculate a second similarity between the second detection target and the second reference target based on the second detection target and the second reference target, and generate a second detection result;

[0012] Whether the smart chip is qualified is determined based on the first test result and the second test result.

[0013] Preferably, locating the first reference target image data using the smart chip image data includes:

[0014] Obtaining type data and morphological data of a first positioning target of the smart chip image data according to a first image recognition algorithm; traversing the first reference target image data using the first image recognition algorithm to obtain a preselected reference target having the same type data;

[0015] The similarity of the preselected reference target is calculated based on the morphological data, and a second positioning target is obtained based on the maximum similarity; the smart chip image data and the first reference target image data are positioned through the first positioning target and the second positioning target.

[0016] Preferably, the number of the first positioning targets is not less than 3.

[0017] Preferably, obtaining the first coordinate set and the second coordinate set of the smart chip detection area based on the two-dimensional coordinate system and the smart chip detection area; obtaining the first reference coordinate set and the second reference coordinate set of the reference detection area based on the two-dimensional coordinate system and the reference detection area includes:

[0018] Identify a first target and a second target in the smart chip detection area or the reference detection area according to a second image recognition algorithm; the first target is a first target candidate frame, and the second target includes a second key point and a second key line; the second key line and the second key point are associated through an association label;

[0019] Acquire the coordinates of the center point of the first target candidate frame of the smart chip detection area according to the two-dimensional coordinate system, generate the first target coordinates of the smart chip detection area and acquire the first coordinate set;

[0020] Acquire the coordinates of the center point of the first target candidate frame of the reference detection area according to the two-dimensional coordinate system, generate the first target coordinates of the reference detection area and acquire the first reference coordinate set;

[0021] The second key point coordinates of the smart chip detection area are obtained according to the two-dimensional coordinate system, the second target coordinates of the smart chip detection area are generated and the second coordinate set is obtained; the second key point coordinates of the reference detection area are obtained according to the two-dimensional coordinate system, the second target coordinates of the reference detection area are generated and the second reference coordinate set is obtained.

[0022] Preferably, identifying and comparing the first detection target and the first reference target to generate a first detection result includes:

[0023] The first detection target and the first reference target are identified by a second image recognition algorithm; the ASCII codes of the recognition results of the second image recognition algorithm are compared, and the first detection result is generated based on the comparison results of the ASCII codes.

[0024] Preferably, calculating a second similarity between the second detection target and the second reference target and generating a second detection result according to the second detection target and the second reference target includes:

[0025] Acquire an associated second key line according to the second coordinate set to generate a second detection target;

[0026] Acquire an associated second key line according to the second reference coordinate set and the associated label, and generate a second reference target;

[0027] According to the dynamic path algorithm, the second detection target and the second reference target are mapped to a grid of size n*n to generate a detection grid; according to the dynamic path algorithm, the second reference target is mapped to a grid of size n*n to generate a reference grid; the similarity between the detection grid and the reference grid is calculated to generate the second detection result.

[0028] A detection system for a smart chip in a circuit board, comprising:

[0029] A data acquisition module, which acquires the smart chip image data and the first reference target image data;

[0030] a detection area and reference area determination module, which locates the first reference target image data using the smart chip image data, establishes a two-dimensional coordinate system for the smart chip image data and the first reference target image data, and divides the smart chip image data and the first reference target image data into a plurality of smart chip detection areas and a plurality of reference detection areas;

[0031] a coordinate generation module, which obtains a first coordinate set and a second coordinate set of the smart chip detection area based on the two-dimensional coordinate system and the smart chip detection area; and obtains a first reference coordinate set and a second reference coordinate set of the reference detection area based on the two-dimensional coordinate system and the reference detection area;

[0032] a first detection module, calculating a first similarity between the first coordinate set and the first reference coordinate set, obtaining a first detection target and a first reference target based on the first similarity; identifying and comparing the first detection target and the first reference target to generate a first detection result;

[0033] a second detection module, acquiring a second detection target through the second coordinate set and a second reference target through the second reference coordinate set; calculating a second similarity between the second detection target and the second reference target based on the second detection target and the second reference target, and generating a second detection result;

[0034] The detection and judgment module determines whether the smart chip is qualified according to the first detection result and the second detection result.

[0035] Preferably, the detection area and reference area determination module, wherein the smart chip image data locates the first reference target image data, includes:

[0036] Obtaining type data and morphological data of a first positioning target of the smart chip image data according to a first image recognition algorithm; traversing the first reference target image data using the first image recognition algorithm to obtain a preselected reference target having the same type data;

[0037] The similarity of the preselected reference target is calculated based on the morphological data, and a second positioning target is obtained based on the maximum similarity; the smart chip image data and the first reference target image data are positioned through the first positioning target and the second positioning target.

[0038] Preferably, the number of the first positioning targets is not less than 3.

[0039] Preferably, the second detection module calculates a second similarity between the second detection target and the second reference target based on the second detection target and generates a second detection result, including:

[0040] Acquire an associated second key line according to the second coordinate set to generate a second detection target;

[0041] Acquire an associated second key line according to the second reference coordinate set and the associated label, and generate a second reference target;

[0042] According to the dynamic path algorithm, the second detection target and the second reference target are mapped to a grid of size n*n to generate a detection grid; according to the dynamic path algorithm, the second reference target is mapped to a grid of size n*n to generate a reference grid; the similarity between the detection grid and the reference grid is calculated to generate the second detection result.

[0043] Compared with the prior art, the present invention has the following beneficial effects:

[0044] 1. The present invention automatically identifies and determines the same type of positioning targets of the smart chip and the reference target through an image recognition algorithm, calculates the morphological data similarity of the identified positioning targets, and further determines the positioning targets with the maximum similarity. This method can unify the position and size of the smart chip and the reference target, facilitates the subsequent generation of a coordinate system to generate corresponding coordinates for positioning and identifying the target to be detected, facilitates subsequent detection work, and improves the accuracy of quality detection.

[0045] 2. The present invention generates a coordinate system for the positioned smart chip and the reference target, and generates corresponding coordinates for the identification of the parts to be detected identified by the image recognition algorithm. This method can accurately locate the position when the smart chip detects a large number of targets. At the same time, the coordinates based on the dual recognition of the targets can avoid missing the identification of the parts to be detected, thereby improving the accuracy of quality inspection.

[0046] 3. The present invention identifies the key points and key lines of the connection lines on the smart chip, and can locate a large number of connection lines through the key points. At the same time, based on labels and area divisions, it can further determine the position of the internal circuit connection of the smart chip to be detected and correspond to the circuit to be detected of the reference target, so as to improve the accuracy of detection and avoid false detection and missed detection; based on the dynamic path algorithm, it can detect the internal circuit connection of the chip, and at the same time determine whether the internal circuit connection of the chip has position offset, open circuit, etc., further improving the quality detection accuracy of the internal circuit connection of the smart chip. BRIEF DESCRIPTION OF THE DRAWINGS

[0047] Figure 1 Schematic diagram of the method flow of the present invention;

[0048] Figure 2 A schematic diagram of a process for generating associated labels for a second key point and a second key line of the present invention;

[0049] Figure 3 A schematic diagram of a reference grid after the dynamic path algorithm of the present invention calculates the second reference target;

[0050] Figure 4 Schematic diagram of the system flow of the present invention. DETAILED DESCRIPTION

[0051] The following will clearly and completely describe the technical solutions in the embodiments of the present invention in conjunction with the accompanying drawings. Obviously, the described embodiments are only part of the embodiments of the present invention, not all of the embodiments. Based on the embodiments of the present invention, all other embodiments obtained by ordinary technicians in this field without making creative efforts are within the scope of protection of the present invention.

[0052] Example 1

[0053] In order to improve the quality detection accuracy of smart chip A, a detection method for smart chips in circuit boards was applied; Figure 1 Shown, including:

[0054] Acquire smart chip image data and first reference target image data; the smart chip image data is acquired by a high-resolution industrial camera; the first reference target image data is a standard smart chip image;

[0055] The smart chip image data locates the first reference target image data; further, the smart chip image data locates the first reference target image data including:

[0056] Obtaining type data and morphological data of a first positioning target of the smart chip image data according to a first image recognition algorithm; traversing the first reference target image data using the first image recognition algorithm to obtain a preselected reference target with the same type data; the first image recognition algorithm is a Yolov5 algorithm;

[0057] Since smart chips are typically approximately rectangular, to accurately determine their location, we draw on the principle of triangulation and select at least three positioning targets for positioning. The selection of positioning targets and their number requires a comprehensive consideration of expert experience and the actual conditions of the smart chip. The types and data of the positioning targets must be unique. This configuration facilitates more precise positioning, reduces errors in the image recognition algorithm, improves positioning accuracy, and ultimately ensures the accuracy of subsequent detection. Furthermore, the number of the first positioning targets should be no less than three.

[0058] The similarity of the preselected reference target is calculated based on the morphological data, and a second positioning target is obtained based on the maximum similarity; the smart chip image data and the first reference target image data are positioned through the first positioning target and the second positioning target.

[0059] Acquire a first coordinate set and a second coordinate set of the smart chip detection area according to the two-dimensional coordinate system and the smart chip detection area;

[0060] Establishing a two-dimensional coordinate system for the smart chip image data and the first reference target image data, and dividing the smart chip image data and the first reference target image data into a plurality of smart chip detection areas and a plurality of reference detection areas;

[0061] The smart chip detection area and reference detection area are divided into multiple zones based on the internal structure of the smart chip. This reduces the computational complexity during identification and detection, improving detection accuracy. The specific division method can be based on the physical structure of the smart chip or the chip's functional modules. The specific solution should be determined based on the actual situation of the smart chip and expert experience.

[0062] Further, a first coordinate set and a second coordinate set of the smart chip detection area are obtained based on the two-dimensional coordinate system and the smart chip detection area; a first reference coordinate set and a second reference coordinate set of the reference detection area are obtained based on the two-dimensional coordinate system and the reference detection area;

[0063] Furthermore, acquiring a first reference coordinate set and a second reference coordinate set of the reference detection area according to the two-dimensional coordinate system and the reference detection area includes:

[0064] Identify a first target and a second target in the smart chip detection area or the reference detection area according to a second image recognition algorithm; the first target is a first target candidate frame, and the second target includes a second key point and a second key line; the second key line and the second key point are associated through an association label;

[0065] The second image recognition algorithm includes the Yolov5 algorithm and the DeepLSD algorithm. The Yolov5 algorithm is used to acquire the first target and generate a first target candidate frame after identifying the first target. The first target here is a specific identifier on the smart chip, such as the chip model identifier or functional module identifier. The DeepLSD algorithm is used to acquire the second key points and second key lines on the second target. The second target is the circuit connection within the smart chip. The second key points are the starting and ending points of the circuit connection, and the second key lines are the circuit connection within the chip.

[0066] Further, refer to Figure 2 As shown, the process of generating the associated labels of the second key line and the second key point is as follows: the second target is recognized twice according to the Yolov5 algorithm, and the recognition result is two points and a line connecting the two points. A candidate box is generated based on the recognition result of the Yolov5 algorithm and the corresponding candidate box label is generated; the Yolov5 algorithm is used to perform three-time recognition on the points and lines in the candidate box, and the corresponding starting point label, ending point label and line label are generated for the starting point, ending point and line according to the candidate box label;

[0067] Acquire the coordinates of the center point of the first target candidate frame of the smart chip detection area according to the two-dimensional coordinate system, generate the first target coordinates of the smart chip detection area, and acquire the first coordinate set; acquire the coordinates of the center point of the first target candidate frame of the reference detection area according to the two-dimensional coordinate system, generate the first target coordinates of the reference detection area, and acquire the first reference coordinate set;

[0068] The second key point coordinates of the smart chip detection area are obtained based on the two-dimensional coordinate system, and the second target coordinates of the smart chip detection area are generated and a second coordinate set is obtained. The second key point coordinates of the reference detection area are obtained based on the two-dimensional coordinate system, and the second target coordinates of the reference detection area are generated and a second reference coordinate set is obtained. The image recognition algorithm identifies the features or identification of each component of the smart chip in the first target area, including the position features of the uninstalled components and the identification features of the installed components.

[0069] By constructing a coordinate system for the located smart chip to be detected and the reference target, and using image recognition algorithms to identify the target and reference target, corresponding data is generated. This method can accurately determine the position of the target to be detected and effectively avoid false detections. At the same time, the coordinate data can be used as a basis during the detection process to prevent omissions when identifying the smart chip to be detected. It can also provide corresponding position and corresponding quantity information to avoid missed detections, thereby improving the accuracy of detection.

[0070] Calculating a first similarity between the first coordinate set and the first reference coordinate set, the first similarity being obtained by calculating a Pearson coefficient; obtaining a first detection target and a first reference target based on the first similarity; identifying and comparing the first detection target and the first reference target to generate a first detection result;

[0071] Furthermore, the second image recognition algorithm is used to identify the first detection target and the first reference target. Among them, the first detection target and the first reference target cover various types of identification on the smart chip, such as chip model identification, functional area identification, etc. These identifications are presented in the form of numbers, letters or specific symbols, and will be converted into ASCII codes after identification. A detailed comparison is performed based on the ASCII codes corresponding to the recognition results of the second image recognition algorithm. Because the ASCII code not only contains the numbers or letters in the identification, but also includes the functional module number or component number associated with the corresponding feature. With the help of the two-dimensional coordinate system constructed previously, it is possible to accurately locate the numerous detection targets on the smart chip. Through these clear and unique identifications, it is possible to accurately determine whether there are identification errors or unclear identifications on the chip, as well as whether components are misinstalled or missing during the chip manufacturing process. The coordinated operation of computers and image recognition algorithms can significantly improve detection efficiency and effectively avoid the problem of low efficiency caused by massive detection tasks, which in turn affects the detection accuracy, thereby further improving the accuracy of smart chip detection and ensuring high-quality chip production;

[0072] The first detection target obtains a second detection target through the second coordinate set, and obtains a second reference target through the second reference coordinate set; based on the second detection target and the second reference target; calculates a second similarity between the second detection target and the second reference target, wherein the second similarity is obtained by calculating the Pearson coefficient; and generates a second detection result;

[0073] Further, obtaining an associated second key line according to the second coordinate set to generate a second detection target;

[0074] Acquire an associated second key line according to the second reference coordinate set and the associated label, and generate a second reference target;

[0075] According to the dynamic path algorithm, the second detection target and the second reference target are mapped to a grid of size n*n to generate a detection grid; according to the dynamic path algorithm, the second reference target is mapped to a grid of size n*n to generate a reference grid, the number of the second reference targets is 2, and the reference grid reference is 1. Figure 3 As shown, Figure 3 A1 is the second reference target, that is, the line in the reference detection area. Figure 3 The middle grid is the reference grid calculated by the dynamic path algorithm; the similarity between the detection grid and the reference grid is calculated to generate the second detection result; the dynamic path algorithm is the Dijkstra algorithm;

[0076] This embodiment locates the internal circuit connection position on the smart chip through the positioning coordinates to avoid false detection and missed detection. At the same time, regional division can further reduce the position, reduce false detection and missed detection, and use the grid of the dynamic path algorithm to detect problems such as position offset or disconnection of the chip's internal circuit connection. At the same time, based on the coordinates identified by the chip's internal circuit connection, it can further determine whether the false detection is caused by dust in the case of a disconnection, thereby improving the detection accuracy of the chip's internal circuit connection.

[0077] Determine whether the smart chip is qualified based on the first test result and the second test result; specifically: if both the first test result and the second test result are qualified, determine that the smart chip is qualified; otherwise, determine that the smart chip is unqualified.

[0078] Example 2

[0079] In order to improve the quality detection accuracy of B smart chip, a detection system for smart chip in circuit board was applied; Figure 4 Shown, including:

[0080] A data acquisition module, which acquires the smart chip image data and the first reference target image data;

[0081] a detection area and reference area determination module, which locates the first reference target image data using the smart chip image data, establishes a two-dimensional coordinate system for the smart chip image data and the first reference target image data, and divides the smart chip image data and the first reference target image data into a plurality of smart chip detection areas and a plurality of reference detection areas;

[0082] Furthermore, the detection area and reference area determination module, wherein the smart chip image data locates the first reference target image data, includes:

[0083] Obtaining type data and morphological data of a first positioning target of the smart chip image data according to a first image recognition algorithm; traversing the first reference target image data using the first image recognition algorithm to obtain a preselected reference target having the same type data;

[0084] The similarity of the preselected reference target is calculated based on the morphological data, and a second positioning target is obtained based on the maximum similarity; the smart chip image data and the first reference target image data are positioned through the first positioning target and the second positioning target.

[0085] Furthermore, the number of the first positioning targets is not less than 3.

[0086] a coordinate generation module, which obtains a first coordinate set and a second coordinate set of the smart chip detection area based on the two-dimensional coordinate system and the smart chip detection area; and obtains a first reference coordinate set and a second reference coordinate set of the reference detection area based on the two-dimensional coordinate system and the reference detection area;

[0087] a first detection module, calculating a first similarity between the first coordinate set and the first reference coordinate set, obtaining a first detection target and a first reference target based on the first similarity; identifying and comparing the first detection target and the first reference target to generate a first detection result;

[0088] a second detection module, acquiring a second detection target through the second coordinate set and a second reference target through the second reference coordinate set; calculating a second similarity between the second detection target and the second reference target based on the second detection target and the second reference target, and generating a second detection result;

[0089] Furthermore, the second detection module calculates a second similarity between the second detection target and the second reference target based on the second detection target and generates a second detection result, including:

[0090] Acquire an associated second key line according to the second coordinate set to generate a second detection target;

[0091] Acquire an associated second key line according to the second reference coordinate set and the associated label, and generate a second reference target;

[0092] According to the dynamic path algorithm, the second detection target and the second reference target are mapped to a grid of size n*n to generate a detection grid; according to the dynamic path algorithm, the second reference target is mapped to a grid of size n*n to generate a reference grid; the similarity between the detection grid and the reference grid is calculated to generate the second detection result.

[0093] The detection and judgment module determines whether the smart chip is qualified according to the first detection result and the second detection result; specifically: if both the first detection result and the second detection result are qualified, it is judged to be qualified; otherwise, it is judged to be unqualified.

[0094] While embodiments of the present invention have been shown and described, it will be appreciated by those skilled in the art that various changes, modifications, substitutions, and variations may be made to these embodiments without departing from the principles and spirit of the invention, and that the scope of the invention is defined by the appended claims and their equivalents.

Claims

1. A method for detecting smart chips in circuit boards, characterized in that: include: Acquiring smart chip image data and first reference target image data; Locating the first reference target image data using the type data and morphological data of the first positioning target in the smart chip image data according to a first image recognition algorithm, and obtaining a preselected reference target with the same type data; calculating the similarity of the preselected reference target based on the morphological data, and obtaining a second positioning target based on the maximum similarity; establishing a two-dimensional coordinate system for the smart chip image data and the first reference target image data using the first positioning target and the second positioning target, and dividing the smart chip image data and the first reference target image data into a plurality of smart chip detection areas and a plurality of reference detection areas; Identify a first target and a second target in the smart chip detection area or the reference detection area according to a second image recognition algorithm; the first target is a first target candidate frame, and the second target includes a second key point and a second key line; the second key line and the second key point are associated through an association label; Acquire a first coordinate set and a second coordinate set of the smart chip detection area based on the two-dimensional coordinate system and the first target coordinates and the second target coordinates obtained by the center point coordinates of the first target candidate frame and the second key point coordinates in the smart chip detection area; acquire a first reference coordinate set and a second reference coordinate set of the reference detection area based on the two-dimensional coordinate system and the first target coordinates and the second target coordinates obtained by the center point coordinates of the first target candidate frame and the second key point coordinates in the reference detection area; Calculating a first similarity between the first coordinate set and the first reference coordinate set, and obtaining a first detection target and a first reference target based on the first similarity; identifying and comparing the first detection target and the first reference target to generate a first detection result; Acquire a second detection target through the second coordinate set, and acquire a second reference target through the second reference coordinate set; Based on the second detection target and the second reference target; Calculating a second similarity between the second detection target and the second reference target, and generating a second detection result; Whether the smart chip is qualified is determined based on the first test result and the second test result.

2. A method for detecting smart chips in circuit boards according to claim 1, characterized in that: The number of the first positioning targets is not less than 3.

3. A method for detecting smart chips in circuit boards according to claim 1, characterized in that: Identifying and comparing the first detection target and the first reference target to generate a first detection result includes: The first detection target and the first reference target are identified by a second image recognition algorithm; the ASCII codes of the recognition results of the second image recognition algorithm are compared, and the first detection result is generated based on the comparison results of the ASCII codes.

4. A method for detecting a smart chip in a circuit board according to claim 1, characterized in that: Based on the second detection target and the second reference target; Calculating a second similarity between the second detection target and the second reference target and generating a second detection result includes: Acquire an associated second key line according to the second coordinate set to generate a second detection target; Acquire an associated second key line according to the second reference coordinate set and the associated label, and generate a second reference target; According to the dynamic path algorithm, the second detection target and the second reference target are mapped to a grid of size n*n to generate a detection grid; according to the dynamic path algorithm, the second reference target is mapped to a grid of size n*n to generate a reference grid; the similarity between the detection grid and the reference grid is calculated to generate the second detection result.

5. A detection system for smart chips in circuit boards, characterized in that: include: A data acquisition module, which acquires the smart chip image data and the first reference target image data; a detection area and reference area determination module, which locates the first reference target image data using the type data and morphological data of the first positioning target in the smart chip image data according to a first image recognition algorithm, and obtains a preselected reference target with the same type data; calculates the similarity of the preselected reference target based on the morphological data, and obtains a second positioning target based on the maximum similarity; establishes a two-dimensional coordinate system for the smart chip image data and the first reference target image data using the first positioning target and the second positioning target, and divides the smart chip image data and the first reference target image data into a plurality of smart chip detection areas and a plurality of reference detection areas; a coordinate generation module, which identifies a first target and a second target in the smart chip detection area or the reference detection area according to a second image recognition algorithm; the first target is a first target candidate frame, and the second target includes a second key point and a second key line; the second key line and the second key point are associated through an association tag; Acquire a first coordinate set and a second coordinate set of the smart chip detection area based on the two-dimensional coordinate system and the first target coordinates and the second target coordinates obtained by the center point coordinates of the first target candidate frame and the second key point coordinates in the smart chip detection area; acquire a first reference coordinate set and a second reference coordinate set of the reference detection area based on the two-dimensional coordinate system and the first target coordinates and the second target coordinates obtained by the center point coordinates of the first target candidate frame and the second key point coordinates in the reference detection area; a first detection module, calculating a first similarity between the first coordinate set and the first reference coordinate set, and acquiring a first detection target and a first reference target based on the first similarity; Identifying and comparing the first detection target and a first reference target to generate a first detection result; A second detection module, acquiring a second detection target through the second coordinate set, acquiring a second reference target through the second reference coordinate set; based on the second detection target and the second reference target; Calculating a second similarity between the second detection target and the second reference target, and generating a second detection result; The detection and judgment module determines whether the smart chip is qualified according to the first detection result and the second detection result.

6. A detection system for smart chips in circuit boards according to claim 5, characterized in that: The detection area and reference area determination module, wherein the smart chip image data locates the first reference target image data, includes: Obtaining type data and morphological data of a first positioning target of the smart chip image data according to a first image recognition algorithm; traversing the first reference target image data using the first image recognition algorithm to obtain a preselected reference target having the same type data; The similarity of the preselected reference target is calculated based on the morphological data, and a second positioning target is obtained based on the maximum similarity; the smart chip image data and the first reference target image data are positioned through the first positioning target and the second positioning target.

7. A detection system for smart chips in circuit boards according to claim 6, characterized in that: The number of the first positioning targets is not less than 3.

8. A detection system for smart chips in circuit boards according to claim 5, characterized in that: The second detection module is based on the second detection target and the second reference target; Calculating a second similarity between the second detection target and the second reference target and generating a second detection result includes: Acquire an associated second key line according to the second coordinate set to generate a second detection target; Acquire an associated second key line according to the second reference coordinate set and the associated label, and generate a second reference target; According to the dynamic path algorithm, the second detection target and the second reference target are mapped to a grid of size n*n to generate a detection grid; according to the dynamic path algorithm, the second reference target is mapped to a grid of size n*n to generate a reference grid; the similarity between the detection grid and the reference grid is calculated to generate the second detection result.

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