Crystal oscillator and chip fan-out type packaging structure and process

Abstract

The embodiment of the invention relates to the technical field of semiconductor integrated circuits, and discloses a crystal oscillator and chip fan-out type packaging structure and process. The crystal oscillator and chip fan-out type packaging structure comprises a chip, a passivation layer, a plurality of shielding columns, a crystal oscillator, a packaging body and a communication assembly. According to the fan-out type packaging structure for the crystal oscillator and the chip provided by the embodiment of the invention, firstly, the space interconnection between the crystal oscillator and the bare chip is realized, and the occupied area of the chip and the crystal oscillator is reduced; and secondly, through the arrangement of the shielding columns, the metal isolation effect can be achieved, interference of other signals on work of the crystal oscillator is avoided, and the problem that the crystal oscillator shakes due to interference of the external environment is solved. The miniaturization of the crystal oscillator and the chip fan-out type packaging structure is realized, the anti-interference capability of the crystal oscillator is improved, and the cost is greatly reduced.

Description

Technical Field

[0001] The embodiments of the present application relate to the technical field of semiconductor integrated circuits, and in particular, to a crystal oscillator and chip fan-out package structure and process. Background Art

[0002] With the development trend of miniaturization and high reliability in the industrial society, applications represented by mobile phones and intelligent cockpits have increasingly precise requirements for clocks. As a reference source for providing clock frequencies, crystal oscillators are applied in more and more scenarios, which are becoming more and more complex. However, with the continuous improvement of people's living standards, a single crystal oscillator can no longer meet the requirements for high precision. Chip and crystal oscillator need to work together. In related technologies, most of them are that the crystal oscillator and the chip are soldered on the PCB, which greatly occupies the size area of the PCB. In some solutions, the crystal oscillator and the chip are packaged together, but the crystal oscillator is easily interfered and the accuracy is easily affected. Summary of the Invention

[0003] A series of simplified concepts are introduced in the Summary of the Invention section, which will be further detailed in the Detailed Description section. This part of the present invention does not mean to attempt to define the key features and essential technical features of the claimed technical solution, nor does it mean to attempt to determine the protection scope of the claimed technical solution.

[0004] The present invention aims to solve at least one of the technical problems existing in the prior art or related technologies.

[0005] To this end, the first aspect of the present invention provides a crystal oscillator and chip fan-out package structure.

[0006] The second aspect of the present invention provides a crystal oscillator and chip fan-out packaging process.

[0007] In view of this, according to the first aspect of the embodiments of the present application, a crystal oscillator and chip fan-out package structure is proposed, including: A chip; A passivation layer covering the chip; A plurality of shielding columns connected to the passivation layer, and the plurality of shielding columns enclose a shielding space; A crystal oscillator connected to the passivation layer and located within the shielding space; A package body, wherein the crystal oscillator and the chip are disposed within the package body; A communication component, part of the communication component is disposed within the package body, connected to the chip, and led out through the package body.

[0008] In a feasible implementation manner, the shielding column is made of a metal material; and / or The diameter of the shielding column is 8um to 15um.

[0009] In a feasible implementation manner, the surface of the chip where the crystal oscillator is disposed is the first surface, and the ratio of the area where the shielding column is connected to the first surface to the area of the first surface is greater than or equal to 25%.

[0010] The height of the shielding column is higher than the height of the crystal oscillator.

[0011] In a feasible implementation manner, the communication component includes: A first metal circuit layer, disposed on the passivation layer and connected to the pad of the chip; A first metal column, one end of the first metal column being connected to the first metal circuit layer; A second metal circuit layer, the second metal circuit layer being connected to the other end of the first metal column; A lead-out metal column, one end of the lead-out metal column being connected to the second metal circuit layer and the other end being led out to the surface of the package body; A metal solder ball, the metal solder ball being disposed on the package body and connected to the lead-out metal column.

[0012] In a feasible implementation manner, the communication component is further connected to the crystal oscillator, and the communication component further includes: A connecting metal column, one end of the connecting metal column being connected to the crystal oscillator and the other end being connected to the second metal circuit layer.

[0013] In a feasible implementation manner, the raw materials for preparing the package body include, by weight: 25 to 35 parts of a resin matrix, 8 to 12 parts of a curing agent, 50 to 60 parts of a filler, 1 to 2 parts of a silane coupling agent, and 0.3 to 0.6 parts of an additive; Among them, the material for preparing the filler includes silicon dioxide, and the mass of the silicon dioxide accounts for 80% to 90% of the total mass of the filler.

[0014] In a feasible implementation manner, the materials for preparing the filler include methylhexahydrobenzene, alumina, boron nitride, and silicon dioxide.

[0015] According to the second aspect of the embodiments of the present application, a crystal oscillator and chip fan-out packaging process is provided for preparing a crystal oscillator and chip fan-out packaging structure according to any of the above technical solutions. The crystal oscillator and chip fan-out packaging process includes: Providing a wafer and disposing a passivation layer on the wafer; Etching the passivation layer on the wafer to expose the pads of the wafer; Provide a first metal circuit layer connected to the pad and a first metal post connected to the first metal circuit layer; Provide a plurality of shielding posts on the passivation layer to enclose and form a shielding space; Bond the crystal oscillator to the passivation layer and place the crystal oscillator within the shielding space.

[0016] In a feasible implementation, the crystal oscillator and the wafer fan-out packaging process further include: Provide connecting metal posts on the crystal oscillator; Perform a first encapsulation on the wafer and the crystal oscillator to form a primary encapsulation body; Polish the primary encapsulation body to expose the connecting metal posts and the first metal posts; Form a second metal circuit layer on the primary encapsulation body; Provide lead-out metal posts on the second metal circuit layer; Perform a second encapsulation on the second metal circuit layer and the lead-out metal posts to form an encapsulation body; Provide metal solder balls connected to the lead-out metal posts on the encapsulation body.

[0017] In a feasible implementation, the crystal oscillator and the wafer fan-out packaging process further include: Perform dicing on the packaged wafer to obtain a plurality of chip devices; Tape the plurality of chip devices.

[0018] Compared with the prior art, the present invention at least includes the following beneficial effects: The crystal oscillator and chip fan-out packaging structure provided by the embodiments of the present application includes a chip, a passivation layer, a plurality of shielding posts, a crystal oscillator, an encapsulation body, and a communication component. Based on this, during the preparation process of the crystal oscillator and chip fan-out packaging structure, a passivation layer can be first provided on the wafer, and then a communication component connected to the wafer can be constructed. A plurality of shielding posts are provided on the passivation layer to form a shielding area. Then, the crystal oscillator is connected to the passivation layer, and at the same time, the crystal oscillator is located within the shielding area. Finally, the wafer is diced to obtain the chip fan-out packaging structure. For the crystal oscillator and chip fan-out packaging structure provided by the embodiments of the present application, on the one hand, the spatial interconnection between the crystal oscillator and the bare chip is realized, reducing the occupied area of the chip and the crystal oscillator; on the other hand, through the setting of the shielding posts, the role of metal isolation can be played, avoiding interference from other signals to the operation of the crystal oscillator, and solving the problem of jitter caused by external environmental interference to the crystal oscillator. While realizing the miniaturization of the crystal oscillator and chip fan-out packaging structure, the anti-interference ability of the crystal oscillator is improved, and the cost is greatly reduced.

[0019] The above description is only an overview of the technical solution of the present invention. In order to understand the technical means of the present invention more clearly, it can be implemented according to the content of the specification. And in order to make the above and other objects, features and advantages of the present invention more obvious and understandable, the specific embodiments of the present invention are hereinafter specifically exemplified. Description of the Drawings

[0020] By reading the following detailed description of the preferred embodiments, various other advantages and benefits will become clear to those of ordinary skill in the art. The drawings are only for the purpose of showing the preferred embodiments and are not considered to be a limitation of the present application. Moreover, throughout the drawings, the same reference numerals are used to represent the same components. In the drawings: Figure 1 FIG. is a schematic structural diagram of a crystal oscillator and chip fan-out package structure according to an embodiment provided by the present application; Figure 2 FIG. is a schematic structural diagram of a step in the preparation process of a crystal oscillator and chip fan-out package structure according to an embodiment provided by the present application; Figure 3 FIG. is a schematic structural diagram of another step in the preparation process of a crystal oscillator and chip fan-out package structure according to an embodiment provided by the present application; Figure 4 FIG. is a schematic structural diagram of yet another step in the preparation process of a crystal oscillator and chip fan-out package structure according to an embodiment provided by the present application; Figure 5 FIG. is a schematic structural diagram of still another step in the preparation process of a crystal oscillator and chip fan-out package structure according to an embodiment provided by the present application; Figure 6 FIG. is a schematic structural diagram from another angle of still another step in the preparation process of a crystal oscillator and chip fan-out package structure according to an embodiment provided by the present application; Figure 7 FIG. is a schematic step flow chart of a crystal oscillator and chip fan-out package process according to an embodiment provided by the present application.

[0021] Wherein, Figures 1 to 6 The corresponding relationship between the reference numerals in the drawings and the component names is as follows: 110 Chip, 120 Passivation layer, 130 Shielding column, 140 Crystal oscillator, 150 Package body, 160 Communication component; 111 Pad, 161 First metal circuit layer, 162 First metal column, 163 Second metal circuit layer, 164 Lead-out metal column, 165 Metal solder ball, 166 Connecting metal column, 167 Third metal circuit layer. Detailed Embodiments

[0022] In the following description, numerous specific details are given to provide a more thorough understanding of the technical solutions provided by the present invention. However, it will be apparent to those skilled in the art that the technical solutions provided by the present invention can be implemented without one or more of these details.

[0023] It should be noted that the terms used herein are only for describing specific embodiments and are not intended to limit the exemplary embodiments according to the present invention. As used herein, unless the context clearly indicates otherwise, the singular forms are also intended to include the plural forms. In addition, it should be understood that when the terms "comprising" and / or "including" are used in this specification, they specify the presence of the described features, wholes, steps, operations, elements, and / or components, but do not exclude the presence or addition of one or more other features, wholes, steps, operations, elements, components, and / or combinations thereof.

[0024] Now, exemplary embodiments according to the present invention will be described in more detail with reference to the accompanying drawings. However, these exemplary embodiments can be implemented in many different forms and should not be construed as being limited only to the embodiments set forth herein. It should be understood that these embodiments are provided so that the disclosure of the present invention is thorough and complete, and the concept of these exemplary embodiments is fully conveyed to those of ordinary skill in the art.

[0025] As Figures 1 to 6 shown, according to the first aspect of the embodiments of the present application, a crystal oscillator and chip fan-out package structure is provided, including: a chip 110; a passivation layer 120 covering the chip 110; a plurality of shielding pillars 130 connected to the passivation layer 120, and the plurality of shielding pillars 130 enclose a shielding space; a crystal oscillator 140 connected to the passivation layer 120 and located within the shielding space; a package body 150 with the crystal oscillator 140 and the chip 110 disposed therein; and a communication component 160, with a part of the communication component 160 disposed within the package body 150, connected to the chip 110, and led out through the package body 150.

[0026] The crystal oscillator and chip fan-out package structure provided by the embodiments of the present application includes a chip 110, a passivation layer 120, a plurality of shielding columns 130, a crystal oscillator 140, a package body 150, and a communication component 160. Based on this, during the preparation process of the crystal oscillator and chip fan-out package structure, the passivation layer 120 can be first set on the wafer, and then the communication component 160 connected to the wafer is constructed. A plurality of shielding columns 130 are set on the passivation layer 120 to form a shielding area. After that, the crystal oscillator 140 is connected to the passivation layer 120, and at the same time, the crystal oscillator 140 is located within the shielding area. Finally, the wafer is diced and cut to obtain the fan-out package structure of the chip 110. For the crystal oscillator and chip fan-out package structure provided by the embodiments of the present application, on the one hand, the spatial interconnection between the crystal oscillator 140 and the bare chip is realized, and the occupied areas of the chip 110 and the crystal oscillator 140 are reduced; on the other hand, through the setting of the shielding columns 130, the function of metal isolation can be achieved, avoiding interference from other signals to the operation of the crystal oscillator 140, and solving the problem of jitter caused by external environmental interference to the crystal oscillator 140. While realizing the miniaturization of the crystal oscillator and chip fan-out package structure, the anti-interference ability of the crystal oscillator 140 is improved, and the cost is greatly reduced.

[0027] For the crystal oscillator and chip fan-out package structure provided by the embodiments of the present application, through the setting of the communication component 160, the communication between the crystal oscillator 140 and the chip 110 is guaranteed, and the functions of semiconductor devices can be realized.

[0028] The crystal oscillator and chip fan-out package structure provided by the embodiments of the present application can realize the spatial interconnection between the bare chip and the crystal oscillator. The chip 110 and the crystal oscillator 140 can form a 1:1 plane body, improving the signal transmission speed.

[0029] For the crystal oscillator and chip fan-out package structure provided by the embodiments of the present application, a shielding space is formed by enclosing a plurality of shielding columns 130. During the operation of the crystal oscillator and chip fan-out package structure, the shielding columns 130 can reflect high-frequency electromagnetic waves, preventing them from penetrating the shielding columns 130 and affecting the crystal oscillator 140. At the same time, eddy currents will be formed when electromagnetic waves propagate in the shielding material, gradually attenuating, further weakening the interference, thereby forming a low-impedance path, reducing the interference received by the internal circuit, and further reducing the interference received by the crystal oscillator 140, being able to solve the problem of frequency hopping of the crystal oscillator 140, and guaranteeing the reliability of the operation of the chip 110 and the crystal oscillator 140.

[0030] In a feasible implementation manner, the shielding columns 130 are made of a metal material; and / or the diameter of the shielding columns 130 is 8um to 15um.

[0031] In this technical solution, the style of the shielding column 130 is further provided. The shielding column 130 is made of a metal material, and the diameter of the shielding column 130 is 8 um to 15 um. Based on this, through the selection of the metal material, better reflection of high-frequency electromagnetic waves can be formed. With the diameter of the shielding column 130 being 8 um to 15 um, on the one hand, it is convenient for the preparation of the shielding column 130, and on the other hand, it can increase the contact probability between the high-frequency electromagnetic waves and the shielding column 130, and can better suppress the interference of external signals on the crystal oscillator 140, ensuring the reliability of the device operation. By selecting the diameter of the shielding column 130 to be 8 um to 15 um, it is more convenient for the preparation of the shielding column 130, and at the same time, the processing cost is lower.

[0032] In some examples, the shielding column 130 can be made of copper material, which is convenient for the preparation of the shielding column 130 and can reduce the production cost at the same time.

[0033] As Figure 1 shown, in a feasible implementation manner, the surface of the chip 110 where the crystal oscillator 140 is arranged is the first surface, and the ratio of the area of the connection between the shielding column 130 and the first surface to the area of the first surface is greater than or equal to 25%; and / or the height of the shielding column 130 is higher than the height of the crystal oscillator 140.

[0034] In this technical solution, the arrangement method of the shielding column 130 is further provided. The surface of the chip 110 where the crystal oscillator 140 is arranged is the first surface, and the ratio of the area of the connection between the shielding column 130 and the first surface to the area of the first surface is greater than or equal to 25%, that is to say, the coverage area of the shielding column 130 on one surface of the chip 110 is greater than or equal to 25%. By setting it like this, the contact probability between the high-frequency electromagnetic waves formed externally and the shielding column 130 can be further increased, and the high-frequency electromagnetic waves formed externally can be better suppressed, making the operation of the crystal oscillator 140 more accurate.

[0035] In this technical solution, the ratio of the area of the connection between the shielding column 130 and the first surface to the area of the first surface is greater than or equal to 25%. On the one hand, it is beneficial to increase the electroplating area and improve the electroplating effect. On the other hand, it can further increase the reflection efficiency of the shielding column 130 to electromagnetic waves, increase the contact area, and can better suppress the high-frequency electromagnetic waves formed externally, making the vibration frequency of the crystal oscillator 140 more accurate.

[0036] In this technical solution, the height of the shielding column 130 is higher than the height of the crystal oscillator 140, which can better play the role of metal isolation, can better suppress the interference of external signals on the crystal oscillator 140, and ensure the reliability of the device operation.

[0037] As Figures 1 to 6As shown, in a feasible implementation, the communication component 160 includes: a first metal circuit layer 161 disposed on the passivation layer 120 and connected to the pad 111 of the chip 110; a first metal post 162, where the first metal post 162 is connected to the first metal circuit layer 161; a second metal circuit layer 163, where the second metal circuit layer 163 is connected to the other end of the first metal post 162; a lead-out metal post 164, with one end of the lead-out metal post 164 connected to the second metal circuit layer 163 and the other end led out to the surface of the package 150; and a metal solder ball 165, where the metal solder ball 165 is disposed on the package 150 and connected to the lead-out metal post 164.

[0038] In this technical solution, the style of the communication component 160 is further provided. The communication component 160 may include a first metal circuit layer 161, a first metal post 162, a second metal circuit layer 163, and a metal solder ball 165. During the preparation process of the crystal oscillator and chip fan-out package structure, after the formation of the passivation layer 120, the position of the pad 111 on the chip 110 can be opened by means of development and etching. The opening can be in the shape of a base to expose the pad 111. Then, the first metal circuit layer 161 is prepared by processes such as metal sputtering, photolithography, and electroplating. After that, the first metal post 162 can be disposed on the first metal circuit layer 161, and the first metal post 162 can communicate with the chip 110 through the first metal circuit layer 161 and the pad 111. Then, the first metal post 162, the metal layer, the chip 110, and the crystal oscillator 140 can be encapsulated for the first time with encapsulation materials, and then the encapsulation materials are polished to expose the first metal post 162. Then, the second metal circuit layer 163 is prepared on the encapsulation materials, and then the lead-out metal post 164 is prepared on the second metal circuit layer 163 in the same way. After that, the second metal circuit layer 163 and the lead-out metal post 164 are encapsulated, and the communication between the chip 110 and external devices can be achieved.

[0039] In some examples, for the convenience of preparing the first metal circuit layer 161 and the second metal circuit layer 163, the first metal circuit layer 161 and the second metal circuit layer 163 can be made of copper material.

[0040] In some examples, the materials of the first metal post 162 and the lead-out metal post 164 can be the same and can both be made of nickel-tin-silver material.

[0041] In this technical solution, the communication component 160 further includes a metal solder ball 165. By setting the metal solder ball 165 on the surface of the package 150, the chip 110 can be communicatively connected to other components in a weldable manner, and there are gaps between multiple metal solder balls 165, which can dissipate heat well and prevent irreversible damage to the crystal oscillator caused by excessive temperature after reflow soldering.

[0042] In this technical solution, metal solder balls 165 are selected as the connection structure between the crystal oscillator and the chip fan-out package structure and external components, which facilitates the bonding of other circuits. At the same time, the gaps between multiple metal solder balls 165 can be used for heat dissipation, and the phenomenon that the frequency of the crystal oscillator 140 jumps due to rapid temperature changes can be avoided.

[0043] As Figure 1 shown, in a feasible implementation manner, the communication component 160 is also connected to the crystal oscillator 140. The communication component 160 further includes: a connecting metal column 166, one end of the connecting metal column 166 is connected to the crystal oscillator 140, and the other end is connected to the second metal circuit layer 163.

[0044] In this technical solution, the communication component 160 can also be connected to the crystal oscillator 140. Such a setting facilitates the operation of the crystal oscillator 140, facilitates the communication between the crystal oscillator 140 and other components, and also facilitates the communication between the crystal oscillator 140 and the chip 110. On this basis, the communication component 160 can further include a connecting metal column 166, and the connecting metal column 166 is connected to the crystal oscillator 140 and the second metal circuit layer 163. That is to say, after the preparation of the first metal column 162, an extraction metal column 164 can also be prepared on the crystal oscillator 140, and the extraction metal column 164 is connected to the second metal circuit layer 163, so that communication with external devices can be carried out by using the second metal circuit layer 163 and the extraction metal column 164.

[0045] In a feasible implementation manner, the raw materials for preparing the package 150 include, by weight: 25 to 35 parts of a resin matrix, 8 to 12 parts of a curing agent, 50 to 60 parts of a filler, 1 to 2 parts of a silane coupling agent, and 0.3 to 0.6 parts of an additive; wherein, the material for preparing the filler includes silicon dioxide, and the mass of silicon dioxide accounts for 80% to 90% of the total mass of the filler.

[0046] In this technical solution, the raw materials for preparing the package 150 are further provided. By selecting the above-mentioned ratio, the dielectric constant of the package 150 can be reduced. By increasing the content of silicon dioxide in the filler, the structure can be increased, so that the package 150 can form a three-dimensional network structure and restrict the movement of molecular chains, play a role in hindering orientation polarization, reduce the dielectric loss ability, and improve the frequency transmission speed.

[0047] It can be understood that the resin matrix, as the main component of the encapsulation body 150, can bond the encapsulation body 150 to the chip 110 and the crystal oscillator 140, facilitating the formation of a stable encapsulation structure, and can play a role in supporting and protecting the chip 110 and the crystal oscillator 140, enabling the chip 110 and the crystal oscillator 140 to avoid the influence of external physical impacts and vibrations; the curing agent is a key component that triggers the curing reaction of the resin matrix. During the encapsulation process, the curing agent reacts chemically with the resin matrix, causing the resin matrix to change from a liquid or plastic state to a solid state, thereby forming a hard encapsulation structure; the filler can adjust the performance parameters of the encapsulation body 150, such as adjusting performance such as the coefficient of thermal expansion, hardness, and wear resistance, making the coefficient of thermal expansion of the encapsulation body 150 close to that of the crystal oscillator 140 and the chip 110, and capable of reducing the probability of warping and cracking of the encapsulation body 150. In this technical solution, by controlling the addition amount of silica, the dielectric constant of the encapsulation body 150 can be adjusted, the dielectric loss can be reduced, and the frequency transmission speed can be increased; the silane coupling agent can form chemical bonds between inorganic materials and organic materials, thereby improving the interfacial compatibility between them, reducing stress concentration and defects inside the encapsulation material, and improving the reliability and durability of the encapsulation material; the additive is a trace component in the encapsulation material, and the additive can include, but is not limited to, a release agent, a flame retardant, a stress additive, and an antioxidant, etc.

[0048] In some examples, the resin matrix is bisphenol A epoxy resin, the curing agent is phenolic resin, and the silane coupling agent is KH-560. With such settings, the mechanical strength of the encapsulation body 150 can be further improved while ensuring the signal transmission efficiency.

[0049] In a feasible implementation manner, the materials for preparing the filler include methylhexahydrobenzene, alumina, boron nitride, and silica. Methylhexahydrobenzene can increase the glass transition temperature, reduce the solid shrinkage volume, and reduce internal stress. Alumina can improve the high thermal conductivity of the material. Boron nitride is mainly used as a high thermal conductivity filler, and silica can reduce the dielectric loss of the material.

[0050] For the crystal oscillator and chip fan-out encapsulation structure provided by the embodiments of the present application, test examples, multiple embodiments, and multiple comparative examples are set for the raw materials of the encapsulation body 150, where: Example 1: The raw materials for preparing the encapsulation body 150 include, by weight: 25 parts of resin matrix, 12 parts of curing agent, 50 parts of filler, 2 parts of silane coupling agent, and 0.3 parts of additive; Among them, the material for preparing the filler includes silica, and the mass of the silica accounts for 80% of the total mass of the filler.

[0051] Example 2: The raw materials for preparing the package body 150 include, by weight: 35 parts of resin matrix, 8 parts of curing agent, 60 parts of filler, 1 part of silane coupling agent and 0.6 parts of additive; The material used to prepare the filler includes silicon dioxide, and the mass of the silicon dioxide accounts for 90% of the total mass of the filler.

[0052] Embodiment 3: The raw materials for preparing the package body 150 include, by weight: 30 parts of resin matrix, 10 parts of curing agent, 58 parts of filler, 1.5 parts of silane coupling agent and 0.5 parts of additive; The material used to prepare the filler includes silicon dioxide, and the mass of the silicon dioxide accounts for 87% of the total mass of the filler.

[0053] Embodiment 4: The raw materials for preparing the package body 150 include, by weight: 30 parts of resin matrix, 10 parts of curing agent, 58 parts of filler, 1.5 parts of silane coupling agent and 0.5 parts of additive; Wherein, the material for preparing the filler includes silicon dioxide, and the mass of the silicon dioxide accounts for 87% of the total mass of the filler; Among them, the resin matrix is ​​bisphenol A type epoxy resin, the curing agent is phenolic resin, and the silane coupling agent is KH-560; Materials used to prepare the filler include methyl hexahydrobenzene, alumina, boron nitride and silicon dioxide.

[0054] Embodiment 5: The difference from Example 4 is that the mass of silicon dioxide accounts for 90% of the total mass of the filler.

[0055] Embodiment 6: The difference from Example 4 is that the mass of silicon dioxide accounts for 80% of the total mass of the filler.

[0056] Embodiment 7: The difference from Example 4 is that the mass of silicon dioxide accounts for 85% of the total mass of the filler.

[0057] Comparative Example 1 The difference from Example 4 is that the mass of silicon dioxide accounts for 75% of the total mass of the filler.

[0058] Comparative Example 2 The difference from Example 4 is that the mass of silicon dioxide accounts for 95% of the total mass of the filler.

[0059] Test Case Test Examples 1 to 7, the dielectric constants, dielectric losses and frequencies of the materials of Comparative Examples 1 and 2 were tested. The specific test results are shown in Table 1: Table 1 Test Results of Dielectric Constant and Dielectric Loss

[0060] As can be seen from Table 1, the raw materials of the package 150 provided in the embodiments of the present application have a lower dielectric constant for the obtained package 150.

[0061] As Figure 7 shown, according to the second aspect of the embodiments of the present application, a crystal oscillator and chip fan-out packaging process is proposed for preparing the crystal oscillator and chip fan-out packaging structure according to any of the above technical solutions. The crystal oscillator and chip fan-out packaging process includes: Step 201: Provide a wafer and set a passivation layer on the wafer; Step 202: Etch the passivation layer on the wafer to expose the pads of the wafer; Step 203: Set a first metal circuit layer connected to the pads and a first metal post connected to the first metal circuit layer; Step 204: Set a plurality of shielding posts on the passivation layer to enclose a shielding space; Step 205: Bond the crystal oscillator to the passivation layer and make the crystal oscillator located in the shielding space.

[0062] The crystal oscillator 140 and chip 110 fan-out packaging process provided by the embodiments of the present application is used to prepare the crystal oscillator and chip fan-out packaging structure according to any of the above technical solutions. Therefore, the crystal oscillator 140 and chip 110 fan-out packaging process has all the beneficial effects of the above technical solutions.

[0063] The crystal oscillator 140 and the chip 110 fan-out packaging process provided by the embodiments of the present application. The crystal oscillator and chip fan-out packaging structure prepared includes the chip 110, the passivation layer 120, multiple shielding columns 130, the crystal oscillator 140, the package 150, and the communication component 160. Based on this, during the preparation process of the crystal oscillator and chip fan-out packaging structure, the passivation layer 120 can be first set on the wafer, and then the communication component 160 connected to the wafer is constructed. Multiple shielding columns 130 are set on the passivation layer 120 to form a shielding area. Then, the crystal oscillator 140 is connected to the passivation layer 120, and at the same time, the crystal oscillator 140 is located within the shielding area. Finally, the wafer is diced and cut, and the chip 110 fan-out packaging structure can be obtained. The crystal oscillator and chip fan-out packaging structure provided by the embodiments of the present application, on the one hand, realizes the spatial interconnection of the crystal oscillator 140 and the bare chip, reducing the occupied area of the chip 110 and the crystal oscillator 140; on the other hand, through the setting of the shielding columns 130, the role of metal isolation can be played, avoiding interference from other signals to the operation of the crystal oscillator 140, and solving the problem of jitter caused by the crystal oscillator 140 being interfered by the external environment. While realizing the miniaturization of the crystal oscillator and chip fan-out packaging structure, the anti-interference ability of the crystal oscillator 140 is improved, and the cost is greatly reduced.

[0064] In a feasible implementation manner, the crystal oscillator 140 and the wafer fan-out packaging process further includes: setting a connecting metal column 166 on the crystal oscillator 140; performing a first encapsulation on the wafer and the crystal oscillator 140 to form a primary package; polishing the primary package to expose the connecting metal column 166 and the first metal column 162; forming a second metal circuit layer 163 on the primary package; setting a lead-out metal column 164 on the second metal circuit layer 163; performing a second encapsulation on the second metal circuit layer 163 and the lead-out metal column 164 to form the package 150; setting a metal solder ball 165 connected to the lead-out metal column 164 on the package 150.

[0065] In this technical solution, a further formation method of the package 150 is provided. By first preparing the first metal circuit layer 161 and the first metal column 162, then performing the first encapsulation, and then preparing the second metal circuit layer 163 and the lead-out metal column 164, and then performing the second encapsulation, the communication component 160 can be prepared while encapsulating, which can simplify the preparation process, is beneficial to further reducing the preparation cost, is beneficial to forming a fan-out packaging structure, and is convenient for signal input and output.

[0066] In a feasible implementation manner, the crystal oscillator 140 and the wafer fan-out packaging process further includes: dicing and cutting the packaged wafer to obtain multiple chip 110 devices; taping the multiple chip 110 devices.

[0067] In this technical solution, after the crystal oscillator 140 and the wafer are encapsulated and the internal communication component 160 is fabricated, the encapsulated wafer can be diced to obtain multiple chip 110 devices, and then the chip 110 devices can be taped using a loader taping machine and a vision recognition system to obtain the finished product.

[0068] As Figures 1 to 7 shown, in some examples, the crystal oscillator and chip fan-out package structure provided by the embodiments of the present application, the crystal oscillator 140 and the chip 110 fan-out packaging process may specifically include the following steps: The first step: As Figures 1 to 4 shown, an 8-inch wafer is sucked by a robotic arm and pasted on a tray fixture. An organic passivation layer 120 is spin-coated on the dielectric layer of the wafer, and the thickness of the passivation layer 120 is 10 um. A photomask is made, and the photolithography machine is used to develop at the window opening position of the pad 111 of the chip 110 to expose the aluminum pad 111.

[0069] The second step: As Figure 5 shown, the first metal circuit layer 161, which is a copper circuit, is fabricated using processes such as metal sputtering, photolithography, and electroplating. The first metal circuit layer 161 includes a metal interconnect structure that fills the pad 111 of the chip 110 and metal traces on the surface of the passivation layer 120.

[0070] The third step: Metal bumps with a size of 10 um × 10 um of copper-nickel-tin-silver are established at the position of the first metal circuit layer 161, and the formed first metal pillars 162 are connected to the first metal circuit layer 161. At the same time, the pad 111 of the chip 110 and the first metal pillars 162 form an electrical connection.

[0071] The fourth step: As Figure 6 shown, a crystal oscillator 140 shielding isolation area is established at the position of the passivation layer 120. The size of the crystal oscillator 140 is selected as 1.6 cm × 1.0 cm. Metal bumps in a 4×2 area are sequentially established as shielding pillars 130. The spacing between the shielding pillars 130 is 0.5 cm, and the height is the same as or higher than that of the crystal oscillator 140, forming a 2.5 cm × 1.5 cm area to surround the crystal oscillator 140 for isolation to reduce signal interference.

[0072] The fifth step: A drop of glue is dropped through a dispensing nozzle in the 2.5 cm × 1.5 cm area. The glue model is selected as S210 with a low coefficient of thermal expansion and high thermal conductivity. At the same time, the nozzle presses down and sucks air, and the crystal oscillator 140 is placed in the dispensing area. After fixing, it is baked at a baking temperature of 175 °C for 4H to fully cure the die bonding glue, and the pushing force is greater than 5Kgf.

[0073] The sixth step: Connecting metal pillars 166 are established on the two end electrodes of the crystal oscillator 140.

[0074] The seventh step: Select the material of the package 150 according to the characteristics of the crystal oscillator 140 according to the following steps.

[0075] According to the formula of dielectric constant and dielectric loss, it is obtained that: tanδ = P / (2πfεE^2) Wherein, P is the dielectric loss power of the dielectric, f is the frequency of the oscillator, ε is the dielectric constant, E is the electric field strength, and δ is the loss factor.

[0076] E = U ab / d Wherein, U ab is the voltage between two points, d is the distance between two points in the direction of the electric field strength, and E is the electric field strength.

[0077]

[0078] Wherein, f is the frequency of the oscillator, L is the inductance value of the inductor, and C is the capacitance value of the capacitor.

[0079] The dielectric loss calculation formula is obtained: For the crystal oscillator 140 selected in the present invention, the inductance value is 4Mh, the capacitance value is 0.95pf, and the raw materials of the package 150 include, by weight: 25 to 35 parts of resin matrix, 8 to 12 parts of curing agent, 50 to 60 parts of filler, 1 to 2 parts of silane coupling agent, and 0.3 to 0.6 parts of additive; wherein, the material for preparing the filler includes silicon dioxide, and the mass of the silicon dioxide accounts for 80% to 90% of the total mass of the filler.

[0080] The eighth step: Put the material of the package 150 into an injection molding machine at 200°C to melt, cover the entire crystal oscillator 140, and perform secondary curing after completion. The curing temperature is 180°C for 8 hours. After the curing is completed, the entire wafer is placed on a grinding table for grinding until the first metal column 162 on the pad 111 of the chip 110 and the connection metal column 166 of the crystal oscillator 140 are exposed. During the process, control the wafer warpage not to exceed 5um, and keep the heights of the connection metal column 166 and the first metal column 162 consistent. After grinding, use a horizontal test instrument to measure the wafer thickness at five points: up, down, left, right, and middle to ensure that the wafer warpage is less than 5um; The ninth step: Use metal sputtering and photolithography development to form the second metal circuit layer 163, so that the crystal oscillator 140, the connection metal column 166, the first metal column 162, and the pad 111 of the chip 110 are electrically connected.

[0081] The tenth step: Establish the lead-out metal posts 164 on the second metal circuit layer 163, and then perform secondary injection molding. The injection molding material and conditions are the same as those in the first time. With the lead-out metal posts 164 as the center, form a metal window shape with a size of 0.5×0.5 for electroplating to form the third metal circuit layer 167. Through the ball mounting process, form metal solder balls 165 on the third metal circuit layer 167 at the position of the metal interconnection structure. The metal solder balls 165 are made of copper-tin-silver material. On the one hand, it is convenient for customers to perform soldering. There are gaps between the metal solder balls 165, which can dissipate heat well and prevent irreversible damage to the crystal oscillator caused by excessive temperature after reflow soldering.

[0082] The eleventh step: Put the completed wafer into a cassette, and use a disco dicing machine to perform dicing and cutting to form a single chip 110.

[0083] The twelfth step: Use a loader and a taping machine, and adopt a vision recognition system. The length of the chipping recognized by the camera is 100um, the width is 50um, and the length of the chipping on the side is half of the thickness of the chip 110, and the solder balls cannot be scratched. The recognized intact chips 110 are put into the track for taping.

[0084] In the present invention, the terms "first", "second", and "third" are only used for descriptive purposes and cannot be construed as indicating or implying relative importance; the term "plurality" means two or more unless otherwise clearly defined. Terms such as "mounted", "connected", "connected", and "fixed" should be understood in a broad sense. For example, "connected" can be a fixed connection, a detachable connection, or an integral connection; "connected" can be a direct connection or an indirect connection through an intermediate medium. For those of ordinary skill in the art, the specific meanings of the above terms in the present invention can be understood according to specific circumstances.

[0085] In the description of the present invention, it should be understood that the orientation or positional relationship indicated by the terms "upper", "lower", "left", "right", "front", "rear", etc. is based on the orientation or positional relationship shown in the drawings, and is only for the convenience of describing the present invention and simplifying the description, rather than indicating or implying that the device or unit referred to must have a specific direction, be constructed and operated in a specific orientation, and therefore cannot be construed as a limitation to the present invention.

[0086] In the description of this specification, the description of terms such as "one embodiment", "some embodiments", "specific embodiments", etc. means that the specific features, structures, materials, or characteristics described in connection with the embodiment or example are included in at least one embodiment or example of the present invention. In this specification, the schematic representations of the above terms do not necessarily refer to the same embodiment or example. Moreover, the specific features, structures, materials, or characteristics described can be combined in any one or more embodiments or examples in a suitable manner.

[0087] The above are only the preferred embodiments of the present invention and are not intended to limit the present invention. For those skilled in the art, the present invention may have various changes and modifications. Any modification, equivalent replacement, improvement, etc. made within the spirit and principle of the present invention shall be included within the protection scope of the present invention.

Claims

1. A crystal oscillator and chip fan-out package structure, characterized in that, Comprising: A chip; A passivation layer covering the chip; A plurality of shielding posts connected to the passivation layer, and the plurality of shielding posts enclose a shielding space; A crystal oscillator connected to the passivation layer and located within the shielding space; A package body in which the crystal oscillator and the chip are disposed; A communication component, a part of the communication component is disposed within the package body, connected to the chip, and led out via the package body.

2. The crystal oscillator and chip fan-out package structure according to claim 1, wherein: The shielding post is made of a metal material; and / or The diameter of the shielding post is 8um to 15um.

3. The crystal oscillator and chip fan-out package structure according to claim 1, wherein: The surface of the chip where the crystal oscillator is disposed is the first surface, and the ratio of the area of the connection between the shielding post and the first surface to the area of the first surface is greater than or equal to 25%; and / or The height of the shielding post is higher than the height of the crystal oscillator.

4. The crystal oscillator and chip fan-out package structure according to claim 1, wherein The communication component includes: A first metal circuit layer disposed on the passivation layer and connected to the pad of the chip; A first metal post, one end of the first metal post is connected to the first metal circuit layer; A second metal circuit layer connected to the other end of the first metal post; A lead-out metal post, one end of the lead-out metal post is connected to the second metal circuit layer, and the other end is led out to the surface of the package body; A metal solder ball disposed on the package body and connected to the lead-out metal post.

5. The crystal oscillator and chip fan-out package structure according to claim 4, wherein The communication component is further connected to the crystal oscillator, and the communication component further includes: A connecting metal post, one end of the connecting metal post is connected to the crystal oscillator, and the other end is connected to the second metal circuit layer.

6. The crystal oscillator and chip fan-out package structure according to any one of claims 1 to 5, characterized in that, The raw materials for preparing the package body include, by weight: 25 to 35 parts of a resin matrix, 8 to 12 parts of a curing agent, 50 to 60 parts of a filler, 1 to 2 parts of a silane coupling agent, and 0.3 to 0.6 parts of an additive; Wherein, the material for preparing the filler includes silica, and the mass of the silica accounts for 80% to 90% of the total mass of the filler.

7. The crystal oscillator and chip fan-out package structure according to claim 6, wherein: The material for preparing the filler includes methylhexahydrobenzene, alumina, boron nitride, and silica.

8. A crystal oscillator and chip fan-out packaging process, characterized in that, For preparing the crystal oscillator and chip fan-out package structure according to any one of claims 1 to 7, the crystal oscillator and chip fan-out packaging process includes: Providing a wafer and disposing a passivation layer on the wafer; Etching the passivation layer on the wafer to expose the pad of the wafer; Disposing a first metal circuit layer connected to the pad and a first metal post connected to the first metal circuit layer; Disposing a plurality of shielding posts on the passivation layer to enclose a shielding space; Bonding the crystal oscillator to the passivation layer and positioning the crystal oscillator within the shielding space.

9. The crystal oscillator and chip fan-out packaging process according to claim 8, wherein Further including: Disposing a connecting metal post on the crystal oscillator; Performing a first encapsulation on the wafer and the crystal oscillator to form a primary encapsulation body; Polish the primary package to expose the connecting metal posts and the first metal posts; Form a second metal circuit layer on the primary package; Dispose lead-out metal posts on the second metal circuit layer; Perform a second encapsulation on the second metal circuit layer and the lead-out metal posts to form a package; Dispose metal solder balls connected to the lead-out metal posts on the package; 10. The crystal oscillator and chip fan-out packaging process according to claim 8, characterized in that, Further comprising: Dice and cut the wafer after encapsulation is completed to obtain a plurality of chip devices; Tape the plurality of chip devices.

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