Primary synchronization signal detection method, cell search method and device and storage medium

Abstract

The invention discloses a primary synchronization signal detection method, a cell search method, a cell search device and a storage medium, which are used for solving the technical problems of long PSS search time and large hardware resource occupation in the prior art, and the method comprises the following steps: carrying out coarse search in a frequency offset range supported by a terminal according to a first step length, determining an estimated frequency offset value with frequency offset in the received signal; according to a second step length, carrying out fine search again in a corresponding sub-frequency offset range taking the estimated frequency offset value as a central frequency point, and determining an actual frequency offset value with frequency offset in the received signal and a main synchronization signal sequence; wherein the first step length is an integral multiple of the second step length.

Description

Technical Field

[0001] The present invention relates to the field of communications, and in particular, to a method for detecting a primary synchronization signal, a cell search method, an apparatus, and a storage medium. Background Art

[0002] After a user equipment (UE) is powered on, it usually does not have the configuration information of the cell where it is located. Therefore, after being powered on, the UE needs to perform a cell search to obtain the configuration information of the cell, so as to realize communication between the terminal device and the base station and other user terminals.

[0003] The cell search process is mainly completed based on the detection of a downlink synchronization channel and synchronization signals. The synchronization signals include a primary synchronization signal (PSS) and a secondary synchronization signal (SSS). When performing a cell search, the user terminal needs to first search for the primary synchronization signal to complete the orthogonal frequency division multiplexing (OFDM) symbol boundary synchronization and coarse frequency synchronization, obtain the cell identity 2 (NID2), and then search for the secondary synchronization signal to determine the cell identity.

[0004] However, since the user terminal usually does not have any prior information of the communication system when initially detecting the PSS, the user terminal needs to continuously search for the PSS at a period of the default transmission period (20 ms) of the PSS. Especially when initially detecting the PSS, due to the possible large frequency offset between the user terminal and the base station, the user terminal needs to search at each frequency point of the synchronization signal frequency grid, blindly detect the cell identity 2 (NID2) at each frequency point, search for the OFDM symbol boundary of the PSS, and perform initial frequency offset correction.

[0005] Therefore, the search for the PSS is the most complex operation in the downlink synchronization process, which will consume a large amount of time resources and hardware resources. Summary of the Invention

[0006] The present invention provides a method for detecting a primary synchronization signal, a cell search method, an apparatus, and a storage medium, so as to solve the technical problems in the prior art that the time for searching the PSS is long and the occupied hardware resources are large.

[0007] In a first aspect, to solve the above technical problems, a technical solution of a method for detecting a primary synchronization signal provided by an embodiment of the present invention is as follows:

[0008] Perform a coarse search within the frequency offset range supported by the terminal at a first step size to determine an estimated frequency offset value of the frequency offset existing in the received signal;

[0009] Perform a fine search again within the sub - frequency offset range corresponding to the center frequency point with the estimated frequency offset value as the center frequency point according to the second step size, and determine the actual frequency offset value and the primary synchronization signal sequence in the received signal; wherein, the first step size is an integer multiple of the second step size.

[0010] A possible implementation manner is to perform a rough search within the frequency offset range supported by the terminal according to the first step size to determine the estimated frequency offset value of the frequency offset existing in the received signal, including:

[0011] Obtain a plurality of first frequency offset values from within the frequency offset range according to the first step size;

[0012] Based on each of the first frequency offset values and each local primary synchronization signal sequence stored locally, perform a correlation calculation on the received signal to obtain a plurality of first correlation values related to each local synchronization signal sequence;

[0013] Take the first frequency offset value corresponding to the largest one among all the first correlation values as the estimated frequency offset value.

[0014] A possible implementation manner is to perform a fine search again within the sub - frequency offset range corresponding to the center frequency point with the estimated frequency offset value as the center frequency point according to the second step size, and the actual frequency offset value and the primary synchronization signal sequence of the frequency offset existing in the received signal, including:

[0015] Obtain a plurality of second frequency offset values from within the sub - frequency offset range according to the second step size;

[0016] Based on each second frequency offset value and each local primary synchronization signal sequence stored locally, perform a correlation calculation on the received signal to obtain a plurality of second correlation values related to each local synchronization signal sequence;

[0017] Take the second frequency offset value corresponding to the largest one among all the second correlation values and the local primary synchronization signal sequence as the actual frequency offset value and the primary synchronization signal sequence respectively.

[0018] A possible implementation manner is that the bandwidth of the frequency offset range is 6 times the sub - carrier spacing corresponding to the received signal.

[0019] A possible implementation manner is that the second step size is half of the sub - carrier spacing of the received signal.

[0020] A possible implementation manner is that the correlation calculation includes:

[0021] Sliding correlation calculation and cyclic correlation calculation.

[0022] A possible implementation manner is that the sliding correlation calculation includes:

[0023] Convert the local primary synchronization signal sequence into a time-domain primary synchronization signal sequence with a first length;

[0024] Divide the time-domain primary synchronization signal sequence into a first sub-time-domain primary synchronization signal sequence and a second sub-time-domain primary synchronization signal sequence with the same length;

[0025] Perform sliding correlation operations on the first sub-time-domain primary synchronization signal sequence and the second sub-time-domain primary synchronization signal sequence respectively with the received signal to obtain a first sub-correlation sequence and a second sub-correlation sequence;

[0026] Take the modulus of the sum of the first sub-correlation sequence and the second sub-correlation sequence to obtain the correlation sequence corresponding to the correlation calculation;

[0027] Select the maximum value from the correlation sequence as the correlation value corresponding to the sliding correlation calculation, and record the local primary synchronization signal sequence used correspondingly.

[0028] A possible implementation manner, converting the local primary synchronization signal sequence into a time-domain primary synchronization signal sequence with a first length includes:

[0029] Convert the local primary synchronization signal sequence into a time-domain primary synchronization signal sequence with a second length; wherein, the first length is 2 times the second length;

[0030] Perform an interpolation operation on the time-domain primary synchronization signal sequence with the second length to obtain the time-domain primary synchronization signal sequence with the first length.

[0031] A possible implementation manner, the cyclic cross-correlation calculation includes:

[0032] If the received signal is a frequency-domain signal, then conjugate multiply the received signal with the local primary synchronization signal sequence to obtain a conjugate correlation sequence corresponding to the local primary synchronization signal sequence;

[0033] Convert the conjugate correlation sequence into a time-domain correlation sequence;

[0034] Take the maximum value in the time-domain correlation sequence as the correlation value corresponding to the cyclic cross-correlation calculation, and record the local primary synchronization signal sequence used correspondingly.

[0035] A possible implementation manner, before conjugate multiplying the received signal with the local primary synchronization signal sequence, further includes:

[0036] If the received signal is a time-domain signal, then convert the received signal into a frequency-domain signal.

[0037] Second aspect, an embodiment of the present invention further provides a method for cell search, including:

[0038] Performing primary synchronization signal detection on the received signal by using the method described in the first aspect, and determining the actual offset and the primary synchronization signal sequence existing in the received signal;

[0039] Adopting a cyclic prefix-based carrier frequency offset technique to determine the secondary synchronization signal sequence existing in the received signal from the frequency offset range corresponding to the actual offset as the center frequency point;

[0040] Determining the cell identifier by using the primary synchronization signal sequence and the secondary synchronization signal sequence.

[0041] Third aspect, an embodiment of the present invention further provides a device for primary synchronization signal detection, including a memory, a transceiver, and a processor:

[0042] The memory is used for storing computer programs; the transceiver is used for transceiving data under the control of the processor; the processor is used for reading the computer programs in the memory and executing the method described in the first aspect.

[0043] Fourth aspect, an embodiment of the present invention provides a device for primary synchronization signal detection, including:

[0044] A coarse search unit, configured to perform a coarse search within the frequency offset range supported by the terminal according to a first step length, and determine the estimated frequency offset value of the frequency offset existing in the received signal;

[0045] A fine search unit, configured to perform a fine search again within the sub-frequency offset range corresponding to the estimated frequency offset value as the center frequency point according to a second step length, and determine the actual frequency offset value of the frequency offset existing in the received signal and the primary synchronization signal sequence; wherein, the first step length is an integer multiple of the second step length.

[0046] A possible implementation manner, the coarse search unit is specifically configured to:

[0047] Obtaining a plurality of first frequency offset values from the frequency offset range according to the first step length;

[0048] Performing correlation calculation on the received signal based on each of the first frequency offset values and each local primary synchronization signal sequence stored locally, and obtaining a plurality of first correlation values related to each of the local synchronization signal sequences;

[0049] Taking the first frequency offset value corresponding to the largest one among all the first correlation values as the estimated frequency offset value.

[0050] A possible implementation manner, the fine search unit is further configured to:

[0051] Obtain a plurality of second frequency offset values from within the sub-frequency offset range according to the second step size;

[0052] Based on each second frequency offset value and each locally stored local primary synchronization signal sequence, perform a correlation calculation on the received signal to obtain a plurality of second correlation values related to each of the local synchronization signal sequences;

[0053] Take the second frequency offset value corresponding to the largest among all the second correlation values and the local primary synchronization signal sequence as the actual frequency offset value and the primary synchronization signal sequence, respectively.

[0054] In a possible implementation manner, the bandwidth of the frequency offset range is 6 times the subcarrier spacing corresponding to the received signal.

[0055] In a possible implementation manner, the second step size is half of the subcarrier spacing of the received signal.

[0056] In a possible implementation manner, the correlation calculation includes:

[0057] A sliding correlation calculation sub-unit and a cyclic correlation calculation sub-unit.

[0058] In a possible implementation manner, the sliding correlation calculation sub-unit is specifically used for:

[0059] Convert the local primary synchronization signal sequence into a time-domain primary synchronization signal sequence with a first length;

[0060] Divide the time-domain primary synchronization signal sequence into a first sub-time-domain primary synchronization signal sequence and a second sub-time-domain primary synchronization signal sequence with the same length;

[0061] Perform a sliding correlation operation on the first sub-time-domain primary synchronization signal sequence and the second sub-time-domain primary synchronization signal sequence with the received signal respectively to obtain a first sub-correlation sequence and a second sub-correlation sequence;

[0062] Take the modulo of the sum of the first sub-correlation sequence and the second sub-correlation sequence to obtain the correlation sequence corresponding to the correlation calculation;

[0063] Select the maximum value from the correlation sequence as the correlation value corresponding to the sliding correlation calculation, and record the corresponding locally used primary synchronization signal sequence.

[0064] In a possible implementation manner, the sliding correlation calculation sub-unit is further used for:

[0065] Convert the local primary synchronization signal sequence into a time-domain primary synchronization signal sequence with a second length; wherein, the first length is 2 times the second length;

[0066] Interpolate the time-domain primary synchronization signal sequence with the second length to obtain the time-domain primary synchronization signal sequence with the first length.

[0067] In a possible implementation, the cyclic cross-correlation calculation sub-unit is specifically configured to:

[0068] If the received signal is a frequency-domain signal, conjugate multiply the received signal with the local primary synchronization signal sequence to obtain the conjugate correlation sequence corresponding to the local primary synchronization signal sequence;

[0069] Convert the conjugate correlation sequence into a time-domain correlation sequence;

[0070] Take the maximum value in the time-domain correlation sequence as the correlation value corresponding to the cyclic cross-correlation calculation, and record the local primary synchronization signal sequence used correspondingly.

[0071] In a possible implementation, the cyclic cross-correlation calculation sub-unit is further configured to:

[0072] Before conjugate multiplying the received signal with the local primary synchronization signal sequence, if the received signal is a time-domain signal, convert the received signal into a frequency-domain signal.

[0073] In a fifth aspect, an embodiment of the present invention further provides a cell search device, including a memory, a transceiver, and a processor:

[0074] The memory is used to store computer programs; the transceiver is used to transmit and receive data under the control of the processor; the processor is used to read the computer programs in the memory and perform the following operations:

[0075] Perform primary synchronization signal detection on the received signal by using the method described in the first aspect to determine the actual offset and the primary synchronization signal sequence existing in the received signal;

[0076] Adopt the carrier frequency offset technology based on the cyclic prefix to determine the secondary synchronization signal sequence existing in the received signal from the frequency offset range corresponding to the actual offset as the center frequency point;

[0077] Use the primary synchronization signal sequence and the secondary synchronization signal sequence to determine the cell identifier.

[0078] In a sixth aspect, an embodiment of the present invention provides a cell search device, including:

[0079] A first detection unit, configured to perform primary synchronization signal detection on the received signal by using the method described in the first aspect to determine the actual offset and the primary synchronization signal sequence existing in the received signal;

[0080] The second detection unit is configured to determine the secondary synchronization signal sequence existing in the received signal from the frequency offset range corresponding to the center frequency point with the actual offset value by using the carrier frequency offset technology based on the cyclic prefix.

[0081] The determination detection unit is configured to determine the cell identifier by using the primary synchronization signal sequence and the secondary synchronization signal sequence.

[0082] In a seventh aspect, an embodiment of the present invention further provides a processor-readable storage medium storing a computer program for causing the processor to execute the method described in the first aspect or the second aspect. Description of the Drawings

[0083] Figure 1 It is a schematic diagram of an architecture of a communication system applicable to an embodiment of the present application;

[0084] Figure 2 It is a schematic diagram of the structure of an SSB;

[0085] Figure 3 It is a flowchart of a primary synchronization signal detection method provided by an embodiment of the present invention;

[0086] Figure 4 It is a schematic diagram of a sliding correlation calculation provided by an embodiment of the present invention;

[0087] Figure 5 It is another schematic diagram of a sliding correlation calculation provided by an embodiment of the present invention;

[0088] Figure 6 It is a schematic diagram of a cyclic reciprocity calculation provided by an embodiment of the present invention;

[0089] Figure 7 It is another schematic diagram of a cyclic reciprocity calculation provided by an embodiment of the present invention;

[0090] Figure 8 It is a hardware structure diagram of a terminal provided by an embodiment of the present invention;

[0091] Figure 9 It is a flowchart of a cell search method provided by an embodiment of the present invention;

[0092] Figure 10 It is a schematic diagram of the structure of a primary synchronization signal detection device provided by an embodiment of the present invention;

[0093] Figure 11 It is another schematic diagram of the structure of a primary synchronization signal detection device provided by an embodiment of the present invention;

[0094] Figure 12Structural schematic diagram of a cell search device provided by an embodiment of the present invention;

[0095] Figure 13 Structural schematic diagram of another cell search device provided by an embodiment of the present invention. Detailed implementation manners

[0096] In the embodiments of the present invention, the term "and / or" describes the association relationship of associated objects, indicating that three relationships may exist. For example, A and / or B may represent: A exists alone, A and B exist simultaneously, and B exists alone. The character " / " generally represents an "or" relationship between the associated objects before and after.

[0097] In the embodiments of the present application, the term "a plurality of" means two or more, and other quantifiers are similar.

[0098] Next, the technical solutions in the embodiments of the present application will be clearly and completely described in conjunction with the accompanying drawings in the embodiments of the present application. Obviously, the described embodiments are only a part of the embodiments of the present application, not all of the embodiments. All other embodiments obtained by those of ordinary skill in the art based on the embodiments of the present application without creative efforts shall fall within the protection scope of the present application.

[0099] The technical solutions provided by the embodiments of the present application can be applied to a variety of systems, especially 5G systems. For example, the applicable systems can be Global System of Mobile Communication (GSM) systems, Code Division Multiple Access (CDMA) systems, Wideband Code Division Multiple Access (WCDMA) General Packet Radio Service (GPRS) systems, Long Term Evolution (LTE) systems, LTE Frequency Division Duplex (FDD) systems, LTE Time Division Duplex (TDD) systems, Long Term Evolution Advanced (LTE-A) systems, Universal Mobile Telecommunication System (UMTS), Worldwide Interoperability for Microwave Access (WiMAX) systems, 5G New Radio (NR) systems, etc. Both terminal devices and network devices are included in these various systems. The core network part can also be included in the system, such as the Evolved Packet System (EPS), 5G System (5GS), etc.

[0100] In the embodiments of the present application, the terminal device mainly accesses the network through the wireless air interface and obtains services. For example, the terminal device accesses the wireless network by connecting to a network device. The terminal device in the embodiments of the present application may also be referred to as a user equipment, a user, an access terminal, a user unit, a user station, a mobile station, a mobile terminal, a remote station, a remote terminal, a mobile device, a user terminal, a terminal, a wireless communication device, a user agent, or a user device. The user equipment may be a cellular phone, a smart watch, a wireless data card, a mobile phone, a tablet computer, a personal digital assistant (PDA) computer, a wireless modem, a handheld device, a laptop computer, a machine type communication (MTC) terminal, a computer with wireless transceiver function, an Internet of Things (IoT) terminal, a virtual reality terminal device, an augmented reality terminal device, a wearable device, a vehicle, a terminal in device-to-device (D2D) communication, a terminal in vehicle to everything (V2X) communication, a terminal in machine-type communication (MTC), a terminal in the Internet of Things (IoT), a terminal in intelligent office, a terminal in industrial control, a terminal in driverless, a terminal in remote surgery, a terminal in smart grid, a terminal in transportation safety, a terminal in smart city, a terminal in smart home, a terminal in satellite communication (e.g., a satellite phone or a satellite terminal). The user equipment may also be a customer-premises equipment (CPE), a telephone, a router, a network switch, a residential gateway (RG), a set-top box, a fixed-mobile convergence product, a home network adapter, and an Internet access gateway.

[0101] Among them, a wearable device can also be called a wearable intelligent device, which is a general term for devices developed by applying wearable technology to the intelligent design of daily wear, such as glasses, gloves, watches, clothing, shoes, etc. A wearable device is a portable device that is directly worn on the body or integrated into the user's clothes or accessories. A wearable device is not only a hardware device, but also realizes powerful functions through software support, data interaction, and cloud interaction. Broadly speaking, wearable intelligent devices include those with complete functions and large sizes that can realize complete or partial functions without relying on a smartphone, such as smart watches or smart glasses, etc., and those that only focus on a certain type of application function and need to cooperate with other devices such as smartphones, such as various smart bracelets and smart jewelry for physical sign monitoring. In addition, the terminal device can also be a terminal device in an Internet of Things (IoT) system. IoT is an important part of the future development of information technology. Its main technical feature is to connect objects to the network through communication technology, so as to realize an intelligent network of human-machine interconnection and object-object interconnection. The specific technologies and specific device forms adopted by the terminal device in the embodiments of this application are not limited.

[0102] In the embodiments of this application, the network device can be any device with wireless transceiver functions. The network device includes but is not limited to: macro base station, micro base station (also called small station), radio network controller (RNC), Node B (NB), base station controller (BSC), base transceiver station (BTS), home base station (for example, home evolved Node B, or home Node B, HNB), baseband unit (BBU), AP in the WiFi system, BS in WiMAX, wireless relay node, wireless backhaul node, transmission point (TP), or transmission and reception point (TRP), etc. It can also be a next-generation base station node (gNB) or transmission point (TRP or TP) in a 5G (such as NR) system, one or a group (including multiple antenna panels) of antenna panels of a base station in a 5G system, or, it can also be a network node constituting a gNB or a transmission point, such as a distributed unit (DU), or a base station in a next-generation communication 6G system, etc. The specific technologies and specific device forms adopted by the network device in the embodiments of this application are not limited.

[0103] The network device provides services for a cell, and the terminal device communicates with the cell through the transmission resources allocated by the network device (for example, frequency domain resources, or in other words, spectrum resources). The cell may belong to a macro base station (such as a macro eNB or a macro gNB, etc.), or may belong to the base station corresponding to a small cell. The small cells here may include: metro cells, micro cells, pico cells, femto cells, etc. These small cells have the characteristics of small coverage range and low transmission power, and are suitable for providing high-rate data transmission services.

[0104] To facilitate the understanding of the embodiments of the present application, first, in combination with Figure 1 a detailed description of the communication system applicable to the embodiments of the present application is provided. Figure 1 is a schematic diagram of an architecture of a communication system applicable to the embodiments of the present application. As Figure 1 shown, the communication system may include at least one network device, such as Figure 1 the network device shown; the communication system may further include at least one terminal device, such as Figure 1 the terminal device shown. The network device and the terminal device may communicate through a wireless link.

[0105] It should be understood that the network device in this wireless communication system may be any of the above-mentioned devices with wireless transceiver functions. For example, it may be a base station. The terminal device may also be any of the above-mentioned terminal devices.

[0106] As Figure 1 shown, in this wireless communication system, the network device may provide communication coverage for a specific geographical area through an integrated or external antenna device. One or more terminal devices located within the communication coverage range of the network device can all access the network device. A network device may manage one or more cells. Each cell has an identification (ID), and this identification is also referred to as a cell identity (cell ID). From the perspective of wireless resources, a cell is a combination of downlink wireless resources and its paired uplink wireless resources (not necessarily).

[0107] The terminal device and the network device should be aware of the predefined configurations of the wireless communication system, including the radio access technology (RAT) supported by the system and the wireless resource configurations specified by the system, such as the radio frequency band and the basic configuration of the carrier. A carrier is a frequency range that complies with the system's regulations. This frequency range can be jointly determined by the center frequency of the carrier (denoted as the carrier frequency) and the bandwidth of the carrier. These system-predefined configurations can be part of the standard protocol of the wireless communication system or determined through the interaction between the terminal device and the network device. The content of the relevant standard protocol may be pre-stored in the memories of the terminal device and the network device, or embodied in the hardware circuits or software codes of the terminal device and the network device.

[0108] In this wireless communication system, the terminal device and the network device support one or more of the same RATs, such as 5G NR, 4G LTE, or the RAT of a future evolved system. Specifically, the terminal device and the network device adopt the same air interface parameters, coding schemes, modulation schemes, etc., and communicate with each other based on the wireless resources specified by the system.

[0109] The following introduces the terms and related technologies involved in the embodiments of this application.

[0110] The physical layer of the New Radio (NR) system of the 3rd Generation Partnership Project (3GPP) has a total of 1008 cells, and each cell corresponds to a cell identification (ID). The 1008 cells can be divided into 336 different groups, and each group contains 3 different cell IDs. The specific relationship can be reflected by the following formula:

[0111]

[0112] Among them, represents the ID of the cell, (which can also be denoted as NID1) represents the cell group number, with a range of 0 to 335, (which can also be denoted as NID2) represents the within-group number, with a range of 0 to 2. Each physical cell identification corresponds to a unique cell group number and within-group number.

[0113] During the cell search process, the terminal device searches for synchronization signals on the frequency points. In the NR system, the cell search can be completed using the Primary Synchronization Signal (PSS) and the Secondary Synchronization Signal. The frequency-domain signal of the PSS is uniquely determined by NID2, with a total of 3 (0 to 2). The frequency-domain signal of the SSS is determined by NID2 and NID1.

[0114] Cell search and cell reselection.

[0115] The process of cell search at a frequency point includes: receiving the signal at that frequency point, decoding the received signal, and determining the cell ID, time domain position, and frequency domain position of the cell based on the decoded signal. In a possible implementation manner, during cell search, the terminal device first uses the Primary Synchronization Signal (PSS) to find the time domain position of the cell and the NID2 of the cell, then uses the Secondary Synchronization Signal (SSS) to confirm the NID1 of the cell. Finally, the cell ID and time domain position are obtained according to formula (1), and the frequency domain position of the cell is obtained by combining the frequency point information, and then the cell search for that frequency point ends.

[0116] When the cell ID, time domain position, and frequency domain position of the cell are successfully determined, it can be called successful cell search. When the cell ID, time domain position, and frequency domain position of the cell are not successfully determined, it can be called failed cell search, or it can be called unsuccessful cell search.

[0117] After successful cell search, the terminal device selects the Master Information Block (MIB) and System Information Blocks (SIB) of the cell according to certain criteria and initiates random access to successfully camp on the cell. If the cell camping fails, the terminal device needs to change the cell for camping.

[0118] The cell search performed after the terminal device is powered on can be called initial cell search. The solution for cell search provided in the embodiments of this application can be applied in the process of initial cell search. In a possible implementation manner, it can also be adaptively applied to the cell search process of a terminal device in the connected state.

[0119] It should be noted that in the embodiments of this application, the NR system is taken as an example, and when introducing the embodiments and beneficial effects, the search for cells in the NR system is also taken as an example. When the embodiments of this application are applied to other communication systems, the cells in the NR system are correspondingly replaced with cells in other communication systems. For example, when this application is applied to the LTE system, the cells in the NR system can be correspondingly replaced with cells in the LTE system.

[0120] Taking the NR system as an example, the Synchronization Signal and Physical broadcast channel block (SSB) are introduced.

[0121] In the NR system, each SSB can occupy 4 OFDM symbols, and OFDM symbol can also be written as OFDM symbol. Figure 2 An exemplary structural diagram of an SSB is shown, such asFigure 2 As shown, an SSB usually consists of synchronization signals (the synchronization signals include PSS and SSS) and a Physical Broadcast Channel (PBCH) block.

[0122] Taking the NR system as an example, the synchronization signal transmission period is introduced.

[0123] The subcarrier spacing (SCS) of the OFDM symbols occupied by the SSB can take values of 15 kilohertz (KHz), 30 KHz, 120 KHz, and 240 KHz. Among them, 15 KHz and 30 KHz can be used for frequency band search in the frequency band below 6 GHz, and 120 KHz and 240 KHz can be used for frequency band search in the frequency band above 6 GHz. In the NR system, a synchronization signal set (Synchronization Signal burst set, SS burst set) can be composed of at most L (where the value of L can be a positive integer, and the value of L is related to the frequency band. For example, in the frequency band search below 6 GHz, the maximum value of L can be 8; in the frequency band search above 6 GHz, the maximum value of L can be 64). The SS burst set is transmitted periodically.

[0124] The transmission period of the SS burst set is configurable. For example, it can be configured as one of {5 milliseconds (ms), 10 ms, 20 ms, 40 ms, 80 ms, and 160 ms}. The current protocol stipulates that in the initial cell residence stage, the default period (default SS burst set period) of the SS burst set is configured as 20 ms. The period of the SS burst set can be equal to the transmission period of the synchronization signal.

[0125] For different SSBs in the time-domain symbols within the transmission period of an SS burst set, the base station can adopt different transmit beam directions. The SSBs with the same time-domain symbols in two SS burst set periods correspond to the same transmit beam direction. All the transmitted SSBs within one SS burst set period can be restricted within a duration of 5 ms.

[0126] When a user terminal initially detects the PSS, it usually has no prior information about any communication system. The user terminal needs to continuously search for the PSS at the default transmission period (20 ms) of the PSS. Especially when initially detecting the PSS, due to the possible large frequency offset between the user terminal and the base station, the user terminal needs to search at each frequency point in the synchronization signal frequency grid, blindly detect the cell identity 2 (NID2) at each frequency point, search for the OFDM symbol boundary of the PSS, and perform initial frequency offset correction.

[0127] Therefore, the search for the PSS is the most complex operation in the downlink synchronization process, consuming a large amount of time resources and hardware resources.

[0128] To solve the above problems, the present invention provides a method for detecting the primary synchronization signal, a cell search method, an apparatus, and a storage medium, which will be introduced in detail below.

[0129] Please refer to Figure 3 , an embodiment of the present invention provides a method for detecting the primary synchronization signal, and the processing procedure of this method is as follows.

[0130] Step 301: Perform a coarse search within the frequency offset range supported by the terminal at the first step size to determine the estimated frequency offset value of the frequency offset existing in the received signal;

[0131] Step 302: Perform a fine search again within the sub-frequency offset segment corresponding to the estimated frequency offset value as the center frequency point at the second step size to determine the actual frequency offset value of the frequency offset existing in the received signal and the primary synchronization signal sequence; wherein, the first step size is an integer multiple of the second step size.

[0132] For example, if the frequency offset range supported by the terminal is [-90, 90] kHz, the first step size is 60 kHz, the second step size is 15 kHz, and the subcarrier spacing is 30 kHz, then 4 frequency offset values can be determined at the first step size: -90 kHz, -30 kHz, 30 kHz, 90 Hz. By using these 4 frequency offset values to perform 4 coarse searches on the primary synchronization signal sequence existing in the received signal, one of these 4 frequency offset values can be determined as the estimated frequency offset value of the frequency offset existing in the received signal (assumed to be -30 kHz), and the coarse search for the frequency offset range supported by the terminal is completed.

[0133] After that, it is determined that the sub-frequency offset range corresponding to the center frequency point of -30 kHz is [-60, 0] kHz, and 5 frequency offset values are determined from [-60, 0] kHz according to the second step length (15 kHz): -60 kHz, -45 kHz, -30 kHz, -15 kHz, 0 kHz. By using these 5 frequency offset values to perform 5 times of fine searches on the primary synchronization signal sequence existing in the received signal, an actual frequency offset value of the frequency offset existing in the received signal and the corresponding primary synchronization signal sequence can be determined from these 5 frequency offset values. It can be seen that by adopting the above solution provided by the present invention, by performing 9 searches on the primary synchronization signal sequence existing in the received signal, the primary synchronization signal sequence and the actual frequency offset value existing in the received signal can be quickly determined. In this way, it is not necessary to search each frequency point where the primary synchronization signal sequence may exist as in the prior art, which will greatly improve the efficiency of searching for the primary synchronization signal, reduce the duration of searching for the primary synchronization signal, and save hardware resources.

[0134] In the embodiment provided by the present invention, by performing a rough search on the frequency offset range supported by the terminal according to a larger first step length, and determining an estimated frequency offset value of the frequency offset existing in the received signal therefrom, and then performing a fine search on the sub-frequency offset range with the estimated frequency offset value as the center frequency point according to a smaller second step length, the actual frequency offset value of the frequency offset existing in the received signal and the primary synchronization signal sequence can be determined. Since the above fine search is only performed on the sub-frequency offset range corresponding to one frequency point within the frequency offset range, it can not only greatly reduce the search difficulty and the required hardware resources and improve the search efficiency, but also improve the search accuracy.

[0135] In some embodiments, performing a rough search on the frequency offset range supported by the terminal according to the first step length to determine an estimated frequency offset value of the frequency offset existing in the received signal can be implemented by the following method:

[0136] Obtain a plurality of first frequency offset values from the frequency offset range according to the first step length; perform correlation calculation on the received signal based on each first frequency offset value and each local primary synchronization signal sequence stored locally to obtain a plurality of first correlation values related to each local synchronization signal sequence; use the first frequency offset value corresponding to the largest one among all the first correlation values as the estimated frequency offset value.

[0137] The primary synchronization signal sequences stored locally include NID2 = 0, 1, 2. Still taking the frequency offset range supported by the terminal as [-90, 90] kHz and the first step length as 60 kHz as an example.

[0138] Obtain 4 first frequency offset values from [-90, 90] kHz according to the first step size (60 kHz), which are: -90 kHz, -30 kHz, 30 kHz, 90 Hz in sequence. Use each first frequency offset value and the primary synchronization signal sequence (NID2 = 0) to perform correlation calculation with the received signal, and 4 first correlation values corresponding to the primary synchronization signal sequence (NID2 = 0) can be obtained; use each first frequency offset value and the primary synchronization signal sequence (NID2 = 1) to perform correlation calculation with the received signal, and 4 first correlation values corresponding to the primary synchronization signal sequence (NID2 = 1) can be obtained; use each first frequency offset value and the primary synchronization signal sequence (NID2 = 2) to perform correlation calculation with the received signal, and 4 first correlation values corresponding to the primary synchronization signal sequence (NID2 = 2) can be obtained. The above correlation calculations can be performed synchronously or asynchronously, and there is no specific limitation.

[0139] After that, select the first frequency offset value corresponding to the largest one from the 12 first correlation values as the estimated frequency offset value. Of course, it is also possible to first select the largest first correlation value corresponding to each primary synchronization signal sequence for the 4 first correlation values corresponding to each primary synchronization signal sequence, and then select the first frequency offset value corresponding to the largest one from the largest first correlation values corresponding to the 3 primary synchronization signal sequences as the estimated frequency offset value.

[0140] In the embodiment provided by the present invention, by using a larger first step size to determine multiple first frequency offset values within the frequency offset range supported by the terminal, and performing correlation calculation on the received signal for each first frequency offset value and each local primary synchronization signal sequence, multiple first correlation values related to each local synchronization signal sequence are obtained, and then the first frequency offset value corresponding to the largest one among all the first correlation values is selected as the estimated frequency offset value of the frequency offset existing in the received signal. Since the first step size used is larger, it can effectively reduce the number of search times for coarse search, thereby improving the search efficiency.

[0141] In some embodiments, the bandwidth of the frequency offset range supported by the terminal is 6 times the subcarrier spacing corresponding to the received signal.

[0142] If the subcarrier spacing of the received signal is 30 kHz, then the bandwidth of the frequency range supported by the terminal is 180 kHz.

[0143] In the embodiment provided by the present invention, by setting the bandwidth of the frequency offset range supported by the terminal to be 6 times the subcarrier spacing corresponding to the received signal, the search accuracy can be improved.

[0144] In some embodiments, perform a fine search again within the sub-frequency offset range corresponding to the estimated frequency offset value as the center frequency point according to the second step size to determine the actual frequency offset value and the primary synchronization signal sequence of the frequency offset existing in the received signal, which can be achieved by the following methods:

[0145] Obtain multiple second frequency offset values from the sub-frequency offset range according to the second step size; perform correlation calculations on the received signal based on each second frequency offset value and each locally stored local primary synchronization signal sequence to obtain multiple second correlation values related to each local synchronization signal sequence; use the second frequency offset value corresponding to the largest of all the second correlation values and the local primary synchronization signal sequence as the actual frequency offset value and the primary synchronization signal sequence, respectively.

[0146] The locally stored primary synchronization signal sequences include NID2 = 0, 1, 2. Still taking the sub-frequency offset range as [-60, 0] kHz and the second step size as 15 kHz as an example.

[0147] Determine 5 second frequency offset values from the sub-frequency offset range ([-60, 0] kHz) according to the second step size (15 kHz). Specifically, they are: -60 kHz, -45 kHz, -30 kHz, -15 kHz, 0 kHz. Perform correlation calculations on the received signal using each second frequency offset value and the primary synchronization signal sequence (NID2 = 0), and 5 second correlation values corresponding to the primary synchronization signal sequence (NID2 = 0) can be obtained; perform correlation calculations on the received signal using each second frequency offset value and the primary synchronization signal sequence (NID2 = 1), and 5 second correlation values corresponding to the primary synchronization signal sequence (NID2 = 1) can be obtained; perform correlation calculations on the received signal using each second frequency offset value and the primary synchronization signal sequence (NID2 = 3), and 5 second correlation values corresponding to the primary synchronization signal sequence (NID2 = 3) can be obtained.

[0148] Use the local primary synchronization signal sequence and the second frequency offset value corresponding to the largest of the above 15 second correlation values as the primary synchronization signal sequence and the actual frequency offset value existing in the received signal, respectively. Of course, it is also possible to first select the largest second correlation value from the 5 second correlation values corresponding to each local synchronization signal sequence, and then select the local synchronization sequence and the second frequency offset value corresponding to the largest of the 3 largest second correlation values corresponding to the 3 local synchronization sequences as the primary synchronization signal sequence and the actual frequency offset value, respectively.

[0149] In the embodiment provided by the present invention, by using a smaller second step size to determine multiple second frequency offset values from the sub-frequency offset range, and then using each second frequency offset value and each local primary synchronization signal sequence to perform correlation calculations with the received signal to obtain second correlation values related to the local primary synchronization signal sequence, select the local primary synchronization signal sequence and the second frequency offset value corresponding to the largest of all the second correlation values as the primary synchronization signal sequence and the actual frequency offset value existing in the received signal, so as to achieve a fine search for the sub-frequency offset range containing the primary synchronization signal sequence and improve the accuracy of the search.

[0150] In some embodiments, the second step length is half of the subcarrier spacing of the received signal.

[0151] For example, if the subcarrier spacing of the received signal is 30 kHz, the second step length is 15 kHz.

[0152] In the embodiments provided by the present invention, by setting the second step length to half of the subcarrier spacing of the received signal, when performing secondary synchronization signal search subsequently, the carrier frequency offset (CFO) based on the cyclic prefix (CP) can be used to determine the exact frequency offset of the received signal and the secondary synchronization signal sequence, thereby improving the cell search efficiency.

[0153] In the above embodiments provided by the present invention, the correlation calculation can be a sliding correlation calculation or a cyclic correlation calculation.

[0154] The sliding correlation calculation can be implemented in the following manner:

[0155] Convert the local primary synchronization signal sequence into a time-domain primary synchronization signal sequence with a first length; divide the time-domain primary synchronization signal sequence into a first sub-time-domain primary synchronization signal sequence and a second sub-time-domain primary synchronization signal sequence with the same length; perform sliding correlation operations on the first sub-time-domain primary synchronization signal sequence and the second sub-time-domain primary synchronization signal sequence with the received signal respectively to obtain a first sub-correlation sequence and a second sub-correlation sequence; take the modulo of the sum of the first sub-correlation sequence and the second sub-correlation sequence to obtain the correlation sequence corresponding to the correlation calculation; select the maximum value from the correlation sequence as the correlation value corresponding to the sliding correlation calculation, and record the local primary synchronization signal sequence used accordingly.

[0156] Please refer to Figure 4 which is a schematic diagram of a sliding correlation calculation provided by an embodiment of the present invention.

[0157] Step S10: Obtain the local primary synchronization signal sequence.

[0158] For example, the obtained local primary synchronization signal sequence can be NID2 = 0, 1, 2.

[0159] Step S11: Convert the local primary synchronization signal sequence into a 256-point time-domain primary synchronization signal sequence.

[0160] Steps S12-1, S12-2: Divide the 256-point time-domain primary synchronization signal sequence into a 128-point first sub-time-domain primary synchronization signal sequence and a 128-point second sub-time-domain primary synchronization signal sequence.

[0161] Step S13: Perform sliding correlation operations on the 128-point first sub-time-domain primary synchronization signal sequence and the 128-point second sub-time-domain primary synchronization signal sequence respectively using the received signal.

[0162] Steps S14-1, S14-2: Obtain a first sub-correlation sequence A and a second sub-correlation sequence B corresponding to the first sub-time-domain primary synchronization signal sequence and the second sub-time-domain primary synchronization signal sequence respectively.

[0163] Step S15: Obtain a correlation sequence C based on the first sub-correlation sequence A and the second sub-correlation sequence B.

[0164] C = 2×(A + B) 2 Take modulo.

[0165] Step S16: Select the maximum value from the correlation sequence as the correlation value corresponding to the sliding correlation calculation for the currently used local primary synchronization signal sequence.

[0166] For example, if the subsequent signal processing after mutual calculation includes a 256-point Fast Fourier Transform (FFT) and an Inverse Fast Fourier Transform (IFFT), the local primary synchronization sequence (such as NID2 = 0) can be converted into a first time-domain primary synchronization signal sequence with a length of 256 points. In this way, the existing FFT resources can be reused without repeated calculation, thus saving resources and achieving the effect of quickly obtaining relevant results.

[0167] Then divide the 256-point timing primary synchronization signal sequence into two 128-point first sub-time-domain synchronization signal sequences and second sub-timing synchronization signal sequences. Perform sliding correlation operations on the first sub-time-domain synchronization signal sequence and the second sub-timing synchronization signal sequence respectively with the received signal to obtain a first sub-correlation sequence and a second sub-correlation sequence. The length of the sliding window is 128. The above-mentioned sliding correlation operations on the first sub-time-domain synchronization signal sequence and the second sub-timing synchronization signal sequence with the received signal can be performed simultaneously, which can save time. When performing the sliding correlation operation on the second sub-timing synchronization signal sequence with the received signal, 128 zeros need to be added before the received signal, and the last 128 values of the received signal need to be discarded to keep the sequence length consistent before and after the sliding correlation operation.

[0168] After obtaining the first sub-correlation sequence and the second sub-correlation sequence, perform a sum operation on the first sub-correlation sequence and the second sub-correlation sequence, and take the modulo of the sum operation result to obtain a correlation sequence. Select the maximum correlation value (i.e., the maximum value, denoted as C) from the correlation sequence. max0)Use it as the correlation value corresponding to the current sliding correlation calculation, and record that the local primary synchronization signal sequence used in the current sliding correlation calculation is NID2 = 0.

[0169] When the local synchronization signal sequence is NID2 = 1 or 2, the maximum value of the corresponding point can be calculated by using the same sliding correlation calculation method as the above process, and they are denoted as C max1 、C max2 。

[0170] In some other embodiments, the conversion of the local primary synchronization signal sequence into a time-domain primary synchronization signal sequence with a first length can also be achieved through the following method:

[0171] Convert the local primary synchronization signal sequence into a time-domain primary synchronization signal sequence with a second length; wherein, the first length is twice the second length; perform an interpolation operation on the time-domain primary synchronization signal sequence with the second length to obtain a time-domain primary synchronization signal sequence with the first length.

[0172] If the time-domain primary synchronization signal sequence with the first length is obtained by using the above scheme, the corresponding sliding correlation calculation can be referred to Figure 5 , Figure 5 which is a schematic diagram of another sliding correlation calculation provided by the embodiments of the present invention.

[0173] Step S10: Obtain the local primary synchronization signal sequence.

[0174] For example, the obtained local primary synchronization signal sequence can be NID2 = 0, 1, 2.

[0175] Step S10': Convert the local primary synchronization signal sequence into a 128-point time-domain primary synchronization signal sequence.

[0176] Step S11: Perform a zero-insertion operation on the 128-point time-domain primary synchronization signal sequence to obtain a 256-point time-domain primary synchronization signal sequence.

[0177] Steps S12-1, S12-2: Divide the 256-point time-domain primary synchronization signal sequence into a 128-point first sub-time-domain primary synchronization signal sequence and a 128-point second sub-time-domain primary synchronization signal sequence.

[0178] Step S13: Perform a sliding correlation operation on the 128-point first sub-time-domain primary synchronization signal sequence and the 128-point second sub-time-domain primary synchronization signal sequence respectively with the received signal.

[0179] Steps S14-1, S14-2: Obtain a first sub-correlation sequence A and a second sub-correlation sequence B corresponding to the first sub-time-domain primary synchronization signal sequence and the second sub-time-domain primary synchronization signal sequence respectively.

[0180] Step S15: Obtain the correlation sequence C based on the first sub-correlation sequence A and the second sub-correlation sequence B.

[0181] C = 2×(A + B) 2 Take the modulus.

[0182] Step S16: Select the maximum value from the correlation sequence as the correlation value corresponding to the sliding correlation calculation for the local primary synchronization signal sequence used this time.

[0183] For example, when the 256-point FFT and IFFT operations are not involved in the processing of PBCH, a 128-point IFFT operation can be performed on the local primary synchronization signal sequence, thus saving resources.

[0184] Convert the local primary synchronization signal sequence (such as NID2 = 0) into a time-domain primary synchronization signal sequence with 128 points (i.e., the second length), and then perform an interpolation operation on the time-domain primary synchronization signal sequence with 12 points to obtain a time-sequence primary synchronization signal sequence with 256 points.

[0185] Then divide the 256-point time-sequence primary synchronization signal sequence into a first sub-time-domain synchronization signal sequence and a second sub-time-sequence synchronization signal sequence with a length of 128 points each, and perform sliding correlation operations on the first sub-time-domain synchronization signal sequence and the second sub-time-sequence synchronization signal sequence with the received signal respectively to obtain a first sub-correlation sequence and a second sub-correlation sequence, where the length of the sliding window is 128. The above-mentioned sliding correlation operations on the first sub-time-domain synchronization signal sequence and the second sub-time-sequence synchronization signal sequence with the received signal can be performed simultaneously, which can save time.

[0186] After obtaining the first sub-correlation sequence and the second sub-correlation sequence, perform a sum operation on the first sub-correlation sequence and the second sub-correlation sequence, and take the modulus of the sum operation result to obtain the correlation sequence. Select the maximum correlation value (i.e., the maximum value, denoted as C max0 ) as the correlation value corresponding to this sliding correlation calculation, and record the local primary synchronization signal sequence used in this sliding correlation calculation as NID2 = 0.

[0187] When the local synchronization signal sequence is NID2 = 1, 2, the maximum value of the corresponding points can be calculated using the same sliding correlation calculation method as the above process, and they are denoted as C max1 、C max2 .

[0188] In some embodiments, the cyclic reciprocity calculation can be implemented in the following manner:

[0189] If the received signal is a frequency-domain signal, conjugate multiply the received signal with the local primary synchronization signal sequence to obtain the conjugate correlation sequence corresponding to the local primary synchronization signal sequence; convert the conjugate correlation sequence into a time-domain correlation sequence; take the maximum value in the time-domain correlation sequence as the correlation value corresponding to the cyclic cross-correlation calculation, and record the local primary synchronization signal sequence used correspondingly.

[0190] Please refer to Figure 6 which is a schematic diagram of a cyclic cross-correlation calculation provided by an embodiment of the present invention.

[0191] Step S21-1: Obtain the received signal y, where the received signal y is a frequency-domain signal.

[0192] Step S21-2: Obtain the local primary synchronization signal sequence.

[0193] The local primary synchronization signal sequence can be NID2 = 0, 1, 2.

[0194] Step S22: Conjugate multiply the received signal with the local primary synchronization signal sequence to obtain the conjugate correlation sequence.

[0195] Conjugate correlation sequence = FFT(y) × conj(NID).

[0196] Step S23: Convert the conjugate correlation sequence into a time-domain correlation sequence.

[0197] Step S24: Select the maximum value from the time-domain correlation sequence as the correlation value corresponding to the cyclic cross-correlation calculation for the local primary synchronization signal sequence used this time.

[0198] By using the above steps, the maximum correlation values C max0 , C max1 , C max2 .

[0199] In some other embodiments, before conjugate multiplying the received signal with the local primary synchronization signal sequence, it further includes:

[0200] If the received signal is a time-domain signal, convert the received signal into a frequency-domain signal.

[0201] If the received signal is a time-domain signal, for the cyclic cross-correlation calculation, please refer to Figure 7 which is another schematic diagram of a cyclic cross-correlation calculation provided by an embodiment of the present invention.

[0202] Step S20: Obtain the received signal, where the received signal is a time-domain signal

[0203] Step S21-1: Convert the time-domain received signal into a frequency-domain received signal y.

[0204] Step S21-2: Obtain the local primary synchronization signal sequence.

[0205] The local primary synchronization signal sequence can be NID2 = 0, 1, 2.

[0206] Step S22: Multiply the received signal by the conjugate of the local primary synchronization signal sequence to obtain the conjugate correlation sequence.

[0207] Conjugate correlation sequence = FFT(y) × conj(NID2).

[0208] Step S23: Convert the conjugate correlation sequence into a time-domain correlation sequence.

[0209] Step S24: Select the maximum value from the time-domain correlation sequence as the correlation value for the cyclic cross-correlation calculation corresponding to the local primary synchronization signal sequence used this time.

[0210] By using the above steps, the maximum correlation values C max0 , C max1 , C max2 .

[0211] Please refer to Figure 8 the hardware structure diagram of a terminal provided in an embodiment of the present invention.

[0212] The terminal includes: an FFT / IFFT module 801, a correlation module 802, a data storage module 803, a data comparison module 804, and a frequency offset application module 805.

[0213] The FFT / IFT module is used to perform corresponding operations in the FFT / IFFT module according to the correlation calculation method used by the correlation module 802. FFT is used to convert a time-domain signal into a frequency-domain signal, and IFFT is used to convert a frequency-domain signal into a time-domain signal.

[0214] For example, if the sliding correlation calculation is adopted by the correlation module 802, the received signal is converted into a frequency-domain signal through FFT. If the cyclic cross-correlation calculation is adopted by the correlation module 802, the received signal is converted into a time-domain signal through IFFT.

[0215] The correlation module 802 is used to integrate the algorithms for correlation calculation, such as sliding correlation calculation or cyclic cross-correlation calculation.

[0216] The data storage module 803 is used to store the maximum correlation value output by the correlation module 802, the corresponding local primary synchronization signal sequence used, and the frequency offset value used.

[0217] A data comparison module 804 is configured to compare the maximum correlation values and select the maximum one among them as the final result obtained by the hierarchical search. For example, when the first-level search corresponding to the first step length is completed, the data comparison module 804 selects the frequency offset value corresponding to the maximum one from the first correlation values corresponding to the three local synchronization signal sequences as the estimated frequency offset value; when the second-level search corresponding to the second step length is completed, the data comparison module 804 selects the frequency offset value corresponding to the maximum one and the local primary synchronization signal sequence from the second correlation values corresponding to the three local synchronization signal sequences as the actual frequency offset value and the primary synchronization signal sequence existing in the received signal.

[0218] A frequency offset application module 805 is configured to perform frequency offset correction on the received signal according to the obtained actual frequency offset value for subsequent determination of the secondary synchronization signal.

[0219] Based on the same inventive concept, an embodiment of the present invention provides a method for cell search. Please refer to Figure 9 which is a flowchart of a cell search method provided by an embodiment of the present invention. The method includes:

[0220] Step 901: Perform primary synchronization signal detection on the received signal by using the above primary synchronization signal detection method to determine the actual offset value and the primary synchronization signal sequence existing in the received signal;

[0221] Step 902: Use the cyclic prefix-based carrier frequency deviation technique to determine the secondary synchronization signal sequence existing in the received signal from the frequency offset range corresponding to the actual offset value as the center frequency point;

[0222] Step 903: Determine the cell identifier by using the primary synchronization signal sequence and the secondary synchronization signal sequence.

[0223] In the embodiment provided by the present invention, the actual frequency offset value determined by using the primary synchronization signal detection method provided by the present invention can determine the accurate frequency offset value required for determining the secondary synchronization signal within the frequency offset range of the cyclic prefix-based carrier frequency deviation technique. Furthermore, by using the cyclic prefix-based carrier frequency deviation technique, the accurate frequency offset value can be quickly determined, and then the secondary synchronization signal sequence can be determined. Finally, the cell identifier can be quickly determined by using the secondary synchronization signal sequence and the primary synchronization signal sequence, improving the efficiency of searching for the cell identifier.

[0224] As Figure 10 shown, it is a schematic structural diagram of a primary synchronization signal detection device provided by an embodiment of the present invention. The primary synchronization signal detection device includes a memory S31, a transceiver S32, and a processor S33:

[0225] A memory S31 for storing a computer program; a transceiver S32 for transmitting and receiving data under the control of the processor S33; a processor S33 for reading the computer program in the memory S31 and executing the method for detecting the primary synchronization signal as described above.

[0226] Among them, in Figure 10 , the bus architecture may include any number of interconnected buses and bridges, specifically various circuits of one or more processors represented by the processor S33 and the memory represented by the memory S31 are linked together. The bus architecture can also link together various other circuits such as peripheral devices, voltage regulators, and power management circuits, which are well known in the art, so they will not be further described herein. The bus interface provides an interface. The transceiver S32 may be multiple components, that is, including a transmitter and a receiver, providing a unit for communicating with various other devices on the transmission medium, and these transmission mediums include wireless channels, wired channels, optical fiber cables, and other transmission mediums. For different user devices, the user interface S34 may also be an interface capable of externally connecting and internally connecting required devices, and the connected devices include but are not limited to a keypad, a display, a speaker, a microphone, a joystick, etc.

[0227] The processor S33 is responsible for managing the bus architecture and general processing, and the memory S31 may store data used by the processor S33 when executing operations.

[0228] Optionally, the processor S33 may be a CPU (Central Processing Unit), an ASIC (Application Specific Integrated Circuit), an FPGA (Field-Programmable Gate Array), or a CPLD (Complex Programmable Logic Device), and the processor may also adopt a multi-core architecture.

[0229] The processor is used to execute any of the methods provided in the embodiments of the present application according to the obtained executable instructions by calling the computer program stored in the memory. The processor and the memory may also be physically separated.

[0230] It should be noted here that the above-mentioned device provided in the embodiments of the present invention can implement all the method steps implemented in the above-mentioned method embodiments, and can achieve the same technical effects. The same parts and beneficial effects as those in the method embodiments will not be specifically described in this embodiment.

[0231] Based on the same inventive concept, in one embodiment of the present invention, a device for detecting a primary synchronization signal is provided. For the specific implementation of the method for detecting the primary synchronization signal of this device, reference may be made to the description in the embodiment section of the primary synchronization signal detection method. Repeated parts will not be elaborated again. Please refer to Figure 11 , the device includes:

[0232] A coarse search unit S41, configured to perform a coarse search within the frequency offset range supported by the terminal according to a first step size, and determine an estimated frequency offset value of the frequency offset existing in the received signal;

[0233] A fine search unit S42, configured to perform a fine search again within the sub-frequency offset range corresponding to the estimated frequency offset value as the center frequency point according to a second step size, and determine the actual frequency offset value of the frequency offset existing in the received signal and the primary synchronization signal sequence; wherein, the first step size is an integer multiple of the second step size.

[0234] A possible implementation manner, the coarse search unit S41 is specifically configured to:

[0235] Obtain a plurality of first frequency offset values from within the frequency offset range according to the first step size;

[0236] Based on each of the first frequency offset values and each local primary synchronization signal sequence stored locally, perform a correlation calculation on the received signal to obtain a plurality of first correlation values related to each local synchronization signal sequence;

[0237] Take the first frequency offset value corresponding to the largest of all the first correlation values as the estimated frequency offset value.

[0238] A possible implementation manner, the fine search unit S42 is further configured to:

[0239] Obtain a plurality of second frequency offset values from within the sub-frequency offset range according to the second step size;

[0240] Based on each of the second frequency offset values and each local primary synchronization signal sequence stored locally, perform a correlation calculation on the received signal to obtain a plurality of second correlation values related to each local synchronization signal sequence;

[0241] Take the second frequency offset value corresponding to the largest of all the second correlation values and the local primary synchronization signal sequence as the actual frequency offset value and the primary synchronization signal sequence respectively.

[0242] A possible implementation manner, the bandwidth of the frequency offset range is 6 times the subcarrier spacing corresponding to the received signal.

[0243] A possible implementation manner, the second step size is half of the subcarrier spacing of the received signal.

[0244] A possible implementation, the correlation calculation includes:

[0245] A sliding correlation calculation sub-unit and a cyclic correlation calculation sub-unit.

[0246] A possible implementation, the sliding correlation calculation sub-unit is specifically used for:

[0247] Convert the local primary synchronization signal sequence into a time-domain primary synchronization signal sequence with a first length;

[0248] Divide the time-domain primary synchronization signal sequence into a first sub-time-domain primary synchronization signal sequence and a second sub-time-domain primary synchronization signal sequence with the same length;

[0249] Perform sliding correlation operations on the first sub-time-domain primary synchronization signal sequence and the second sub-time-domain primary synchronization signal sequence with the received signal respectively to obtain a first sub-correlation sequence and a second sub-correlation sequence;

[0250] Take the modulus of the sum of the first sub-correlation sequence and the second sub-correlation sequence to obtain the correlation sequence corresponding to the correlation calculation;

[0251] Select the maximum value from the correlation sequence as the correlation value corresponding to the sliding correlation calculation, and record the local primary synchronization signal sequence used correspondingly.

[0252] A possible implementation, the sliding correlation calculation sub-unit is also used for:

[0253] Convert the local primary synchronization signal sequence into a time-domain primary synchronization signal sequence with a second length; wherein, the first length is twice the second length;

[0254] Perform an interpolation operation on the time-domain primary synchronization signal sequence with the second length to obtain the time-domain primary synchronization signal sequence with the first length.

[0255] A possible implementation, the cyclic reciprocity calculation sub-unit is specifically used for:

[0256] If the received signal is a frequency-domain signal, then conjugate multiply the received signal with the local primary synchronization signal sequence to obtain a conjugate correlation sequence corresponding to the local primary synchronization signal sequence;

[0257] Convert the conjugate correlation sequence into a time-domain correlation sequence;

[0258] Take the maximum value in the time-domain correlation sequence as the correlation value corresponding to the cyclic cross-correlation calculation, and record the local primary synchronization signal sequence used correspondingly.

[0259] A possible implementation manner, the cyclic cross-correlation calculation sub-unit is further configured to:

[0260] Before conjugate multiplying the received signal with the local primary synchronization signal sequence, if the received signal is a time-domain signal, convert the received signal into a frequency-domain signal.

[0261] As Figure 12 shown, a schematic structural diagram of a cell search device provided by an embodiment of the present invention. The cell search device includes a memory S51, a transceiver S52, and a processor S53:

[0262] The memory S51 is used to store a computer program; the transceiver S52 is used to transmit and receive data under the control of the processor S53; the processor S53 is used to read the computer program in the memory S51 and perform the following operations:

[0263] Perform primary synchronization signal detection on the received signal by using the primary synchronization signal detection method as described above, and determine the actual offset and the primary synchronization signal sequence existing in the received signal;

[0264] Adopt the carrier frequency offset technology based on the cyclic prefix to determine the secondary synchronization signal sequence existing in the received signal from the frequency offset range corresponding to the actual offset as the center frequency point;

[0265] Use the primary synchronization signal sequence and the secondary synchronization signal sequence to determine the cell identifier.

[0266] The transceiver S52 is used to receive and transmit data under the control of the processor S53.

[0267] Wherein, in Figure 12 , the bus architecture may include any number of interconnected buses and bridges, specifically various circuits of one or more processors represented by the processor S53 and the memory represented by the memory S51 are linked together. The bus architecture can also link various other circuits such as peripheral devices, voltage regulators, and power management circuits, which are well known in the art, so they will not be further described herein. The bus interface provides an interface. The transceiver S52 may be multiple elements, that is, including a transmitter and a receiver, and provides a unit for communicating with various other devices on a transmission medium, and these transmission mediums include wireless channels, wired channels, optical cables, etc. For different user devices, the user interface S54 may also be an interface capable of externally connecting and internally connecting required devices, and the connected devices include but are not limited to a keypad, a display, a speaker, a microphone, a joystick, etc.

[0268] The processor S53 is responsible for managing the bus architecture and general processing, and the memory S51 can store the data used by the processor S53 when executing operations.

[0269] Optionally, the processor S53 can be a CPU (Central Processing Unit), ASIC (Application Specific Integrated Circuit), FPGA (Field-Programmable Gate Array), or CPLD (Complex Programmable Logic Device). The processor can also adopt a multi-core architecture.

[0270] The processor is used to execute any of the methods provided in the embodiments of the present application according to the obtained executable instructions by calling the computer program stored in the memory. The processor and the memory can also be physically separated.

[0271] It should be noted here that the above device provided in the embodiments of the present invention can implement all the method steps implemented in the above method embodiments and can achieve the same technical effects. The same parts and beneficial effects as those in the method embodiments will not be specifically described herein.

[0272] Based on the same inventive concept, an embodiment of the present invention provides a cell search device. For the specific implementation manner of the cell search method of this device, reference can be made to the description in the embodiment part of the cell search method. The repeated parts will not be elaborated. Please refer to Figure 13 , and the device includes:

[0273] The first detection unit S61 is used to perform primary synchronization signal detection on the received signal by using the method described above, and determine the actual offset and the primary synchronization signal sequence existing in the received signal;

[0274] The second detection unit S62 is used to determine the secondary synchronization signal sequence existing in the received signal from the frequency offset range corresponding to the actual offset as the center frequency point by using the cyclic prefix-based carrier frequency offset technology;

[0275] The determination unit S63 is used to determine the cell identifier by using the primary synchronization signal sequence and the secondary synchronization signal sequence.

[0276] It should be noted that the division of units in the embodiments of this application is illustrative. It is only a logical function division, and there may be other division methods in actual implementation. In addition, in each embodiment of this application, each functional unit may be integrated into a processing unit, or each unit may exist physically alone, or two or more units may be integrated into one unit. The above-mentioned integrated units may be implemented in the form of hardware or in the form of software functional units.

[0277] If the above-mentioned integrated unit is implemented in the form of a software functional unit and sold or used as an independent product, it can be stored in a processor-readable storage medium. Based on this understanding, the technical solution of this application, in essence, or the part that contributes to the prior art, or all or part of this technical solution, can be embodied in the form of a software product. This computer software product is stored in a storage medium and includes several instructions for causing a computer device (which may be a personal computer, a server, or a network device, etc.) or a processor to execute all or part of the steps of the methods described in the various embodiments of this application. The aforementioned storage medium includes: various media that can store program codes such as USB flash drives, mobile hard disks, read-only memories (ROM), random access memories (RAM), magnetic disks, or optical discs.

[0278] It should be noted here that the above-mentioned device provided in the embodiments of the present invention can implement all the method steps implemented in the above-mentioned method embodiments and can achieve the same technical effects. The same parts and beneficial effects as those in the method embodiments will not be specifically described in this embodiment.

[0279] Based on the same inventive concept, the embodiments of the present invention also provide a processor-readable storage medium, characterized in that the processor-readable storage medium stores a computer program, and the computer program is used to cause the processor to execute the method for primary synchronization signal detection or the method for cell search as described above.

[0280] The processor-readable storage medium may be any available medium or data storage device that the processor can access, including but not limited to magnetic memories (such as floppy disks, hard disks, magnetic tapes, magneto-optical discs (MO), etc.), optical memories (such as CDs, DVDs, BDs, HVDs, etc.), and semiconductor memories (such as ROM, EPROM, EEPROM, non-volatile memories (NANDFLASH), solid-state drives (SSD)).

[0281] Those skilled in the art should understand that the embodiments of the present application can be provided as a method, a system, or a computer program product. Therefore, the present application can take the form of a complete hardware embodiment, a complete software embodiment, or an embodiment combining software and hardware aspects. Moreover, the present application can take the form of a computer program product implemented on one or more computer-usable storage media (including but not limited to disk storage and optical storage, etc.) that contain computer-usable program code.

[0282] The present application is described with reference to the flowcharts and / or block diagrams of methods, devices (systems), and computer program products according to the embodiments of the present application. It should be understood that each flow and / or block in the flowchart and / or block diagram, as well as the combination of flows and / or blocks in the flowchart and / or block diagram, can be implemented by computer-executable instructions. These computer-executable instructions can be provided to the processor of a general-purpose computer, a special-purpose computer, an embedded processor, or other programmable data processing devices to generate a machine, such that the instructions executed by the processor of the computer or other programmable data processing devices generate means for implementing the functions specified in Figure 1 one flow or multiple flows and / or blocks Figure 1 one block or multiple blocks.

[0283] These processor-executable instructions can also be stored in a processor-readable memory that can direct a computer or other programmable data processing device to work in a specific manner, such that the instructions stored in the processor-readable memory generate a manufactured article including instruction means that implement the functions specified in Figure 1 one flow or multiple flows and / or blocks Figure 1 one block or multiple blocks.

[0284] These processor-executable instructions can also be loaded onto a computer or other programmable data processing device, such that a series of operation steps are executed on the computer or other programmable device to generate a computer-implemented process, and thus the instructions executed on the computer or other programmable device provide steps for implementing the functions specified in Figure 1 one flow or multiple flows and / or blocks Figure 1 one block or multiple blocks.

[0285] Obviously, those skilled in the art can make various modifications and variations to the present application without departing from the spirit and scope of the present application. Thus, if these modifications and variations of the present application fall within the scope of the claims of the present application and their equivalent technologies, the present application is also intended to include these modifications and variations.

Claims

1. A method for detecting a primary synchronization signal, characterized in that Including: Performing a coarse search within the frequency offset range supported by the terminal according to a first step length to determine an estimated frequency offset value of the frequency offset existing in the received signal; Performing a fine search again within a sub-frequency offset range corresponding to the estimated frequency offset value as the center frequency point according to a second step length to determine an actual frequency offset value of the frequency offset existing in the received signal and a primary synchronization signal sequence; wherein, the first step length is an integer multiple of the second step length.

2. The method according to claim 1, characterized in that Performing a coarse search within the frequency offset range supported by the terminal according to a first step length to determine an estimated frequency offset value of the frequency offset existing in the received signal, including: Obtaining a plurality of first frequency offset values from within the frequency offset range according to the first step length; Performing a correlation calculation on the received signal based on each of the first frequency offset values and each locally stored local primary synchronization signal sequence to obtain a plurality of first correlation values related to each of the local synchronization signal sequences; Taking the first frequency offset value corresponding to the maximum value among all the first correlation values as the estimated frequency offset value.

3. The method according to claim 1, characterized in that, Performing a fine search again within a sub-frequency offset range corresponding to the estimated frequency offset value as the center frequency point according to a second step length, the actual frequency offset value of the frequency offset existing in the received signal and the primary synchronization signal sequence, including: Obtaining a plurality of second frequency offset values from within the sub-frequency offset range according to the second step length; Performing a correlation calculation on the received signal based on each of the second frequency offset values and each locally stored local primary synchronization signal sequence to obtain a plurality of second correlation values related to each of the local synchronization signal sequences; Taking the second frequency offset value corresponding to the maximum value among all the second correlation values and the local primary synchronization signal sequence as the actual frequency offset value and the primary synchronization signal sequence, respectively.

4. The method according to any one of claims 1 to 3, characterized in that, The bandwidth of the frequency offset range is 6 times the subcarrier spacing corresponding to the received signal.

5. The method according to any one of claims 1 to 3, characterized in that, The second step length is half of the subcarrier spacing of the received signal.

6. The method according to any one of claims 2-3, characterized in that, The correlation calculation includes: Sliding correlation calculation, cyclic correlation calculation.

7. The method according to claim 6, wherein The sliding correlation calculation includes: Converting the local primary synchronization signal sequence into a time-domain primary synchronization signal sequence with a first length; Dividing the time-domain primary synchronization signal sequence into a first sub-time-domain primary synchronization signal sequence and a second sub-time-domain primary synchronization signal sequence with the same length; Performing a sliding correlation operation on the first sub-time-domain primary synchronization signal sequence and the second sub-time-domain primary synchronization signal sequence with the received signal respectively to obtain a first sub-correlation sequence and a second sub-correlation sequence; Taking the modulo of the sum of the first sub-correlation sequence and the second sub-correlation sequence to obtain a correlation sequence corresponding to the correlation calculation; Selecting the maximum value from the correlation sequence as the correlation value corresponding to the sliding correlation calculation, and recording the locally stored primary synchronization signal sequence used correspondingly.

8. The method according to claim 7, wherein Converting the local primary synchronization signal sequence into a time-domain primary synchronization signal sequence with a first length, including: Converting the local primary synchronization signal sequence into a time-domain primary synchronization signal sequence with a second length; wherein, the first length is 2 times the second length; Performing an interpolation operation on the time-domain primary synchronization signal sequence with the second length to obtain the time-domain primary synchronization signal sequence with the first length.

9. The method according to claim 6, wherein The cyclic reciprocity calculation includes: If the received signal is a frequency-domain signal, conjugate multiply the received signal with the local primary synchronization signal sequence to obtain a conjugate correlation sequence corresponding to the local primary synchronization signal sequence; Convert the conjugate correlation sequence into a time-domain correlation sequence; Take the maximum value in the time-domain correlation sequence as the correlation value corresponding to the cyclic cross-correlation calculation, and record the local primary synchronization signal sequence used correspondingly.

10. The method according to claim 9, wherein Before conjugate multiplying the received signal with the local primary synchronization signal sequence, further include: If the received signal is a time-domain signal, convert the received signal into a frequency-domain signal.

11. A method for cell search, characterized in that, Include: Use the method according to any one of claims 1-10 to perform primary synchronization signal detection on the received signal, and determine the actual offset and the primary synchronization signal sequence existing in the received signal; Use the cyclic prefix-based carrier frequency offset technology to determine the secondary synchronization signal sequence existing in the received signal from the frequency offset range corresponding to the center frequency point with the actual offset; Use the primary synchronization signal sequence and the secondary synchronization signal sequence to determine the cell identifier.

12. An apparatus for detecting a primary synchronization signal, characterized in that Include a memory, a transceiver, and a processor: The memory is used to store computer programs; the transceiver is used to transmit and receive data under the control of the processor; the processor is used to read the computer programs in the memory and execute the method according to any one of claims 1-10.

13. An apparatus for detecting a primary synchronization signal, characterized in that, Include: A coarse search unit for performing a coarse search within the frequency offset range supported by the terminal at a first step size to determine the estimated frequency offset value of the frequency offset existing in the received signal; A fine search unit for performing a fine search again within the sub-frequency offset range corresponding to the center frequency point with the estimated frequency offset value at a second step size to determine the actual frequency offset value of the frequency offset existing in the received signal and the primary synchronization signal sequence; wherein, the first step size is an integer multiple of the second step size.

14. A device for cell search, characterized in that, Include a memory, a transceiver, and a processor: The memory is used to store computer programs; the transceiver is used to transmit and receive data under the control of the processor; the processor is used to read the computer programs in the memory and perform the following operations: Use the method according to any one of claims 1-10 to perform primary synchronization signal detection on the received signal, and determine the actual offset and the primary synchronization signal sequence existing in the received signal; Use the cyclic prefix-based carrier frequency offset technology to determine the secondary synchronization signal sequence existing in the received signal from the frequency offset range corresponding to the center frequency point with the actual offset; Use the primary synchronization signal sequence and the secondary synchronization signal sequence to determine the cell identifier.

15. A device for cell search, characterized in that, Include: A first detection unit for using the method according to any one of claims 1-10 to perform primary synchronization signal detection on the received signal, and determine the actual offset and the primary synchronization signal sequence existing in the received signal; A second detection unit for using the cyclic prefix-based carrier frequency offset technology to determine the secondary synchronization signal sequence existing in the received signal from the frequency offset range corresponding to the center frequency point with the actual offset; A determination detection unit for using the primary synchronization signal sequence and the secondary synchronization signal sequence to determine the cell identifier.

16. A processor-readable storage medium, characterized in that, The processor-readable storage medium stores a computer program for causing the processor to execute the method according to any one of claims 1 to 11.

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