Display device

Abstract

The present disclosure provides a display device including a coating layer or a dummy light emitting layer covering at least a portion of a bank layer, and capable of absorbing or blocking light emitted downward from the light emitting layer due to a lateral leakage current.

Description

[0001] This application claims priority to Korean Patent Application No. 10-2023-0191373, filed with the Korean Intellectual Property Office on December 26, 2023, which is incorporated herein by reference for all purposes as if fully set forth herein. Technical Field

[0002] The present disclosure relates to an electronic device having a display, and more particularly, to a display device. Background Art

[0003] As display technology has evolved to provide more functions, a display device may provide an image capture function, a sensing function, etc. in addition to an image display function.

[0004] To provide these functions, a display device may need to include optoelectronic devices such as a light receiving device, a camera, a sensor for detecting an image, etc.

[0005] To receive light passing through the front surface of the display device, it may be desirable for such optoelectronic devices to be located in an area of the display device that can receive and detect more incident light from the front surface.

[0006] To achieve the above object, in a display device, optoelectronic devices have been designed to be located at the front of the display device to allow optoelectronic devices such as a camera, a sensor, etc. to be more exposed to incident light.

[0007] To install optoelectronic devices in the display device in this way, the bezel area of the display device may be increased, or it may be necessary to form a cut or a hole in the display area of the related display panel.

[0008] Therefore, even when optoelectronic devices (e.g., a camera, a sensor, etc.) that receive or detect incident light and perform a predetermined function are attached to the display device, it is desirable for the display device to have a higher transmittance to perform the intended function. Summary of the Invention

[0009] The inventors of the present disclosure have invented a display device capable of preventing light from being emitted downward through a light emitting layer due to a lateral leakage current LLC.

[0010] One or more aspects of the present disclosure may provide a display device capable of absorbing light emitted downward through a light emitting layer due to a lateral leakage current LLC.

[0011] One or more aspects of the present disclosure may provide a display device capable of shielding light emitted downward through a light emitting layer due to a lateral leakage current LLC.

[0012] According to one or more exemplary embodiments of the present disclosure, a display device may be provided, the display device including: a substrate including a display area provided with a plurality of sub-pixels; an electrode layer located above the substrate; a bank layer covering a part of the electrode layer; a coating covering at least a part of the bank layer and including a light-absorbing material; and a light-emitting layer located on the electrode layer, the bank layer, and the coating.

[0013] According to one or more exemplary embodiments of the present disclosure, a display device may be provided, the display device including: a substrate including a display area provided with a plurality of sub-pixels; an electrode layer located above the substrate; a bank layer covering a part of the electrode layer; a virtual light-emitting layer covering at least a part of the bank layer and including a light-emitting material; a hole transport layer located on the electrode layer and the bank layer and covering the virtual light-emitting layer; and a main light-emitting layer located on the hole transport layer.

[0014] According to one or more aspects of the present disclosure, a display device capable of absorbing or shielding light emitted downward through a light-emitting layer due to a lateral leakage current LLC may be provided.

[0015] According to one or more aspects of the present disclosure, a display device capable of driving at low power based on improved performance of one or more sensors by absorbing or shielding light emitted downward through a light-emitting layer due to a lateral leakage current LLC may be provided. BRIEF DESCRIPTION OF THE DRAWINGS

[0016] The drawings, which are incorporated in and constitute a part of this specification, illustrate aspects of the present disclosure and, together with the description, serve to explain the principles of the present disclosure. In the drawings:

[0017] Figure 1 is a plan view of an exemplary display device according to aspects of the present disclosure.

[0018] Figure 2 illustrates an exemplary system configuration of a display device according to aspects of the present disclosure.

[0019] Figure 3 illustrates an exemplary equivalent circuit of a sub-pixel in a display panel according to aspects of the present disclosure.

[0020] Figure 4 illustrates an arrangement of sub-pixels in three exemplary regions included in a display area of a display device according to aspects of the present disclosure.

[0021] Figure 5A and Figure 5B According to various aspects of the present disclosure Figure 4 An exemplary enlarged plan view of the second optical area OA2.

[0022] Figure 6A and Figure 6B According to various aspects of the present disclosure Figure 5B An exemplary cross-sectional view taken along line AA'. DETAILED DESCRIPTION

[0023] Reference will now be made in detail to exemplary embodiments of the present disclosure, examples of which are illustrated in the accompanying drawings.

[0024] In the following description, unless otherwise specified, the structures, embodiments, implementations, methods and operations described herein are not limited to one or more specific examples set forth herein, and may be changed as known in the art. Throughout the specification, the same reference numerals refer to the same elements, unless otherwise specified. The names of the corresponding elements used in the following description are selected only for the convenience of writing the specification, and therefore, the names of the corresponding elements may be different from those used in the actual product. The advantages and features of the present disclosure and the implementation methods thereof will be clear by referring to the following exemplary embodiments described in the accompanying drawings. However, the present disclosure may be embodied in different forms and should not be interpreted as being limited to the exemplary embodiments set forth herein. On the contrary, these exemplary embodiments are provided so that the present disclosure is sufficiently thorough and complete to help those skilled in the art fully understand the scope of the present disclosure. In addition, the scope of protection of the present disclosure is defined by the claims and their equivalents. In the following description, if the detailed description of the relevant known functions or configurations may unnecessarily make the various aspects of the present disclosure difficult to understand, the detailed description of such known functions or configurations may be omitted. The shapes, sizes, ratios, angles, quantities, etc. shown in the drawings for describing various exemplary embodiments of the present disclosure are given only by way of example. Therefore, the present disclosure is not limited to the illustrations in the drawings. When the terms "comprising," "having," "including," "containing," "consisting of," "composed of," "formed of," etc. are used, one or more other elements may be added unless a term such as "only" is used. Elements described in the singular are intended to include plural elements and vice versa unless the context clearly indicates otherwise.

[0025] Although terms such as "first", "second", A, B, (a), (b), etc. may be used herein to describe various elements, these elements should not be construed as being limited by these terms, because these terms are not used to define a specific order or priority. These terms are only used to distinguish one element from another. For example, without departing from the scope of the present disclosure, the first element may be referred to as the second element, and similarly, the second element may be referred to as the first element.

[0026] When it is mentioned that the first element is "connected or coupled", "contacted or overlapped" with the second element, etc., it should be interpreted that the first element can not only be "directly connected or coupled" or "directly contacted or overlapped" with the second element, but also a third element can be "inserted" between the first and second elements, or the first and second elements can be "connected or coupled", "contacted or overlapped" with each other via a fourth element, etc. Here, the second element may include at least one of two or more elements that are "connected or coupled", "contacted or overlapped" with each other, etc.

[0027] When using time-related terms, such as "after", "subsequently", "then", "before", etc. to describe the process or operation of an element or configuration, or the flow or steps in an operation, process, and manufacturing method, these terms can be used to describe a non-continuous or non-temporal process or operation, unless used together with the terms "directly" or "immediately".

[0028] When describing a positional relationship, for example, using "on", "above", "below", "over", "under", "beside", "adjacent to", etc. to describe the positional relationship between two parts, one or more other parts may be located between the two parts, unless more restrictive terms are used, such as "immediately", "directly", or "closely". For example, when an element or layer is disposed "on" another element or layer, a third element or layer may be inserted therebetween. Additionally, the reference systems of terms such as "left", "right", "top", "bottom", "downward", "upward", "upper", "lower", etc. are arbitrary.

[0029] In addition, when referring to any dimension, relative size, etc., it should be considered that even if the relevant description is not specified, the numerical value or corresponding information (e.g., level, range, etc.) of an element or feature includes the tolerance or error range that may be caused by various factors (e.g., process factors, internal or external influences, noise, etc.). Additionally, the term "may" fully encompasses all the meanings of the term "able to".

[0030] Hereinafter, various exemplary embodiments of the present disclosure will be described in detail with reference to the accompanying drawings.

[0031] Figure 1It is a plan view of an exemplary display device 100 according to aspects of the present disclosure.

[0032] Referring Figure 1 , in one or more exemplary embodiments, the display device 100 may include a display panel 110 for displaying an image and one or more optoelectronic devices 11 and / or 12. Here, the optoelectronic device may be referred to as a light detector, a light receiver, or a light sensing device. The optoelectronic device may include one or more of a camera, a camera lens, a sensor, a sensor for detecting an image, etc.

[0033] The display panel 110 may include a display area DA that allows one or more images to be displayed and a non-display area NDA that does not display an image.

[0034] A plurality of sub-pixels and a variety of signal lines for driving the plurality of sub-pixels may be provided in the display area DA.

[0035] The non-display area NDA may refer to an area outside the display area DA.

[0036] A variety of signal lines may be provided in the non-display area NDA, and a variety of driving circuits may be connected to the signal lines.

[0037] At least a part of the non-display area NDA may be bent so that it cannot be seen from the front surface of the display device 100, or may be covered by a housing or a casing (not shown) of the display device 100.

[0038] The non-display area NDA may also be referred to as a bezel or a bezel area.

[0039] Referring Figure 1 , in one or more aspects, one or more optoelectronic devices 11 and / or 12 included in the display device 100 may be located below or at the lower part (the side opposite to the viewing surface) of the display panel 110.

[0040] Light may enter the front surface (viewing surface) of the display panel 110, pass through the display panel 110, and reach one or more optoelectronic devices 11 and / or 12 located below or at the lower part (the side opposite to the viewing surface) of the display panel 110.

[0041] One or more optoelectronic devices 11 and / or 12 may be devices capable of receiving or detecting light passing through the display panel 110 and performing a predetermined function based on the received light.

[0042] For example, one or more optoelectronic devices 11 and / or 12 may include one or more of the following: an image capture device, such as a camera (image sensor), etc.; or a sensor, such as a proximity sensor, an illuminance sensor, etc.

[0043] For example, the illuminance sensor may be an ambient light sensor, but the exemplary embodiments of the present disclosure are not limited thereto.

[0044] In a state where the display device 100 is turned on, the display device 100 can use the illuminance sensor to detect ambient light and adjust the brightness of the image displayed on the screen through the display panel 110 based on the brightness of the ambient light.

[0045] Referring to Figure 1 , in one or more aspects, the display area DA defined in the display panel 110 may include a normal area NA and one or more optical areas OA1 and / or OA2. Herein, the term "normal area" NA may be an area that exists in the display area DA and does not overlap with one or more optoelectronic devices 11 and / or 12. The normal area NA may also be referred to as a non-optical area.

[0046] Referring to Figure 1 , one or more optical areas OA1 and / or OA2 may be one or more areas that respectively overlap with one or more optoelectronic devices 11 and / or 12.

[0047] According to Figure 1 's example, the display area DA may include a normal area NA, a first optical area OA1, and a second optical area OA2.

[0048] In Figure 1 's example, a part of the normal area NA may exist between the first optical area OA1 and the second optical area OA2.

[0049] Although Figure 1 shows that each of the first optical area OA1 and the second optical area OA2 has a circular structure, the shapes of the first optical area OA1 and the second optical area OA2 according to the exemplary embodiments of the present disclosure are not limited thereto.

[0050] In one or more aspects, the first optical area OA1 may have various shapes, such as circular, oval, quadrilateral, hexagonal, octagonal, etc.

[0051] In one or more aspects, the second optical area OA2 may have various shapes, such as circular, oval, quadrilateral, hexagonal, octagonal, etc.

[0052] The first optical area OA1 and the second optical area OA2 may have the same or substantially the same or almost the same shape or different shapes.

[0053] In the following, for the sake of convenience of description, the provided discussion is based on an example in which each of the first optical region OA1 and the second optical region OA2 is circular. However, it should be understood that the scope of the present disclosure includes examples in which at least one of the first optical region OA1 and the second optical region OA2 has a shape other than circular.

[0054] In this example, at least a part of the first optical region OA1 may overlap with the first optoelectronic device 11, and at least a part of the second optical region OA2 may overlap with the second optoelectronic device 12.

[0055] In one or more aspects, one or more optical regions OA1 and / or OA2 included in the display panel 110 or the display device 100 need to be configured with an image display structure and a light-transmitting structure.

[0056] For example, since one or more optical regions OA1 and / or OA2 are corresponding parts of the display region DA, it is desirable to provide sub-pixels for displaying images in one or more optical regions OA1 and / or OA2.

[0057] In addition, in order for the light entering the display panel 110 or the display device 100 to reach one or more optoelectronic devices 11 and / or 12, it is also desirable that each of one or more optical regions OA1 and / or OA2 be configured with a light-transmitting structure.

[0058] It should be noted that although one or more optoelectronic devices 11 and / or 12 are devices that need to receive light, one or more optoelectronic devices 11 and / or 12 may be located on the back surface of the display panel 110 (for example, the side opposite to the viewing surface). Therefore, one or more optoelectronic devices 11 and / or 12 can receive the light that has passed through the display panel 110.

[0059] For example, one or more optoelectronic devices 11 and / or 12 may not be exposed on the front surface (viewing surface) of the display panel 110 or the display device 100.

[0060] Therefore, when the user views the front surface of the display device 100, one or more optoelectronic devices 11 and / or 12 are positioned so that the user cannot see them.

[0061] For example, the first optoelectronic device 11 may be a camera. For example, the second optoelectronic device 12 may be a sensor. The sensor may be a proximity sensor, an illuminance sensor, an infrared sensor, etc.

[0062] In one or more aspects, the camera may be a camera lens, an image sensor, or a unit including at least one of a camera lens and an image sensor, and the sensor may be an infrared sensor capable of detecting infrared light.

[0063] In one or more aspects, the first optoelectronic device 11 may be a sensor and the second optoelectronic device 12 may be a camera.

[0064] In the following, for ease of description, the provided discussion is based on an example in which the first optoelectronic device 11 is a camera and the second optoelectronic device 12 is a sensor. However, it should be understood that the scope of the present disclosure includes examples in which the first optoelectronic device 11 is a sensor and the second optoelectronic device 12 is a camera.

[0065] For example, the camera may be a camera lens, an image sensor, or a unit including at least one of a camera lens and an image sensor.

[0066] In an example in which the first optoelectronic device 11 is a camera, the camera may be located on the back surface (e.g., below or at the lower part) of the display panel 110 and may be a front camera for capturing an object or an image in the front direction of the display panel 110.

[0067] Accordingly, a user can capture an image or an object through a camera that is invisible on the viewing surface while viewing the viewing surface of the display panel 110.

[0068] When the normal area NA and one or more optical areas OA1 and / or OA2 included in the display area DA have a common function of allowing image display, they differ in that the normal area NA may be an area where a light-transmitting structure does not need to be implemented, but one or more optical areas OA1 and / or OA2 may be areas where a light-transmitting structure needs to be implemented. Accordingly, in one or more aspects, the normal area NA may be an area where a light-transmitting structure is not implemented or not included, and one or more optical areas OA1 and / or OA2 may be areas where a light-transmitting structure is implemented or included.

[0069] In one or more aspects, one or more optical areas OA1 and / or OA2 may have a light transmittance greater than or equal to a predetermined level, that is, a relatively high light transmittance, and the normal area NA may have a light transmittance less than the predetermined level or no light transmittance.

[0070] For example, one or more optical areas OA1 and / or OA2 may have a different resolution, sub-pixel arrangement structure, number of sub-pixels per unit area, electrode structure, line structure, electrode arrangement structure, line arrangement structure, etc. from those of the normal area NA.

[0071] For example, the number of sub-pixels per unit area in one or more optical areas OA1 and / or OA2 may be less than the number of sub-pixels per unit area in the normal area NA.

[0072] For example, the resolution of one or more optical regions OA1 and / or OA2 may be lower than the resolution of the normal region NA.

[0073] Here, the number of sub-pixels per unit area may be a unit for measuring resolution. For example, it is called pixels (or sub-pixels) per inch (PPI) which represents the number of pixels (or sub-pixels) within one inch.

[0074] For example, the number of sub-pixels per unit area in the first optical region OA1 may be less than the number of sub-pixels per unit area in the normal region NA.

[0075] For example, the number of sub-pixels per unit area in the second optical region OA2 may be greater than or equal to the number of sub-pixels per unit area in the first optical region OA1.

[0076] In this document, in an example where the display device 100 has a structure in which a first optoelectronic device 11 such as a camera is located below or at the lower part of the display panel 110 without being exposed, such a display device 100 may be called a display applying under-display camera (UDC) technology.

[0077] According to these examples, the display device 100 can have the advantage of avoiding a reduction in the size of the display area DA because there is no need to form a cutout or a camera hole for exposing the camera in the display panel 110.

[0078] In fact, since there is no need to form a cutout or a camera hole for exposing the camera in the display panel 110, the display device 100 can provide a further advantage of reducing the size of the bezel region and increasing the design freedom due to the removal of these design limitations.

[0079] Even if one or more optoelectronic devices 11 and / or 12 are located on the back (e.g., below or at the lower part) of the display panel 110 of the display device 100, for example, hidden or not exposed, one or more optoelectronic devices 11 and / or 12 still need to perform a predetermined function by normally receiving or detecting light.

[0080] In addition, in the display device 100, even if one or more optoelectronic devices 11 and / or 12 are located on the back surface (e.g., below or at the lower part) of the display panel 110 to be hidden and overlap with the display area DA, it is still necessary to normally perform image display in one or more optical areas OA1 and / or OA2 that overlap with one or more optoelectronic devices 11 and / or 12 in the display area DA. Therefore, in one or more examples, even when one or more optoelectronic devices 11 and / or 12 are located on the back surface of the display panel, images can be displayed in one or more optical areas OA1 and / or OA2 that overlap with one or more optoelectronic devices 11 and / or 12 in the display area DA in a normal manner (e.g., without degrading the image quality).

[0081] Figure 2 An exemplary system configuration of the display device 100 according to aspects of the present disclosure is shown.

[0082] Referring Figure 2 , the display device 100 may include a display panel 110 and a display driving circuit as components for displaying one or more images.

[0083] The display driving circuit may be a circuit for driving the display panel 110 and includes a data driving circuit 220, a gate driving circuit 230, a display controller 240, and other circuit components.

[0084] The display panel 110 may include a display area DA that allows one or more images to be displayed and a non-display area NDA that does not display images.

[0085] The non-display area NDA may be an area outside the display area DA and may also be referred to as an edge area or a border area.

[0086] All or a part of the non-display area NDA may be an area visible from the front surface of the display device 100, or a curved area that is not visible from the front surface of the display device 100.

[0087] The display panel 110 may include a substrate SUB and a plurality of sub-pixels SP disposed on the substrate SUB.

[0088] The display panel 110 may further include various signal lines for driving the plurality of sub-pixels SP.

[0089] In one or more aspects, the display device 100 may be a liquid crystal display device, or a self-emitting display device in which the display panel itself emits light, etc.

[0090] In an example where the display device 100 is a self-emitting display device, each of the plurality of sub-pixels SP may include a light-emitting element.

[0091] For example, the display device 100 according to aspects of the present disclosure may be an organic light-emitting display device that uses organic light-emitting diodes (OLEDs) to implement the light-emitting element ED.

[0092] In another example, the display device 100 according to aspects of the present disclosure may be an inorganic light-emitting display device that uses light-emitting diodes based on inorganic materials to implement the light-emitting element.

[0093] In yet another example, the display device 100 according to aspects of the present disclosure may be a quantum dot display device that uses quantum dots (self-luminous semiconductor crystals) to implement the light-emitting element.

[0094] The structure of each of the plurality of sub-pixels SP may be configured or designed differently according to the type of the display device 100.

[0095] For example, in an example where the display device 100 is a self-luminous display device including self-luminous sub-pixels SP, each sub-pixel SP may include a self-luminous light-emitting element, one or more transistors, and one or more capacitors.

[0096] In one or more aspects, for example, various signal lines arranged in the display device 100 may include a plurality of data lines DL for transmitting data signals (which may be referred to as data voltages or image signals), a plurality of gate lines GL for transmitting gate signals (which may be referred to as scan signals), and the like.

[0097] The plurality of data lines DL and the plurality of gate lines GL may intersect each other.

[0098] Each of the plurality of data lines DL may be configured to extend in a first direction.

[0099] Each of the plurality of gate lines GL may be configured to extend in a second direction.

[0100] For example, the first direction may be a column direction or a vertical direction, and the second direction may be a row direction or a horizontal direction.

[0101] In another example, the first direction may be a row direction or a horizontal direction, and the second direction may be a column direction or a vertical direction.

[0102] The data driving circuit 220 may be a circuit for driving the plurality of data lines DL and capable of providing data signals to the plurality of data lines DL.

[0103] The gate driving circuit 230 may be a circuit for driving the plurality of gate lines GL and capable of providing gate signals to the plurality of gate lines GL.

[0104] The display controller 240 may be a device for controlling the data driving circuit 220 and the gate driving circuit 230, and is capable of controlling the driving times of the plurality of data lines DL and the driving times of the plurality of gate lines GL.

[0105] The display controller 240 is capable of providing a data driving control signal DCS to the data driving circuit 220 to control the data driving circuit 220, and providing a gate driving control signal GCS to the gate driving circuit 230 to control the gate driving circuit 230.

[0106] The display controller 240 may receive image data input from the host system 250, and provide the image data Data to the data driving circuit 220 based on the input image data.

[0107] The data driving circuit 220 may control the provision of data signals to the plurality of data lines DL according to the driving timing of the display controller 240.

[0108] The data driving circuit 220 may receive digital image data Data from the display controller 240, convert the received image data Data into an analog data signal, and output the generated analog data signal to the plurality of data lines DL.

[0109] The gate driving circuit 230 may control the provision of gate signals to the plurality of gate lines GL according to the timing of the display controller 240.

[0110] The gate driving circuit 230 may receive a first gate voltage corresponding to the conduction level voltage and a second gate voltage corresponding to the turn-off level voltage, as well as various gate driving control signals GCS, generate gate signals, and provide the generated gate signals to the plurality of gate lines GL.

[0111] In one or more aspects, the data driving circuit 220 may be connected to the display panel 110 by tape automated bonding (TAB) technology, or connected to a conductive pad such as a bonding pad of the display panel 110 by chip on glass (COG) technology or chip on panel (COP) technology, or connected to the display panel 110 by chip on film (COF) technology.

[0112] In one or more aspects, the gate driving circuit 230 may be connected to the display panel 110 by tape automated bonding (TAB) technology, or connected to a conductive pad such as a bonding pad of the display panel 110 by chip on glass (COG) technology or chip on panel (COP) technology, or connected to the display panel 110 by chip on film (COF) technology.

[0113] In one or more aspects, the gate driving circuit 230 may be disposed in the non-display area NDA of the display panel 110 by the gate-in-panel (GIP) technology.

[0114] The gate driving circuit 230 may be disposed on or connected to the substrate.

[0115] In an example of the gate driving circuit 230 implemented by the GIP technology, the gate driving circuit 230 may be disposed in the non-display area NDA of the substrate.

[0116] In examples of the gate driving circuit 230 implemented by the chip-on-glass (COG) technology, chip-on-film (COP) technology, etc., the gate driving circuit 230 may be connected to the substrate.

[0117] In one or more aspects, at least one of the data driving circuit 220 and the gate driving circuit 230 may be disposed in the display area DA of the display panel 110.

[0118] For example, at least one of the data driving circuit 220 and the gate driving circuit 230 may be configured not to overlap with the sub-pixels SP, or configured to overlap with one or more or all of the sub-pixels SP, or at least one or more corresponding parts of one or more sub-pixels.

[0119] In one or more aspects, the data driving circuit 220 may be disposed on and / or electrically connected to one side or a part (e.g., the upper edge or the lower edge) of the display panel 110, but not limited thereto.

[0120] In one or more aspects, the data driving circuit 220 may be located on and / or electrically connected to at least two of two sides or two parts (e.g., the upper edge and the lower edge) or four sides or four parts (e.g., the upper edge, the lower edge, the left edge, and the right edge) of the display panel 110 according to the driving scheme, panel design scheme, etc., but not limited thereto.

[0121] In one or more aspects, the gate driving circuit 230 may be located on and / or electrically connected to one side or a part (e.g., the left edge or the right edge) of the display panel 110, but not limited thereto.

[0122] In one or more aspects, the gate driving circuit 230 may be located on and / or electrically connected to at least two of two sides or two parts (e.g., the left edge and the right edge) or four sides or four parts (e.g., the upper edge, the lower edge, the left edge, and the right edge) of the display panel 110 according to the driving scheme, panel design scheme, etc., but not limited thereto.

[0123] The display controller 240 can be implemented as a component separate from the data driving circuit 220 or integrated in the data driving circuit 220, and thus implemented as an integrated circuit.

[0124] The display controller 240 can be a timing controller used in typical display technologies, or a controller or control device capable of performing other control functions in addition to the functions of a typical timing controller. In one or more embodiments, the display controller 240 can be a controller or control device different from the timing controller, or a circuit or component included in the controller or control device.

[0125] The display controller 240 can be implemented using various circuits or electronic components such as integrated circuits (ICs), field-programmable gate arrays (FPGAs), application-specific integrated circuits (ASICs), processors, etc.

[0126] The display controller 240 can be mounted on a printed circuit board, a flexible printed circuit, etc., and can be electrically connected to the gate driving circuit 230 and the data driving circuit 220 through a printed circuit board, a flexible printed circuit, etc.

[0127] The display controller 240 can send signals to the data driving circuit 220 and receive signals from the data driving circuit 220 via one or more predetermined interfaces.

[0128] For example, such interfaces can include a low-voltage differential signaling (LVDS) interface, an embedded clock point-to-point interface (EPI), a serial peripheral interface (SPI), etc.

[0129] In one or more aspects, in order to further provide a touch sensing function and an image display function, the display device 100 can include a touch sensor and a touch sensing circuit capable of detecting whether a touch object such as a finger or a pen applies a touch or detecting a touch position (or touch coordinates) by sensing the touch sensor.

[0130] The touch sensing circuit can include a touch driving circuit 260 capable of generating and providing touch sensing data by driving and sensing the touch sensor, a touch controller 270 capable of using the touch sensing data to detect whether a touch is applied or detecting a touch position (or touch coordinates), and one or more other components.

[0131] The touch sensor can include a plurality of touch electrodes.

[0132] The touch sensor can further include a plurality of touch lines for electrically connecting the plurality of touch electrodes to the touch driving circuit 260.

[0133] The touch sensor can be implemented in the form of a touch panel outside the display panel 110 or integrated inside the display panel 110.

[0134] In an example where the touch sensor is implemented in the form of a touch panel located outside the display panel 110, such a touch sensor may be referred to as an additional type.

[0135] In an example where the additional type touch sensor is provided in the display device 100, the touch panel and the display panel 110 may be separately manufactured and combined in an assembly process.

[0136] The additional type touch panel may include a touch panel substrate and a plurality of touch electrodes provided on the touch panel substrate.

[0137] In an example where the touch sensor is integrated inside the display panel 110, during the manufacturing process of the display panel 110, the touch sensor may be formed on the substrate SUB together with signal lines and electrodes related to display driving.

[0138] The touch driving circuit 260 may provide a touch driving signal to at least one of the plurality of touch electrodes, and sense at least one of the plurality of touch electrodes to generate touch sensing data.

[0139] The touch sensing circuit may perform touch sensing through self - capacitance sensing technology or mutual - capacitance sensing technology.

[0140] In an example where the touch sensing circuit performs touch sensing through self - capacitance sensing technology, the touch sensing circuit may perform touch sensing based on the capacitance between one or more touch electrodes and an object such as a finger or a pen.

[0141] According to the self - capacitance sensing method, each of the plurality of touch electrodes may be used as a driving touch electrode and a sensing touch electrode.

[0142] The touch driving circuit 260 may drive all or one or more of the plurality of touch electrodes, and sense all or one or more of the plurality of touch electrodes.

[0143] In an example where the touch sensing circuit performs touch sensing through mutual - capacitance sensing technology, the touch sensing circuit may perform touch sensing based on the capacitance between touch electrodes.

[0144] According to the mutual - capacitance sensing technology, the plurality of touch electrodes may be divided into driving touch electrodes and sensing touch electrodes.

[0145] The touch driving circuit 260 may drive the driving touch electrodes and sense the sensing touch electrodes.

[0146] The touch driving circuit 260 and the touch controller 270 included in the touch sensing circuit may be implemented as separate devices or a single device.

[0147] In addition, the touch driving circuit 260 and the data driving circuit 220 may be implemented as separate devices or a single device.

[0148] The display device 100 may further include a power supply circuit for supplying various powers to the display driving circuit and / or the touch sensing circuit.

[0149] In some aspects, the display device 100 may be a mobile terminal such as a smart phone, a tablet computer, etc., or a monitor, a television (TV), etc. These devices may be configured in various types, sizes, and shapes. The display device 100 according to aspects of the present disclosure is not limited thereto, and may include various types, sizes, and shapes configured to display information or images.

[0150] As described above, the display area DA of the display panel 110 may include a normal area NA and one or more optical areas OA and / or OA2, as Figure 1 shown.

[0151] The normal area NA and one or more optical areas OA and / or OA2 may be areas allowing image display.

[0152] Here, it should be noted that the normal area NA may be an area where a light transmissive structure does not need to be implemented, and one or more optical areas OA and / or OA2 may be areas where a light transmissive structure needs to be implemented.

[0153] As described above, although the display area DA of the display panel 110 may include one or more optical areas OA1 and / or OA2 and the normal area NA, for ease of description, the following discussion is provided based on an example where the display area DA includes a first optical area OA1 and a second optical area OA2.

[0154] Figure 3 An exemplary equivalent circuit of a sub-pixel SP in the display panel 110 according to aspects of the present disclosure is shown.

[0155] Each sub-pixel SP provided in the normal area NA, the first optical area OA1, and the second optical area OA2 included in the display area DA of the display panel 110 may include an optical element ED, a driving transistor DRT for driving the optical element ED, a scanning transistor SCT for transmitting a data voltage Vdata to a first node N1 of the driving transistor DRT, a storage capacitor Cst for holding a voltage at an approximately constant level during one frame, etc.

[0156] The driving transistor DRT may include a first node N1 to which a data voltage is applied, a second node N2 electrically connected to the light emitting element ED, and a third node N3 to which a driving voltage ELVDD transmitted through a driving voltage line DVL is applied.

[0157] In the driving transistor DRT, the first node N1 can be a gate node, the second node N2 can be a source node or a drain node, and the third node N3 can be a drain node or a source node.

[0158] The light-emitting element ED can include a first electrode layer AE, a light-emitting layer EL, and a second electrode layer CE.

[0159] The first electrode layer AE can be a pixel electrode provided in each sub-pixel SP and can be electrically connected to the second node N2 of the driving transistor DRT of each sub-pixel SP.

[0160] The second electrode layer CE can be a common electrode provided in all or some of a plurality of sub-pixels SP. For example, a base voltage ELVSS can be applied to the second electrode layer CE.

[0161] For example, the first electrode layer AE can be a pixel electrode and the second electrode layer CE can be a common electrode.

[0162] In another example, the first electrode layer AE can be a common electrode and the second electrode layer CE can be a pixel electrode.

[0163] Hereinafter, for the sake of convenience of explanation, the provided discussion is based on an example in which the first electrode layer AE is a pixel electrode and the second electrode layer CE is a common electrode.

[0164] In one or more aspects, the light-emitting element ED can be an organic light-emitting diode (OLED), an inorganic light-emitting diode, a quantum dot (QD) light-emitting element, etc.

[0165] In an example where the light-emitting element ED is an organic light-emitting diode, the light-emitting layer EL of the light-emitting element ED can include an organic light-emitting layer containing an organic material.

[0166] The scan transistor SCT can be turned on and off by a scan signal SCAN. The scan signal SCAN is a gate signal applied through a gate line GL. The scan transistor SCT is electrically connected between the first node N1 of the driving transistor DRT and a data line DL.

[0167] The storage capacitor Cst can be electrically connected between the first node N1 and the second node N2 of the driving transistor DRT.

[0168] As Figure 3 shown, each sub-pixel SP can include two transistors (2T: DRT and SCT) and one capacitor (1C: Cst) (which can be referred to as a "2T1C structure"), and in some cases, can further include one or more transistors and / or further include one or more capacitors.

[0169] The storage capacitor Cst may be an external capacitor intentionally designed to be located outside the driving transistor DRT, rather than an internal capacitor, such as a parasitic capacitor (e.g., Cgs or Cgd) formed between the first node N1 and the second node N2 of the driving transistor DRT.

[0170] In one or more aspects, each of the driving transistor DRT and the scanning transistor SCT may be an n-type transistor or a p-type transistor.

[0171] In one or more aspects, each of the driving transistor DRT and the scanning transistor SCT may be a low-temperature polysilicon transistor.

[0172] However, the exemplary embodiments of the present disclosure are not limited thereto. For example, at least one of the driving transistor DRT and the scanning transistor SCT may be an oxide thin-film transistor.

[0173] Since the circuit elements included in each sub-pixel SP (particularly, the light-emitting element ED implemented by an organic light-emitting diode including an organic material) are vulnerable to external moisture or oxygen, in order to prevent external moisture or oxygen from penetrating into the circuit elements, the encapsulation layer ENCAP may be configured to cover the circuit elements (e.g., the light-emitting element ED).

[0174] Figure 4 The arrangement of sub-pixels SP in three exemplary regions NA, OA1, and OA2 included in the display area of the display device 100 according to aspects of the present disclosure is shown.

[0175] Refer to Figure 4 , in one or more exemplary embodiments, a plurality of sub-pixels SP may be provided in each of the normal region NA, the first optical region OA1, and the second optical region OA2 included in the display area DA.

[0176] For example, the plurality of sub-pixels SP may include a red sub-pixel (Red SP) that emits red light, a green sub-pixel (Green SP) that emits green light, and a blue sub-pixel (Blue SP) that emits blue light.

[0177] Therefore, each of the normal region NA, the first optical region OA1, and the second optical region OA2 may include one or more light-emitting regions EA of one or more red sub-pixels (Red SP), one or more light-emitting regions EA of one or more green sub-pixels (Green SP), and one or more light-emitting regions EA of one or more blue sub-pixels (Blue SP).

[0178] Refer to Figure 4 , the normal region NA may not include a light-transmitting structure, but may include a light-emitting region EA.

[0179] In one or more aspects, each of the first optical region OA1 and the second optical region OA2 may need to include a light-transmissive structure and a light-emitting region EA.

[0180] Thus, in one or more aspects, the first optical region OA1 may include one or more light-emitting regions EA and one or more first light-transmissive regions TA1, and the second optical region OA2 may include one or more light-emitting regions EA and one or more second light-transmissive regions TA2.

[0181] The light-emitting region EA and the light-transmissive regions TA1 and TA2 may be distinguishable from each other based on whether light transmission is allowed.

[0182] For example, the light-emitting region EA may be a region where light transmission is not allowed (e.g., light is not allowed to transmit to the back surface of the display panel), and the light-transmissive regions TA1 and / or TA2 may be regions where light transmission is allowed (e.g., light is allowed to transmit to the back surface of the display panel).

[0183] The light-emitting region EA and the light-transmissive regions TA1 and TA2 may also be distinguishable from each other based on whether the second electrode layer CE is provided (e.g., Figure 3 the second electrode layer CE).

[0184] For example, the second electrode layer CE may be provided in the light-emitting region EA, while the second electrode layer CE may not be provided in the light-transmissive regions TA1 and TA2.

[0185] In one or more aspects, a light-shielding layer may be provided in the light-emitting region EA, and the light-shielding layer may not be provided in the light-transmissive regions TA1 and / or TA2.

[0186] Since the first optical region OA1 includes the first light-transmissive region TA1 and the second optical region OA2 includes the second light-transmissive region TA2, the first optical region OA1 and the second optical region OA2 may be regions where light transmission is allowed.

[0187] The light transmittance (transparency) of the first optical region OA1 and the light transmittance (transparency) of the second optical region OA2 may be substantially the same.

[0188] In this context, substantially the same may mean a degree that is considered to be equal to each other considering minor differences caused by errors in the manufacturing process of the display panel 110 or the display device 100.

[0189] According to this definition, the first light-transmissive region TA1 of the first optical region OA1 and the second light-transmissive region TA2 of the second optical region OA2 may have substantially the same shape or size.

[0190] In one or more aspects, even if the first light-transmitting region TA1 of the first optical region OA1 and the second light-transmitting region TA2 of the second optical region OA2 have different shapes or sizes, the proportion of the first light-transmitting region TA1 in the first optical region OA1 and the proportion of the second light-transmitting region TA2 in the second optical region OA2 can be substantially the same.

[0191] However, the exemplary embodiments of the present disclosure are not limited thereto. For example, the light transmittance (transparency) of the first optical region OA1 and the light transmittance (transparency) of the second optical region OA2 can be different from each other.

[0192] In this implementation, the first light-transmitting region TA1 of the first optical region OA1 and the second light-transmitting region TA2 of the second optical region OA2 can have different shapes or sizes.

[0193] In one or more aspects, even if the first light-transmitting region TA1 of the first optical region OA1 and the second light-transmitting region TA2 of the second optical region OA2 have substantially the same shape or size, the proportion of the first light-transmitting region TA1 in the first optical region OA1 and the proportion of the second light-transmitting region TA2 in the second optical region OA2 can be different from each other.

[0194] For example, in an example where the first optoelectronic device 11 overlapping with the first optical region OA1 is a camera and the second optoelectronic device 12 overlapping with the second optical region OA2 is a sensor for detecting an image, the camera may require more light than the sensor.

[0195] In this example, the light transmittance (transparency) of the first optical region OA1 can be greater than the light transmittance (transparency) of the second optical region OA2.

[0196] In this implementation, all or each of the first light-transmitting regions TA1 of the first optical region OA1 can have an area greater than all or each of the second light-transmitting regions TA2 of the second optical region OA2.

[0197] In one or more aspects, even if the first light-transmitting region TA1 of the first optical region OA1 and the second light-transmitting region TA2 of the second optical region OA2 have substantially the same size, the proportion of the first light-transmitting region TA1 in the first optical region OA1 can also be greater than the proportion of the second light-transmitting region TA2 in the second optical region OA2.

[0198] In one or more aspects, as Figure 4 shown, the first light-transmitting region TA1 of the first optical region OA1 can have a circular shape in a plan view, but the exemplary embodiments of the present disclosure are not limited to this shape of the first light-transmitting region TA1.

[0199] For example, the first light-transmitting region TA1 of the first optical region OA1 may have an octagon, or may have an ellipse or a polygon in a plan view.

[0200] As described above, by changing the shape of the first light-transmitting region TA1, the light transmittance of the first optical region OA1 can be adjusted, and the area or size of the light-emitting region of the first optical region OA1 can be adjusted.

[0201] Hereinafter, for convenience of explanation, the provided discussion is based on an example in which the light transmittance (transmittance) of the first optical region OA1 is greater than the light transmittance (transmittance) of the second optical region OA2.

[0202] In addition, as Figure 4 shown, the light-transmitting regions TA1 and TA2 may be referred to as transparent regions, and the light transmittance may also be referred to as transparency.

[0203] In the following discussion, as Figure 4 shown, it is assumed that the first optical region OA1 and the second optical region OA2 are located above the display region DA of the display panel 110 and are arranged side by side left and right.

[0204] Referring to Figure 4 , the horizontal display region where the first optical region OA1 and the second optical region OA2 are provided may be referred to as the first horizontal display region HA1, and the horizontal display region where the first optical region OA1 and the second optical region OA2 are not provided may be referred to as the second horizontal display region HA2.

[0205] Referring to Figure 4 , the first horizontal display region HA1 may include a part of the normal region NA, the first optical region OA1, and the second optical region OA2.

[0206] The second horizontal display region HA2 may include only the normal region NA.

[0207] Figure 5A And Figure 5B is an exemplary enlarged plan view of the second optical region OA2 according to aspects of the present disclosure. Figure 4

[0208] Referring to Figure 5A and Figure 5B , the second optical region OA2 may include sub-pixels SP arranged in a Z shape.

[0209] Each sub-pixel SP can be one of a red sub-pixel (Red SP), a green sub-pixel (Green SP), and a blue sub-pixel (Blue SP). A unit pixel can be implemented by including two or more of the red sub-pixel (Red SP), the green sub-pixel (Green SP), and the blue sub-pixel (Blue SP).

[0210] In one or more aspects, each of the plurality of sub-pixels SP can further include a white sub-pixel.

[0211] In one or more aspects, a sub-pixel rendering algorithm can be used to implement two sub-pixels as one pixel.

[0212] In these examples, the sub-pixel rendering algorithm can compensate for the insufficient color representation in each pixel group based on the average value of the corresponding color data of adjacent pixels.

[0213] It should be noted that Figure 5A and Figure 5B the configuration of the second light-transmitting region TA2 of Figure 4 can be substantially the same as the configuration of the second light-transmitting region TA2 of

[0214] Figure 5A is a plan view showing an example where the cover layer CL is not located on the bank layer BNK, Figure 5B is a plan view showing an example where the cover layer CL is located on the bank layer BNK.

[0215] The cover layer CL can be referred to as a coating CL1 or a virtual light-emitting layer CL2, which will be discussed later.

[0216] Referring to Figure 5B the cover layer CL can cover a part of the bank layer BNK.

[0217] For example, the cover layer CL can cover all or at least a part of the bank layer BNK in the second optical region OA2.

[0218] The cover layer CL will be discussed in detail below with reference to Figure 6A and Figure 6B .

[0219] Figure 6A and Figure 6B are exemplary cross-sectional views taken along line A-A' of Figure 5B according to aspects of the present disclosure.

[0220] Figure 6A The cover layer CL in Figure 6B can be referred to as a coating CL1,

[0221] Reference Figure 6A and Figure 6B , various patterns (ACT, SD1, GATE, etc.), various insulating layers (BUF, GI, ILD1, ILD2, PAS, etc.), and various metal patterns (TM, GM, ML1, ML2, etc.) for forming one or more transistors such as a driving transistor DRT and a scanning transistor SCT can be provided on or above a substrate SUB.

[0222] Reference Figure 6A and Figure 6B , a buffer layer BUF can be provided on the substrate SUB.

[0223] A first metal layer ML1 and a second metal layer ML2 can be provided on the substrate SUB.

[0224] For example, the first metal layer ML1 and the second metal layer ML2 can be a light shielding layer LSL configured to shield light.

[0225] The buffer layer BUF can be provided on the first metal layer ML1 and the second metal layer ML2.

[0226] An active layer ACT of the driving transistor DRT can be provided on the buffer layer BUF.

[0227] A gate insulating layer GI can be configured to cover the active layer ACT.

[0228] A gate GATE of the driving transistor DRT can be provided on the gate insulating layer GI.

[0229] In one or more aspects, a gate material layer GM can be provided on the gate insulating layer GI together with the gate GATE of the driving transistor DRT at a position different from the region where the driving transistor DRT is formed.

[0230] A first interlayer insulating layer ILD1 can be configured to cover the gate GATE and the gate material layer GM.

[0231] A metal pattern TM can be provided on the first interlayer insulating layer ILD1.

[0232] The metal pattern TM can be located at a position different from the region where the driving transistor DRT is formed.

[0233] A second interlayer insulating layer ILD2 can be configured to cover the metal pattern TM on the first interlayer insulating layer ILD1.

[0234] Two first source / drain pattern layers SD1 can be provided on the second interlayer insulating layer ILD2.

[0235] One of the two first source-drain pattern layers SD1 may be the source node of the driving transistor DRT, and the other may be the drain node of the driving transistor DRT.

[0236] The two first source-drain pattern layers SD1 may be electrically connected to corresponding portions (e.g., opposite first and second sides) of the active layer ACT through contact holes in the second interlayer insulating layer ILD2, the first interlayer insulating layer ILD1, and the gate insulating layer GI.

[0237] The portion of the active layer ACT overlapping with the gate GATE may be used as the channel region.

[0238] For example, one of the two first source-drain pattern layers SD1 may be connected to one side of the channel region of the active layer ACT, and the other of the two first source-drain pattern layers SD1 may be connected to the other side of the channel region of the active layer ACT.

[0239] The passivation layer PAS may be configured to cover the two first source-drain pattern layers SD1.

[0240] At least one planarization layer PLN may be disposed on the passivation layer PAS.

[0241] At least one planarization layer PLN may include a first planarization layer PLN1 and a second planarization layer PLN2.

[0242] The first planarization layer PLN1 may be disposed on the passivation layer PAS.

[0243] The second source-drain pattern layer SD2 may be disposed on the first planarization layer PLN1.

[0244] The second source-drain pattern layer SD2 may be connected to one of the two first source-drain pattern layers SD1 (which may correspond to Figure 3 the second node N2 of the driving transistor DRT in the sub-pixel SP) through a contact hole in the first planarization layer PLN1.

[0245] The second planarization layer PLN2 may be configured to cover the second source-drain pattern layer SD2.

[0246] The light-emitting element ED may be disposed on the second planarization layer PLN2.

[0247] As described below, the light-emitting element ED may have a stacked structure configured to be multi-layer stacked. The first electrode layer AE may be disposed on the second planarization layer PLN2.

[0248] The first electrode layer AE may include a material having a relatively high work function.

[0249] For example, the first electrode layer AE may include a transparent conductive oxide, such as indium tin oxide (ITO), indium zinc oxide (IZO), zinc oxide (ZnO), aluminum zinc oxide (AZO), indium oxide (In2O3), tin oxide (SnO2), etc., but the exemplary embodiments of the present disclosure are not limited thereto.

[0250] The first electrode layer AE may be electrically connected to the second source-drain pattern layer SD2 through a contact hole in the second planarization layer PLN2.

[0251] The bank layer BNK may be configured to cover a part of the first electrode layer AE.

[0252] A part of the bank layer BNK corresponding to the light-emitting region EA of the corresponding sub-pixel SP may be opened to form an opening region OPN.

[0253] For example, the opening region OPN of the bank layer BNK may expose a part of the first electrode layer AE.

[0254] The light-emitting layer EL may be located on the side surface of the bank layer BNK and in the opening region OPN of the bank layer BNK.

[0255] At least a part of the light-emitting layer EL may be located between adjacent opening regions OPN of the bank layer BNK.

[0256] In the opening region OPN of the bank layer BNK, the light-emitting layer EL may be disposed on the first electrode layer AE.

[0257] The second electrode layer CE may be disposed on the light-emitting layer EL.

[0258] The second electrode layer CE may include a material having a relatively low work function, such as a metal, an alloy, a conductive compound, or a mixture of two or more thereof.

[0259] For example, a transmissive electrode as the second electrode layer CE may be obtained by forming a thin film of lithium (Li), magnesium (Mg), aluminum (Al), aluminum-lithium (Al-Li), calcium (Ca), magnesium-indium (Mg-In), magnesium-silver (Mg-Ag), etc.

[0260] In this regard, various modifications may be made. For example, in a structure where the light-emitting element is configured to emit light toward the front of the display device 100 having a top-emission structure, ITO or IZO is used to form the transmissive electrode.

[0261] The light-emitting layer EL may include an organic material.

[0262] The light-emitting layer EL may include a red light-emitting layer R_EL disposed in the red sub-pixel Red SP, a green light-emitting layer G_EL disposed in the green sub-pixel Green SP, and a blue light-emitting layer B_EL disposed in the blue sub-pixel Blue SP.

[0263] For example, the wavelengths of the light emitted from the light-emitting layers R_EL, G_EL, and B_EL may be the red light-emitting layer R_EL, the green light-emitting layer G_EL, and the blue light-emitting layer B_EL in decreasing order of length.

[0264] The hole transport layer HTL may be disposed between the light-emitting layer EL and the first electrode layer AE.

[0265] Adjacent light-emitting layers EL may partially overlap each other on the bank layer BNK.

[0266] The red light-emitting layer R_EL may include a red host and a red dopant.

[0267] The red host may use Alq3, CBP, PVK, AND, TCTA, TPBI, TBADN, E3, DSA, or a mixture of two or more thereof, but the exemplary embodiments of the present disclosure are not limited thereto.

[0268] The red dopant may use PtOEP, Ir(piq)3, Btp2Ir(acac), Ir(2-phq)2(acac), Ir(2-phq)3, Ir(flq)2(acac), Ir(fliq)2(acac), or a compound containing DCM or DCJTB, but the exemplary embodiments of the present disclosure are not limited thereto.

[0269] The green light-emitting layer G_EL may include a green host and a green dopant.

[0270] The green host may use Alq3, CBP, PVK, AND, TCTA, TPBI, TBADN, E3, DSA, or a mixture of two or more thereof, but the exemplary embodiments of the present disclosure are not limited thereto.

[0271] The green dopant may use Ir(ppy)3 tris(2-phenylpyridine) iridium, Ir(ppy)2(acac) (bis(2-phenylpyridine)(acetylacetonate) iridium(III), Ir(mppy)3 (tris(2-(4-tolyl)phenylpyridine) iridium, C545T 10-(2-benzothiazolyl)-1,1,7,7-tetramethyl-2,3,6,7-tetrahydro-1H,5H,11H-[1]benzopyrano[6,7,8-ij]-quinolin-11-one, etc., but the exemplary embodiments of the present disclosure are not limited thereto.

[0272] The blue light-emitting layer B_EL may include a blue host and a blue dopant.

[0273] The blue host may use Alq3, CBP (4,4'-N,N'-dicarbazole biphenyl), PVK (poly(n-vinylcarbazole)), ADN (9,10-bis(naphthalen-2-yl)anthracene), TCTA, TPBI (1,3,5-tris(N-phenylbenzimidazol-2-yl)benzene), TBADN (3-tert-butyl-9,10-bis(naphthalen-2-yl)anthracene), E3, DSA (distyrylarylene), or a mixture of two or more thereof, but the exemplary embodiments of the present disclosure are not limited thereto.

[0274] The blue dopant may use compounds containing F2Irpic, (F2ppy)2Ir(tmd), Ir(dfppz)3, trifuorene, DPAVBi (4,4'-bis(4-diphenylaminostyryl)biphenyl), TBPe, etc., but the exemplary embodiments of the present disclosure are not limited thereto.

[0275] As described above, regarding some of the layers included in the stacked structure of the light-emitting element ED, the first electrode layer AE, the light-emitting layer EL, and the second electrode layer CE have been discussed.

[0276] Hereinafter, the stacked structure of the second light-transmitting region TA2 in the second optical region OA2 will be described in detail.

[0277] The second electrode layer CE may be disposed in the normal region NA and the light-blocking region of the second optical region OA2, but the second electrode layer CE may not be disposed in the second light-transmitting region TA2 of the second optical region OA2.

[0278] For example, the second light-transmitting region TA2 of the second optical region OA2 may correspond to the opening (or opening region) of the second electrode layer CE.

[0279] In one or more aspects, a light-shielding layer LSL including at least one of the first metal layer ML1 and the second metal layer ML2 may be disposed in the normal region NA and the light-blocking region of the second optical region OA2, but the light-shielding layer LSL may not be disposed in the second light-transmitting region TA2 of the second optical region OA2.

[0280] In one or more aspects, the substrate SUB and various insulating layers (BUF, GI, ILD1, ILD2, PAS, PLN1, PLN2, BNK, and ENCAP) disposed in the normal region NA and the light-blocking region of the second optical region OA2 may be disposed in the second light-transmitting region TA2 of the second optical region OA2 in the same manner.

[0281] For example, among the elements or layers provided in the non-transmissive regions of the normal region NA and the second optical region OA2, except for the insulating layer, a material layer having electrical properties (e.g., a metal material layer, a semiconductor layer, etc.) may not be provided in the second transmissive region TA2 of the second optical region OA2.

[0282] For example, referring to Figure 6A and Figure 6B , the metal material layers (ML1, ML2, GATE, GM, TM, SD1, and SD2) and the semiconductor layer (ACT) related to the transistor may not be provided in the second transmissive region TA2 of the second optical region OA2.

[0283] In one or more aspects, the first electrode layer AE and the second electrode layer CE included in the light-emitting element ED may not be provided in the second transmissive region TA2.

[0284] In one or more aspects, it should be noted that the light-emitting layer EL included in the light-emitting element ED may or may not be provided in the second transmissive region TA2 according to design requirements.

[0285] Therefore, since the material layer having electrical properties (e.g., a metal material layer, a semiconductor layer, etc.) is not provided in the second transmissive region TA2 of the second optical region OA2, the light transmittance of the second transmissive region TA2 of the second optical region OA2 can be increased.

[0286] Therefore, the second optical electronic device 12 can receive the light passing through the second transmissive region TA2 and perform a predetermined function (e.g., detecting an approaching object or a human body, detecting ambient light, etc.).

[0287] As described above, the stacking structure of the second transmissive region TA2 of the second optical region OA2 has been discussed.

[0288] Hereinafter, referring to Figure 6A the coating CL1 as the covering layer CL will be described.

[0289] In one or more aspects, the coating CL1 may be provided on the bank layer BNK and configured to cover at least a part of the bank layer BNK.

[0290] In this implementation, the second optical electronic device 12 may be provided below the bank layer BNK and configured to overlap at least a part of the coating CL1.

[0291] The second optical electronic device 12 may be located on or below the substrate SUB. For simplicity, the provided discussion is based on an example where the second optical electronic device 12 is located below the substrate SUB.

[0292] The second optoelectronic device 12 can be an illuminance sensor, also known as an ambient light sensor.

[0293] Details of the second optoelectronic device 12 can be substantially the same as Figure 1 the details of the second optoelectronic device 12 described in

[0294] In the coating material included in the coating CL1, the rate of absorbing light with wavelengths in the range of 495 nm to 570 nm (the wavelength range perceived as green by the human eye) can be higher than the rate of absorbing light outside the wavelength range of 495 nm to 570 m.

[0295] For example, the coating material can be one or more of copper, zirconium, iron, nickel, NaWO3, ZnO, or TiO2.

[0296] Figure 6A It is shown that the coating CL1 is located between the red sub-pixel (Red SP) and the green sub-pixel (Green SP), but the position of the coating CL1 is not necessarily limited to this. For example, the coating CL1 can be located between the green sub-pixel (Green SP) and the blue sub-pixel (Blue SP), or between the blue sub-pixel (Blue SP) and the red sub-pixel (Red SP), or can be provided in a part of the bank layer BNK other than the part of the bank layer BNK between the sub-pixels.

[0297] In an example where the coating CL1 covers the part of the bank layer BNK between the red sub-pixel (Red SP) and the green sub-pixel (Green SP), when driving the red sub-pixel (Red SP), it is possible to prevent the corresponding green light-emitting layer G_EL from emitting light downward (hereinafter, may be referred to as "bottom emission") due to the lateral leakage current LLC flowing along the hole transport layer HTL of the light-emitting element ED included in the red sub-pixel (Red SP).

[0298] That is, since the coating CL1 includes a material capable of absorbing green light at a higher rate than light in other wavelength bands, the coating CL1 can absorb the green light emitted downward due to the lateral leakage current LLC.

[0299] In this case, the bottom emission may be a phenomenon caused by the partial overlap of the red light-emitting layer EL_R and the green light-emitting layer G_EL on the coating CL1.

[0300] Therefore, it is possible to prevent an accidental detection operation of the second optoelectronic device 12 caused by the green light emitted through the green light-emitting layer due to the lateral leakage current LLC. Therefore, the reliability of the second optoelectronic device 12 can be improved, and the performance of the second optoelectronic device 12 for detecting external light can be improved.

[0301] When driving the red sub-pixel (Red SP), the lateral leakage current LLC can flow not only to the green sub-pixel (Green SP), but also to the adjacent blue sub-pixel (Blue SP), so that blue light can be emitted downward. Therefore, according to an exemplary embodiment of the present disclosure, the accidental detection operation of the second optoelectronic device 12 caused by the lateral leakage current LLC is not limited to the bottom emission caused by the green light-emitting layer.

[0302] However, different from other sub-pixels, since the green sub-pixel (Green SP) has high-latency characteristics and generates a large amount of green light, it may be desirable for the coating CL1 to cover the portion of the bank layer BNK between the red sub-pixel (Red SP) and the green sub-pixel (Green SP).

[0303] In one or more aspects, the coating CL1 including a material capable of absorbing blue light at a higher rate than light in other bands can absorb the downward-emitted blue light by covering the portion of the bank layer BNK between the red sub-pixel (Red SP) and the blue sub-pixel (Blue SP).

[0304] In one or more aspects, the material included in the coating CL1 is not limited to a material capable of absorbing green light or blue light at a high rate, and can be a material capable of absorbing red light at a high rate.

[0305] Referring to Figure 6B , a virtual light-emitting layer CL2 covering at least a part of the bank layer BNK can be provided on the bank layer BNK.

[0306] That is, the virtual light-emitting layer CL2 can be located between the bank layer BNK and the hole transport layer HTL.

[0307] The main light-emitting layer EL can be located on the hole transport layer HTL.

[0308] Figure 6B The main light-emitting layer EL of Figure 6A can be substantially the same as the light-emitting layer EL of

[0309] The main light-emitting layer EL can be a light-emitting layer that emits light through the current from the driving transistor DRT.

[0310] On the contrary, the virtual light-emitting layer CL2 may not be driven by the current from the driving transistor DRT, but may emit light or not emit light through the light emitted from the main light-emitting layer EL adjacent to the virtual light-emitting layer CL2.

[0311] The light emitted from the virtual light-emitting layer CL2 can have a wavelength shorter than the light emitted from at least one main light-emitting layer EL adjacent to the virtual light-emitting layer CL2.

[0312] For example, the light emitted from the virtual light-emitting layer CL2 may have an energy greater than that of the light emitted from at least one main light-emitting layer EL adjacent to the virtual light-emitting layer CL2.

[0313] Therefore, when the main light-emitting layer EL adjacent to the virtual light-emitting layer CL2 emits light downward due to the lateral leakage current LLC, the light emitted downward from the main light-emitting layer EL may not affect the virtual light-emitting layer CL2.

[0314] For example, the virtual light-emitting layer CL2 may not emit light due to the light emitted downward from the main light-emitting layer EL.

[0315] Since the virtual light-emitting layer CL2 does not emit light due to the light emitted downward from the main light-emitting layer EL, the downward-emitted light can be blocked, thereby preventing the second optoelectronic device 12 that overlaps at least a part of the virtual light-emitting layer CL2 and is located below the bank layer BNK from performing an accidental detection operation due to the light emitted downward from the main light-emitting layer EL.

[0316] By preventing such an accidental detection operation, the reliability of the second optoelectronic device 12 can be improved, and the performance of the second optoelectronic device 12 for detecting external light can be improved.

[0317] Figure 6B The details of the second optoelectronic device 12 in Figure 1 may be substantially the same as the details of the second optoelectronic device 12 described in

[0318] Figure 6B An example is shown in which the virtual light-emitting layer CL2 located on the part of the bank layer BNK between the red sub-pixel (Red SP) and the green sub-pixel (Green SP) is a blue light-emitting layer, but this is only an example, and the exemplary embodiments of the present disclosure are not limited thereto. For example, according to the color of the sub-pixels adjacent to the virtual light-emitting layer CL2, the light-emitting layer of the virtual light-emitting layer CL2 may include different materials.

[0319] For example, when at least one main light-emitting layer EL adjacent to the virtual light-emitting layer CL2 is a red light-emitting layer or a green light-emitting layer, the virtual light-emitting layer CL2 may include the same material as the blue light-emitting layer.

[0320] In another example, when at least one main light-emitting layer EL adjacent to the virtual light-emitting layer CL2 is a red light-emitting layer, the virtual light-emitting layer CL2 may include the same material as the green light-emitting layer.

[0321] However, different from other sub-pixels, since the green sub-pixel (Green SP) has high latency characteristics and generates a large amount of green light, it may be desirable that the virtual light-emitting layer CL2 covers the portion of the bank layer BNK between the red sub-pixel (Red SP) and the green sub-pixel (Green SP).

[0322] The above-described exemplary embodiments will be briefly described as follows.

[0323] According to the exemplary embodiments described herein, a display device can be provided, the display device including a substrate in which a normal area allowing a plurality of first pixels to be provided and having a first resolution and an optical area allowing a plurality of second pixels to be provided and having a second resolution less than the first resolution are defined; an electrode layer located above the substrate; a bank layer located above the substrate, covering a part of the electrode layer, and including at least one opening area; and a coating covering at least a part of the bank layer in at least one of the normal area and the optical area.

[0324] In one or more aspects, the display device can further include an optical sensor overlapping at least a part of the coating and located below the bank layer.

[0325] In one or more aspects, the optical sensor can be an illuminance sensor.

[0326] In one or more aspects, the optical sensor can be located in the optical area.

[0327] In one or more aspects, in the coating material included in the coating, the rate of absorbing light with a wavelength in the range of 495 nm to 570 nm can be higher than the rate of absorbing light outside the wavelength range of 495 nm to 570 nm.

[0328] In one or more aspects, the coating material can be one or more of copper, zirconium, iron, nickel, NaWO3, ZnO, or TiO2.

[0329] In one or more aspects, a plurality of sub-pixels including red sub-pixels, green sub-pixels, and blue sub-pixels can be provided above the substrate, and the coating can be located between the red sub-pixel and the green sub-pixel.

[0330] In one or more aspects, the display device may further include: a hole transport layer, which is located on the electrode layer and the bank layer and covers the coating; and a light-emitting layer, which is located on the hole transport layer, and at least a part of the light-emitting layer of the red sub-pixel and at least a part of the light-emitting layer of the green sub-pixel overlap each other on the coating.

[0331] According to the exemplary embodiments described herein, a display device may be provided, which includes: a substrate in which a normal area allowing the setting of a plurality of first pixels and having a first resolution and an optical area allowing the setting of a plurality of second pixels and having a second resolution less than the first resolution are defined; an electrode layer located above the substrate; a bank layer located above the substrate, covering a part of the electrode layer, and including an opening area; a virtual light-emitting layer covering at least a part of the bank layer in at least one of the normal area and the optical area; a hole transport layer located on the electrode layer and the bank layer and covering the virtual light-emitting layer; and a main light-emitting layer located on the hole transport layer.

[0332] In one or more aspects, the light emitted from the virtual light-emitting layer may have a wavelength less than the light emitted from at least one main light-emitting layer adjacent to the virtual light-emitting layer.

[0333] In one or more aspects, the virtual light-emitting layer may be a blue light-emitting layer, and at least one main light-emitting layer adjacent to the virtual light-emitting layer may be a red light-emitting layer or a green light-emitting layer.

[0334] In one or more aspects, the virtual light-emitting layer may be a green light-emitting layer, and at least one main light-emitting layer adjacent to the virtual light-emitting layer may be a red light-emitting layer.

[0335] In one or more aspects, the display device may further include an optical sensor, which overlaps at least a part of the virtual light-emitting layer and is located below the bank layer.

[0336] In one or more aspects, the optical sensor may be an illuminance sensor.

[0337] In one or more aspects, the optical sensor may be located in the optical area.

[0338] In one or more aspects, a plurality of sub-pixels including red sub-pixels, green sub-pixels, and blue sub-pixels may be provided above the substrate, and the virtual light-emitting layer may be located between the red sub-pixel and the green sub-pixel.

[0339] In one or more aspects, at least a portion of the light-emitting layer of the red sub-pixel and at least a portion of the light-emitting layer of the green sub-pixel may overlap each other on the virtual light-emitting layer.

[0340] Figure 6A and Figure 6B The second optical region OA2 is shown as an example, but the exemplary embodiments of the present disclosure are not limited thereto. Figure 6A and Figure 6B The coating CL1 or the virtual light-emitting layer CL2 described in may be applied identically or substantially identically to the first optical region OA1 or the normal region NA.

[0341] The foregoing description is provided to enable a person skilled in the art to make, use, and practice the technical features of the present invention, and is provided as an example in the context of a particular application and its requirements. Various modifications, additions, and substitutions to the described embodiments will be apparent to those skilled in the art, and the principles described herein may be applied to other embodiments and applications without departing from the scope of the present invention. The examples of the technical features of the present invention provided in the foregoing description and the drawings are for illustrative purposes only. That is, the disclosed embodiments are intended to illustrate the scope of the technical features of the present invention.

Claims

1. A display device, comprising: a substrate including a display area provided with a plurality of sub-pixels; an electrode layer located above the substrate; a bank layer covering a part of the electrode layer; a coating covering at least a part of the bank layer and including a light-absorbing material; and a light-emitting layer located on the electrode layer, the bank layer, and the coating.

2. The display device according to claim 1, wherein, The display area includes a normal area having a first resolution and an optical area having a second resolution less than the first resolution, wherein the coating is located in at least one of the normal area and the optical area.

3. The display device according to claim 2, further comprising an optical sensor located in the optical area.

4. The display device according to claim 3, wherein, The optical sensor overlaps at least a part of the coating and is located below the bank layer.

5. The display device according to claim 3, wherein, The optical sensor is an illuminance sensor.

6. The display device according to claim 1, wherein, In the light-absorbing material included in the coating, the rate of absorbing light with wavelengths in the range of 495 nm to 570 nm is higher than the rate of absorbing light outside the wavelength range of 495 nm to 570 nm.

7. The display device according to claim 1, wherein, The light-absorbing material includes one or more of copper, zirconium, iron, nickel, NaWO3, ZnO, or TiO2.

8. The display device according to claim 1, wherein, The coating is located between sub-pixels of different colors.

9. The display device according to claim 8, further comprising a hole transport layer located on the electrode layer and the bank layer and covering the coating, Among them, wherein the light-emitting layer is located on the hole transport layer, wherein the light-emitting layers of the sub-pixels of different colors overlap each other on the coating.

10. The display device according to claim 8, wherein, The plurality of sub-pixels include red sub-pixels, green sub-pixels, and blue sub-pixels, wherein the coating is located between the red sub-pixel and the green sub-pixel.

11. A display device, comprising: a substrate including a display area provided with a plurality of sub-pixels; an electrode layer located above the substrate; a bank layer covering a part of the electrode layer; a virtual light-emitting layer covering at least a part of the bank layer and including a light-emitting material; a hole transport layer located on the electrode layer and the bank layer and covering the virtual light-emitting layer; and a main light-emitting layer located on the hole transport layer.

12. The display device according to claim 11, wherein, The display area includes a normal area having a first resolution and an optical area having a second resolution less than the first resolution, wherein the virtual light-emitting layer is located in at least one of the normal area and the optical area.

13. The display device according to claim 11, wherein, The light emitted from the virtual light-emitting layer has a wavelength less than the light emitted from at least one main light-emitting layer adjacent to the virtual light-emitting layer.

14. The display device according to claim 13, wherein, The virtual light-emitting layer is a blue light-emitting layer, and the at least one main light-emitting layer adjacent to the virtual light-emitting layer is a red light-emitting layer or a green light-emitting layer.

15. The display device according to claim 13, wherein, The virtual light-emitting layer is a green light-emitting layer, and the at least one main light-emitting layer adjacent to the virtual light-emitting layer is a red light-emitting layer.

16. The display device according to claim 12, further comprising an optical sensor located in the optical area, Among them, The optical sensor is an illuminance sensor.

17. The display device according to claim 16, wherein, The optical sensor overlaps at least a part of the virtual light-emitting layer and is located below the bank layer.

18. The display device according to claim 11, wherein, The virtual light-emitting layer is located between sub-pixels of different colors.

19. The display device according to claim 18, wherein, The main light-emitting layers of the sub-pixels of different colors overlap each other on the virtual light-emitting layer.

20. The display device according to claim 18, wherein, The plurality of sub-pixels include red sub-pixels, green sub-pixels, and blue sub-pixels, wherein the virtual light-emitting layer is located between the red sub-pixel and the green sub-pixel.

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