Display substrate, preparation method thereof and display device

Abstract

The invention provides a display substrate, a preparation method thereof and a display device. The display substrate comprises a substrate body, a first electrode layer, a pixel limiting layer, a light-emitting layer and a second electrode layer, wherein the first electrode layer, the pixel limiting layer, the light-emitting layer and the second electrode layer are sequentially away from the substrate body. The pixel limiting layer is provided with a plurality of pixel openings, a plurality of pixel spacer regions and at least one pixel limiting part, the at least one pixel limiting part is located between the adjacent pixel opening and pixel spacer region, the pixel limiting part comprises a first undercut structure and a second undercut structure, the first undercut structure comprises a first undercut opening facing the pixel spacer region, and the second undercut structure comprises a second undercut opening facing the pixel spacer region. The second undercut structure comprises a second undercut opening facing the pixel opening; the second electrode layer comprises at least one first sub-protruding part and at least one second sub-protruding part which protrude in the direction towards the substrate, and in the first direction, the spacing distance between the second sub-protruding part and the surface, away from the substrate, of the first electrode layer is larger than the spacing distance between the second sub-protruding part and the surface, away from the substrate, of the second electrode layer. The spacing distance is larger than the spacing distance between the first sub-protruding part and the surface, away from the substrate, of the first electrode layer.

Description

Technical Field

[0001] The present disclosure relates to the field of display technologies, and particularly to a display substrate, a preparation method thereof, and a display device. Background Art

[0002] Silicon-based organic light-emitting diodes (OLEDs) are micro displays developed in recent years. With mature silicon-based semiconductor manufacturing processes, OLED displays with high PPI (pixel density) and high refresh rates can be fabricated and applied in the fields of VR (Virtual Reality) and AR (Augmented Reality). The display panels in related technologies include multiple pixel units to achieve a high-PPI display effect. However, due to the precision limitations of traditional fine metal masks (FMMs), adjacent pixel units need to adopt a pixel isolation process to achieve pixel isolation. How to effectively isolate pixels while minimizing the impact of the isolation structure on the light-emitting devices is one of the important research topics for researchers.

[0003] It should be noted that the information disclosed in the above background art section is only used to enhance the understanding of the background of the present disclosure, and thus may include information that does not constitute the prior art known to those skilled in the art. Summary of the Invention

[0004] In one aspect, a display substrate is provided, which includes:

[0005] A substrate;

[0006] A first electrode layer disposed on the substrate;

[0007] A pixel definition layer disposed on a side of the first electrode layer away from the substrate, the pixel definition layer having a plurality of pixel openings and a plurality of pixel spacer regions;

[0008] A light-emitting layer disposed on a side of the pixel definition layer away from the substrate; and

[0009] A second electrode layer disposed on a side of the light-emitting layer away from the substrate,

[0010] Among them, the pixel defining layer includes at least one pixel defining portion, the at least one pixel defining portion is located between the adjacent pixel opening and the pixel interval region, the at least one pixel defining portion includes a first undercut structure and a second undercut structure, the first undercut structure includes a first undercut opening, the first undercut opening faces the pixel interval region, the second undercut structure includes a second undercut opening, and the second undercut opening faces the pixel opening;

[0011] The second electrode layer includes a plurality of protruding portions protruding in a direction toward the substrate, the plurality of protruding portions include: at least one first sub-protruding portion located in an intersection region of the pixel interval region and the first undercut structure; and at least one second sub-protruding portion located in an intersection region of the pixel opening and the second undercut structure,

[0012] Among them, in a first direction, a spacing distance between the at least one second sub-protruding portion and a surface of the first electrode layer away from the substrate is greater than a spacing distance between the at least one first sub-protruding portion and the surface of the first electrode layer away from the substrate, and the first direction is parallel to a light emitting direction of the display substrate.

[0013] According to some exemplary embodiments, the first undercut structure includes: a first portion on one side of the substrate; a second portion on a side of the first portion away from the substrate; and a third portion on a side of the second portion away from the substrate, and the second portion is indented in a direction from the pixel interval region to the pixel opening with respect to the third portion.

[0014] According to some exemplary embodiments, the second undercut structure includes: a fourth portion on one side of the substrate; a fifth portion on a side of the fourth portion away from the substrate; and a sixth portion on a side of the fifth portion away from the substrate, and the fifth portion is indented in a direction from the pixel opening to the pixel interval region with respect to the sixth portion.

[0015] According to some exemplary embodiments, the fifth portion is located on a side of the second portion away from the substrate.

[0016] According to some exemplary embodiments, in the first direction, the second portion has a second thickness, the fifth portion has a fifth thickness, and the fifth thickness is less than the second thickness.

[0017] According to some exemplary embodiments, a ratio of the fifth thickness to the second thickness is less than or equal to 0.8.

[0018] According to some exemplary embodiments, the second part includes a first side close to the pixel spacer region, the fifth part includes a second side close to the pixel spacer region, and in a direction pointing from the pixel opening to the pixel spacer region, the first side is closer to the pixel spacer region than the second side.

[0019] According to some exemplary embodiments, in the first direction, the first electrode layer has a third thickness h3, the first part has a first thickness h1, the second part has a second thickness h2, and the first thickness h1, the second thickness h2, and the third thickness h3 satisfy: h1 + h2 - h3 < 30 Å.

[0020] According to some exemplary embodiments, the pixel defining layer includes: a first sub-pixel defining layer on one side of the substrate; a second sub-pixel defining layer on a side of the first sub-pixel defining layer away from the substrate; a third sub-pixel defining layer on a side of the second sub-pixel defining layer away from the substrate; a fourth sub-pixel defining layer on a side of the third sub-pixel defining layer away from the substrate; and a fifth sub-pixel defining layer on a side of the fourth sub-pixel defining layer away from the substrate,

[0021] wherein the first part is located in the first sub-pixel defining layer, the second part is located in the second sub-pixel defining layer, the third part and the fourth part are located in the third sub-pixel defining layer, the fifth part is located in the fourth sub-pixel defining layer, and the sixth part is located in the fifth sub-pixel defining layer.

[0022] According to some exemplary embodiments, the pixel defining portion further includes a third undercut structure, and the third undercut structure includes: a seventh part on one side of the substrate; an eighth part on a side of the seventh part away from the substrate; and a ninth part on a side of the eighth part away from the substrate, and the eighth part is indented relative to the ninth part in a direction pointing from the pixel spacer region to the pixel opening.

[0023] According to some exemplary embodiments, the seventh part is located in the third sub-pixel defining layer, the eighth part is located in the fourth sub-pixel defining layer, and the ninth part is located in the fifth sub-pixel defining layer.

[0024] According to some exemplary embodiments, the second part includes a first side close to the pixel spacer region, the eighth part includes a third side close to the pixel spacer region, and the ninth part includes a fourth side close to the pixel spacer region,

[0025] In the direction pointing from the pixel opening to the pixel interval region, the orthographic projection of the fourth side on the substrate is located between the orthographic projections of the first side and the third side on the substrate.

[0026] According to some exemplary embodiments, in the first direction, the surface of the second portion close to the substrate is spaced apart from the surface of the substrate close to the pixel defining layer by a first distance, and the surface of the fifth portion close to the substrate is spaced apart from the surface of the substrate close to the pixel defining layer by a second distance, and the first distance and the second distance are substantially equal.

[0027] According to some exemplary embodiments, the pixel defining layer includes: a first sub-pixel defining layer on one side of the substrate; a second sub-pixel defining layer on a side of the first sub-pixel defining layer away from the substrate; and a third sub-pixel defining layer on a side of the second sub-pixel defining layer away from the substrate.

[0028] Wherein, the first portion and the fourth portion are located in the first sub-pixel defining layer, the second portion and the fifth portion are located in the second sub-pixel defining layer, and the third portion and the sixth portion are located in the third sub-pixel defining layer.

[0029] According to some exemplary embodiments, the material of the first sub-pixel defining layer includes silicon oxide; and / or

[0030] The material of the second sub-pixel defining layer includes silicon nitride; and / or

[0031] The material of the third sub-pixel defining layer includes silicon oxide; and / or

[0032] The material of the fourth sub-pixel defining layer includes silicon nitride; and / or

[0033] The material of the fifth sub-pixel defining layer includes silicon oxide; and

[0034] The etching selectivity between the silicon nitride and the silicon oxide is greater than or equal to 9:1.

[0035] According to some exemplary embodiments, the second portion is indented by a third distance relative to the third portion in the direction from the pixel interval region to the pixel opening, and the ratio of the second thickness to the third distance is in the range of 2 to 3; and / or

[0036] The fifth portion is indented by a fourth distance relative to the sixth portion in the direction from the pixel opening to the pixel interval region, and the ratio of the fifth thickness to the fourth distance is in the range of 2 to 3.

[0037] On the other hand, a display device is provided, including the display substrate described in any one of the above.

[0038] In yet another aspect, a method for manufacturing a display substrate is provided, which includes:

[0039] Providing a substrate;

[0040] Forming a first electrode layer on one side of the substrate, and performing a patterning process on the first electrode layer to form a plurality of first electrodes arranged in an array;

[0041] Forming a pixel defining layer on one side of the substrate, and performing a patterning process on the pixel defining layer to form a plurality of pixel openings, a plurality of pixel spacers, and at least one pixel defining portion, the at least one pixel defining portion being located between the pixel opening and the pixel spacer, wherein the at least one pixel defining portion includes a first undercut structure and a second undercut structure, the first undercut structure includes a first undercut opening, the first undercut opening facing the pixel spacer, the second undercut structure includes a second undercut opening, the second undercut opening facing the pixel opening;

[0042] Forming a light emitting layer on a side of the pixel defining layer away from the substrate; and

[0043] Forming a second electrode layer on a side of the light emitting layer away from the substrate, wherein the second electrode layer includes a plurality of protruding portions protruding in a direction towards the substrate, the plurality of protruding portions including: at least one first sub-protruding portion located in an intersection region of the pixel spacer and the first undercut structure; and at least one second sub-protruding portion located in an intersection region of the pixel opening and the second undercut structure, in a first direction, a spacing distance between the at least one second sub-protruding portion and a surface of the first electrode layer away from the substrate is greater than a spacing distance between the at least one first sub-protruding portion and the surface of the first electrode layer away from the substrate, the first direction being parallel to a light emitting direction of the display substrate.

[0044] According to some exemplary embodiments, the method further includes: forming the first undercut structure and the second undercut structure in the same etching step. Description of the Drawings

[0045] Through the following description of the embodiments of the present disclosure with reference to the drawings, the above content and other objects, features, and advantages of the present disclosure will become clearer. In the drawings:

[0046] Figure 1 is a plan view of a display substrate according to an embodiment of the present disclosure;

[0047] Figure 2Schematic diagram of the structure of a light-emitting device according to some embodiments of the present disclosure;

[0048] Figure 3 is a schematic cross-sectional view of a display substrate taken along the Figure 1 center line AA' according to some embodiments of the present disclosure;

[0049] Figure 4 Schematic diagram of the structure of a pixel defining portion of a display substrate according to some embodiments of the present disclosure;

[0050] Figure 5 is a schematic cross-sectional view of a display substrate taken along the Figure 1 center line AA' according to some embodiments of the present disclosure;

[0051] Figure 6 is Figure 5 a partial enlarged schematic view of the S1 region in

[0052] Figure 7 Schematic partial cross-sectional view of a display substrate according to some embodiments of the present disclosure;

[0053] Figure 8 Schematic partial cross-sectional view of a display substrate according to some embodiments of the present disclosure;

[0054] Figure 9 is Figure 8 a partial enlarged schematic view of the S2 region in

[0055] Figure 10 Schematic partial cross-sectional view of a display substrate according to some embodiments of the present disclosure;

[0056] Figure 11 Schematic block diagram of a display device according to an embodiment of the present disclosure;

[0057] Figure 12 is a flowchart of a method for manufacturing a display substrate according to an embodiment of the present disclosure; and

[0058] Figure 13A - Figure 13J are respectively schematic diagrams of the structures of some film layers in the manufacturing process of a display substrate according to an embodiment of the present disclosure.

[0059] It should be noted that, for clarity, in the drawings used to describe the embodiments of the present disclosure, the dimensions of layers, structures, or regions may be enlarged or reduced, that is, these drawings are not drawn to actual scale. Detailed Description

[0060] To make the objectives, technical solutions, and advantages of the embodiments of the present disclosure clearer, the technical solutions of the embodiments of the present disclosure will be clearly and completely described below with reference to the accompanying drawings of the embodiments of the present disclosure. Apparently, the described embodiments are some, but not all, of the embodiments of the present disclosure. All other embodiments obtained by those of ordinary skill in the art based on the described embodiments of the present disclosure without creative efforts shall fall within the scope of protection of the present disclosure.

[0061] It should be noted that in the drawings, for the purpose of clarity and / or description, the dimensions and relative dimensions of the elements may be enlarged. Thus, the dimensions and relative dimensions of each element do not have to be limited to the dimensions and relative dimensions shown in the drawings. In the specification and drawings, the same or similar reference numerals indicate the same or similar components.

[0062] Unless otherwise defined, the technical terms or scientific terms used in the present disclosure shall have the ordinary meaning as understood by those of ordinary skill in the art. The terms "first", "second", and the like used in the present disclosure do not denote any order, quantity, or importance, but are only used to distinguish different components. The terms such as "including" or "comprising" mean that the elements or items appearing before the term cover the elements or items listed after the term and their equivalents, without excluding other elements or items.

[0063] In this document, unless otherwise specifically stated, directional terms such as "upper", "lower", "left", "right", "inner", "outer", etc. are used to represent the orientation or positional relationship based on the orientation shown in the drawings, and are only for the convenience of describing the present disclosure, rather than indicating or implying that the device, element, or component referred to must have a specific orientation, be constructed or operate in a specific orientation. It should be understood that when the absolute position of the object being described changes, the relative positional relationship they represent may also change accordingly. Therefore, these directional terms should not be construed as a limitation to the present disclosure.

[0064] Those skilled in the art should understand that in this document, unless otherwise stated, the expressions "height" or "thickness" refer to the dimension along the surface of each film layer arranged perpendicular to the substrate, that is, the dimension along the light-emitting direction of the display module, or the dimension along the normal direction of the display device.

[0065] In this document, unless otherwise stated, the expression "lithography process" generally includes steps such as coating of photoresist, exposure, development, etching, stripping of photoresist, etc. The expression "one lithography process" means a process of forming a patterned layer, component, structure, etc. using a single mask.

[0066] It should be noted that the expressions "the same layer", "set on the same layer" or similar expressions refer to a layer structure formed by using the same film-forming process to form a film layer for forming a specific pattern, and then patterning the film layer by using the same mask through a single lithography process. Depending on the different specific patterns, the single lithography process may include multiple exposure, development or etching processes, and the specific patterns in the formed layer structure may be continuous or discontinuous. These specific patterns may also be at different heights or have different thicknesses.

[0067] In a silicon-based OLED display panel, a full-surface evaporation is usually adopted to prepare a light-emitting functional layer, which may cause the connection of organic layers between adjacent pixels. Since the hole injection layer and the charge generation layer have good conductivity, when a pixel is in an operating state (i.e., a pixel emits light), current may be transmitted from the first electrode (such as an anode) to other adjacent pixels through the hole injection layer or the charge generation layer, resulting in lateral leakage. This may cause that when a certain pixel emits light, its adjacent pixels will also emit weak light due to lateral leakage, causing accompanying light emission or crosstalk phenomena, thereby affecting the color gamut of the display and reducing the quality and color purity of the display.

[0068] Embodiments of the present disclosure provide a display substrate. The display substrate includes: a substrate; a first electrode layer disposed on the substrate; a pixel defining layer disposed on a side of the first electrode layer away from the substrate, the pixel defining layer having a plurality of pixel openings and a plurality of pixel spacer regions; a light-emitting layer disposed on a side of the pixel defining layer away from the substrate; and a second electrode layer disposed on a side of the light-emitting layer away from the substrate. Wherein, the pixel defining layer includes at least one pixel defining portion, at least one pixel defining portion is located between adjacent pixel openings and pixel spacer regions, at least one pixel defining portion includes a first undercut structure and a second undercut structure, the first undercut structure includes a first undercut opening, the first undercut opening faces the pixel spacer region, the second undercut structure includes a second undercut opening, and the second undercut opening faces the pixel opening. The second electrode layer includes a plurality of protruding portions protruding in a direction toward the substrate, the plurality of protruding portions include: at least one first sub-protruding portion located in a convergence region of the pixel spacer region and the first undercut structure; and at least one second sub-protruding portion located in a convergence region of the pixel opening and the second undercut structure. Wherein, in a first direction, a spacing distance between at least one second sub-protruding portion and a surface of the first electrode layer away from the substrate is greater than a spacing distance between at least one first sub-protruding portion and the surface of the first electrode layer away from the substrate, and the first direction is parallel to a light-emitting direction of the display substrate.

[0069] With such a design, two partitions can be formed by using the first undercut structure and the second undercut structure, which can effectively partition the charge generation layer and enhance the partitioning effect of the pixel defining part. At the same time, since the leakage path of the pixel light-emitting region will preferentially pass through the region near the second undercut structure, in the embodiments of the present disclosure, by adopting a double undercut structure, the step difference of the second undercut structure can be designed to be smaller, which is beneficial to reducing the size of the cathode puncture above the second undercut structure, thereby reducing the probability of short circuit of the display substrate and improving the quality and production yield of the display substrate.

[0070] Figure 1 It is a plan view of a display substrate according to an embodiment of the present disclosure.

[0071] Exemplarily, in some embodiments of the present disclosure, referring to Figure 1 , the display substrate 100 includes a display area AA and a non-display area NA, and the non-display area NA is located on at least one side of the display area AA. For example, the non-display area NA surrounds the display area AA.

[0072] The display substrate 100 may further include a plurality of sub-pixels SP located in the display area AA. The plurality of sub-pixels SP are arranged in an array along a second direction X and a third direction Y, and the second direction X and the third direction Y intersect.

[0073] The display substrate 100 may further include a pixel defining layer PDL. The pixel defining layer PDL has a plurality of pixel openings VH1, and the plurality of pixel openings VH1 define the light-emitting regions of the plurality of sub-pixels SP. The pixel opening VH1 may be an opening region including the light-emitting region.

[0074] Exemplarily, the pixel defining layer PDL may further include a plurality of pixel spacer regions VH2. The pixel spacer region VH2 may include at least a part of the region between adjacent pixel openings VH1.

[0075] Exemplarily, the pixel defining layer PDL may further include at least one pixel defining part PDL0 located between adjacent pixel openings VH1 and pixel spacer regions VH2.

[0076] It should be noted that, in the embodiments of the present disclosure, with reference to Figure 1 and Figure 3, the pixel defining part PDL0 refers to a structure formed by an insulating material covering the edge part of the first electrode 31 and a part of the substrate 1. The pixel opening VH1 and the pixel interval area VH2 refer to the opening areas defined by a plurality of pixel defining parts PDL0, and the pixel opening VH1 and the pixel interval area VH2 do not include the pixel defining material. Among them, the pixel opening VH1 is located between two adjacent pixel defining parts PDL0, and the orthographic projection of the pixel opening VH1 on the substrate falls within the orthographic projection of the first electrode 31 on the substrate. The pixel interval area VH2 is located between two adjacent pixel defining parts PDL0, and the orthographic projection of the pixel interval area VH2 on the substrate does not overlap with the orthographic projection of the first electrode 31 on the substrate.

[0077] In some embodiments, an undercut structure may be formed on one side of the pixel defining part PDL0 close to the pixel opening VH1 and / or on one side of the pixel defining part PDL0 close to the pixel interval part VH2, so as to improve the partitioning effect of the pixel defining part PDL0, reduce the probability of lateral leakage or crosstalk between adjacent pixels, and be beneficial to improving the display effect of the display substrate.

[0078] It should be noted that although the shape of the orthographic projection of the pixel opening VH1 on the substrate is schematically shown as a rectangle in the embodiments of the present disclosure, in some embodiments of the present disclosure, the shape of the orthographic projection of the pixel opening VH1 on the substrate may also be various shapes such as a square, an ellipse, a circle, a triangle, etc.

[0079] Exemplarily, the plurality of sub-pixels SP may include a plurality of light-emitting devices. For example, one sub-pixel includes one light-emitting device.

[0080] In some embodiments, the light-emitting device may include an OLED light-emitting device.

[0081] Exemplarily, in some embodiments of the present disclosure, the display substrate may include a silicon-based OLED display substrate. For example, the silicon-based OLED may achieve color display by using white light + three-color filtering. The white light OLED may include a plurality of stacked light-emitting layers, and different light-emitting layers may generate different colors of light. White light is formed by mixing different colors of light. Further, the mixed white light is combined with the filtering structure to achieve the effect of color display. For example, different light-emitting layers may include a yellow light-emitting layer and a blue light-emitting layer, or a red-green mixed light-emitting layer and a blue light-emitting layer. White light emission can be achieved by mixing yellow light and blue light, or by mixing red-green mixed light and blue light.

[0082] Exemplarily, the display substrate 100 may include a substrate 1 and a first electrode layer 3 disposed on the substrate 1. The first electrode layer 3 includes a plurality of first electrodes 31, and the plurality of first electrodes 31 are arranged in an array in the second direction X and the third direction Y. The orthographic projections of the plurality of pixel openings VH1 on the substrate 1 respectively fall within the orthographic projections of the plurality of first electrodes 31 on the substrate 1. That is to say, the plurality of first electrodes 31 can correspond to the positions of the plurality of sub-pixels SP one by one, and the area of the first electrode 31 is larger than the light-emitting area of the sub-pixel SP.

[0083] Figure 2 is a schematic structural diagram of a light-emitting device according to some embodiments of the present disclosure.

[0084] Exemplarily, the display substrate may include a plurality of light-emitting devices located on the substrate. Refer to Figure 2 , the light-emitting device may include a first electrode 31, a light-emitting layer 4, and a second electrode 51. For example, the first electrode 31 may be an anode and the second electrode 51 may be a cathode. The light-emitting layer 4 may include a plurality of light-emitting functional film layers. For example, the light-emitting functional layer 4 may include a hole injection layer 41, a first hole transport layer 42, a first light-emitting sub-layer 43, a first electron transport layer 44, a charge generation layer (CGL) 45, a second hole transport layer 46, a second light-emitting sub-layer 47, a second electron transport layer 48, and an electron injection layer 49 arranged successively away from the substrate.

[0085] Exemplarily, the first light-emitting sub-layer 43 may be used to generate light of a first wavelength, and the second light-emitting sub-layer 47 may be used to generate light of a second wavelength. For example, the light of the first wavelength may include yellow light or a mixture of red and green light, and the light of the second wavelength may include blue light.

[0086] In some embodiments, the first light-emitting sub-layer 43 may include a single film layer formed by co-evaporation of a host material and a yellow light-emitting dye, or the first light-emitting sub-layer 43 may include a single film layer formed by co-evaporation of a host material, a green light-emitting dye, and a red light-emitting dye; or the first light-emitting sub-layer 43 may include a plurality of light-emitting film layers. For example, the first light-emitting sub-layer may include a film layer formed by co-evaporation of a host material one and a green light-emitting dye and a film layer formed by co-evaporation of a host material two and a red light-emitting dye, and the host material one and the host material two may be the same or different.

[0087] In some embodiments, the second light-emitting sub-layer 47 may include a single film layer formed by co-evaporation of a host material and a blue light-emitting dye.

[0088] Through the charge generation layer 45, a plurality of light-emitting sub-layers (such as the first light-emitting sub-layer 43 and the second light-emitting sub-layer 47) can be connected in series to form a stacked OLED device, which is beneficial to improving the light-emitting efficiency and lifespan of the light-emitting device, thereby improving the brightness and service life of the display substrate.

[0089] In a stacked OLED device, due to the relatively high conductivity of the charge generation layer 45, when the charge generation layer 45 between adjacent pixels is not blocked, it is easy to cause horizontal crosstalk between pixels. In order to reduce or eliminate the horizontal crosstalk between pixels, a blocking structure can be designed between the pixels, so that the charge generation layer is disconnected at the blocking structure, thereby reducing the probability of horizontal crosstalk, which is beneficial to reducing lateral leakage and improving the stability and display effect of the display substrate.

[0090] Exemplarily, in some embodiments of the present disclosure, the pixel defining portion can be designed with an undercut structure (for example, the undercut structure can include at least one of an inner undercut structure and an outer undercut structure) for blocking between pixels. By the inner undercut structure and / or the outer undercut structure, the step difference at the blocking structure can be increased, so that the charge generation layer is disconnected at the blocking structure.

[0091] It should be noted that, in the embodiments of the present disclosure, the expression "undercut structure" can refer to at least one of an inner undercut structure and an outer undercut structure or a combination of both.

[0092] Figure 3 is a cross-sectional schematic view of a display substrate according to some embodiments of the present disclosure taken along Figure 1 the center line AA'.

[0093] Exemplarily, in some embodiments of the present disclosure, with reference to Figure 1 and Figure 3 , the pixel defining layer PDL includes a plurality of pixel defining portions PDL0. The pixel defining portion PDL0 can include a first undercut structure OTC1.

[0094] Exemplarily, the first undercut structure OTC1 is designed with an outer undercut structure.

[0095] Exemplarily, the first undercut structure OTC1 includes a first undercut opening K1, and the first undercut opening K1 faces the pixel interval region VH2.

[0096] Exemplarily, the first undercut structure OTC1 can include: a first portion OTC11 on one side of the substrate 1; a second portion OTC12 on the side of the first portion OTC11 away from the substrate 1; and a third portion OTC13 on the side of the second portion OTC12 away from the substrate 1. The second portion OTC12 is indented relative to the third portion OTC13 in the direction from the pixel interval region VH2 to the pixel opening VH1 (for example Figure 3 the X1 direction or the opposite direction of the X1 direction in

[0097] By designing the first undercut structure OTC1 in the pixel defining part, the film layer step difference near the first undercut structure OTC1 can be increased. When forming the light-emitting layer, at least a part of the film layer in the light-emitting layer (such as the charge generation layer) can be disconnected in the area near the first undercut structure OTC1, so that the probability of lateral leakage or crosstalk between adjacent pixels can be reduced, which is beneficial to improving the yield of the display substrate.

[0098] In some embodiments, in order to ensure the blocking effect of the pixel defining part, it is necessary to design a relatively large film layer step difference for the first undercut structure OTC1. However, referring to Figure 3 , when the film layer step difference near the first undercut structure OTC1 is relatively large, it may cause distortion of a part of the film layer (such as the second electrode layer 5) located above the pixel defining layer PDL at the intersection area of the first undercut structure OTC1 and the pixel spacing part VH2. For example, the second electrode layer 5 forms at least one first sub-protrusion 501 at the intersection area of the first undercut structure OTC1 and the pixel spacing part VH2. The size of the first sub-protrusion 501 increases (for example, the length of the first sub-protrusion 501 protruding towards the substrate may increase), which may cause the distance between at least a part of the second electrode layer 5 and the first electrode layer 3 to decrease in the first direction Z, and further may cause a short circuit between the cathode and anode of the sub-pixel, resulting in poor display. The first direction Z is parallel to the light-emitting direction of the display substrate.

[0099] In some embodiments, in order to reduce the film layer distortion in the area near the undercut structure, the pixel defining part can adopt an inner undercut structure design.

[0100] Figure 4 It is a schematic structural diagram of the pixel defining part of a display substrate according to some embodiments of the present disclosure.

[0101] Exemplarily, in some embodiments, referring to Figure 4 , the pixel defining part PDL0 can adopt an inner undercut structure design. For example, the pixel defining part PDL0 can include a second undercut structure UDC2. The second undercut structure UDC2 adopts an inner undercut structure design.

[0102] Exemplarily, the second undercut structure UDC2 includes a second undercut opening K2, and the second undercut opening K2 faces the pixel opening VH1.

[0103] Exemplarily, the second undercut structure UDC2 can include: a fourth part UDC24 on one side of the substrate 1; a fifth part UDC25 on the side of the fourth part UDC24 away from the substrate 1; and a sixth part UDC26 on the side of the fifth part UDC25 away from the substrate 1. The fifth part UDC25 is indented relative to the sixth part UDC26 in the direction from the pixel opening VH1 to the pixel spacing area VH2.

[0104] Through such a design, the distortion in the second electrode layer can be reduced to a certain extent, which is beneficial to reducing the size of the protrusion (i.e., cathode puncture) in the second electrode layer, thereby reducing the probability of short circuit between the cathode and the anode.

[0105] However, in some embodiments, the partitioning effect of the pixel defining part designed with an inner undercut structure is weakened compared with that designed with an outer undercut structure, and there is a certain degree of lateral leakage problem.

[0106] In order to balance the partitioning effect of the pixel defining layer and reduce the probability of short circuit between the cathode and the anode at the same time, at least some embodiments of the present disclosure optimize the design of the pixel defining part.

[0107] Exemplarily, in some embodiments of the present disclosure, both an outer undercut structure and an inner undercut structure are designed in the pixel defining part. Through the combined design of the outer undercut structure and the inner undercut structure, the partitioning effect of the pixel defining part is strengthened. In addition, by optimizing the relevant structural parameters in the pixel defining part, the morphology of at least part of the film layer above the pixel defining part can be adjusted, the puncture size of the cathode can be reduced, which is beneficial to reducing the probability of short circuit between the cathode and the anode, thereby improving the yield of the display substrate.

[0108] Figure 5 is a cross-sectional schematic view of a display substrate along Figure 1 the center line AA' according to some embodiments of the present disclosure, Figure 6 is Figure 5 a partial enlarged schematic view of the S1 area in

[0109] Exemplarily, in some embodiments of the present disclosure, with reference to Figure 1 and Figure 5 , a display substrate 100 is provided. The display substrate 100 may include: a substrate substrate 1; a first electrode layer 3 disposed on the substrate substrate 1; a pixel defining layer PDL disposed on the side of the first electrode layer 3 away from the substrate substrate 1, the pixel defining layer PDL having a plurality of pixel openings VH1 and a plurality of pixel spacer regions VH2; a light emitting layer 4 disposed on the side of the pixel defining layer PDL away from the substrate substrate 1; and a second electrode layer 5 disposed on the side of the light emitting layer 4 away from the substrate substrate 1.

[0110] Exemplarily, the display substrate 100 may further include a packaging layer 6 disposed on the side of the second electrode layer 5 away from the substrate substrate 1.

[0111] Exemplarily, the pixel defining layer PDL includes at least one pixel defining portion PDL0, and at least one pixel defining portion PDL0 is located between adjacent pixel openings VH1 and pixel spacer regions VH2. At least one pixel defining portion PDL0 includes a first undercut structure OTC1 and a second undercut structure UDC2. The first undercut structure OTC1 includes a first undercut opening K1, and the first undercut opening K1 faces the pixel spacer region VH2. The second undercut structure UDC2 includes a second undercut opening K2, and the second undercut opening K2 faces the pixel opening VH1.

[0112] With such a design, two partitions can be formed by using the first undercut structure and the second undercut structure, strengthening the partition effect of the pixel defining portion, so that the charge generation layer can be effectively partitioned, which is beneficial to reducing the probability of lateral leakage or crosstalk between adjacent pixels.

[0113] The inventors have found through research that: since the inner undercut structure (such as the second undercut structure UDC2) is closer to the light emitting region of the pixel (i.e., the pixel opening VH1), the leakage path of the pixel light emitting region preferentially appears near the inner undercut structure.

[0114] In some embodiments of the present disclosure, the key parameters of the first undercut structure OTC1 and the second undercut structure UDC2 can be optimized to adjust the topography of at least part of the film layer above the pixel defining portion. For example, by optimizing some key parameters of the first undercut structure OTC1 and the second undercut structure UDC2, the size of the punctures in the second electrode layer 5 can be adjusted.

[0115] Exemplarily, the second electrode layer 5 includes a plurality of protruding portions 50 protruding in the direction towards the substrate. The protruding portions 50 can also be referred to as the punctures in the second electrode layer 5. By optimizing the key parameters of the first undercut structure OTC1 and the second undercut structure UDC2 (such as the thicknesses of the second part OTC12 and the fifth part UDC25), the sizes of the plurality of protruding portions 50 can be adjusted, thereby reducing the probability of short circuit between the second electrode layer 5 and the first electrode layer 3.

[0116] Exemplarily, the plurality of protruding portions 50 include: at least one first sub-protruding portion 501 located in the intersection region of the pixel spacer region VH2 and the first undercut structure OTC1; and at least one second sub-protruding portion 502 located in the intersection region of the pixel opening VH1 and the second undercut structure UDC2.

[0117] Exemplarily, in the first direction Z, the spacing distance H2 between at least one second sub-protruding portion 502 and the surface 301 of the first electrode layer 3 away from the substrate is greater than the spacing distance H1 between at least one first sub-protruding portion 501 and the surface 301 of the first electrode layer 3 away from the substrate, and the first direction Z is parallel to the light emitting direction of the display substrate.

[0118] It should be noted that the "spacing distance H2 between the second sub-protrusion 502 and the surface 301 of the first electrode layer 3 away from the substrate" refers to the spacing distance between the vertex 02 of the second sub-protrusion 502 closest to the substrate and the surface 301 of the first electrode layer 3 away from the substrate. The "spacing distance H1 between the first sub-protrusion 501 and the surface 301 of the first electrode layer 3 away from the substrate" refers to the spacing distance between the vertex 01 of the first sub-protrusion 501 closest to the substrate and the surface 301 of the first electrode layer 3 away from the substrate.

[0119] Through such a design, the size of the cathode puncture above the second undercut structure (such as the second sub-protrusion 502) can be reduced, thereby reducing the probability of short circuit in the display substrate, which is beneficial to improving the quality and production yield of the display substrate.

[0120] Exemplarily, with reference to Figure 5 and Figure 6 , the first undercut structure OTC1 may include: a first part OTC11 on one side of the substrate 1; a second part OTCl2 on the side of the first part OTC11 away from the substrate 1; and a third part OTC13 on the side of the second part OTC12 away from the substrate 1. The second part OTC12 is indented relative to the third part OTC13 in the direction from the pixel interval region VH2 to the pixel opening VH1.

[0121] Exemplarily, the second undercut structure UDC2 includes: a fourth part UDC24 on one side of the substrate 1; a fifth part UDC25 on the side of the fourth part UDC24 away from the substrate 1; and a sixth part UDC26 on the side of the fifth part UDC25 away from the substrate 1. The fifth part UDC25 is indented relative to the sixth part UDC26 in the direction from the pixel opening VH1 to the pixel interval region VH2.

[0122] Through such a design, an inner undercut structure and an outer undercut structure can be respectively formed on both sides of the pixel defining portion, so that at least part of the film layer above the pixel defining portion can be partitioned twice, which can improve the partitioning effect of the pixel defining portion, is beneficial to reducing the probability of lateral leakage or crosstalk between adjacent pixels, and is beneficial to improving the display effect of the display substrate. In addition, the two undercut structures are located on different sides, which can reduce the local film layer step difference of the pixel defining portion, is beneficial to improving the flatness of at least part of the film layer above the pixel defining layer, such as improving the film layer flatness of the second electrode layer, is beneficial to reducing the number and / or size of punctures in the second electrode layer, and is beneficial to reducing the probability of short circuit in the display substrate and improving the yield of the display substrate.

[0123] Exemplarily, in some embodiments of the present disclosure, with reference to Figure 5 and Figure 6 , the fifth part UDC25 is located on the side of the second part OTC12 away from the substrate.

[0124] Through such a design, the overall film layer step difference of the pixel defining part can be increased, and the isolation effect can be further improved.

[0125] Since the morphology of the second electrode layer located above the pixel defining part is closely related to the film layer step difference of the pixel defining part. The smaller the film layer step difference of the pixel defining part, the smaller the probability of puncture and / or the smaller the size of the puncture generated by the second electrode layer above.

[0126] Exemplarily, in some embodiments of the present disclosure, with reference to Figure 5 and Figure 6 , in the first direction Z, the second part OTC12 has a second thickness h2, and the fifth part UDC25 has a fifth thickness h5, and the fifth thickness h5 is less than the second thickness h2.

[0127] Through such a design, the undercut depth of the second undercut structure UDC2 in the upper layer (i.e., the thickness h5 of the fifth part UDC25) can be made less than the undercut depth of the first undercut structure OTCl in the lower layer (i.e., the thickness h2 of the second part OTC12). In this way, when forming the undercut structure, the film layer step difference near the second undercut structure UDC2 is less than the film layer step difference near the first undercut structure OTC1, so that the size of the second sub-protrusion 502 of the second electrode layer near the second undercut structure UDC2 is less than the size of the first sub-protrusion 501 near the first undercut structure OTC1. Since the leakage path between sub-pixels will preferentially occur in the region near the pixel opening VH1, by designing the thickness of the fifth part UDC25 to be smaller, the size of the second sub-protrusion 502 near the pixel opening VH1 can be reduced, thereby reducing the probability of short circuit between the second electrode layer 5 and the first electrode layer 3, which is beneficial to improving the yield of the display substrate.

[0128] In some embodiments, the ratio of the fifth thickness h5 to the second thickness h2 is less than or equal to 0.8. Through such a design, the step difference between the second undercut structure UDC2 in the upper layer and the first undercut OTC1 in the lower layer is further reduced, which is beneficial to further reducing the size of the second sub-protrusion 502, thereby further reducing the probability of short circuit between the second electrode layer 5 and the first electrode layer 3, and further improving the yield of the display substrate.

[0129] Exemplarily, in some embodiments of the present disclosure, continue to refer to Figure 6, the second part OTC12 includes a first side L1 close to the pixel spacer region VH2, and the fifth part UDC25 includes a second side L2 close to the pixel spacer region VH2. In the direction pointing from the pixel opening VH1 to the pixel spacer region VH2, the first side L1 is closer to the pixel spacer region VH2 than the second side L2. For example, in the direction pointing from the pixel opening VH1 to the pixel spacer region VH2, the spacing distance M1 between the first side L1 and the second side L2 is greater than 0.

[0130] Through such a design, the support strength of the second part OTC12 for the film layer (such as the fifth part UDC25) located above it can be improved, the stability of the first undercut structure OTC1 in the lower layer can be improved, the collapse of the first undercut structure OTC1 in the lower layer can be avoided, which is beneficial to improving the overall stability of the pixel defining part and can improve the reliability and yield of the display substrate.

[0131] Exemplarily, in some embodiments of the present disclosure, continue to refer to Figure 6 , in the first direction Z, the first electrode layer 3 has a third thickness h3, the first part OTC11 has a first thickness h1, and the second part OTC12 has a second thickness h2. Exemplarily, the first thickness h1, the second thickness h2, and the third thickness h3 satisfy: h1 + h2 - h3 < 30 Å.

[0132] Through such a design, it can be ensured that the film layer in the middle of the pixel defining layer (such as the film layer where the third part OTC13 and the fourth part UDC24 are located) has a small step difference in the edge wrapping area of the pixel defining layer PDL (such as the area where the pixel defining layer PDL wraps the edge of the first electrode 31), so as to reduce the influence of the film layer step difference in this area on the morphology of the second undercut structure UDC2 above, which is beneficial to improving the stability of the second undercut structure UDC2, beneficial to improving the overall reliability of the pixel defining part, and beneficial to improving the yield of the display substrate.

[0133] In some embodiments of the present disclosure, the pixel defining layer PDL may include a plurality of stacked insulating layers.

[0134] In some embodiments, the first undercut structure OTC1 and the second undercut structure UDC2 may share at least a part of the film layer, that is to say, a part of the structure in the first undercut structure OTC1 and a part of the structure in the second undercut structure UDC2 may be located in the same layer.

[0135] Exemplarily, in some embodiments of the present disclosure, continue to refer to Figure 6, the pixel defining layer PDL may include: a first sub-pixel defining layer PDL11 on one side of the substrate 1; a second sub-pixel defining layer PDL12 on the side of the first sub-pixel defining layer PDL11 away from the substrate 1; a third sub-pixel defining layer PDL13 on the side of the second sub-pixel defining layer PDL12 away from the substrate 1; a fourth sub-pixel defining layer PDL14 on the side of the third sub-pixel defining layer PDL13 away from the substrate 1; and a fifth sub-pixel defining layer PDL15 on the side of the fourth sub-pixel defining layer PDL14 away from the substrate 1.

[0136] Exemplarily, the first part OTC11 is located in the first sub-pixel defining layer PDL11, the second part OTC12 is located in the second sub-pixel defining layer PDL12, the third part OTC13 and the fourth part UDC24 are located in the third sub-pixel defining layer PDL13, the fifth part UDC25 is located in the fourth sub-pixel defining layer PDL14, and the sixth part UDC26 is located in the fifth sub-pixel defining layer PDL15.

[0137] Through such a design, the first undercut structure OTC1 and the second undercut structure UDC2 can share at least a part of the film layer. While ensuring the overall partition effect of the pixel defining layer, the number of film layers can be reduced to a certain extent, the manufacturing process can be simplified, and at the same time, it is beneficial to reduce the overall thickness of the pixel defining layer, which is beneficial to realizing the thin and light design of the display substrate.

[0138] Figure 7 It is a partial cross-sectional schematic diagram of a display substrate according to some embodiments of the present disclosure.

[0139] Exemplarily, in some embodiments of the present disclosure, referring to Figure 7 , the second part OTC12 is indented by a third distance D3 relative to the third part OTC13 in the direction from the pixel spacer region VH2 to the pixel opening VH1. Exemplarily, the ratio of the second thickness h2 to the third distance D3 is in the range of 2 to 3.

[0140] Through such a design, the stability of the first undercut structure can be improved, and the collapse of the first undercut structure can be prevented.

[0141] Exemplarily, the fifth part UDC25 is indented by a fourth distance D4 relative to the sixth part UDC26 in the direction from the pixel opening VH1 to the pixel spacer region VH2. Exemplarily, the ratio of the fifth thickness h5 to the fourth distance D4 is in the range of 2 to 3.

[0142] Through such a design, the stability of the second undercut structure can be improved, and the collapse of the second undercut structure can be prevented.

[0143] Exemplarily, in some embodiments of the present disclosure, the charge generation layer in the light-emitting layer is disconnected at the intersection region of the pixel defining portion and the pixel opening; and / or, the charge generation layer in the light-emitting layer is disconnected at the intersection region of the pixel defining portion and the pixel spacer region.

[0144] Exemplarily, with reference to Figure 2 and Figure 7 , the display substrate may include a light-emitting layer 4 located on the side of the pixel defining layer away from the substrate. The light-emitting layer 4 may include multiple film layers. For example, the light-emitting layer 4 may include a charge generation layer 45. By designing the pixel defining portion with multiple undercut structures, the charge generation layers in adjacent sub-pixels can be better separated, thereby reducing crosstalk between adjacent pixels. For example, the charge generation layer 45 may include: a first charge generation sub-portion 451 located above the region of the pixel spacer region VH2; a second charge generation sub-portion 452 located above the pixel defining portion PDL0; and a third charge generation sub-portion 453 located above the region of the pixel opening VH1.

[0145] Exemplarily, the first charge generation sub-portion 451 and the second charge generation sub-portion 452 are disconnected at the intersection region of the pixel defining portion PDL0 and the pixel spacer region VH2.

[0146] Exemplarily, the second charge generation sub-portion 452 and the third charge generation sub-portion 453 are disconnected at the intersection region of the pixel defining portion PDL0 and the pixel opening VH1.

[0147] By adopting such a double undercut structure design, the charge generation layers between adjacent pixels can be better separated, thereby reducing lateral leakage of the display substrate, facilitating improving the color purity of the display substrate, reducing lateral crosstalk of the display substrate, and improving the display effect of the display substrate.

[0148] In some embodiments, more undercut structures may also be designed in the pixel defining portion, such as adding an inner undercut structure (the bottom cut of the inner undercut structure faces the pixel opening) and / or an outer undercut structure (the bottom cut of the outer undercut structure faces the pixel spacer region), thereby further improving the separation effect of the pixel defining portion.

[0149] Figure 8 is a partial cross-sectional schematic diagram of a display substrate according to some embodiments of the present disclosure, Figure 9 is Figure 8 a partial enlarged schematic diagram of the S2 region in

[0150] Exemplarily, in some embodiments of the present disclosure, with reference to Figure 8 and Figure 9, the pixel defining portion PDL0 may include a first undercut structure OTC1 and a second undercut structure UDC2. Among them, the first undercut structure OTC1 and the second undercut structure UDC2 may have the same structure as the first undercut structure OTC1 and the second undercut structure UDC2 of the embodiment shown in Figure 6 and will not be described herein again.

[0151] Different from the embodiment shown in Figure 6 , Figure 8 and Figure 9 , the pixel defining portion PDL0 in the embodiment shown may further include a third undercut structure OTC3. The third undercut structure OTC3 includes: a seventh portion OTC37 on one side of the substrate 1; an eighth portion OTC38 on the side of the seventh portion OTC37 away from the substrate 1; and a ninth portion OTC39 on the side of the eighth portion OTC38 away from the substrate 1. The eighth portion OTC38 is indented relative to the ninth portion OTC39 in the direction from the pixel spacer region VH2 to the pixel opening VH1.

[0152] Through such a design, the number of undercut structures in the pixel defining portion can be increased, the partitioning effect of the pixel defining portion can be further improved, and it is beneficial to improve the yield of the display substrate.

[0153] It should be noted that although the embodiments of the present disclosure schematically show that the pixel defining portion includes two undercut structures or three undercut structures, the embodiments of the present disclosure are not limited thereto. In some embodiments of the present disclosure, the pixel defining portion may further include a greater number of undercut structures, such as four undercut structures, five undercut structures or a greater number of undercut structures.

[0154] Exemplarily, the plurality of undercut structures may include at least one inner undercut structure and at least one outer undercut structure.

[0155] In some embodiments, the seventh portion OTC37 is located in the third sub-pixel defining layer PDL13, the eighth portion OTC38 is located in the fourth sub-pixel defining layer PDL14, and the ninth portion OTC39 is located in the fifth sub-pixel defining layer PDL15. That is to say, the fourth portion UDC24 and the seventh portion OTC37 may be located in the same layer, the fifth portion UDC25 and the eighth portion OTC38 may be located in the same layer, and the sixth portion UDC26 and the ninth portion OTC39 may be located in the same layer.

[0156] Through such a design, the second undercut structure UDC2 and the third undercut structure OTC3 can share at least a part of the film layer, which is beneficial to simplifying the process flow, and can also reduce the overall thickness of the pixel defining layer, which is beneficial to realizing the thinning of the display substrate.

[0157] Exemplarily, continue to refer toFigure 9 The second part OTC12 includes a first side L1 adjacent to the pixel spacer region VH2, the eighth part OTC38 includes a third side L3 adjacent to the pixel spacer region VH2, and the ninth part OTC39 includes a fourth side L4 adjacent to the pixel spacer region VH2.

[0158] Exemplarily, in the direction from the pixel opening VH1 towards the pixel spacer region VH2, the orthogonal projection of the fourth side L4 on the substrate lies between the orthogonal projections of both the first side L1 and the third side L3 on the substrate.

[0159] Exemplarily, in the direction from the pixel opening VH1 towards the pixel spacer region VH2, the spacing distance M2 between the third side L3 and the fourth side L4 is less than the spacing distance M3 between the first side L1 and the third side L3.

[0160] Through such a design, the stability of the undercut structure in the lower layer (such as the first undercut structure OTC1) can be improved, the collapse of the pixel defining portion can be avoided, which is beneficial to improving the reliability of the pixel defining portion and ensuring that the pixel defining portion has a good isolation effect.

[0161] Exemplarily, the material of the first sub-pixel defining layer PDL11 includes silicon oxide.

[0162] Exemplarily, the material of the second sub-pixel defining layer PDL12 includes silicon nitride.

[0163] Exemplarily, the material of the third sub-pixel defining layer PDL13 includes silicon oxide.

[0164] Exemplarily, the material of the fourth sub-pixel defining layer PDL14 includes silicon nitride.

[0165] Exemplarily, the material of the fifth sub-pixel defining layer PDL15 includes silicon oxide.

[0166] Exemplarily, the etching selectivity of silicon nitride to silicon oxide is greater than or equal to 9:1. For example, the lateral etching selectivity of silicon nitride to silicon oxide is greater than or equal to 9:1. That is to say, in the horizontal direction, the etching rate of silicon nitride is much greater than that of silicon oxide. Thus, during the etching process, more silicon nitride in the middle is etched, so that an undercut structure with an inward contraction of the middle film layer can be formed.

[0167] In some embodiments, the first undercut structure OTC1 and the second undercut structure UDC2 can be designed at the same planar height.

[0168] Figure 10 It is a partial cross-sectional schematic diagram of a display substrate according to some embodiments of the present disclosure.

[0169] Exemplarily, in an embodiment of the present disclosure, with reference to Figure 10 , in the first direction Z, the surface OTC120 of the second part OTC12 close to the substrate is spaced apart from the surface 11 of the substrate 1 close to the pixel defining layer PDL by a first distance D1, and the surface UDC250 of the fifth part UDC25 close to the substrate is spaced apart from the surface 11 of the substrate 1 close to the pixel defining layer PDL by a second distance D2.

[0170] Exemplarily, the first distance D1 and the second distance D2 are substantially equal.

[0171] It should be noted that the "first distance D1" refers to the average spacing distance between the surface OTC120 of the second part OTC12 close to the substrate and the surface 11 of the substrate 1 close to the pixel defining layer PDL; the "second distance D2" refers to the average spacing distance between the surface UDC250 of the fifth part UDC25 close to the substrate and the surface 11 of the substrate 1 close to the pixel defining layer PDL.

[0172] It should also be noted that "the first distance D1 and the second distance D2 are substantially equal" means that the ratio D1 / D2 of the first distance D1 and the second distance D2 is in the range of 0.8 to 1.2.

[0173] Through such a design, while improving the partition effect of the pixel defining part by using the double-bottom cut structure, the etched parts of the two bottom cut structures are on the same horizontal plane, so that it is easier to control the etching depth during the etching process, which is beneficial to reducing the processing difficulty, improving the etching accuracy, and improving the stability of the pixel defining part.

[0174] Exemplarily, the pixel defining layer PDL may include: a first sub-pixel defining layer PDL11 on one side of the substrate 1; a second sub-pixel defining layer PDL12 on the side of the first sub-pixel defining layer PDL11 away from the substrate 1; and a third sub-pixel defining layer PDL13 on the side of the second sub-pixel defining layer PDL12 away from the substrate 1.

[0175] Exemplarily, the first part OTC11 and the fourth part UDC24 are located in the first sub-pixel defining layer PDL11, the second part OTC12 and the fifth part UDC25 are located in the second sub-pixel defining layer PDL12, and the third part OTC13 and the sixth part UDC26 are located in the third sub-pixel defining layer PDL13.

[0176] Exemplarily, the material of the first sub-pixel defining layer PDL11 includes silicon oxide.

[0177] Exemplarily, the material of the second sub-pixel defining layer PDL12 includes silicon nitride.

[0178] Exemplarily, the material of the third sub-pixel defining layer PDL13 includes silicon oxide.

[0179] Through such a design, the number of film layers in the pixel defining layer can be reduced, which is beneficial to simplifying the manufacturing process, improving production efficiency, and reducing costs.

[0180] Figure 11 It is a structural block diagram of a display device according to an embodiment of the present disclosure.

[0181] Exemplarily, an embodiment of the present disclosure further provides a display device. Referring to Figure 11 , the display device 200 may include the display substrate 100 as described in any one of the above. The display device may include, but is not limited to: electronic paper, mobile phone, tablet computer, display, notebook computer, digital photo frame, navigator, etc., any product or component with a display function. It should be understood that the display device has the same beneficial effects as the display substrate provided in the foregoing embodiments.

[0182] Figure 12 It is a flowchart of a method for manufacturing a display substrate according to an embodiment of the present disclosure, Figure 13A - Figure 13J which are respectively schematic structural diagrams of some film layers in the manufacturing process of a display substrate according to an embodiment of the present disclosure.

[0183] Exemplarily, in some embodiments of the present disclosure, a method for manufacturing a display substrate is provided. With reference to Figure 5 and Figure 12 , the method for manufacturing the display substrate may include the following steps S01 - S05.

[0184] In step S01, a substrate 1 is provided.

[0185] In step S02, a first electrode layer 3 is formed on one side of the substrate 1, and a patterning process is performed on the first electrode layer 3 to form a plurality of first electrodes 31 arranged in an array.

[0186] In step S03, a pixel defining layer PDL is formed on one side of the substrate 1, and a patterning process is performed on the pixel defining layer to form a plurality of pixel openings VH1, a plurality of pixel spacer regions VH2, and at least one pixel defining portion PDL0. At least one pixel defining portion PDL0 is located between the pixel opening VH1 and the pixel spacer region VH2. Among them, at least one pixel defining portion PDL0 includes a first undercut structure OTC1 and a second undercut structure UDC2. The first undercut structure OTC1 includes a first undercut opening K1, and the first undercut opening K1 faces the pixel spacer region VH2. The second undercut structure UDC2 includes a second undercut opening K2, and the second undercut opening K2 faces the pixel opening VH1.

[0187] In step S04, a light-emitting layer 4 is formed on a side of the pixel definition layer PDL away from the substrate 1.

[0188] In step S05, a second electrode layer 5 is formed on a side of the light-emitting layer 4 away from the substrate. The second electrode layer 5 includes a plurality of protruding portions 50 protruding in a direction toward the substrate. The plurality of protruding portions 50 include: at least one first sub-protruding portion 501 located in an intersection region of the pixel interval region VH2 and the first undercut structure OTC1; and at least one second sub-protruding portion 502 located in an intersection region of the pixel opening VH1 and the second undercut structure UDC2. In the first direction Z, a distance H2 between at least one second sub-protruding portion 502 and a surface 301 of the first electrode layer 3 away from the substrate is greater than a distance H1 between at least one first sub-protruding portion 501 and the surface 301 of the first electrode layer 3 away from the substrate, and the first direction Z is parallel to a light-emitting direction of the display substrate.

[0189] The following will be combined with Figure 13A - Figure 13J to describe in detail the preparation process of the pixel definition portion.

[0190] Exemplarily, referring to Figure 13A , after the etching process of the first electrode layer 3 is completed, a first sub-pixel definition layer PDL11, a second sub-pixel definition layer PDL12, a third sub-pixel definition layer PDL13, a fourth sub-pixel definition layer PDL14, and a fifth sub-pixel definition layer PDL15 are sequentially formed on a side of the first electrode layer 3 away from the substrate.

[0191] Exemplarily, partial film layers of the first sub-pixel definition layer PDL11 and the second sub-pixel definition layer PDL12 located above the first electrode layer 3 are etched away.

[0192] Exemplarily, in combination with referring to Figure 13B - Figure 13D , after the fifth sub-pixel definition layer PDL15 is prepared, by using photolithography and etching techniques, partial regions of the third sub-pixel definition layer PDL13, the fourth sub-pixel definition layer PDL14, and the fifth sub-pixel definition layer PDL15 located above the first electrode 31 are etched to form a plurality of pixel openings VH1. For example, the photoresist layer 20 can be patterned by using a mask 30, and then the unprotected portions of the third sub-pixel definition layer PDL13, the fourth sub-pixel definition layer PDL14, and the fifth sub-pixel definition layer PDL15 are removed by using etching techniques, thereby forming a plurality of pixel openings VH1.

[0193] Exemplarily, in combination with referring to Figure 13E - Figure 13G, continue to use photolithography and etching techniques to etch partial regions on the sides of the fourth sub-pixel defining layer PDL14 and the fifth sub-pixel defining layer PDL15 away from the pixel opening, and to etch partial regions on the sides of the first sub-pixel defining layer PDL11, the second sub-pixel defining layer PDL12, and the third sub-pixel defining layer PDL13 away from the pixel opening VH1, so as to form a pixel spacer region VH2 and a pixel defining layer with a stepped shape.

[0194] Exemplarily, after such processing, the first sub-pixel defining layer PDL11, the second sub-pixel defining layer PDL12, and the third sub-pixel defining layer PDL13 protrude relative to the fourth sub-pixel defining layer PDL14 and the fifth sub-pixel defining layer PDL15 in the direction from the pixel opening VH1 to the pixel spacer portion VH2.

[0195] Exemplarily, with reference to Figure 13H - Figure 13J , use photolithography and development techniques to coat a photoresist on the upper surface of the pixel defining layer for protection, and expose the sides of the first sub-pixel defining layer PDL11, the second sub-pixel defining layer PDL12, and the third sub-pixel defining layer PDL13 close to the pixel opening VH1, as well as expose the sides of the third sub-pixel defining layer PDL13, the fourth sub-pixel defining layer PDL14, and the fifth sub-pixel defining layer PDL15 close to the pixel spacer region VH2. Then, use an etching process to selectively etch the first sub-pixel defining layer PDL11, the second sub-pixel defining layer PDL12, the third sub-pixel defining layer PDL13, the fourth sub-pixel defining layer PDL14, and the fifth sub-pixel defining layer PDL15. Since the lateral etching rates of the second sub-pixel defining layer PDL12 and the fourth sub-pixel defining layer PDL14 are faster, a first undercut structure OTC1 and a second undercut structure UDC2 can be formed. Then, remove the photoresist to obtain the pixel defining layer as shown in Figure 13J Figure.

[0196] Exemplarily, the method for preparing the display substrate further includes: forming the first undercut structure OTC1 and the second undercut structure UDC2 in the same etching step. That is to say, the first undercut opening K1 and the second undercut opening K2 can be formed in the same etching step.

[0197] By such a method, at least one etching step can be reduced, which is beneficial to improving production efficiency and reducing costs.

[0198] Although some embodiments of the general concept of the present disclosure have been shown and described, those of ordinary skill in the art will understand that changes can be made to these embodiments without departing from the principles and spirit of the general concept of the present disclosure. The scope of the present disclosure is defined by the claims and their equivalents.

Claims

1. A display substrate, characterized in that, Comprising: A substrate; A first electrode layer disposed on the substrate; A pixel defining layer disposed on a side of the first electrode layer away from the substrate, the pixel defining layer having a plurality of pixel openings and a plurality of pixel spacer regions; A light emitting layer disposed on a side of the pixel defining layer away from the substrate; And A second electrode layer disposed on a side of the light emitting layer away from the substrate, wherein the pixel defining layer includes at least one pixel defining portion located between an adjacent one of the pixel openings and the pixel spacer region, the at least one pixel defining portion includes a first undercut structure and a second undercut structure, the first undercut structure includes a first undercut opening facing the pixel spacer region, the second undercut structure includes a second undercut opening facing the pixel opening; The second electrode layer includes a plurality of protruding portions protruding in a direction toward the substrate, the plurality of protruding portions including: at least one first sub-protruding portion located in an intersection region of the pixel spacer region and the first undercut structure; and at least one second sub-protruding portion located in an intersection region of the pixel opening and the second undercut structure, wherein, in a first direction parallel to a light emitting direction of the display substrate, a spacing distance between the at least one second sub-protruding portion and a surface of the first electrode layer away from the substrate is greater than a spacing distance between the at least one first sub-protruding portion and the surface of the first electrode layer away from the substrate.

2. The display substrate according to claim 1, wherein The first undercut structure includes: a first portion on a side of the substrate; a second portion on a side of the first portion away from the substrate; and a third portion on a side of the second portion away from the substrate, the second portion being indented relative to the third portion in a direction from the pixel spacer region to the pixel opening.

3. The display substrate according to claim 1 or 2, wherein The second undercut structure includes: a fourth portion on a side of the substrate; a fifth portion on a side of the fourth portion away from the substrate; and a sixth portion on a side of the fifth portion away from the substrate, the fifth portion being indented relative to the sixth portion in a direction from the pixel opening to the pixel spacer region.

4. The display substrate according to claim 3, wherein, The fifth portion is on a side of the second portion away from the substrate.

5. The display substrate according to claim 4, wherein, In the first direction, the second portion has a second thickness, the fifth portion has a fifth thickness, and the fifth thickness is less than the second thickness.

6. The display substrate according to claim 5, wherein, A ratio of the fifth thickness to the second thickness is less than or equal to 0.

8.

7. The display substrate according to any one of claims 3-6, wherein, The second portion includes a first side edge close to the pixel spacer region, the fifth portion includes a second side edge close to the pixel spacer region, and in a direction from the pixel opening to the pixel spacer region, the first side edge is closer to the pixel spacer region than the second side edge.

8. The display substrate according to any one of claims 3-7, wherein In the first direction, the first electrode layer has a third thickness h3, the first portion has a first thickness h1, the second portion has a second thickness h2, and the first thickness h1, the second thickness h2, and the third thickness h3 satisfy: h1 + h2 - h3 < 30 Å.

9. The display substrate according to any one of claims 3-8, wherein The pixel defining layer includes: a first sub-pixel defining layer on one side of the substrate; a second sub-pixel defining layer on a side of the first sub-pixel defining layer away from the substrate; a third sub-pixel defining layer on a side of the second sub-pixel defining layer away from the substrate; a fourth sub-pixel defining layer on a side of the third sub-pixel defining layer away from the substrate; and a fifth sub-pixel defining layer on a side of the fourth sub-pixel defining layer away from the substrate. Wherein, the first portion is located in the first sub-pixel defining layer, the second portion is located in the second sub-pixel defining layer, the third portion and the fourth portion are located in the third sub-pixel defining layer, the fifth portion is located in the fourth sub-pixel defining layer, and the sixth portion is located in the fifth sub-pixel defining layer.

10. The display substrate according to claim 9, wherein, The pixel defining portion further includes a third undercut structure, and the third undercut structure includes: a seventh portion on one side of the substrate; an eighth portion on a side of the seventh portion away from the substrate; and a ninth portion on a side of the eighth portion away from the substrate, and the eighth portion is indented relative to the ninth portion in a direction from the pixel spacing region to the pixel opening.

11. The display substrate according to claim 10, wherein, The seventh portion is located in the third sub-pixel defining layer, the eighth portion is located in the fourth sub-pixel defining layer, and the ninth portion is located in the fifth sub-pixel defining layer.

12. The display substrate according to claim 10 or 11, wherein, The second portion includes a first side close to the pixel spacing region, the eighth portion includes a third side close to the pixel spacing region, and the ninth portion includes a fourth side close to the pixel spacing region. In a direction from the pixel opening to the pixel spacing region, a positive projection of the fourth side on the substrate is located between positive projections of the first side and the third side on the substrate.

13. The display substrate according to claim 3, wherein, In the first direction, a surface of the second portion close to the substrate is spaced apart from a surface of the substrate close to the pixel defining layer by a first distance, and a surface of the fifth portion close to the substrate is spaced apart from a surface of the substrate close to the pixel defining layer by a second distance, and the first distance and the second distance are substantially equal.

14. The display substrate according to claim 13, wherein, The pixel defining layer includes: a first sub-pixel defining layer on one side of the substrate; a second sub-pixel defining layer on a side of the first sub-pixel defining layer away from the substrate; and a third sub-pixel defining layer on a side of the second sub-pixel defining layer away from the substrate. Wherein, the first portion and the fourth portion are located in the first sub-pixel defining layer, the second portion and the fifth portion are located in the second sub-pixel defining layer, and the third portion and the sixth portion are located in the third sub-pixel defining layer.

15. The display substrate according to any one of claims 9-12, wherein, The material of the first sub-pixel defining layer includes silicon oxide; and / or, The material of the second sub-pixel defining layer includes silicon nitride; and / or, The material of the third sub-pixel defining layer includes silicon oxide; and / or, The material of the fourth sub-pixel defining layer includes silicon nitride; and / or, The material of the fifth sub-pixel defining layer includes silicon oxide; and The etching selectivity between the silicon nitride and the silicon oxide is greater than or equal to 9:

1.

16. The display substrate according to claim 5 or 6, wherein, The second part is indented by a third distance relative to the third part in a direction from the pixel spacer region to the pixel opening, and the ratio of the second thickness to the third distance is in the range of 2 to 3; and / or, The fifth part is indented by a fourth distance relative to the sixth part in a direction from the pixel opening to the pixel spacer region, and the ratio of the fifth thickness to the fourth distance is in the range of 2 to 3.

17. A display device, comprising the display substrate according to any one of claims 1-15.

18. A method for preparing a display substrate, characterized in that, Comprising: Providing a substrate; Forming a first electrode layer on one side of the substrate, and performing a patterning process on the first electrode layer to form a plurality of first electrodes arranged in an array; Forming a pixel defining layer on one side of the substrate, and performing a patterning process on the pixel defining layer to form a plurality of pixel openings, a plurality of pixel spacer regions, and at least one pixel defining portion located between the pixel openings and the pixel spacer regions, wherein the at least one pixel defining portion includes a first undercut structure and a second undercut structure, the first undercut structure includes a first undercut opening facing the pixel spacer region, and the second undercut structure includes a second undercut opening facing the pixel opening; Forming a light emitting layer on a side of the pixel defining layer away from the substrate; and Forming a second electrode layer on a side of the light emitting layer away from the substrate, wherein the second electrode layer includes a plurality of protruding portions protruding in a direction towards the substrate, the plurality of protruding portions include: at least one first sub-protruding portion located in a converging region of the pixel spacer region and the first undercut structure; and at least one second sub-protruding portion located in a converging region of the pixel opening and the second undercut structure, in a first direction, the spacing distance between the at least one second sub-protruding portion and a surface of the first electrode layer away from the substrate is greater than the spacing distance between the at least one first sub-protruding portion and the surface of the first electrode layer away from the substrate, and the first direction is parallel to a light emitting direction of the display substrate.

19. The preparation method according to claim 18, wherein The method further includes: forming the first undercut structure and the second undercut structure in the same etching step.

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