Single-photon avalanche diode, preparation method thereof and photoelectric detector
By introducing a zero-bandgap material buffer layer into a single-photon avalanche diode, the problems of high bias voltage and high dark current are solved, and low bias voltage, high gain, and low noise performance is achieved, suitable for wide-band light detection and mechanical flexibility applications.
Patent Information
- Application Number
- CN202311842280.6
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- Filing Date
- 2023-12-28
- Publication Date
- 2025-07-08
AI Technical Summary
Single-photon avalanche diodes have problems such as high bias voltage, large dark current, and low signal-to-noise that triggers the avalanche effect.
A buffer layer is introduced into a single-photon avalanche diode, which consists of a zero-bandgap material such as graphene, which is used to replace the Schottky junction between metal contacts and a two-dimensional semiconductor, reduce the Schottky barrier and contact resistance, and optimize the thickness and mass by chemical vapor deposition.
It reduces the bias voltage of the avalanche effect, suppresses dark current, improves the signal-to-noise ratio, achieves low bias voltage, high gain, and low noise performance, and is suitable for wide-band light detection and mechanical flexibility applications.
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Figure CN120282552A_ABST
Abstract
Description
Technical Field
[0001] The present application relates to the technical field of photoelectric detectors, and in particular to a single-photon avalanche diode and a preparation method thereof, and a photoelectric detector. Background Art
[0002] With the rise of emerging fields such as wearable electronic devices, intelligent robotics, drones or self-driving cars, there is an urgent need for new high-performance photodetectors that are lightweight and convenient, can cover a wide range of bands, and are mechanically flexible.
[0003] Single photon avalanche diode (SPAD) has the advantages of small photosensitive surface and high sensitivity and is widely used in photodetectors.
[0004] However, in the related technologies, single-photon avalanche diodes have the problems of high bias voltage triggering avalanche effect, large dark current, and low signal-to-noise ratio, which need to be solved urgently. Summary of the invention
[0005] The present application provides a single-photon avalanche diode and a preparation method thereof, and a photodetector, which can effectively improve the technical problems of high bias voltage triggering avalanche effect in the single-photon avalanche diode, large dark current in the single-photon avalanche diode, and low signal-to-noise ratio.
[0006] In a first aspect, the present application provides a single-photon avalanche diode, comprising: a first type two-dimensional semiconductor layer, having a first surface and a second surface relative to each other, the first surface comprising a first region and a second region; a second type two-dimensional semiconductor layer, arranged on a side of the first surface away from the second surface, and located in the second region; a first metal contact, arranged on a side of the first surface away from the second surface, and electrically connected to the first type two-dimensional semiconductor layer, and located in the first region; a second metal contact, arranged on a side of the second type two-dimensional semiconductor layer away from the first type two-dimensional semiconductor layer, and electrically connected to the second type two-dimensional semiconductor layer, and located in the second region; a buffer layer, arranged between the first type two-dimensional semiconductor layer and the first metal contact, and / or, arranged between the second type two-dimensional semiconductor layer and the second metal contact; wherein the buffer layer comprises at least one zero-bandgap material, the first type is one of N-type and P-type, and the second type is the other of N-type and P-type.
[0007] Optionally, the single-photon avalanche diode includes a first buffer layer and a second buffer layer. The first buffer layer is disposed between the first-type two-dimensional semiconductor layer and the first metal contact, and the second buffer layer is disposed between the second-type two-dimensional semiconductor layer and the second metal contact. Wherein, both the first buffer layer and the second buffer layer include graphene.
[0008] Optionally, the first buffer layer and the second buffer layer are made of the same material.
[0009] Optionally, the single-photon avalanche diode further includes: a second-type substrate disposed on a side of the first-type two-dimensional semiconductor layer away from the second-type two-dimensional semiconductor layer.
[0010] Optionally, the single-photon avalanche diode further includes: a first-type substrate disposed on a side of the first-type two-dimensional semiconductor layer away from the second-type two-dimensional semiconductor layer; a second-type well layer disposed in the first-type substrate, and a second surface of the first-type two-dimensional semiconductor layer is in contact with the second-type well layer.
[0011] Optionally, the single-photon avalanche diode further includes: a dielectric layer covering the substrate, the first-type two-dimensional semiconductor layer, and the second-type two-dimensional semiconductor layer, and the dielectric layer includes a first through hole in the first region and a second through hole in the second region. Wherein, the first through hole penetrates the dielectric layer, and the first metal contact is disposed in the first through hole; the second through hole penetrates the dielectric layer, and the second metal contact is disposed in the second through hole.
[0012] In a second aspect, the present application provides a method for manufacturing a single-photon avalanche diode. The method for manufacturing the single-photon avalanche diode includes the following steps:
[0013] Provide a substrate;
[0014] Form a first-type two-dimensional semiconductor layer on one side of the substrate. Wherein, the first-type two-dimensional semiconductor layer includes a first surface and a second surface, the first surface is disposed on a side of the second surface away from the substrate, and a first region and a second region are defined on the first surface;
[0015] Form a second-type two-dimensional semiconductor layer in the second region of the first surface;
[0016] Form a first metal contact in the first region of the first surface respectively, and form a second metal contact on a side of the second-type two-dimensional semiconductor layer away from the first-type two-dimensional semiconductor layer;
[0017] Before the steps of forming a first metal contact in a first region of the first surface and forming a second metal contact on a side of the second-type two-dimensional semiconductor layer facing away from the first-type two-dimensional semiconductor layer, the following steps are further included:
[0018] A buffer layer is formed between the first-type two-dimensional semiconductor layer and the first metal contact, and / or between the second-type two-dimensional semiconductor layer and the second metal contact, wherein the buffer layer includes at least one zero-bandgap material.
[0019] Optionally, the substrate is a second-type substrate.
[0020] Optionally, the substrate is a first-type substrate. Before the step of forming a first-type two-dimensional semiconductor layer on one side of the substrate, the following steps are further included: forming a second-type well layer in the substrate; wherein a second surface of the first-type two-dimensional semiconductor layer is in contact with the second-type well layer.
[0021] In a third aspect, the present application provides a photodetector, which includes the single-photon avalanche diode according to any one of the above.
[0022] The present application provides a single-photon avalanche diode, a preparation method thereof, and a photodetector. The single-photon avalanche diode includes: a first-type two-dimensional semiconductor layer having opposite first and second surfaces, where the first surface includes a first region and a second region; a second-type two-dimensional semiconductor layer disposed on a side of the first surface facing away from the second surface and located in the second region; a first metal contact disposed on a side of the first surface facing away from the second surface, electrically connected to the first-type two-dimensional semiconductor layer, and located in the first region; a second metal contact disposed on a side of the second-type two-dimensional semiconductor layer facing away from the first-type two-dimensional semiconductor layer, electrically connected to the second-type two-dimensional semiconductor layer, and located in the second region; a buffer layer disposed between the first-type two-dimensional semiconductor layer and the first metal contact, and / or between the second-type two-dimensional semiconductor layer and the second metal contact; where the buffer layer includes at least one zero-bandgap material, the first type is one of N-type and P-type, and the second type is the other of N-type and P-type. In the single-photon avalanche diode and the photodetector provided by the present application, since a buffer layer is provided between the first-type two-dimensional semiconductor layer and the first metal contact, and / or between the second-type two-dimensional semiconductor layer and the second metal contact, and the buffer layer includes at least one zero-bandgap material, therefore, the Schottky barrier between the two-dimensional semiconductor and the metal contact can be reduced, the contact resistance can be decreased, and further the bias voltage when the single-photon avalanche diode triggers the avalanche effect can be reduced. At the same time, the introduction of the zero-bandgap material can also suppress the dark current in the single-photon avalanche diode, improve the signal-to-noise ratio, and further improve the performance of the single-photon avalanche diode. Description of the Drawings
[0023] In order to more clearly illustrate the technical solutions in the embodiments of the present application, the following will briefly introduce the drawings required for the description of the embodiments. Obviously, the following drawings are only some embodiments of the present application. For those skilled in the art, without creative efforts, other drawings can be obtained based on these drawings.
[0024] Figure 1 is a cross-sectional schematic diagram of a single-photon avalanche diode provided by some embodiments of the present application.
[0025] Figures 2a - 2i is a cross-sectional schematic diagram of the single-photon avalanche diode corresponding to steps S01 to S09 provided by the embodiments of the present application.
[0026] Figure 3 is a cross-sectional schematic diagram of a photodetector provided by some embodiments of the present application.
[0027] Figure 4It is a schematic cross-sectional view of a single-photon avalanche diode provided by some embodiments of the present application.
[0028] Figures 5a - 5j It is a schematic cross-sectional view of the single-photon avalanche diode corresponding to steps S11 to S20 provided by the embodiments of the present application.
[0029] Figure 6 It is a schematic cross-sectional view of a photodetector provided by some embodiments of the present application.
[0030] Explanation of reference numerals:
[0031] Photodetector M1; Photodetector M2; Single-photon avalanche diode S1; Single-photon avalanche diode S2; Device structure layer D1;
[0032] First-type two-dimensional semiconductor layer 10; First surface 11; Second surface 12; First region 111; Second region 112; Second-type two-dimensional semiconductor layer 20; First metal contact 30; Second metal contact 40; Buffer layer 50; First buffer layer 51; Second buffer layer 52; Second-type substrate 60; First-type substrate 70; Second-type well layer 80; Dielectric layer 90; First through hole 91; Second through hole 92;
[0033] First-type two-dimensional semiconductor film 10'; Second-type two-dimensional semiconductor film 20'; Buffer film 50'; Dielectric film 90'; Detailed implementation manners
[0034] Next, the technical solutions in the embodiments of the present application will be clearly and completely described in conjunction with the accompanying drawings in the embodiments of the present application. Obviously, the described embodiments are only a part of the embodiments of the present application, rather than all the embodiments. Based on the embodiments of the present application, all other embodiments obtained by those skilled in the art without making creative efforts belong to the scope of protection of the present application. In addition, it should be understood that the specific implementation manners described herein are only used to illustrate and explain the present application, and are not used to limit the present application. In the present application, unless otherwise stated, the orientation words such as "upper" and "lower" usually refer to the upper and lower in the actual use or working state of the device, specifically the drawing direction in the accompanying drawings; and "inner" and "outer" refer to the outline of the device.
[0035] The following disclosure provides many different embodiments or examples for implementing different structures of the present application. To simplify the disclosure of the present application, the components and settings of specific examples are described below. Of course, they are only examples and are not intended to limit the present application. In addition, the present application may repeat reference numerals and / or reference letters in different examples. This repetition is for the purpose of simplification and clarity and does not itself indicate the relationship between the various embodiments and / or settings discussed. In addition, the present application provides examples of various specific processes and materials, but those of ordinary skill in the art may be aware of the application of other processes and / or the use of other materials. The following will be described in detail separately. It should be noted that the description order of the following embodiments does not limit the preferred order of the embodiments.
[0036] In the related art, most single-photon avalanche diodes use metal as a contact (i.e., a metal contact) to connect the electrode and the two-dimensional semiconductor. This requires building a relatively large Schottky barrier between the two-dimensional semiconductor and the metal contact and generating a relatively high electric field on the two-dimensional semiconductor, thereby triggering the avalanche effect before applying a negative bias voltage. However, due to the relatively large Schottky barrier between the two-dimensional semiconductor and the metal contact, the contact resistance is relatively large, and it is necessary to apply a relatively high bias voltage condition to trigger impact ionization and generate the avalanche effect. Moreover, the high electric field correspondingly generates a high dark current, reducing the signal-to-noise ratio of the device.
[0037] The present application provides a single-photon avalanche diode, a preparation method thereof, and a photodetector, which can effectively reduce the Schottky barrier and contact resistance between the two-dimensional semiconductor and the metal contact based on the architecture using a metal contact, reduce the bias voltage when triggering the avalanche effect, suppress the dark current in the single-photon avalanche diode, improve the signal-to-noise ratio, and further improve the performance of the single-photon avalanche diode.
[0038] Figure 1 is a schematic cross-sectional view of a single-photon avalanche diode provided by some embodiments of the present application. Refer to Figure 1As shown, in a first aspect, an embodiment of the present application provides a single-photon avalanche diode S1. The single-photon avalanche diode S1 includes a first-type two-dimensional semiconductor layer 10, a second-type two-dimensional semiconductor layer 20, a first metal contact 30, a second metal contact 40, and a buffer layer 50. The first-type two-dimensional semiconductor layer 10 has opposite first and second surfaces 11 and 12, and the first surface 11 includes a first region 111 and a second region 112. The second-type two-dimensional semiconductor layer 20 is disposed on the side of the first surface 11 away from the second surface 12, and the second-type two-dimensional semiconductor layer 20 is located in the second region 112. The first metal contact 30 is disposed on the side of the first surface 11 away from the second surface 12. The first metal contact 30 is electrically connected to the first-type two-dimensional semiconductor layer 10, and the first metal contact 30 is located in the first region 111. The second metal contact 40 is disposed on the side of the second-type two-dimensional semiconductor layer 20 away from the first-type two-dimensional semiconductor layer 10, and is electrically connected to the second-type two-dimensional semiconductor layer 20, and is located in the second region 112. The buffer layer 50 is disposed between the first-type two-dimensional semiconductor layer 10 and the first metal contact 30, and / or the buffer layer 50 is disposed between the second-type two-dimensional semiconductor layer 20 and the second metal contact 40. Wherein, the buffer layer 50 includes at least one zero-bandgap material, the first type is one of N-type and P-type, and the second type is the other of N-type and P-type.
[0039] In the single-photon avalanche diode S1 provided by the embodiment of the present application, since a buffer layer 50 is disposed between the first-type two-dimensional semiconductor layer 10 and the first metal contact 30, and / or between the second-type two-dimensional semiconductor layer 20 and the second metal contact 40, and the buffer layer 50 includes at least one zero-bandgap material, the buffer layer 50 including at least one zero-bandgap material can construct a two-dimensional van der Waals heterojunction with the two-dimensional semiconductor layer (the first-type two-dimensional semiconductor layer 10 and / or the second-type two-dimensional semiconductor layer 20) to replace the Schottky junction between the metal contact and the two-dimensional semiconductor, thereby being able to reduce the Schottky barrier between the two-dimensional semiconductor and the metal contact, reduce the contact resistance, and further reduce the breakdown voltage, reduce the bias voltage when the single-photon avalanche diode S1 triggers the avalanche effect. In addition, it can also effectively improve the problem that the local light absorption of the single-photon avalanche diode S1 causes local heating between the two-dimensional semiconductor layer and the metal contact, affecting the device performance. At the same time, the introduction of the zero-bandgap material can also suppress the dark current in the single-photon avalanche diode S1, improve the signal-to-noise ratio, and enable the single-photon avalanche diode S1 to have the performance advantages of low bias voltage, high gain, low power consumption, and low noise.
[0040] In some embodiments of the present application, the first-type two-dimensional semiconductor layer 10 can be used as one of an absorption layer and a multiplication layer, and the second-type two-dimensional semiconductor layer 20 can be used as the other of the absorption layer and the multiplication layer. The first-type two-dimensional semiconductor layer 10 and the second-type two-dimensional semiconductor layer 20 can be two-dimensional semiconductor layers with atomic-level thickness and strong light-matter coupling (English full name: Strong light-matter coupling).
[0041] In the single-photon avalanche diode S1 provided by the embodiments of the present application, the two-dimensional semiconductor layer with atomic-level thickness and strong light-matter coupling has a bandgap characteristic that changes with the thickness and / or composition. When it is applied as the absorption layer and the multiplication layer in the single-photon avalanche diode S1, the single-photon avalanche diode S1 can achieve a wider wavelength range of light detection coverage. In addition, since the two-dimensional semiconductor layer also has mechanical flexibility, the single-photon avalanche diode S1 can be made lighter and more convenient, and the application scenarios of the single-photon avalanche diode S1 can be increased, such as being applied to integrated miniaturized devices, flexible devices, or being combined with other materials of different dimensions to expand optoelectronic detection devices.
[0042] In some embodiments of the present application, the first-type two-dimensional semiconductor layer 10 is in contact with the second-type two-dimensional semiconductor layer 20. Since both the first-type two-dimensional semiconductor layer 10 and the second-type two-dimensional semiconductor layer 20 are two-dimensional material layers, a van der Waals interface can be formed between the two-dimensional material layers, thereby avoiding the problem of lattice mismatch and enabling the single-photon avalanche diode S1 to form a high-quality PN junction.
[0043] Refer to Figure 1 As shown, in some embodiments of the present application, the first-type two-dimensional semiconductor layer 10 is used as the absorption layer, the second-type two-dimensional semiconductor layer 20 is used as the multiplication layer, and the single-photon avalanche diode S1 is a back-illuminated single-photon avalanche diode S1, that is, the side of the second surface 12 facing away from the first surface 11 is the light incident side of the single-photon avalanche diode S1.
[0044] In some embodiments of the present application, the zero-bandgap material is graphene.
[0045] In the single-photon avalanche diode S1 provided by the embodiments of the present application, the zero-bandgap material is graphene, that is, a buffer layer 50 including graphene is provided between the first-type two-dimensional semiconductor layer 10 and the first metal contact 30, and / or a buffer layer 50 including graphene is provided between the second-type two-dimensional semiconductor layer 20 and the second metal contact 40. Graphene has a layered structure, and graphene with a layered structure and excellent electrical conductivity can form a van der Waals contact with the two-dimensional semiconductor layer with a layered structure (the first-type two-dimensional semiconductor layer 10 and / or the second-type two-dimensional semiconductor layer 20), thereby reducing the contact barrier formed by the original metal contact and the two-dimensional semiconductor layer, and further effectively reducing the operating voltage of the single-photon avalanche diode S1. In addition, the buffer layer 50 including the graphene can be formed by the same process (such as chemical vapor deposition) as the two-dimensional semiconductor layer used as the absorption layer, thereby reducing the production cost. In addition, when the buffer layer 50 including the graphene and the two-dimensional semiconductor layer used as the absorption layer are both formed by chemical vapor deposition, the thickness and quality of the buffer layer 50 including the graphene and the two-dimensional semiconductor layer used as the absorption layer can be optimized by optimizing various growth parameters of the chemical vapor deposition method, such as temperature, gas flow, precursor ratio, etc.
[0046] In some embodiments of the present application, the single-photon avalanche diode S1 includes a first buffer layer 51 and a second buffer layer 52. The first buffer layer 51 is provided between the first-type two-dimensional semiconductor layer 10 and the first metal contact 30, and the second buffer layer 52 is provided between the second-type two-dimensional semiconductor layer 20 and the second metal contact 40; wherein, both the first buffer layer 51 and the second buffer layer 52 include graphene.
[0047] In the single-photon avalanche diode S1 provided by the embodiments of the present application, since buffer layers 50 including graphene are provided between the first-type two-dimensional semiconductor layer 10 and the first metal contact 30 and between the second-type two-dimensional semiconductor layer 20 and the second metal contact 40, the contact resistance between each two-dimensional semiconductor layer in the single-photon avalanche diode S1 and the corresponding metal contact can be reduced, the operating voltage of the single-photon avalanche diode S1 can be further reduced, and the dark current in the single-photon avalanche diode S1 can be suppressed, improving the signal-to-noise ratio.
[0048] In some embodiments of the present application, the first buffer layer 51 and the second buffer layer 52 are made of the same material.
[0049] In the single-photon avalanche diode S1 provided by the embodiments of the present application, the applicant found that when the first buffer layer 51 between the first-type two-dimensional semiconductor layer 10 and the first metal contact 30 is applied between the second-type two-dimensional semiconductor layer 20 and the second metal contact 40, it can also form a two-dimensional van der Waals heterojunction with the second-type two-dimensional semiconductor layer 20, thereby reducing the Schottky barrier between the second-type two-dimensional semiconductor and the second metal contact 40, reducing the contact resistance, further reducing the breakdown voltage, reducing the bias voltage when the single-photon avalanche diode S1 triggers the avalanche effect, suppressing the dark current in the single-photon avalanche diode S1, and improving the signal-to-noise ratio, so that the single-photon avalanche diode S1 has the performance of low bias voltage, high gain, and low noise. Therefore, by making the materials of the first buffer layer 51 and the second buffer layer 52 the same, the embodiments of the present application can reduce the material cost and simplify the process steps while ensuring the single-photon avalanche diode S1.
[0050] In some embodiments of the present application, the single-photon avalanche diode S1 further includes a second-type substrate 60, and the second-type substrate 60 is disposed on a side of the first-type two-dimensional semiconductor layer 10 away from the second-type two-dimensional semiconductor layer 20.
[0051] In the single-photon avalanche diode S1 provided by the embodiments of the present application, since a second-type substrate 60 is disposed on a side of the first-type two-dimensional semiconductor layer 10 away from the second-type two-dimensional semiconductor layer 20, that is, the doping type of the second-type substrate 60 is different from the doping type of the first-type two-dimensional semiconductor layer 10, which is conducive to simplifying the structure of the single-photon avalanche diode S1, so that the first-type two-dimensional semiconductor layer 10 can be directly disposed on the surface of the second-type substrate 60 and in direct contact with the surface of the second-type substrate 60.
[0052] In some embodiments of the present application, the single-photon avalanche diode S1 further includes: a dielectric layer 90, the dielectric layer 90 covers the substrate, the first-type two-dimensional semiconductor layer 10, and the second-type two-dimensional semiconductor layer 20, and the dielectric layer 90 includes a first through hole 91 located in the first region 111 and a second through hole 92 located in the second region 112, wherein the first through hole 91 penetrates through the dielectric layer 90, and the first metal contact 30 is disposed in the first through hole 91; the second through hole 92 penetrates through the dielectric layer 90, and the second metal contact 40 is disposed in the second through hole 92.
[0053] In the single-photon avalanche diode S1 provided by the embodiments of the present application, the dielectric layer 90 covering the substrate, the first-type two-dimensional semiconductor layer 10, and the second-type two-dimensional semiconductor layer 20 is used to isolate the subsequently formed device structure layer D1 and provide a planarized surface for the formation of the contact electrodes in the device structure layer D1.
[0054] In some embodiments of the present application, the first-type two-dimensional semiconductor layer 10 may include two-dimensional transition metal dichalcogenides (full English name: Transition Metal Dichalcogenides, abbreviation: TMDCs), such as MoS2, WS2, MoSe2, WSe2, and the second-type two-dimensional semiconductor layer 20 may include two-dimensional materials that can form a PN junction with the first-type two-dimensional semiconductor layer 10. The present application enables the single-photon avalanche diode S1 to achieve efficient photoelectric detection in the visible to near-infrared wavelength band (0.4 μm to 2.5 μm). Of course, in other embodiments of the present application, the first-type two-dimensional semiconductor layer 10 may also include other two-dimensional materials other than TMDCs, such as BP, InSe, etc., to achieve the selected detection of the detection wavelength and the expansion of the types of detectors. In addition, the first-type two-dimensional semiconductor layer 10 may also include other different-dimensional materials other than two-dimensional materials, such as 0-dimensional nanoparticles and 1-dimensional nanowires, thereby expanding the types of photodetectors.
[0055] In some embodiments of the present application, the substrate is a silicon-based substrate, such as a silicon wafer, or other types of substrates that can match the lattice of the first-type two-dimensional semiconductor layer 10.
[0056] In some embodiments of the present application, the thickness of the first-type two-dimensional semiconductor layer 10 is less than 20 nm. On this basis, the bandgap of the material can be adjusted by adjusting the thickness of the first-type two-dimensional semiconductor layer 10 and the thickness of the second-type two-dimensional semiconductor layer 20, so as to achieve the control of the detection wavelength range.
[0057] In some embodiments of the present application, the thickness of the buffer layer 50 is less than 10 nm. When the thickness of the buffer layer 50 is less than 10 nm, the single-photon avalanche diode S1 can have an avalanche effect at a relatively low bias voltage in a relatively short (such as less than 10 nm) active region, reducing the Schottky barrier and contact resistance between the two-dimensional semiconductor and the metal contact, reducing the bias voltage when triggering the avalanche effect, suppressing the dark current in the single-photon avalanche diode S1, reducing the noise, and improving the signal-to-noise ratio. On this basis, the detection response time can be controlled by adjusting the thickness of the buffer layer 50.
[0058] In some embodiments of the present application, the material of the dielectric layer 90 may be silicon oxide to improve the isolation performance of the dielectric layer 90. In other embodiments of the present application, the material of the dielectric layer 90 may also be silicon nitride.
[0059] In some embodiments of the present application, the material of the first metal contact 30 may be tungsten, and the material of the second metal contact 40 may be tungsten.
[0060] Referring to Figure 1 , second, an embodiment of the present application further provides a method for manufacturing a single-photon avalanche diode S1, and the method for manufacturing the single-photon avalanche diode S1 includes the following steps:
[0061] Provide a substrate;
[0062] Form a first-type two-dimensional semiconductor layer 10 on one side of the substrate. Wherein, the first-type two-dimensional semiconductor layer 10 includes a first surface 11 and a second surface 12, the first surface 11 is arranged on the side of the second surface 12 away from the substrate, and a first region 111 and a second region 112 are defined on the first surface 11;
[0063] Form a second-type two-dimensional semiconductor layer 20 on the second region 112 of the first surface 11;
[0064] Form a first metal contact 30 on the first region 111 of the first surface 11 respectively, and form a second metal contact 40 on the side of the second-type two-dimensional semiconductor layer 20 away from the first-type two-dimensional semiconductor layer 10;
[0065] Wherein, before the steps of forming a first metal contact 30 on the first region 111 of the first surface 11 respectively and forming a second metal contact 40 on the side of the second-type two-dimensional semiconductor layer 20 away from the first-type two-dimensional semiconductor layer 10, the following steps are further included:
[0066] Form a buffer layer 50 between the first-type two-dimensional semiconductor layer 10 and the first metal contact 30, and / or between the second-type two-dimensional semiconductor layer 20 and the second metal contact 40. Wherein, the buffer layer 50 includes at least one zero-bandgap material.
[0067] Wherein, the substrate is a second-type substrate 60.
[0068] In some embodiments of the present application, the method for manufacturing the single-photon avalanche diode S1 includes steps S01 to S09.
[0069] Figure 2a is a cross-sectional schematic diagram of the single-photon avalanche diode corresponding to step S01 provided by the embodiment of the present application. Referring toFigure 1 and Figure 2a As shown in Figure 2a , step S01 includes: providing a substrate, and the substrate is a second-type substrate 60.
[0070] Figure 2b is a cross-sectional schematic diagram of a single-photon avalanche diode corresponding to step S02 provided by an embodiment of the present application. Refer to Figure 1 and Figure 2b As shown in Figure 2b , step S02 includes: forming a first-type two-dimensional semiconductor film 10' on one side of the substrate, and the first-type two-dimensional semiconductor film covers the substrate. Among them, the first-type two-dimensional semiconductor film 10' can be formed by an epitaxial growth method.
[0071] Figure 2c is a cross-sectional schematic diagram of a single-photon avalanche diode corresponding to step S03 provided by an embodiment of the present application. Refer to Figure 1 and Figure 2c As shown in Figure 2c , step S03 includes: forming a first-type two-dimensional semiconductor layer 10 on one side of the substrate, wherein the first-type two-dimensional semiconductor layer 10 includes a first surface 11 and a second surface 12, the first surface 11 is arranged on the side of the second surface 12 away from the substrate, and a first region 111 and a second region 112 are defined on the first surface 11. Among them, the first-type two-dimensional semiconductor film can be etched by a patterning process to remove unnecessary regions and form the first-type two-dimensional semiconductor layer 10.
[0072] Figure 2d is a cross-sectional schematic diagram of a single-photon avalanche diode corresponding to step S04 provided by an embodiment of the present application. Refer to Figure 1 and Figure 2d As shown in Figure 2d , step S04 includes: forming a second-type two-dimensional semiconductor film 20' on the side of the first-type two-dimensional semiconductor layer 10 away from the substrate, and the second-type two-dimensional semiconductor film 20' covers the first surface 11. Among them, the second-type two-dimensional semiconductor film 20' can be formed by an epitaxial growth method.
[0073] Figure 2e is a cross-sectional schematic diagram of a single-photon avalanche diode corresponding to step S05 provided by an embodiment of the present application. Refer to Figure 1 and Figure 2e As shown in Figure 2e , step S05 includes: forming a second-type two-dimensional semiconductor layer 20 in the second region 112 of the first surface 11. Among them, the second-type two-dimensional semiconductor film can be etched by a patterning process to remove unnecessary regions and form the second-type two-dimensional semiconductor layer 20 in the second region 112 of the first surface 11.
[0074] Figure 2fIt is a schematic cross-sectional view of the single-photon avalanche diode corresponding to step S06 provided by an embodiment of the present application. Refer to Figure 1 and Figure 2f As shown, step S06 includes: forming a buffer film 50' on the side of the second-type two-dimensional semiconductor layer 20 facing away from the substrate, and the buffer film 50' covers the first region 111 of the first surface 11 and the second-type two-dimensional semiconductor layer 20. Wherein, the buffer film 50' includes at least one zero-bandgap material. Wherein, the buffer film 50' can be formed by chemical vapor deposition.
[0075] Figure 2g It is a schematic cross-sectional view of the single-photon avalanche diode corresponding to step S07 provided by an embodiment of the present application. Refer to Figure 1 and Figure 2g As shown, step S07 includes: forming a buffer layer 50 on the first-type two-dimensional semiconductor layer 10 and on the second-type two-dimensional semiconductor layer 20. Wherein, the buffer layer 50 includes at least one zero-bandgap material. Wherein, the buffer film 50' can be etched by a patterning process to remove unnecessary regions, and then the buffer layer 50 is formed in specific regions of the first-type two-dimensional semiconductor layer 10 and specific regions of the second-type two-dimensional semiconductor layer 20. Wherein, the specific region of the first-type two-dimensional semiconductor layer 10 refers to the region corresponding to the subsequently formed first metal contact 30, and the specific region of the second-type two-dimensional semiconductor layer 20 refers to the region corresponding to the subsequently formed second metal contact 40, so as to form a buffer layer 50 between the first-type two-dimensional semiconductor layer 10 and the first metal contact 30, and between the second-type two-dimensional semiconductor layer 20 and the second metal contact 40. Of course, in other embodiments of the present application, the buffer film 50' can be etched by a patterning process to remove unnecessary regions, and then the buffer layer 50 is formed in specific regions of the first-type two-dimensional semiconductor layer 10 or specific regions of the second-type two-dimensional semiconductor layer 20, so as to form a buffer layer 50 between the first-type two-dimensional semiconductor layer 10 and the first metal contact 30, or between the second-type two-dimensional semiconductor layer 20 and the second metal contact 40.
[0076] Figure 2h It is a schematic cross-sectional view of the single-photon avalanche diode corresponding to step S08 provided by an embodiment of the present application. Refer to Figure 1 and Figure 2h As shown, step S08 includes: forming a dielectric film 90' on the side of the buffer layer 50 facing away from the substrate, and the dielectric film 90' covers the substrate, the first-type two-dimensional semiconductor layer 10, the second-type two-dimensional semiconductor layer 20, and the buffer layer 50.
[0077] Figure 2i It is a cross-sectional schematic diagram of the single-photon avalanche diode corresponding to step S09 provided by an embodiment of the present application. Refer to Figure 1 and Figure 2i As shown, step S09 includes: etching the dielectric film 90` through a patterning process to form the dielectric layer 90. The dielectric layer 90 includes a first through hole 91 and a second through hole 92. The first through hole 91 penetrates the dielectric layer 90, and the second through hole 92 penetrates the dielectric layer 90. A first metal contact 30 is formed in a first region 111 of the first surface 11, and a second metal contact 40 is formed on a side of the second-type two-dimensional semiconductor layer 20 away from the first-type two-dimensional semiconductor layer 10. The first metal contact 30 is located in the first through hole 91, and the second metal contact 40 is disposed in the second through hole 92.
[0078] Figure 3 It is a cross-sectional schematic diagram of the photodetector provided by some embodiments of the present application. Combining Figure 1 and Figure 3 As shown, in a third aspect, an embodiment of the present application further provides a photodetector M1, and the photodetector M1 includes the single-photon avalanche diode S1 described in any one of the above.
[0079] In some embodiments of the present application, the photodetector M1 further includes a device structure layer D1. The device structure layer D1 is stacked with the single-photon avalanche diode S1 and is electrically connected.
[0080] Figure 4 It is a cross-sectional schematic diagram of the single-photon avalanche diode provided by some embodiments of the present application. Refer to Figure 4As shown, in the first aspect, the single-photon avalanche diode provided in some embodiments of the present application includes a first-type two-dimensional semiconductor layer 10, a second-type two-dimensional semiconductor layer 20, a first metal contact 30, a second metal contact 40 and a buffer layer 50, wherein the first-type two-dimensional semiconductor layer 10 has a first surface 11 and a second surface 12 relative to each other, and the first surface 11 includes a first region 111 and a second region 112; the second-type two-dimensional semiconductor layer 20 is arranged on a side of the first surface 11 away from the second surface 12, and the second-type two-dimensional semiconductor layer 20 is located in the second region 112; the first metal contact 30 is arranged on a side of the first surface 11 away from the second surface 12, and the first metal contact 30 is connected to the first type The two-dimensional semiconductor layer 10 is electrically connected, and the first metal contact 30 is located in the first region 111; the second metal contact 40 is arranged on the side of the second type two-dimensional semiconductor layer 20 away from the first type two-dimensional semiconductor layer 10, and is electrically connected to the second type two-dimensional semiconductor layer 20, and is located in the second region 112; the buffer layer 50 is arranged between the first type two-dimensional semiconductor layer 10 and the first metal contact 30, and / or, the buffer layer 50 is arranged between the second type two-dimensional semiconductor layer 20 and the second metal contact 40, wherein the buffer layer 50 includes at least one zero bandgap material, the first type is one of N-type and P-type, and the second type is the other of N-type and P-type.
[0081] It should be noted that the single photon avalanche diode S2 provided in some embodiments of the present application is Figure 1 The structure of the corresponding single photon avalanche diode S1 is similar, and the same parts will not be described in detail in this application.
[0082] In some embodiments of the present application, the single-photon avalanche diode S2 also includes a first type substrate 70 and a second type well layer 80, the first type substrate 70 is arranged on the side of the first type two-dimensional semiconductor layer 10 away from the second type two-dimensional semiconductor layer 20; the second type well layer 80 is arranged in the first type substrate 70, and the second surface 12 of the first type two-dimensional semiconductor layer 10 is in contact with the second type well layer 80.
[0083] In the single-photon avalanche diode S2 provided by the embodiments of the present application, since the second-type well layer 80 is provided in the first-type substrate 70, that is, the doping type of the second-type well layer 80 is different from that of the first-type substrate 70 and the first-type two-dimensional semiconductor layer 10, and the second surface 12 of the first-type two-dimensional semiconductor layer 10 is in contact with the second-type well layer 80. Therefore, on the one hand, the second-type well layer 80 can protect the device, and on the other hand, the second-type well layer 80 can also prevent the PN junction formed by the first-type two-dimensional semiconductor layer 10 and the second-type two-dimensional semiconductor layer 20 from leaking electricity, thereby improving the stability of the single-photon avalanche diode S2.
[0084] In some embodiments of the present application, the second-type well layer 80 includes a silicon oxide sub-layer and a silicon nitride sub-layer, and the silicon oxide sub-layer and the silicon nitride sub-layer are stacked along the direction close to the second surface 12 of the first-type two-dimensional semiconductor layer 10. Wherein, the silicon oxide sub-layer is used to isolate the silicon nitride sub-layer, the thickness of the silicon oxide sub-layer is 10 nm to 20 nm, and the thickness of the silicon nitride sub-layer is 10 nm to 500 nm.
[0085] In some embodiments of the present application, the single-photon avalanche diode S2 further includes: a dielectric layer 90, the dielectric layer 90 covers the substrate, the first-type two-dimensional semiconductor layer 10, and the second-type two-dimensional semiconductor layer 20, and the dielectric layer 90 includes a first through hole 91 located in the first region 111 and a second through hole 92 located in the second region 112. Wherein, the first through hole 91 penetrates through the dielectric layer 90, and the first metal contact 30 is disposed in the first through hole 91; the second through hole 92 penetrates through the dielectric layer 90, and the second metal contact 40 is disposed in the second through hole 92.
[0086] Refer to Figure 4 Second, the embodiments of the present application further provide a method for manufacturing a single-photon avalanche diode S2, and the method for manufacturing the single-photon avalanche diode S2 includes the following steps:
[0087] Provide a substrate;
[0088] Form a first-type two-dimensional semiconductor layer 10 on one side of the substrate. Wherein, the first-type two-dimensional semiconductor layer 10 includes a first surface 11 and a second surface 12, the first surface 11 is disposed on the side of the second surface 12 away from the substrate, and a first region 111 and a second region 112 are defined on the first surface 11;
[0089] Form a second-type two-dimensional semiconductor layer 20 in the second region 112 of the first surface 11;
[0090] A first metal contact 30 is formed in a first region 111 of the first surface 11, and a second metal contact 40 is formed on a side of the second-type two-dimensional semiconductor layer 20 facing away from the first-type two-dimensional semiconductor layer 10.
[0091] Before the steps of forming the first metal contact 30 in the first region 111 of the first surface 11 and forming the second metal contact 40 on the side of the second-type two-dimensional semiconductor layer 20 facing away from the first-type two-dimensional semiconductor layer 10, the following steps are further included:
[0092] A buffer layer 50 is formed between the first-type two-dimensional semiconductor layer 10 and the first metal contact 30, and / or between the second-type two-dimensional semiconductor layer 20 and the second metal contact 40, where the buffer layer 50 includes at least one zero-bandgap material.
[0093] Wherein, the substrate is a first-type substrate 70. Before the step of forming the first-type two-dimensional semiconductor layer 10 on one side of the substrate, the following steps are further included: forming a second-type well layer 80 in the substrate.
[0094] Wherein, a second surface 12 of the first-type two-dimensional semiconductor layer 10 is in contact with the second-type well layer 80.
[0095] In some embodiments of the present application, the method for preparing the single-photon avalanche diode includes steps S11 to S20.
[0096] Figure 5a It is a cross-sectional schematic diagram of the single-photon avalanche diode corresponding to step S11 provided by an embodiment of the present application. Refer to Figure 4 and Figure 5a As shown, step S11 includes: providing a substrate, where the substrate is a first-type substrate 70.
[0097] Figure 5b It is a cross-sectional schematic diagram of the single-photon avalanche diode corresponding to step S12 provided by an embodiment of the present application. Refer to Figure 4 and Figure 5b As shown, step S12 includes: forming a second-type well layer 80 in the substrate. Wherein, a silicon oxide sub-layer and a silicon nitride sub-layer can be sequentially deposited on the surface of the substrate to protect the device from damage in subsequent steps, and then the active region is defined by lithography, and the silicon oxide sub-layer and the silicon nitride sub-layer are doped with the second type through ion implantation to form the second-type well layer 80.
[0098] Figure 5c It is a cross-sectional schematic diagram of the single-photon avalanche diode corresponding to step S13 provided by an embodiment of the present application. Refer to Figure 4 andFigure 5c As shown, step S13 includes: forming a first-type two-dimensional semiconductor film 10' on one side of the substrate, and the first-type two-dimensional semiconductor film covers the substrate. Among them, the first-type two-dimensional semiconductor film 10' can be formed by epitaxial growth.
[0099] Figure 5d It is a cross-sectional schematic diagram of a single-photon avalanche diode corresponding to step S14 provided by an embodiment of the present application. Refer to Figure 4 and Figure 5d As shown, step S14 includes: forming a first-type two-dimensional semiconductor layer 10 on one side of the substrate. Among them, the first-type two-dimensional semiconductor layer 10 includes a first surface 11 and a second surface 12, and the first surface 11 is arranged on the side of the second surface 12 away from the substrate, and a first region 111 and a second region 112 are defined on the first surface 11. Among them, the first-type two-dimensional semiconductor film can be etched by a patterning process to remove unnecessary regions to form the first-type two-dimensional semiconductor layer 10.
[0100] Figure 5e It is a cross-sectional schematic diagram of a single-photon avalanche diode corresponding to step S15 provided by an embodiment of the present application. Refer to Figure 4 and Figure 5e As shown, step S15 includes: forming a second-type two-dimensional semiconductor film 20' on the side of the first-type two-dimensional semiconductor layer 10 away from the substrate, and the second-type two-dimensional semiconductor film 20' covers the first surface 11. Among them, the second-type two-dimensional semiconductor film 20' can be formed by epitaxial growth.
[0101] Figure 5f It is a cross-sectional schematic diagram of a single-photon avalanche diode corresponding to step S16 provided by an embodiment of the present application. Refer to Figure 4 and Figure 5f As shown, step S16 includes: forming a second-type two-dimensional semiconductor layer 20 in the second region 112 of the first surface 11. Among them, the second-type two-dimensional semiconductor film can be etched by a patterning process to remove unnecessary regions, and the second-type two-dimensional semiconductor layer 20 is formed in the second region 112 of the first surface 11.
[0102] Figure 5g It is a cross-sectional schematic diagram of a single-photon avalanche diode corresponding to step S17 provided by an embodiment of the present application. Refer to Figure 4 and Figure 5gAs shown, step S17 includes: forming a buffer film 50' on a side of the second-type two-dimensional semiconductor layer 20 facing away from the substrate, where the buffer film 50' covers a first region 111 of the first surface 11 and the second-type two-dimensional semiconductor layer 20. Among them, the buffer film 50' includes at least one zero-bandgap material. Among them, the buffer film 50' can be formed by chemical vapor deposition.
[0103] Figure 5h is a cross-sectional schematic diagram of a single-photon avalanche diode corresponding to step S18 provided by an embodiment of the present application. Refer to Figure 4 and Figure 5h As shown, step S18 includes: forming a buffer layer 50 on the first-type two-dimensional semiconductor layer 10 and on the second-type two-dimensional semiconductor layer 20. Among them, the buffer layer 50 includes at least one zero-bandgap material. Among them, the buffer film 50' can be etched by a patterning process to remove unnecessary regions, and then the buffer layer 50 is formed in specific regions of the first-type two-dimensional semiconductor layer 10 and specific regions of the second-type two-dimensional semiconductor layer 20. Among them, the specific region of the first-type two-dimensional semiconductor layer 10 refers to the region corresponding to the subsequently formed first metal contact 30, and the specific region of the second-type two-dimensional semiconductor layer 20 refers to the region corresponding to the subsequently formed second metal contact 40, so as to form a buffer layer 50 between the first-type two-dimensional semiconductor layer 10 and the first metal contact 30, and between the second-type two-dimensional semiconductor layer 20 and the second metal contact 40. Of course, in other embodiments of the present application, the buffer film 50' can be etched by a patterning process to remove unnecessary regions, and then the buffer layer 50 is formed in specific regions of the first-type two-dimensional semiconductor layer 10 or specific regions of the second-type two-dimensional semiconductor layer 20, so as to form a buffer layer 50 between the first-type two-dimensional semiconductor layer 10 and the first metal contact 30, or between the second-type two-dimensional semiconductor layer 20 and the second metal contact 40.
[0104] Figure 5i is a cross-sectional schematic diagram of a single-photon avalanche diode corresponding to step S19 provided by an embodiment of the present application. Refer to Figure 4 and Figure 5i As shown, step S19 includes: forming a dielectric film 90' on a side of the buffer layer 50 facing away from the substrate, where the dielectric film 90' covers the substrate, the second-type well layer 80, the first-type two-dimensional semiconductor layer 10, the second-type two-dimensional semiconductor layer 20, and the buffer layer 50.
[0105] Figure 5jIt is a schematic cross-sectional view of the single-photon avalanche diode corresponding to step S20 provided by an embodiment of the present application. Refer to Figure 4 and Figure 5j As shown, step S20 includes: etching the dielectric film 90` through a patterning process to form the dielectric layer 90, the dielectric layer 90 includes a first through hole 91 and a second through hole 92, the first through hole 91 penetrates the dielectric layer 90, the second through hole 92 penetrates the dielectric layer 90, a first metal contact 30 is formed in a first region 111 of the first surface 11, a second metal contact 40 is formed on a side of the second-type two-dimensional semiconductor layer 20 away from the first-type two-dimensional semiconductor layer 10, the first metal contact 30 is located in the first through hole 91, and the second metal contact 40 is disposed in the second through hole 92.
[0106] Figure 6 It is a schematic cross-sectional view of the photodetector provided by some embodiments of the present application. Combining Figure 4 and Figure 6 As shown, in a third aspect, an embodiment of the present application further provides a photodetector M2, and the photodetector M2 includes the single-photon avalanche diode S2 described in any one of the above.
[0107] In some embodiments of the present application, the photodetector M2 further includes a device structure layer D1, the device structure layer D1 is stacked with the single-photon avalanche diode S2 and is electrically connected.
[0108] In summary, the present application provides a single-photon avalanche diode, a preparation method thereof, and a photodetector. The single-photon avalanche diode includes: a first-type two-dimensional semiconductor layer having opposite first and second surfaces, wherein the first surface includes a first region and a second region; a second-type two-dimensional semiconductor layer disposed on a side of the first surface facing away from the second surface and located in the second region; a first metal contact disposed on a side of the first surface facing away from the second surface, electrically connected to the first-type two-dimensional semiconductor layer, and located in the first region; a second metal contact disposed on a side of the second-type two-dimensional semiconductor layer facing away from the first-type two-dimensional semiconductor layer, electrically connected to the second-type two-dimensional semiconductor layer, and located in the second region; a buffer layer disposed between the first-type two-dimensional semiconductor layer and the first metal contact, and / or disposed between the second-type two-dimensional semiconductor layer and the second metal contact; wherein the buffer layer includes at least one zero-bandgap material, the first type is one of N-type and P-type, and the second type is the other of N-type and P-type. In the single-photon avalanche diode and the photodetector provided by the present application, since a buffer layer is disposed between the first-type two-dimensional semiconductor layer and the first metal contact, and / or between the second-type two-dimensional semiconductor layer and the second metal contact, and the buffer layer includes at least one zero-bandgap material, therefore, the Schottky barrier between the two-dimensional semiconductor and the metal contact can be reduced, the contact resistance can be decreased, and further the bias voltage when the single-photon avalanche diode triggers the avalanche effect can be reduced. At the same time, the introduction of the zero-bandgap material can also suppress the dark current in the single-photon avalanche diode, improve the signal-to-noise ratio, and thus improve the performance of the single-photon avalanche diode.
[0109] The single-photon avalanche diode, a preparation method thereof, and a photodetector provided by the embodiments of the present application have been introduced in detail above. Specific examples are used in this article to elaborate on the principle and implementation manner of the present application. The description of the above embodiments is only used to help understand the method and its core idea of the present application; at the same time, for those skilled in the art, according to the idea of the present application, there will be changes in the specific implementation manner and application scope. In summary, the content of this specification should not be construed as a limitation to the present application.
Claims
1. A single-photon avalanche diode, characterized in that, The single-photon avalanche diode includes: A first-type two-dimensional semiconductor layer having opposite first and second surfaces, wherein the first surface includes a first region and a second region; A second-type two-dimensional semiconductor layer disposed on a side of the first surface facing away from the second surface and located in the second region; A first metal contact disposed on a side of the first surface facing away from the second surface, electrically connected to the first-type two-dimensional semiconductor layer, and located in the first region; A second metal contact disposed on a side of the second-type two-dimensional semiconductor layer facing away from the first-type two-dimensional semiconductor layer, electrically connected to the second-type two-dimensional semiconductor layer, and located in the second region; A buffer layer disposed between the first-type two-dimensional semiconductor layer and the first metal contact, and / or between the second-type two-dimensional semiconductor layer and the second metal contact; Wherein the buffer layer includes at least one zero-bandgap material, the first type is one of N-type and P-type, and the second type is the other of N-type and P-type.
2. The single-photon avalanche diode according to claim 1, wherein The single-photon avalanche diode includes a first buffer layer and a second buffer layer. The first buffer layer is disposed between the first-type two-dimensional semiconductor layer and the first metal contact, and the second buffer layer is disposed between the second-type two-dimensional semiconductor layer and the second metal contact; Wherein both the first buffer layer and the second buffer layer include graphene.
3. The single-photon avalanche diode according to claim 2, wherein The first buffer layer and the second buffer layer are made of the same material.
4. The single-photon avalanche diode according to claim 1, wherein The single-photon avalanche diode further includes: A second-type substrate disposed on a side of the first-type two-dimensional semiconductor layer facing away from the second-type two-dimensional semiconductor layer.
5. The single-photon avalanche diode according to claim 1, characterized in that, The single-photon avalanche diode further includes: A first-type substrate disposed on a side of the first-type two-dimensional semiconductor layer facing away from the second-type two-dimensional semiconductor layer; A second-type well layer disposed in the first-type substrate, and the second surface of the first-type two-dimensional semiconductor layer is in contact with the second-type well layer.
6. The single-photon avalanche diode according to claim 4 or 5, characterized in that, The single-photon avalanche diode further includes: A dielectric layer covering the substrate, the first-type two-dimensional semiconductor layer, and the second-type two-dimensional semiconductor layer, and the dielectric layer includes a first through-hole located in the first region and a second through-hole located in the second region, wherein The first through-hole penetrates the dielectric layer, and the first metal contact is disposed in the first through-hole; The second through-hole penetrates the dielectric layer, and the second metal contact is disposed in the second through-hole.
7. A preparation method of a single-photon avalanche diode, characterized in that, The method for manufacturing the single-photon avalanche diode includes the following steps: Providing a substrate; Forming a first-type two-dimensional semiconductor layer on one side of the substrate, wherein the first-type two-dimensional semiconductor layer includes a first surface and a second surface, the first surface is disposed on a side of the second surface away from the substrate, and a first region and a second region are defined on the first surface; Forming a second-type two-dimensional semiconductor layer in the second region of the first surface; A first metal contact is formed in a first region of the first surface, and a second metal contact is formed on a side of the second-type two-dimensional semiconductor layer facing away from the first-type two-dimensional semiconductor layer; Wherein, before the steps of forming a first metal contact in a first region of the first surface and forming a second metal contact on a side of the second-type two-dimensional semiconductor layer facing away from the first-type two-dimensional semiconductor layer, the following steps are further included: A buffer layer is formed between the first-type two-dimensional semiconductor layer and the first metal contact, and / or between the second-type two-dimensional semiconductor layer and the second metal contact, wherein the buffer layer includes at least one zero-bandgap material.
8. The manufacturing method of the single-photon avalanche diode according to claim 7, characterized in that, The substrate is a second-type substrate.
9. The manufacturing method of the single-photon avalanche diode according to claim 7, characterized in that, The substrate is a first-type substrate. Before the step of forming a first-type two-dimensional semiconductor layer on one side of the substrate, the following steps are further included: forming a second-type well layer in the substrate; Wherein, a second surface of the first-type two-dimensional semiconductor layer is in contact with the second-type well layer.
10. A photodetector, characterized in that, The photodetector includes the single-photon avalanche diode according to any one of claims 1-6.