Test instrument switching circuit

Abstract

The invention discloses a test instrument switching circuit. The circuit comprises a PLC plate, an instrument switching plate, a first test plate, a second test plate and a third test plate. The PLC plate comprises a CPU chip, an operational amplifier chip and an analog quantity input chip, and the CPU is connected to the instrument switching plate through an input pin and an output pin to realize instrument switching; the CPU chip is connected with the operational amplifier chip to realize a pulse counting function, the analog quantity input chip is used for being connected with the first test plate, the second test plate and the third test plate respectively, and under the control of the CPU chip, to-be-tested pieces connected into the test plates are detected. According to the invention, rapid switching of each important instrument in the actuator test process can be realized, the instrument can be used as an important component of a general test platform, and a modular design is adopted for testing linear actuators with different piece numbers, so that the test efficiency can be greatly improved.

Description

Technical Field

[0001] The present invention relates to the technical field of testing and control, and particularly relates to a test instrument switching circuit. Background Art

[0002] Many valves on an aircraft use linear actuators. During the production and maintenance process of linear actuators, various parameters need to be measured, including: pull and pressure measurement, stroke measurement, speed measurement, stroke time recording, etc.

[0003] The existing test platforms have poor test comprehensiveness and are difficult to quickly switch between various instruments during the measurement process, resulting in low test efficiency. Summary of the Invention

[0004] In view of this, the purpose of the present invention is to provide a test instrument switching circuit, which can achieve the rapid switching of test instruments, thereby improving the test efficiency.

[0005] The purpose of the present invention is achieved through the following technical solutions:

[0006] The test instrument switching circuit includes a PLC board, an instrument switching board, a first test board, a second test board, and a third test board;

[0007] The PLC board includes a CPU chip, an operational amplifier chip, and an analog input chip. The CPU accesses the instrument switching board through input pins and output pins to achieve the switching of instruments;

[0008] The CPU chip realizes the pulse counting function by connecting with the operational amplifier chip. The analog input chip is used to connect with the first test board, the second test board, and the third test board respectively, and under the control of the CPU chip, it realizes the detection of the DUTs connected to each test board.

[0009] Further, the output pins Q0.5 - Q0.7 and the input pins I0.3 - I0.5 of the CPU chip are connected to the instrument switching board through the pins of connector CN4. The input pins I0.3 - I0.5 of the CPU chip are respectively connected to the 24V DC power supply of the instrument panel through the first to third pins of CN4, and then respectively through switch panel1, switch panel2, and switch panel3. The output pins Q0.5 - Q0.7 of the CPU chip are connected to the panel switching circuit through the fifth to seventh pins of connector CN4;

[0010] The input pins I0.0 and I0.1 of the CPU chip are respectively connected to two output pins of the operational amplifier chip. The output pin Q0.0 of the CPU chip is connected to the coil of the relay R1. Two sets of normally open contacts of the relay R1 are respectively arranged on the connection lines between the input pins I0.0 and I0.1 of the CPU chip and the two output pins of the operational amplifier chip;

[0011] The output pin Q0.2 of the CPU chip accesses the first test board through the first cable and the interface socket CN1; the output pin Q0.3 of the CPU chip accesses the second test board through the second cable and the interface socket CN2; the output pin Q0.4 of the CPU chip accesses the third test board through the third cable and the interface socket CN3.

[0012] Further, the output pin Q0.1 of the CPU chip is connected to the coil of the relay R2. The relay R2 is a double-conversion contact relay. The 0+ pin of the analog input chip accesses the moving contact of the first set of double-conversion contacts of the relay R2. The normally open static contact of this set of double-conversion contacts is connected to the fourth pin of the terminal block; the 1+ pin of the analog input chip accesses the moving contact of the second set of double-conversion contacts of the relay R2. The normally open static contact of this set of double-conversion contacts is connected to the first pin of the terminal block; the 2+ pin of the analog input chip accesses the moving contact of the third set of double-conversion contacts of the relay R2. The normally open static contact of this set of double-conversion contacts is connected to the seventh pin of the terminal block; the 2- pin of the analog input chip accesses the moving contact of the fourth set of normally open contacts of the relay R2. The static contacts of the four sets of normally open contacts are connected to the ninth pin of the terminal block; the normally closed static contacts of the first to third sets of double-conversion contacts of the relay R2 are all grounded; the first to third pins of the terminal block are connected in parallel through jumpers, the fourth to sixth pins are connected in parallel through jumpers; the seventh to eighth pins are connected in parallel through jumpers; the ninth to eleventh pins are connected in parallel through jumpers;

[0013] The 0-, 1-, 2- pins and the M pin of the analog input chip are all grounded; a set of analog input pins of the analog input chip is connected to the displacement sensor.

[0014] Further, a set of negative-phase end pins of the operational amplifier chip are respectively connected to the 15V DC power supply through a connection resistor, and the corresponding set of positive-phase end pins are loaded with the 10V DC power supply; and one negative-phase end pin accesses the U jack of the test interface of the first test board through a cable and the interface CN1, and the other negative-phase end pin accesses the V jack of the test interface of the first test board through a cable and the interface CN1. The U jack and the V jack of the test interface of the first test board are both connected to the U terminal and the V terminal inside the first test board.

[0015] Further, the inputs of the 15V DC power supply and the 10V DC power supply of the operational amplifier chip are both provided by a DC-DC power supply module.

[0016] Further, the E jack of the test interface of the first test board is connected to the 1M pin of the pulse counting module of the CPU chip through a first cable and the interface base CN1; the D jack of the test interface of the first test board is connected to the voltage output terminal of the voltage regulator chip through a first cable and the interface base CN1; the C jack of the test interface of the first test board is connected to the first pin of the terminal block through a first cable and the interface base CN1; the B jack of the test interface of the first test board is connected to the fourth pin of the terminal block through a first cable and the interface base CN1; the A jack of the test interface of the first test board is connected to the ninth pin of the terminal block through a first cable and the interface base CN1; the D jack, C jack, B jack, and A jack of the test interface of the first test board are all connected to the D terminal, C terminal, B terminal, and A terminal inside the first test board;

[0017] The output pin Q0.2 of the CPU chip is grounded after being connected to the coil parts of the parallel-connected eleventh relay R11 and twelfth relay R12 through a first cable and the interface base CN1. The three normally open contacts of the eleventh relay R11 are respectively arranged on the connection lines between the U, V, and E jacks of the test interface of the first test board and the U, V, and E terminals inside the first test board, where the E jack and the E terminal are grounded; the three normally open contacts of the twelfth relay R12 are respectively arranged on the connection lines between the C, B, and A jacks of the test interface of the first test board and the C, B, and A terminals inside the first test board; where the C jack and the A jack are also respectively connected to the positive and negative poles of the 10V DC power supply.

[0018] Further, the V jack and R jack of the test interface of the second test board are connected to the second pin of the terminal block through a second cable and the interface base CN2; the T jack of the test interface of the second test board is connected to the seventh pin of the terminal block through a second cable and the interface base CN2; the S jack and N jack of the test interface of the second test board are connected to the tenth pin of the terminal block through a second cable and the interface base CN2; the P jack of the test interface of the second test board is connected to the fifth pin of the terminal block through a second cable and the interface base CN2;

[0019] The V jack, R jack, S jack, R jack, T jack, and N jack of the test interface of the second test board are all connected to the V terminal, R terminal, S terminal, R terminal, T terminal, and N terminal inside the second test board; the V terminal and R terminal inside the second test board are in series, and the S terminal and N terminal are in series; the output pin Q0.3 of the CPU chip is connected to the coil part of the twenty-first relay R21 through the second cable and the interface socket CN2, and the four normally open contacts of the twenty-first relay R21 are respectively arranged on the connection lines between the V, T, P, and S jacks of the test interface of the second test board and the V, T, P, and S terminals inside the second test board; among them, the positive and negative poles of the 10V DC power supply are respectively connected to the V jack and the N jack.

[0020] Further, the F jack and C jack of the test interface of the third test board are connected to the third pin of the terminal block through the third cable and the interface socket CN3; the E jack of the test interface of the third test board is connected to the eighth pin of the terminal block through the third cable and the interface socket CN3; the D jack and A jack of the test interface of the third test board are connected to the eleventh pin of the terminal block through the third cable and the interface socket CN3; the B jack of the test interface of the third test board is connected to the sixth pin of the terminal block through the third cable and the interface socket CN3;

[0021] The F jack, E jack, D jack, C jack, B jack, and A jack of the test interface of the third test board are all connected to the F terminal, E terminal, D terminal, C terminal, B terminal, and A terminal inside the third test board; the D terminal and A terminal inside the third test board are in series; the output pin Q0.4 of the CPU chip is connected to the coil part of the thirty-first relay R31 through the third cable and the interface socket CN3, and the four normally open contacts of the thirty-first relay R31 are respectively arranged on the connection lines between the F, E, B, and A jacks of the test interface of the third test board and the F, E, B, and D terminals inside the second test board; among them, the positive and negative poles of the 10V DC power supply are respectively connected to the F jack and the A jack.

[0022] Further, the panel switching circuit includes an initial switching control relay K0 and first to eleventh switching control relays K1 - K11. The fifth pin of the connector CN4 is successively connected in series with the normally - closed contact K3 - 3 of the third switching control relay K3, the normally - closed contact K6 - 3 of the sixth switching control relay K6, and the coil of the second switching control relay K2 and then grounded; the sixth pin of the connector CN4 is successively connected in series with the normally - closed contact K3 - 2 of the third switching control relay K3, the normally - closed contact K9 - 3 of the ninth switching control relay K9, and the coil of the first switching control relay K1 and then grounded; the seventh pin of the connector CN4 is successively connected in series with the normally - closed contact K6 - 2 of the sixth switching control relay K6, the normally - closed contact K9 - 2 of the ninth switching control relay K9, and the coil of the initial switching control relay K0 and then grounded;

[0023] The coils of the third switching control relay K3, the fourth switching control relay K4, and the fifth switching control relay K5 are connected in parallel, and the common contact at one end is connected to the 24V DC power supply of the instrument panel through the normally - open contact of the initial switching control relay K0, and the common contact at the other end is connected to the negative terminal of each instrument; the coils of the sixth switching control relay K6, the seventh switching control relay K7, and the eighth switching control relay K8 are connected in parallel, and the common contact at one end is connected to the 24V DC power supply of the instrument panel through the normally - open contact of the first switching control relay K1, and the common contact at the other end is connected to the negative terminal of each instrument; the coils of the ninth switching control relay K9, the tenth switching control relay K10, and the eleventh switching control relay K11 are connected in parallel, and the common contact at one end is connected to the 24V DC power supply of the instrument panel through the normally - open contact of the second switching control relay K2, and the common contact at the other end is connected to the negative terminal of each instrument; the positive terminals of all instruments are connected to the 24V DC power supply of the instrument panel.

[0024] The beneficial effects of the present invention are as follows: The present invention can achieve the rapid switching of various important instruments during the actuator test process, can be used as an important part of a general test platform, and adopts a modular design for testing linear actuators with different part numbers, thereby greatly improving the test efficiency.

[0025] Other advantages, objectives, and features of the present invention will be described to some extent in the subsequent specification, and to some extent, will be obvious to those skilled in the art based on the study of the following text, or can be taught from the practice of the present invention. The objectives and other advantages of the present invention can be realized and obtained through the following specification and the foregoing claims. BRIEF DESCRIPTION OF THE DRAWINGS

[0026] In order to make the objectives, technical solutions and advantages of the present invention more clear, the present invention will be further described in detail below with reference to the accompanying drawings, where:

[0027] Figure 1 is the schematic diagram of detection and switching of the present invention;

[0028] Figure 2 is the schematic diagram of control panel switching;

[0029] Figure 3 is the schematic diagram of counter power supply control;

[0030] Figure 4 is the view of the industrial control cabinet panel;

[0031] Figure 5 is the schematic diagram of the switching principle steps of the intermediate frequency AC voltmeter, DC voltmeter, timer, and DC ammeter;

[0032] Figure 6 and Figure 7 is the schematic diagram of the switching principle steps of the counter;

[0033] Figure 8 is the schematic diagram of the switching principle steps of displacement. Specific Embodiments

[0034] Hereinafter, preferred embodiments of the present invention will be described in detail with reference to the accompanying drawings. It should be understood that the preferred embodiments are only for illustrating the present invention and not for limiting the protection scope of the present invention.

[0035] As Figure 1 shown, in this embodiment, the circuit includes a PLC board, an instrument switching board, a first test board, a second test board, and a third test board;

[0036] The PLC board includes a CPU chip, an operational amplifier chip, and an analog input chip. The CPU is connected to the instrument switching board through input pins and output pins to realize the switching of instruments;

[0037] The CPU chip realizes the pulse counting function by connecting with the operational amplifier chip. The analog input chip is used to connect with the first test board, the second test board, and the third test board respectively, and realizes the detection of the test pieces connected to each test board under the control of the CPU chip.

[0038] In this embodiment, the CPU chip uses a Siemens ST20 standard CPU module, which includes 12 inputs and 8 outputs and is powered by 24V DC; the operational amplifier chip uses an LM324, which is a low-cost four-channel operational amplifier with true differential inputs; the analog input chip uses a Siemens EM AE08 analog input module, which can process analog signals and convert them into digital signals for easy processing and control by the PLC.

[0039] The output pins Q0.5 to Q0.7 and the input pins I0.3 to I0.5 of the CPU chip are connected to the instrument switching section through the pins of connector CN4. Among them, the input pins I0.3 to I0.5 of the CPU chip are respectively connected to the 24V DC power supply of the instrument panel through the first to third pins of CN4, and then through switch panel1, switch panel2, and switch panel3 respectively; the output pins Q0.5 to Q0.7 of the CPU chip are connected to the panel switching circuit through the fifth to seventh pins of connector CN4.

[0040] The input pins I0.0 and I0.1 of the CPU chip are respectively connected to the two output pins of the operational amplifier chip, and the output pin Q0.0 of the CPU chip is connected to the coil of relay R1. Two sets of normally open contacts of relay R1 are respectively arranged on the connection lines between the input pins I0.0 and I0.1 of the CPU chip and the two output pins of the operational amplifier chip.

[0041] The output pin Q0.2 of the CPU chip is connected to the first test section through the first cable and interface socket CN1; the output pin Q0.3 of the CPU chip is connected to the second test section through the second cable and interface socket CN2; the output pin Q0.4 of the CPU chip is connected to the third test section through the third cable and interface socket CN3.

[0042] The output pin Q0.1 of the CPU chip is connected to the coil of the relay R2. The relay R2 is a double-conversion contact relay. The 0+ pin of the analog input chip is connected to the moving contact of the first group of double-conversion contacts of the relay R2. The normally open static contact of this group of double-conversion contacts is connected to the fourth pin of the terminal block JP. The 1+ pin of the analog input chip is connected to the moving contact of the second group of double-conversion contacts of the relay R2. The normally open static contact of this group of double-conversion contacts is connected to the first pin of the terminal block JP. The 2+ pin of the analog input chip is connected to the moving contact of the third group of double-conversion contacts of the relay R2. The normally open static contact of this group of double-conversion contacts is connected to the seventh pin of the terminal block. The 2- pin of the analog input chip is connected to the moving contact of the fourth group of normally open contacts of the relay R2. The static contacts of the four groups of normally open contacts are connected to the ninth pin of the terminal block. The normally closed static contacts of the first to third groups of double-conversion contacts of the relay R2 are all grounded. The first to third pins of the terminal block JP are connected in parallel through jumpers. The fourth to sixth pins are connected in parallel through jumpers. The seventh to eighth pins are connected in parallel through jumpers. The ninth to eleventh pins are connected in parallel through jumpers.

[0043] The 0-, 1-, 2- pins and the M pin of the analog input chip are all grounded. A group of analog input pins of the analog input chip is connected to a displacement sensor.

[0044] In this embodiment, a group of negative-phase end pins of the operational amplifier chip are respectively connected to the 15V DC power supply through a connection resistor, and the corresponding group of positive-phase end pins are loaded with the 10V DC power supply. And a negative-phase end pin is connected to the U jack of the test interface of the first test board through the first cable and the interface socket CN1, and another negative-phase end pin is connected to the V jack of the test interface of the first test board through the first cable and the interface socket CN1. The U jack and the V jack of the test interface of the first test board are both connected to the U terminal and the V terminal inside the first test board.

[0045] The input of the 15V DC power supply and the 10V DC power supply of the operational amplifier chip are both provided by the DC-DC power supply module. In this embodiment, the DC-DC power supply module uses the B2415S-2WR2 chip, and this chip is a 24V to 15V single-channel DC-DC power supply module.

[0046] One end of the fourth connection pin of connector CN4 is connected to a 24V DC power supply through a counting switch, and the other end is connected in series with the coil of the third relay, and then connected to one end of the ninth connection pin of connector CN4. The other end of the ninth connection pin is connected to the port of the counter; the IN pin of the counter is connected to the eighth connection pin of connector CN4. The other end of the eighth connection pin of connector CN4 is connected in series with a normally closed contact of one path of the third relay R3, and then connected to the U jack of the test interface accessing the first test board through the first cable and the first connection pin of interface block CN1; at the same time, the other end of the eighth connection pin of connector CN4 is connected in series with a normally open contact of one path of the third relay R3, and then connected to the V jack of the test interface accessing the first test board through the first cable and the second connection pin of interface block CN1. The normally closed contact and the normally open contact of one path of the third relay R3 are interlocking contacts; in addition, a set of negative-phase end pins of the operational amplifier chip connected to a 15V DC power supply are respectively connected in series with a normally closed contact and a normally open contact of one path of the third relay R3, and then connected to the eighth connection pin of connector CN4.

[0047] The E jack of the test interface of the first test board is connected to the 1M pin of the pulse counting module of the CPU chip through the first cable and interface block CN1; the D jack of the test interface of the first test board is connected to the voltage output end of the voltage regulator chip through the first cable and interface block CN1; the C jack of the test interface of the first test board is connected to the first pin of the terminal block through the first cable and interface block CN1; the B jack of the test interface of the first test board is connected to the fourth pin of the terminal block through the first cable and interface block CN1; the A jack of the test interface of the first test board is connected to the ninth pin of the terminal block through the first cable and interface block CN1; the D jack, C jack, B jack, and A jack of the test interface of the first test board are respectively connected to the D terminal, C terminal, B terminal, and A terminal inside the first test board.

[0048] The output pin Q0.2 of the CPU chip is grounded through the first cable and interface block CN1 after being respectively connected to the coil parts of the parallel-connected eleventh relay R11 and twelfth relay R12. Three normally open contacts of the eleventh relay R11 are respectively arranged on the connection lines between the U, V, and E jacks of the test interface of the first test board and the U, V, and E terminals inside the first test board, and the E jack and the E terminal are grounded; three normally open contacts of the twelfth relay R12 are respectively arranged on the connection lines between the C, B, and A jacks of the test interface of the first test board and the C, B, and A terminals inside the first test board; the C jack and the A jack are respectively connected to the positive and negative poles of a 10V DC power supply.

[0049] The V jack and R jack of the test interface of the second test board are connected to the second pin of the terminal block through the second cable and interface block CN2; the T jack of the test interface of the second test board is connected to the seventh pin of the terminal block through the second cable and interface block CN2; the S jack and N jack of the test interface of the second test board are connected to the tenth pin of the terminal block through the second cable and interface block CN2; the P jack of the test interface of the second test board is connected to the fifth pin of the terminal block through the second cable and interface block CN2;

[0050] The V jack, R jack, S jack, R jack, T jack, and N jack of the test interface of the second test board are all connected to the V terminal, R terminal, S terminal, R terminal, T terminal, and N terminal inside the second test board; the V terminal and R terminal inside the second test board are in series, and the S terminal and N terminal are in series; the output pin Q0.3 of the CPU chip is connected to the coil part of the twenty-first relay R21 through the second cable and interface block CN2, and the four normally open contacts of the twenty-first relay R21 are respectively arranged on the connection lines between the V, T, P, and S jacks of the test interface of the second test board and the V, T, P, and S terminals inside the second test board; among them, the V jack and N jack are also respectively connected to the positive and negative poles of the 10V DC power supply.

[0051] The F jack and C jack of the test interface of the third test board are connected to the third pin of the terminal block through the third cable and interface block CN3; the E jack of the test interface of the third test board is connected to the eighth pin of the terminal block through the third cable and interface block CN3; the D jack and A jack of the test interface of the third test board are connected to the eleventh pin of the terminal block through the third cable and interface block CN3; the B jack of the test interface of the third test board is connected to the sixth pin of the terminal block through the third cable and interface block CN3;

[0052] The F jack, E jack, D jack, C jack, B jack, and A jack of the test interface of the third test board are all connected to the F terminal, E terminal, D terminal, C terminal, B terminal, and A terminal inside the third test board; the D terminal and A terminal inside the third test board are in series; the output pin Q0.4 of the CPU chip is connected to the coil part of the thirty-first relay R31 through the third cable and interface block CN3, and the four normally open contacts of the thirty-first relay R31 are respectively arranged on the connection lines between the F, E, B, and A jacks of the test interface of the third test board and the F, E, B, and D terminals inside the second test board; among them, the F jack and A jack are also respectively connected to the positive and negative poles of the 10V DC power supply.

[0053] The panel switching circuit includes an initial switching control relay K0 and first to eleventh switching control relays K1 to K11. The fifth pin of the connector CN4 is grounded after sequentially connecting in series the normally closed contact K3-3 of the third switching control relay K3, the normally closed contact K6-3 of the sixth switching control relay K6, and the coil of the second switching control relay K2; the sixth pin of the connector CN4 is grounded after sequentially connecting in series the normally closed contact K3-2 of the third switching control relay K3, the normally closed contact K9-3 of the ninth switching control relay K9, and the coil of the first switching control relay K1; the seventh pin of the connector CN4 is grounded after sequentially connecting in series the normally closed contact K6-2 of the sixth switching control relay K6, the normally closed contact K9-2 of the ninth switching control relay K9, and the coil of the initial switching control relay K0.

[0054] The coils of the third switching control relay K3, the fourth switching control relay K4, and the fifth switching control relay K5 are connected in parallel, and the common contact at one end is connected to the 24V DC power supply of the instrument panel through the normally open contact of the initial switching control relay K0, and the common contact at the other end is connected to the negative terminal of each instrument. For the convenience of monitoring and display, an indicator lamp LAMP2 is also connected in parallel to this group of coils; the coils of the sixth switching control relay K6, the seventh switching control relay K7, and the eighth switching control relay K8 are connected in parallel, and the common contact at one end is connected to the 24V DC power supply of the instrument panel through the normally open contact of the first switching control relay K1, and the common contact at the other end is connected to the negative terminal of each instrument. An indicator lamp LAMP3 is also connected in parallel to this group of coils; the coils of the ninth switching control relay K9, the tenth switching control relay K10, and the eleventh switching control relay K11 are connected in parallel, and the common contact at one end is connected to the 24V DC power supply of the instrument panel through the normally open contact of the second switching control relay K2, and the common contact at the other end is connected to the negative terminal of each instrument. An indicator lamp LAMP4 is also connected in parallel to this group of coils; the positive terminals of each instrument are all connected to the 24V DC power supply of the instrument panel.

[0055] In this embodiment, the instrument includes an intermediate-frequency AC voltmeter, a DC voltmeter, a timer, an intermediate-frequency AC ammeter, a DC ammeter, and a counter. The connection terminal I of the intermediate-frequency AC voltmeter is connected to the first terminal of the air actuator in the first test block through the first normally open contact K4-1 of the fourth switching control relay K4, and the connection terminal II of the intermediate-frequency AC voltmeter is connected to the second terminal of the air actuator in the first test block through the second normally open contact K4-2 of the fourth switching control relay K4; the connection terminal I of the intermediate-frequency AC voltmeter is connected to the first terminal of the air actuator in the second test block through the first normally open contact K7-1 of the seventh switching control relay K7, and the connection terminal II of the intermediate-frequency AC voltmeter is connected to the second terminal of the air actuator in the second test block through the second normally open contact K7-2 of the seventh switching control relay K7; the connection terminal I of the intermediate-frequency AC voltmeter is connected to the first terminal of the air actuator in the third test block through the first normally open contact K10-1 of the tenth switching control relay K10, and the connection terminal II of the intermediate-frequency AC voltmeter is connected to the second terminal of the air actuator in the third test block through the second normally open contact K10-2 of the tenth switching control relay K10.

[0056] The connection terminal I of the DC voltmeter is connected to the third terminal of the air actuator in the first test block through the third normally open contact K4-3 of the fourth switching control relay K4, and the connection terminal II of the DC voltmeter is connected to the fourth terminal of the air actuator in the first test block through the fourth normally open contact K4-4 of the fourth switching control relay K4; the connection terminal I of the DC voltmeter is connected to the third terminal of the air actuator in the second test block through the third normally open contact K7-3 of the seventh switching control relay K7, and the connection terminal II of the DC voltmeter is connected to the fourth terminal of the air actuator in the second test block through the fourth normally open contact K7-4 of the seventh switching control relay K7; the connection terminal I of the DC voltmeter is connected to the third terminal of the air actuator in the third test block through the third normally open contact K10-3 of the tenth switching control relay K10, and the connection terminal II of the DC voltmeter is connected to the fourth terminal of the air actuator in the third test block through the fourth normally open contact K10-4 of the tenth switching control relay K10.

[0057] Among them, the access terminal I of the timer is connected to the fifth terminal of the air actuator of the first test board through the first normally open contact K5-1 of the fifth switching control relay K5, and the access terminal II of the timer is connected to the sixth terminal of the air actuator of the first test board through the second normally open contact K5-2 of the fifth switching control relay K5; the access terminal I of the timer is connected to the fifth terminal of the air actuator of the second test board through the first normally open contact K8-1 of the eighth switching control relay K8, and the access terminal II of the DC voltmeter is connected to the sixth terminal of the air actuator of the second test board through the second normally open contact K8-2 of the eighth switching control relay K8; the access terminal I of the timer is connected to the fifth terminal of the air actuator of the third test board through the first normally open contact K11-1 of the eleventh switching control relay K11, and the access terminal II of the timer is connected to the sixth terminal of the air actuator of the third test board through the second normally open contact K11-2 of the eleventh switching control relay K11.

[0058] Among them, the access terminal I of the intermediate frequency AC ammeter is connected to the seventh terminal of the air actuator of the first test board through the first normally open contact KM2-1 of the second AC relay KM2, and the access terminal II of the intermediate frequency AC ammeter is connected to the eighth terminal of the air actuator of the first test board through the second normally open contact KM2-2 of the second AC relay KM2; the access terminal I of the intermediate frequency AC ammeter is connected to the seventh terminal of the air actuator of the second test board through the first normally open contact KM3-1 of the third AC relay KM3, and the access terminal II of the intermediate frequency AC ammeter is connected to the eighth terminal of the air actuator of the second test board through the second normally open contact KM3-2 of the third AC relay KM3; the access terminal I of the intermediate frequency AC ammeter is connected to the seventh terminal of the air actuator of the third test board through the first normally open contact KM4-1 of the fourth AC relay KM4, and the access terminal II of the intermediate frequency AC ammeter is connected to the eighth terminal of the air actuator of the third test board through the second normally open contact KM4-2 of the fourth AC relay KM4.

[0059] The access terminal I of the DC ammeter is connected to the ninth terminal of the air actuator of the first test board through the normally open contact K5-3 of the fifth switching control relay K5, and the access terminal II of the DC ammeter is connected to the tenth terminal of the air actuator of the first test board through the normally open contact K5-4 of the fifth switching control relay K5; the access terminal I of the DC ammeter is connected to the ninth terminal of the air actuator of the second test board through the normally open contact K8-3 of the eighth switching control relay K8, and the access terminal II of the DC ammeter is connected to the tenth terminal of the air actuator of the second test board through the normally open contact K8-4 of the eighth switching control relay K8; the access terminal I of the DC ammeter is connected to the ninth terminal of the air actuator of the third test board through the normally open contact K11-3 of the eleventh switching control relay K11, and the access terminal II of the DC ammeter is connected to the tenth terminal of the air actuator of the third test board through the normally open contact K11-4 of the eleventh switching control relay K11.

[0060] The COM pin of the counter is respectively connected to the negative terminals of the intermediate frequency AC voltmeter, DC voltmeter, timer, intermediate frequency AC ammeter, and DC ammeter. The IN pin of the counter is connected to the eighth pin of the connector CN4. The RST pin of the counter is connected to the reset button. The + pin of the counter is connected to 220VL, and the - pin of the counter is connected to 220V N. Three groups of relay coils are connected in parallel between the + pin and - pin of the counter. The first group is the series combination of the coil of the second AC relay KM2 and the fourth normally open contact K3-4 of the third switching control relay K3. The second group is the series combination of the coil of the third AC relay KM3 and the fourth normally open contact K6-4 of the sixth switching control relay K6. The third group is the series combination of the coil of the fourth AC relay KM4 and the fourth normally open contact K9-4 of the ninth switching control relay K9. Through the energization control of the coils, the control of the intermediate frequency AC ammeter is realized.

[0061] As Figure 2 and Figure 3 shown, in this embodiment, the first test board is the 1809A inlet duct ram air actuator test board (i.e., forming the Figure 2 JP2 panel 1 signal interface in Figure 2 ), the second test board is the 975A inlet duct ram air actuator test board (i.e., forming the Figure 2 JP3 panel 2 signal interface in

[0062] ), and the third test board is the 761A inlet and outlet duct ram air actuator test board (i.e., forming the Figure 4As shown in the figure, the present invention is integrated into the industrial control cabinet as an important part of a test platform. The industrial control cabinet includes: a common instrument area, control buttons / switches, test modules, industrial control cabinet power supply, drawer trays, and voltage regulators. Among them, the common instrument area is located at the top of the industrial control cabinet, and a metering port (which can be calibrated online) is left beside the instrument. The internal and external switching button on the right side of the displacement instrument is used for switching between external instruments and the device's own instrument. When the button is in the popped-up state, the indicator light is off, and the device's own touch screen and counter are used to detect data; when the button is pressed, the light is on, and an oscilloscope, recorder, and other devices can be externally connected to the panel terminal posts for detection. Three test plates are located in the middle of the industrial control cabinet and are 3 independent replaceable test modules, and each module is for a linear actuator of a part number series.

[0063] Test plate 1 / 2 / 3 buttons: These 3 buttons are used for switching between the 3 test plates; after one of the buttons is pressed, the other buttons are invalid.

[0064] Example of test plate switching (this example is the first test plate):

[0065] 1. Principle

[0066] Instrument switching plate (black border), PLC plate (red border).

[0067] a. Switching of intermediate frequency AC voltmeter, DC voltmeter, timer, and DC ammeter

[0068] As Figure 5 shown, the execution sequence of each is as follows: Turn on the Panel1 switch → Connect the switching signal to the PLC plate through CN4-1 → The switching signal is input to the PLC plate CPU input port I0.3 → The PLC plate CPU output port Q0.5 outputs the switching signal to the instrument switching plate CN4-7, and the output port Q0.2 controls the external test port of the first test plate → The switching signal is output through CN4-7 and connected to the normally closed contact K6-2 of the relay K6 in the switching control relay combination (including K3, K6, K9) → Normally closed contact K6-2 → COM contact K6-10 → Normally closed contact K9-2 of the electrical appliance K9 → Normally closed contact K9-2 of K9 → COM contact K9-10 → Sucking coil K3-14 of the electrical appliance K3 → Sucking coil K0 of the switching relay group (K3, K4, K5) of the first test plate is energized *[1] → The normally open contacts of K3, K4, and K5 are closed, connecting the intermediate frequency AC voltmeter, DC voltmeter, timer, and DC ammeter → Since the contacts K3-12 and K3-8 are closed, the KM2 coil A1 and A2 are energized, and the KM2 contacts are closed, connecting the intermediate frequency AC ammeter.

[0069] *[1]: At this time, due to the mutual control between the switching control relay combination (including K3, K6, K9), only the switching relay group (K3, K4, K5) of the first test block's pull-in coil K0 is energized, and only the connector JP2 of the first test block is connected to the instrument.

[0070] b. Counter switching

[0071] like Figure 6 and Figure 7 As shown, the overall operation logic is as follows:

[0072] If the counting switch is not turned on → the relay R3 pickup coil is not energized → the counting pulse goes from CN1-1 → NC contact R3-1 → COM contact R3-5 → CN4-8 → counter IN.

[0073] If the counting switch is turned on → the switching signal is connected to the PLC board through CN4-4 → the relay R3 pickup coil is energized and attracted → the counting pulse is from CN1-2 → NO contact R3-3 → COM contact R3-5 → CN4-8 → counter IN.

[0074] In addition, whether the counting switch is turned on or not, the CPU output port Q0.0 of the PLC board outputs the activation relay R1, and the CN1-1 / 2 counting pulses can all be input to the CPU input ports I0.0 and I0.2 through the operational amplifier LM324.

[0075] c. Displacement switching (operated only when it is necessary to retrieve the internal displacement analog value of the actuator being tested)

[0076] like Figure 8 As shown, the operation logic is as follows:

[0077] The CPU output port Q0.1 of the PLC board outputs the activation relay R2 → the COM contact of relay R2 contacts the NO contact → the displacement analog of the actuator being measured → CN1-12 / 8 / 11 → NO contact R2-5 / 6 / 7 → COM contact R2-9 / 1011 → the input terminal of the analog input module EM AE08.

[0078] The following interface definitions are the correspondence between the test module connector JP2 / 3 / 4 and the switching module relay contacts, instrument interfaces JP1~10 and instrument terminals. More actuator test modules can be expanded and developed based on this correspondence.

[0079]

[0080]

[0081] Finally, it should be noted that the above embodiments are only used to illustrate the technical solutions of the present invention and not to limit them. Although the present invention has been described in detail with reference to the preferred embodiments, those of ordinary skill in the art should understand that the technical solutions of the present invention can be modified or equivalently replaced without departing from the spirit and scope of the present technical solution, and they should all be covered within the scope of the claims of the present invention.

Claims

1. A test instrument switching circuit, characterized in that: The circuit includes a PLC board, an instrument switching board, a first test board, a second test board, and a third test board; The PLC board includes a CPU chip, an operational amplifier chip, and an analog input chip. The CPU accesses the instrument switching board through input pins and output pins to achieve instrument switching; The CPU chip realizes the pulse counting function by connecting with the operational amplifier chip. The analog input chip is used to connect with the first test board, the second test board, and the third test board respectively, and under the control of the CPU chip, it realizes the detection of the device under test connected to each test board.

2. The switching circuit of a test instrument according to claim 1, wherein: The output pins Q0.5 - Q0.7 and the input pins I0.3 - I0.5 of the CPU chip are connected to the instrument switching board through the respective pins of the connector (CN4). Among them, the input pins I0.3 - I0.5 of the CPU chip are respectively connected to the 24V DC power supply of the instrument panel through the first to third pins of (CN4), and then through switch panel1, switch panel2, and switch panel3 respectively; the output pins Q0.5 - Q0.7 of the CPU chip are connected to the panel switching circuit through the fifth to seventh pins of the connector (CN4); The input pins I0.0 and I0.1 of the CPU chip are respectively connected to the two output pins of the operational amplifier chip. The output pin Q0.0 of the CPU chip is connected to the coil of the relay R1. Two sets of normally open contacts of the relay R1 are respectively arranged on the connection lines between the input pins I0.0 and I0.1 of the CPU chip and the two output pins of the operational amplifier chip; The output pin Q0.2 of the CPU chip accesses the first test board through the first cable and the interface socket (CN1); the output pin Q0.3 of the CPU chip accesses the second test board through the second cable and the interface socket (CN2); the output pin Q0.4 of the CPU chip accesses the third test board through the third cable and the interface socket (CN3).

3. The switching circuit of a test instrument according to claim 1 or 2, characterized in that: The output pin Q0.1 of the CPU chip is connected to the coil of the relay R2. The relay R2 is a double-conversion contact relay. The 0+ pin of the analog input chip is connected to the moving contact of the first set of double-conversion contacts of the relay R2. The normally open static contact of this set of double-conversion contacts is connected to the fourth pin of the terminal block; the 1+ pin of the analog input chip is connected to the moving contact of the second set of double-conversion contacts of the relay R2. The normally open static contact of this set of double-conversion contacts is connected to the first pin of the terminal block; the 2+ pin of the analog input chip is connected to the moving contact of the third set of double-conversion contacts of the relay R2. The normally open static contact of this set of double-conversion contacts is connected to the seventh pin of the terminal block; the 2- pin of the analog input chip is connected to the moving contact of the fourth set of normally open contacts of the relay R2. The static contacts of the four sets of normally open contacts are connected to the ninth pin of the terminal block; the normally closed static contacts of the first to third sets of double-conversion contacts of the relay R2 are all grounded; the first to third pins of the terminal block are connected in parallel through jumpers, the fourth to sixth pins are connected in parallel through jumpers; the seventh to eighth pins are connected in parallel through jumpers; the ninth to eleventh pins are connected in parallel through jumpers; The 0-, 1-, 2- pins and the M pin of the analog input chip are all grounded; a set of analog input pins of the analog input chip is connected to the displacement sensor.

4. The switching circuit of a test instrument according to claim 3, wherein: A set of negative-phase terminal pins of the operational amplifier chip are respectively connected to the 15V DC power supply through a connection resistor, and the corresponding set of positive-phase terminal pins are loaded with 10V DC power; and one negative-phase terminal pin is connected to the U jack of the test interface of the first test board through the first cable and interface (CN1), and the other negative-phase terminal pin is connected to the V jack of the test interface of the first test board through the first cable and interface (CN1). The U jack and the V jack of the test interface of the first test board are both connected to the U terminal and the V terminal inside the first test board.

5. The switching circuit of a test instrument according to claim 4, characterized in that: The input of the 15V DC power supply and the 10V DC power supply of the operational amplifier chip are provided by the DC-DC power module.

6. The switching circuit of a test instrument according to claim 4, characterized in that: The E jack of the test interface of the first test board is connected to the 1M pin of the pulse counting module of the CPU chip through the first cable and interface socket (CN1); the D jack of the test interface of the first test board is connected to the voltage output terminal of the voltage regulator chip through the first cable and interface socket (CN1); the C jack of the test interface of the first test board is connected to the first pin of the terminal block through the first cable and interface socket (CN1); the B jack of the test interface of the first test board is connected to the fourth pin of the terminal block through the first cable and interface socket (CN1); the A jack of the test interface of the first test board is connected to the ninth pin of the terminal block through the first cable and interface socket (CN1); the D jack, C jack, B jack, and A jack of the test interface of the first test board are all connected to the D terminal, C terminal, B terminal, and A terminal inside the first test board; The output pin Q0.2 of the CPU chip is grounded after being connected to the coil parts of the eleventh relay (R11) and the twelfth relay (R12) in parallel through the first cable and the interface socket (CN1). The three normally open contacts of the eleventh relay (R11) are respectively arranged on the connection lines between the U, V, and E jacks of the test interface of the first test board and the U, V, and E terminals inside the first test board, where the E jack and the E terminal are grounded; the three normally open contacts of the twelfth relay (R12) are respectively arranged on the connection lines between the C, B, and A jacks of the test interface of the first test board and the C, B, and A terminals inside the first test board; where the C jack and the A jack are also respectively connected to the positive and negative poles of the 10V DC power supply.

7. The switching circuit of a test instrument according to claim 6, characterized in that: The V jack and the R jack of the test interface of the second test board are connected to the second pin of the terminal block through the second cable and the interface socket (CN2); the T jack of the test interface of the second test board is connected to the seventh pin of the terminal block through the second cable and the interface socket (CN2); the S jack and the N jack of the test interface of the second test board are connected to the tenth pin of the terminal block through the second cable and the interface socket (CN2); the P jack of the test interface of the second test board is connected to the fifth pin of the terminal block through the second cable and the interface socket (CN2); The V jack, R jack, S jack, R jack, T jack, and N jack of the test interface of the second test board are all connected to the V terminal, R terminal, S terminal, R terminal, T terminal, and N terminal inside the second test board; the V terminal and the R terminal inside the second test board are in series and the S terminal and the N terminal are in series; the output pin Q0.3 of the CPU chip is connected to the coil part of the twenty-first relay (R21) through the second cable and the interface socket (CN2), and the four normally open contacts of the twenty-first relay (R21) are respectively arranged on the connection lines between the V, T, P, and S jacks of the test interface of the second test board and the V, T, P, and S terminals inside the second test board; where the V jack and the N jack are also respectively connected to the positive and negative poles of the 10V DC power supply.

8. The switching circuit of a test instrument according to claim 7, characterized in that: The F jack and the C jack of the test interface of the third test board are connected to the third pin of the terminal block through the third cable and the interface socket (CN3); the E jack of the test interface of the third test board is connected to the eighth pin of the terminal block through the third cable and the interface socket (CN3); the D jack and the A jack of the test interface of the third test board are connected to the eleventh pin of the terminal block through the third cable and the interface socket (CN3); the B jack of the test interface of the third test board is connected to the sixth pin of the terminal block through the third cable and the interface socket (CN3); The F jack, E jack, D jack, C jack, B jack, and A jack of the test interface of the third test board are all connected to the F terminal, E terminal, D terminal, C terminal, B terminal, and A terminal inside the third test board; the D terminal and A terminal inside the third test board are in series; the output pin Q0.4 of the CPU chip is connected to the coil part of the thirty-first relay (R31) through the third cable and interface socket (CN3), and the four normally open contacts of the thirty-first relay (R31) are respectively set on the connection lines between the F, E, B, and A jacks of the test interface of the third test board and the F, E, B, and D terminals inside the second test board; among them, the F jack and A jack are also respectively connected to the positive and negative poles of the 10V DC power supply.

9. The switching circuit of a test instrument according to claim 7, characterized in that: The panel switching circuit includes an initial switching control relay (K0) and first switching control relays (K1) to eleventh switching control relays (K11). The fifth pin of the connector (CN4) is successively connected in series with the third normally closed contact (K3-3) of the third switching control relay (K3), the third normally closed contact (K6-3) of the sixth switching control relay (K6), and the coil of the second switching control relay (K2) and then grounded; the sixth pin of the connector (CN4) is successively connected in series with the second normally closed contact (K3-2) of the third switching control relay (K3), the third normally closed contact (K9-3) of the ninth switching control relay (K9), and the coil of the first switching control relay (K1) and then grounded; the seventh pin of the connector (CN4) is successively connected in series with the second normally closed contact (K6-2) of the sixth switching control relay (K6), the second normally closed contact (K9-2) of the ninth switching control relay (K9), and the coil of the initial switching control relay (K0) and then grounded; The coils of the third switching control relay (K3), the fourth switching control relay (K4), and the fifth switching control relay (K5) are connected in parallel, and the common contact at one end is connected to the 24V DC power supply of the instrument panel through the normally open contact of the initial switching control relay (K0), and the common contact at the other end is connected to the negative terminal of each instrument; the coils of the sixth switching control relay (K6), the seventh switching control relay (K7), and the eighth switching control relay (K8) are connected in parallel, and the common contact at one end is connected to the 24V DC power supply of the instrument panel through the normally open contact of the first switching control relay (K1), and the common contact at the other end is connected to the negative terminal of each instrument; the coils of the ninth switching control relay (K9), the tenth switching control relay (K10), and the eleventh switching control relay (K11) are connected in parallel, and the common contact at one end is connected to the 24V DC power supply of the instrument panel through the normally open contact of the second switching control relay (K2), and the common contact at the other end is connected to the negative terminal of each instrument; the positive terminals of each instrument are all connected to the 24V DC power supply of the instrument panel.

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