Multi-lower-computer collaborative semi-physical simulation system based on PTP time service

Abstract

The invention provides a multi-lower-computer collaborative semi-physical simulation system based on PTP time service, relates to the field of automatic testing, and is used for solving the problem that a traditional semi-physical simulation scheme of a shared memory limits the data volume. The system comprises an upper computer, a first switch, a PTP main module and a plurality of lower computers, the upper computer is used for editing a test strategy and broadcasting the test strategy to the real-time controller of each lower computer through the first switch; the PTP master module is used for timing the PTP slave modules of the lower computers through the first switch; the PTP slave module of each lower computer is used for timing each resource card of each lower computer; the real-time controller of each lower computer is used for receiving the test strategy and judging whether the test strategy is executed or not; and if the judgment result is to execute the test strategy, executing the test strategy based on the resource card of each lower computer to obtain an operation result, and uploading the operation result to the upper computer through the second switch and the first switch of each lower computer in sequence.

Description

Technical Field

[0001] This application relates to the field of automated testing, and provides a multi-lower computer collaborative semi-physical simulation system based on PTP time synchronization. Background Art

[0002] In terms of semi-physical simulation, there are currently two main forms. For relatively simple peripheral environment simulation, generally a single lower computer with real-time simulation capabilities is used. For complex environment simulation with multiple system cross-links, based on a reflective memory network, collaborative simulation of multiple real-time lower computers is achieved, reaching the same simulation effect as a single lower computer. Reflective memory is a shared memory technology with the characteristics of fast and quasi-real-time. However, due to hardware limitations, the memory capacity is limited. To implement simulation and expansion of multiple nodes, memory needs to be planned and reserved, and real-time forwarding of large data cannot be achieved. Therefore, its application scenarios are those with a limited number of nodes, fast transmission speed, but not particularly large data volume.

[0003] With the increasing complexity of airborne systems and closer cross-link relationships, especially for complex optoelectronic and radio frequency mission payloads with large data transmission volumes, if the traditional shared memory method is still used, there will be problems such as high cost and even difficulty in implementation. Summary of the Invention

[0004] This application provides a multi-lower computer collaborative semi-physical simulation based on PTP time synchronization to solve the problem of data volume limitation in the traditional shared memory semi-physical simulation solution.

[0005] In a first aspect, a multi-lower computer collaborative semi-physical simulation system based on PTP time synchronization is provided. The multi-lower computer collaborative semi-physical simulation system based on PTP time synchronization is characterized by including an upper computer, a first switch, a PTP master module, and multiple lower computers; each of the lower computers includes a real-time controller, a PTP slave module, multiple resource cards, and a second switch; where:

[0006] The upper computer is used to edit a test strategy and broadcast the test strategy to the real-time controllers of each of the lower computers through the first switch;

[0007] The PTP master module is used to synchronize time for the PTP slave modules of each of the lower computers through the first switch; the PTP slave modules of each of the lower computers are used to synchronize time for each of the resource cards of each of the lower computers;

[0008] The real-time controller of each slave computer is used to receive the test strategy and determine whether to execute the test strategy. If the judgment result is to execute the test strategy, the test strategy is executed based on the resource cards of each slave computer to obtain an operation result, and the operation result is uploaded to the master computer through the second switch and the first switch of each slave computer in sequence.

[0009] Optionally, the first switch is a synchronous switch or a general switch supporting the PTP protocol, and the second switch is a general switch supporting the PTP protocol.

[0010] Optionally, the real-time controller of the slave computer is specifically used for:

[0011] Receiving the test strategy; the test strategy includes a target number, a target operation, and execution information; the execution information is an execution time or an execution condition;

[0012] Based on the target number, determining a target slave computer; the number of the target slave computer is the same as the target number;

[0013] Determining a target time according to the execution information;

[0014] Sending the target time and the target operation to the resource card of the target slave computer;

[0015] The resource card of the target slave computer is specifically used to execute the target operation at the target time to obtain an operation result, and upload the operation result to the master computer through the second switch and the first switch of the target slave computer in sequence.

[0016] Optionally, the target operation is any one of conditional judgment, loop, and jump.

[0017] Optionally, when the execution information is an execution time, the real-time controller of the target slave computer is specifically used for:

[0018] Determining the sum of the clock face time and the execution time as the target time; the clock face time is the system reference time agreed by each slave computer.

[0019] Optionally, when the execution information is an execution condition, the real-time controller of the target slave computer is specifically used for:

[0020] Detecting that the execution condition is triggered, and determining the sum of the triggering time of the execution condition and the time in the execution time as the target time.

[0021] Optionally, the real-time controller of the target slave computer is further used for:

[0022] After detecting that the execution condition is triggered, the triggering time of the execution condition is synchronized to the real-time controllers of other slave machines except the target slave machine through the first switch.

[0023] Optionally, the multiple slave machines include a host machine, and the real-time controller of the host machine is further configured to:

[0024] Determine the clock face time; the clock face time is the zero moment of the system time;

[0025] Synchronize the clock face time to the real-time controllers of other slave machines except the host machine through the first switch.

[0026] Optionally, the clock face time refers to the startup time of the execution engine of the host machine.

[0027] Optionally, if there is a main model, the host machine is the slave machine for running the main model; if there is no main model, the host machine is an arbitrarily selected slave machine among the multiple slave machines.

[0028] Compared with the prior art, the beneficial effects of the present application are as follows:

[0029] The present application provides a multi-slave machine collaborative semi-physical simulation system based on PTP time synchronization, which includes: a host computer, a first switch, a PTP master module, and multiple slave machines; each slave machine includes a real-time controller, a PTP slave module, multiple resource cards, and a second switch; the host computer is configured to edit a test strategy and broadcast the test strategy to the real-time controllers of each slave machine through the first switch; the PTP master module is configured to synchronize time for the PTP slave modules of each slave machine through the first switch; the PTP slave modules of each slave machine are configured to synchronize time for each resource card of each slave machine; the real-time controllers of each slave machine are configured to receive the test strategy and determine whether to execute the test strategy; if the determination result is to execute the test strategy, the test strategy is executed based on the resource cards of each slave machine to obtain an operation result, and the operation result is uploaded to the host computer through the second switch and the first switch of each slave machine in sequence.

[0030] In the present application, the Precision Time Protocol (PTP) is used to achieve synchronous time synchronization of multiple slave machines. There is no need to use reflective memory hardware, which can solve the problem of the limitation of the shared memory on the data volume. Moreover, the PTO protocol is convenient for expansion, achieving sub-microsecond-level synchronization accuracy for each node, and can meet the semi-physical simulation test requirements of multiple slave machines in collaboration. Description of the Drawings

[0031] To more clearly illustrate the technical solutions in the embodiments of the present application or the related art, the following will briefly introduce the drawings required for the description of the embodiments or the related art. Obviously, the drawings in the following description are only the embodiments of the present application. For those of ordinary skill in the art, without creative efforts, other drawings can also be obtained according to the provided drawings.

[0032] Figure 1 It is a schematic structural diagram of a multi-slave computer collaborative hardware-in-the-loop simulation system based on PTP time synchronization provided by an embodiment of the present application;

[0033] Figure 2 It is a schematic flow diagram of a multi-slave computer collaborative hardware-in-the-loop simulation method based on PTP time synchronization provided by an embodiment of the present application. Detailed implementation manners

[0034] To make the purpose, technical solutions and advantages of the present application more clear and understandable, the following will clearly and completely describe the technical solutions in the embodiments of the present application in conjunction with the drawings in the embodiments of the present application. Obviously, the described embodiments are only a part of the embodiments of the present application, rather than all the embodiments. Based on the embodiments in the present application, all other embodiments obtained by those of ordinary skill in the art without creative efforts belong to the scope of protection of the present application. Without conflict, the embodiments in the present application and the features in the embodiments can be arbitrarily combined with each other. And although the logical order is shown in the flow chart, in some cases, the steps shown or described can be executed in a different order than here.

[0035] To solve the problem of the limitation of the data volume in the traditional hardware-in-the-loop simulation solution of shared memory, an embodiment of the present application provides a multi-slave computer collaborative hardware-in-the-loop simulation system based on PTP time synchronization. Please refer to Figure 1 , which is a structural diagram of a multi-slave computer collaborative hardware-in-the-loop simulation system based on PTP time synchronization provided by an embodiment of the present application.

[0036] This multi-slave computer collaborative hardware-in-the-loop simulation system can also be called a PTP precise clock distributed multi-level network. The system includes a first switch, a PTP master module, and multiple slave computers. The host computer is connected to the first switch, the PTP master module is connected to the first switch, and multiple slave computers are connected to the first switch.

[0037] It should be noted that Figure 1 taking the multiple slave computers including slave computer 1 and slave computer M as an example, in fact, the number of slave computers is not limited.

[0038] Each slave computer includes a real-time controller, a PTP slave module, multiple resource cards (including Resource Card 1... Resource Card N), and a second switch. The real-time controller of each slave computer is connected to the first switch, the PTP slave module of each slave computer is connected to the first switch, one end of the multiple resource cards of each slave computer is connected to the PTP slave module of the slave computer, and the other end is connected to the second switch of the slave computer.

[0039] The master computer is used to edit the test strategy and broadcast the test strategy to the real-time controllers of each slave computer through the first switch;

[0040] The PTP master module is used to time the PTP slave modules of each slave computer through the first switch; the PTP slave modules of each slave computer are used to time each resource card of each slave computer;

[0041] The real-time controller of each slave computer is used to receive the test strategy and judge whether to execute the test strategy; if the judgment result is to execute the test strategy, the test strategy is executed based on the resource cards of each slave computer to obtain the operation result, and the operation result is uploaded to the master computer through the second switch and the first switch of each slave computer in sequence.

[0042] In the specific implementation process, the first switch plays a role of connection and data forwarding in the whole system. It connects the master computer, the PTP master module and the components of multiple slave computers, and undertakes the main tasks of network communication and data transmission. The second switch connects multiple resource cards and the first switch, and is responsible for data transfer between the resource cards and the first switch. After the master computer edits the test strategy, it passes the test strategy to the first switch, and then the first switch broadcasts the test strategy to the real-time controllers of all slave computers in the system.

[0043] The PTP master module passes the clock synchronization signal to the first switch, and then the first switch broadcasts the clock synchronization signal to the PTP slave modules in all slave computers, so as to time the PTP slave modules and ensure that the time of all slave computers is consistent. The PTP slave module receives the clock synchronization signal forwarded by the first switch, adjusts the local clock of the slave computer according to the clock synchronization signal, and provides a clock reference for multiple resource cards in the slave computer to ensure that multiple resource cards in the slave computer execute the test strategy according to the unified clock.

[0044] The real-time controller is the core computing unit of the lower computer, responsible for coordinating the operations of the resources within the lower computer. The real-time controller of each lower computer receives the test strategy forwarded by the first switch and determines whether to execute the test strategy. If the determination result is to execute the test strategy, the test strategy is executed based on multiple resource cards of the lower computer. A resource card is a hardware component in the lower computer that executes data processing tasks. After executing the test strategy, the resource card obtains the operation result and forwards the operation result to the connected second switch, which is then forwarded by the second switch to the first switch, and finally uploaded by the first switch to the upper computer.

[0045] In a possible embodiment, the first switch is a synchronous switch or a general switch that supports the PTP protocol, and the second switch is a general switch that supports the PTP protocol.

[0046] A synchronous switch is a switch specifically designed to support the PTP protocol and has the ability to process PTP time synchronization information. It can understand PTP synchronization messages, delay requests, and delay responses, and can process the timestamp information in these messages. The general switch must be a switch that supports the PTP protocol (1588 protocol).

[0047] In a possible embodiment, the real-time controller of the lower computer is specifically configured to: receive the test strategy; the test strategy includes a target number, a target operation, and execution information; the execution information is an execution time or an execution condition; based on the target number, determine the target lower computer; the number of the target lower computer is the same as the target number; according to the execution information, determine the target time; and send the target time and the target operation to the resource cards of the target lower computer.

[0048] The multiple resource cards of the target lower computer are specifically configured to execute the target operation at the target time, obtain the operation result, and upload the operation result to the upper computer through the second switch and the first switch of the target lower computer in sequence.

[0049] In the specific implementation process, the test strategy includes a target number, a target operation, and execution information. The target number is used to indicate the number of the slave computer that executes this test strategy. The target operation refers to the specific operation executed by the slave computer, and the target operation is any one of conditional judgment, loop, and jump. The judgment operation means that the operation is executed only when a certain condition is met. For example, "when the signal received from a certain device under test is greater than 5, a certain instruction is sent, otherwise it is not sent". The loop operation means repeating a certain operation. For example, "send a self-test start instruction to the device under test, send it once every 10 ms, and loop 100 times until the loop count reaches 100 times, or exit the loop until a feedback signal indicating successful startup is received". The jump operation means interrupting the current test strategy step and jumping to other steps for execution. For example, "when the judgment operation determines that the jump self-test condition is met, execute the self-test operation, otherwise wait in the current initialization step". The execution information is used to indicate the specific execution time of the target operation. The execution information can be the execution time, such as "1000 ms", and the execution information can be the execution condition, such as "1000 ms after receiving the self-test signal of the device under test".

[0050] After receiving the test strategy, the real-time controller of the slave computer parses and obtains the target number, the target operation, and the execution information. If the target number is different from the number of this slave computer, the judgment result is not to execute this test strategy. For example, this test strategy can be lost. If the target number is the same as the number of this slave computer, it means that this slave computer is the target slave computer, and the judgment result is to execute the test strategy. Determine the target time according to the execution information, and send the target time and the target operation to multiple resource cards of the target slave computer.

[0051] Multiple resource cards of the target computer execute the target operation at the target time and obtain the operation result. For example, the target operation refers to data acquisition, and the operation result refers to the specific data collected. The resource card first transfers the operation result to the second switch of the target computer, and then the second switch forwards it to the first switch. Finally, the first switch uploads the operation result to the host computer.

[0052] Since the information contained in the execution information has two cases, there are two cases for determining the target time according to the execution information, which are introduced separately below.

[0053] The first static scenario: When the execution information is the execution time, the real-time controller of the target slave computer is specifically used to: determine the sum of the clock face time and the execution time as the target time.

[0054] In the embodiment of the present application, the clock face time is the system reference time agreed upon by each slave computer, that is, the zero moment T0 of the system time is 0. For the test strategy with a specific execution time, it is executed according to the specified execution time Td, that is, the target time T = T0 + Td. For example, if the test strategy is "send a start signal to the device under test at 1000 ms", then this slave computer will send a start signal to the device under test at T0 + 1000 ms.

[0055] The second dynamic scenario: when the execution information is an execution condition, the real-time controller of the target slave computer is specifically used to: when detecting that the execution condition is triggered, determine the sum of the triggering time of the execution condition and the time in the execution time as the target time.

[0056] In the embodiment of the present application, for the test strategy without a specific execution time, the target time is determined according to the triggering time of the execution conditions of target operations such as conditional judgment, loop, and jump. For example, if the test strategy is "send a start signal to the device under test 1000 ms after receiving the self-check signal of the device under test", then the receiving moment of the self-check signal is Tc, and the start signal is sent to the device under test at the moment of Tc + 1000 ms.

[0057] In a possible embodiment, the real-time controller of the target slave computer is further used to:

[0058] After detecting that the execution condition is triggered, synchronize the triggering time of the execution condition to the real-time controllers of other slave computers except the target slave computer through the first switch.

[0059] In the embodiment of the present application, the slave computer that determines the execution condition is used as the synchronization host, monitors the triggering time Tc of the execution condition, records the triggering time Tc, and sends it to the first switch, which broadcasts it to other slave computers for subsequent calculation of the target time for each slave computer to execute the target operation.

[0060] Regarding how the clock face time is determined, it is introduced below.

[0061] In a possible embodiment, multiple slave computers include a host; the real-time controller of the host is further used to: determine the clock face time; synchronize the clock face time to the real-time controllers of other slave computers except the host through the first switch.

[0062] In the specific implementation process, the host determines a clock face time T0 = 0, transfers the clock face time to the first switch, and then the first switch broadcasts the clock face time to other slave computers.

[0063] In the embodiments of the present application, the real-time controllers of all slave computers refer to the clock face time, and with the same time reference, the behaviors of each slave computer are consistent in time, which is crucial for operations such as collaborative work, data transmission, and task scheduling. Especially when multiple slave computers need to execute an operation or respond to an event simultaneously (such as data acquisition, execution of control commands), the unified time reference can ensure that they respond at precise moments, avoiding errors or delays caused by time differences.

[0064] In a possible embodiment, the real-time controller of the host computer is specifically configured to:

[0065] Determine the startup time of the host computer execution engine as the clock face time.

[0066] In a possible embodiment, if there is a main model, the host computer is the slave computer on which the main model runs; if there is no main model, the host computer is an arbitrarily selected slave computer among multiple slave computers.

[0067] In the specific implementation process, when the system starts up, the slave computer on which the main model runs is selected as the host computer. If there are multiple models running simultaneously and there is no main model, an arbitrarily selected slave computer can be used as the host computer. The main model is usually the core of the system, and the device on which the main model runs has stronger processing capabilities or higher fault tolerance than other devices. Setting it as the host computer can ensure that when problems occur in the system, the main model device undertakes the most critical computing and decision-making tasks, avoiding the overall collapse of the system due to failures of peripheral devices.

[0068] In summary, the embodiments of the present application provide a multi-slave-computer collaborative hardware-in-the-loop simulation system based on PTP time synchronization. Based on the PTP precise clock protocol, synchronous time synchronization of multiple slave computers is achieved. Through the design and switching of static and dynamic scenarios, linkage between the host computer and multiple slave computers is realized, and the problem of data volume limitation in the hardware-in-the-loop simulation solution with shared memory is solved. Moreover, the multi-slave-computer collaborative hardware-in-the-loop simulation system based on PTP time synchronization adopts a two-level network architecture. The PTP slave modules of different slave computers are only connected to the PTP master module through one layer of network, enabling high real-time performance. The ordinary switch in the slave computer is only used for data transmission and does not affect the hardware time synchronization of the resource card, ensuring the real-time performance of each resource card. The hardware synchronization accuracy of each slave computer can reach 1 μs.

[0069] The present application also provides a multi-slave-computer collaborative hardware-in-the-loop simulation method based on PTP time synchronization, and the specific process is as Figure 2 shown.

[0070] S201. Construct a multi-slave-computer collaborative hardware-in-the-loop simulation system based on PTP time synchronization.

[0071] The constructed multi-slave cooperative hardware-in-the-loop simulation system based on PTP time synchronization is as Figure 1 shown, also known as the PTP precise clock distributed multi-level network, which enables multiple slave machines to have the same system clock, that is, the clock face clocks are consistent.

[0072] S202. Test and evaluate the real-time operating system clock jitter, PTP time synchronization clock accuracy, and hardware-in-the-loop simulation step size.

[0073] The test requirements need to simultaneously meet the following two conditions: the real-time operating system clock jitter ≤ 10 times the PTP time synchronization clock accuracy; the real-time operating system clock jitter ≤ 1 / 10 of the hardware-in-the-loop simulation step size.

[0074] S203. The host computer edits the test strategy and distributes it to the slave machines.

[0075] The host computer edits the test strategy, which contains operations such as conditional judgment, loop, and jump, and broadcasts it to all slave machines.

[0076] S204. Establish a communication mechanism between slave machines.

[0077] There is a communication requirement for the cooperative execution between multiple slave machines. Considering from two dimensions of real-time performance and ease of implementation, there are the following three communication methods:

[0078] The first one is Remote Procedure Call (RPC). This method has good ease of implementation but poor real-time performance. When the simulation step size is short, such as 1 ms, it is not applicable.

[0079] The second one is the data subscription mechanism. This method has relatively good ease of implementation but poor real-time performance. Since all communication parties are loosely coupled, it is an ideal solution when there are many slave machines and a large synchronization network. The slave machines subscribe to data from each other to achieve communication based on data events.

[0080] The third one is external bus communication. This method has poor ease of implementation but good real-time performance. It is necessary to change the software design according to a specific bus, and there is a very clear upper limit for delay.

[0081] S205. Agree on time zero.

[0082] The host in multiple slave machines takes the startup time of the execution engine as the clock face time T0 = 0, and synchronizes the clock face time T0 to all other slave machines through the network.

[0083] S206. All slave machines execute in an orderly manner according to the test strategy distributed by the host computer.

[0084] During execution, if the execution information is the execution time, the specific execution target time = clock face time + execution time. If the execution information is the execution condition, the specific execution target time = trigger time of the execution condition + time in the execution condition.

[0085] Through the above method, each test strategy can be executed at the determined target time. However, it is necessary to operate the actual hardware for acquisition and excitation (input and output), and the synchronization of these hardware inputs and outputs still needs to be designed. The specific design points are as follows:

[0086] 1. Reasonably distribute the execution of inputs and outputs in the test strategy among multiple slave machines, and do not concentrate on a certain or several slave machines.

[0087] 2. For the case where different slave machines synchronously access the bus, it is achieved through static and dynamic scenarios. At this time, the access synchronization error will not exceed the error of the underlying time synchronization mechanism.

[0088] 3. For the case where the same slave machine synchronously accesses multiple buses, it is achieved through the asynchronous mechanism of the real-time simulation engine. The real-time simulation engine supports asynchronous bus I / O, that is, it automatically schedules the control flow during bus I / O. Each I / O does not need to wait for completion. After the data is sent to the hardware buffer, the next I / O is started. In this case, its synchronization error depends on the scheduling ability of the operating system, usually 100 μs * n, where n is the concurrency number.

[0089] Concurrent optimization can be performed on the real-time simulation engine. According to the CPU resources (mainly the number of cores), a thread pool is configured for bus I / O. When the concurrent number of bus I / Os does not exceed the capacity of the thread pool, these I / Os will be truly concurrent, and the synchronization error approaches the microsecond level.

[0090] 4. For simple I / O signals such as analog signals, the asynchronous mechanism is also adopted.

[0091] 5. For the case where there are particularly many hardware channels or the synchronization requirements are particularly high, hardware synchronous triggering is adopted.

[0092] It should be noted that in this article, the term "including", "comprising" or any other variant thereof is intended to cover non-exclusive inclusion, so that a process, method, article or system including a series of elements not only includes those elements, but also includes other elements not explicitly listed, or further includes elements inherent to such process, method, article or system. Without more limitations, an element defined by the statement "including one..." does not exclude the existence of another identical element in the process, method, article or system including that element.

[0093] The serial numbers of the embodiments of the present application above are only for description and do not represent the advantages or disadvantages of the embodiments.

[0094] Through the description of the above embodiments, those skilled in the art can clearly understand that the methods of the above embodiments can be implemented by means of software plus a necessary general hardware platform. Of course, they can also be implemented by hardware, but in many cases the former is a better implementation. Based on such an understanding, the technical solution of the present application, in essence, or the part that contributes to the prior art, can be embodied in the form of a software product. This computer software product is stored in a storage medium (such as a read-only memory / random access memory, magnetic disk, optical disk), and includes several instructions for causing a multimedia terminal device to execute the methods of the various embodiments of the present application.

[0095] The above are only the preferred embodiments of the present application, and do not limit the patent scope of the present application. Any equivalent structure or equivalent process transformation made by using the content of the specification and drawings of the present application, or directly or indirectly applied in other related technical fields, shall be equally included in the patent protection scope of the present application.

Claims

1. A multi-lower computer collaborative semi-physical simulation system based on PTP time synchronization, characterized in that, It includes a host computer, a first switch, a PTP master module, and multiple slave computers; each of the slave computers includes a real-time controller, a PTP slave module, multiple resource cards, and a second switch; where: The host computer is used to edit a test strategy and broadcast the test strategy to the real-time controllers of each of the slave computers through the first switch; The PTP master module is used to time the PTP slave modules of each of the slave computers through the first switch; the PTP slave modules of each of the slave computers are used to time each of the resource cards of each of the slave computers; The real-time controller of each of the slave computers is used to receive the test strategy and determine whether to execute the test strategy; if the judgment result is to execute the test strategy, then execute the test strategy based on the resource cards of each of the slave computers, obtain an operation result, and upload the operation result to the host computer through the second switch and the first switch of each of the slave computers in sequence.

2. The multi-lower computer collaborative hardware-in-the-loop simulation system based on PTP time synchronization as claimed in claim 1, wherein The first switch is a synchronous switch or a general switch supporting the PTP protocol, and the second switch is a general switch supporting the PTP protocol.

3. The multiple slave computer collaborative hardware-in-the-loop simulation system based on PTP time synchronization as claimed in claim 1, wherein The real-time controller of the slave computer is specifically used for: Receiving the test strategy; the test strategy includes a target number, a target operation, and execution information; the execution information is an execution time or an execution condition; Based on the target number, determining a target slave computer; the number of the target slave computer is the same as the target number; According to the execution information, determining a target time; Sending the target time and the target operation to the resource card of the target slave computer; The resource card of the target slave computer is specifically used to execute the target operation at the target time, obtain an operation result, and upload the operation result to the host computer through the second switch and the first switch of the target slave computer in sequence.

4. The multi-lower computer collaborative semi-physical simulation system based on PTP time synchronization as claimed in claim 3, wherein, The target operation is any one of conditional judgment, loop, and jump.

5. The multi-lower computer collaborative hardware-in-the-loop simulation system based on PTP time synchronization as claimed in claim 3, wherein When the execution information is an execution time, the real-time controller of the target slave computer is specifically used for: Determining the sum of the clock face time and the execution time as the target time; the clock face time is the system reference time agreed upon by each of the slave computers.

6. The multi-slave cooperative hardware-in-the-loop simulation system based on PTP time synchronization as claimed in claim 3, wherein When the execution information is an execution condition, the real-time controller of the target slave computer is specifically used for: Detecting that the execution condition is triggered, and determining the sum of the triggering time of the execution condition and the time in the execution time as the target time.

7. The multi-slave collaborative hardware-in-the-loop simulation system based on PTP time synchronization as claimed in claim 6, wherein, The real-time controller of the target slave computer is further used for: After detecting that the execution condition is triggered, synchronizing the triggering time of the execution condition to the real-time controllers of other slave computers except the target slave computer through the first switch.

8. The multiple slave computer collaborative hardware-in-the-loop simulation system based on PTP time synchronization as claimed in claim 5, wherein Among the multiple slave computers, there is a host computer, and the real-time controller of the host computer is further used for: Determining the clock face time; the clock face time is the zero moment of the system time; Synchronizing the clock face time to the real-time controllers of other slave computers except the host computer through the first switch.

9. The multi-lower computer collaborative hardware-in-the-loop simulation system based on PTP time synchronization as claimed in claim 8, wherein The clock face time refers to the startup time of the execution engine of the host computer.

10. The multi-lower computer collaborative hardware-in-the-loop simulation system based on PTP time synchronization as claimed in claim 8, wherein, If there is a main model, the host is the slave computer for the operation of the main model. If there is no main model, the host is an arbitrarily selected slave computer from among the multiple slave computers.

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