Data storage method and system based on RAID technology, and storage medium

Through RAID technology, the switching method of data blocks and verification blocks is optimized, which solves the problem of unbalanced wear of flash memory chips and improves the performance and service life of storage devices.

CN120295567AActive Publication Date: 2025-07-11SHENZHEN ORICO TECHNOLOGIES CO LTD
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Patent Information

Application Number
CN202510347565.5
Authority / Receiving Office
CN · China
Patent Type
Applications(China)
Current Assignee / Owner
Filing Date
2025-03-24
Publication Date
2025-07-11
Estimated Expiration
2045-03-24

AI Technical Summary

Technical Problem

Uneven wear between flash chips in storage devices, resulting in reduced performance and shortened service life.

Method used

By using RAID technology, the number of verification blocks is reasonably allocated by optimizing the replacement method of data blocks and verification blocks, and the flash memory chip is evenly distributed according to the wear level, optimizing the wear level of storage devices.

Benefits of technology

It improves the performance and service life of storage devices, ensures that the wear and wear of each flash memory chip is balanced, and extends the overall service life of the device.

✦ Generated by Eureka AI based on patent content.

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Abstract

The invention relates to the technical field of data storage, in particular to a data storage method, storage medium and system based on RAID (redundant array of independent disks) technology, and the method comprises the following steps: obtaining operation information of each data block and check block in each flash memory chip; determining a target exchange mode according to the operation information; and according to the target exchange mode, exchanging the verification block and the data block in the first stripe to obtain the exchanged data block and the exchanged verification block in the storage device. The target exchange mode is one of the r exchange modes, the wear degree of the storage device is the smallest, the wear degree of the storage device represents the wear degree of the storage device, the exchange mode represents mutual exchange of the data block and the verification block of any first strip, and each first strip comprises n-1 data blocks and one verification block. By exchanging and optimizing the distribution mode of the verification blocks and the data blocks, the wear degree of the storage device is ensured to be the lowest, and the performance and the service life of the storage device are improved.
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Description

Technical Field

[0001] The present invention relates to the technical field of data storage, and particularly relates to a data storage method, a storage medium and a system based on RAID technology. Background Art

[0002] Storage devices based on flash chips are widely used in various electronic devices due to their excellent read and write performance, large storage capacity and extremely low power consumption.

[0003] The storage device includes data blocks for storing user data and parity blocks for storing parity data. The data blocks and parity blocks in the storage device are stored in the form of stripes. When the user data stored in the storage device needs to be updated frequently, since updating any data block requires modifying the parity block of the stripe where the data block is located, the update frequency of the parity block is much higher than that of other data blocks, resulting in a higher wear level of the flash chip where the parity block is located than that of other flash chips, causing uneven wear among the flash chips inside the storage device, and ultimately affecting the performance and service life of the storage device. Summary of the Invention

[0004] In order to solve the technical problem of uneven wear among the flash chips inside the storage device, the purpose of the present invention is to provide a data storage method, a storage medium and a system based on RAID technology. The specific technical solutions adopted are as follows:

[0005] On the one hand, the present application provides a data storage method based on RAID technology, which is applied to a storage device. The storage device includes n flash chips, and each flash chip includes a plurality of data blocks and a plurality of parity blocks, where n is an integer greater than or equal to 2. The method includes: obtaining the operation information of each data block and parity block in each flash chip; determining the target swapping method according to the operation information; swapping the parity block and the data block in the first stripe according to the target swapping method to obtain the swapped data blocks and the swapped parity blocks in the storage device.

[0006] The target swapping method is the one with the smallest wear level of the storage device among r swapping methods. The wear level of the storage device represents the wear level of the storage device, and the swapping method represents the mutual swapping of the data block and the parity block of any first stripe. Each first stripe includes (n - 1) data blocks and one parity block, and r is the product of (n - 1) and x, where x is the number of first stripes, and x is an integer greater than or equal to 1;

[0007] The swapped data blocks are used to store user data, and the swapped parity blocks are used to store parity data.

[0008] In another possible example, the data storage method based on RAID technology further includes: determining the degree of association between a first data block and a second data block according to the operation information of the data blocks, where the first data block and the second data block are two different data blocks in the storage device; and determining a first stripe according to the first data block and the second data block when the degree of association between the first data block and the second data block is greater than or equal to a first threshold.

[0009] In another possible example, the degree of association between the first data block and the second data block is related to a first parameter and / or a second parameter. The first parameter represents the difference in the number of operations between the first data block and the second data block within a first time period, and the second parameter represents the sum of the time intervals between the respective operation times of the first data block and the corresponding operation times of the second data block within the first time period.

[0010] In another possible example, the data storage method based on RAID technology further includes: for any flash chip, determining the historical wear degree of the flash chip according to the operation information of the data blocks; and determining the number of parity blocks for each flash chip according to the total number of parity blocks of the storage device and the historical wear degree of each flash chip.

[0011] In another possible example, for any flash chip, the historical wear degree of the flash chip is the sum of the number of write and erase times of the full amount of data blocks and / or the full amount of parity blocks of the flash chip.

[0012] In another possible example, determining the number of parity blocks for each flash chip according to the total number of parity blocks of the storage device and the historical wear degree of each flash chip includes: for any flash chip, determining a parity block quantity parameter for the flash chip according to the historical wear degree of the flash chip; and determining the number of parity blocks for each flash chip according to the total number of parity blocks of the storage device and the parity block numerical parameter of each flash chip.

[0013] The parity block quantity parameter is related to a third parameter and / or a fourth parameter. The third parameter is the sum of the differences between the historical wear degree of any flash chip and the historical wear degrees of other flash chips; the fourth parameter is the maximum value among n third parameters.

[0014] In another possible example, the wear degree of the storage device is related to a fifth parameter and / or a sixth parameter. The fifth parameter is the sum of the differences between the predicted wear degree of each flash chip and the average value of the predicted wear degrees of n flash chips, and the sixth parameter is the maximum value among the predicted wear degrees of n flash chips.

[0015] In another possible example, for any flash memory chip, the predicted wear level of the flash memory chip is related to a seventh parameter and an eighth parameter. The seventh parameter is the sum of the write times and erase times of all data blocks and / or all parity blocks of the flash memory chip before the data block and the parity block are swapped. The eighth parameter is at least one of the write times, erase times, and modification times of the flash memory chip within a second time period after the data block and the parity block are swapped.

[0016] On the one hand, the present application provides a computer-readable storage medium, including a computer program or instruction. When the computer program or instruction runs on a computer, it causes the computer to execute the above data storage method based on the RAID technology.

[0017] On the one hand, the present application provides a data storage system based on the RAID technology, which is applied to a storage device. The storage device includes n flash memory chips. The system includes: a module for executing the above data storage method based on the RAID technology.

[0018] In summary, for a data storage method, storage medium, and system based on the RAID technology in the present application, by placing data blocks with a relatively high degree of association in the same first stripe, reasonably allocating the number of parity blocks for each flash memory chip, and reasonably swapping data blocks and parity blocks, and using the wear level of the storage device as a constraint, the distribution method of parity blocks and data blocks is optimized to ensure the lowest wear level of the storage device and the balanced wear of each flash memory chip, thereby improving the performance and service life of the storage device. BRIEF DESCRIPTION OF THE DRAWINGS

[0019] In order to more clearly illustrate the technical solutions and advantages in the embodiments of the present application or the prior art, the following will briefly introduce the drawings required for the description of the embodiments or the prior art. Obviously, the drawings in the following description are only some embodiments of the present application. For those of ordinary skill in the art, other drawings can be obtained based on these drawings without creative efforts.

[0020] Figure 1 Schematic diagram of a storage device provided by an embodiment of the present application;

[0021] Figure 2 Flowchart of a data storage method based on the RAID technology provided by an embodiment of the present application;

[0022] Figure 3 Block diagram of a data storage system based on the RAID technology provided by an embodiment of the present application. DETAILED DESCRIPTION OF THE EMBODIMENTS

[0023] To further elaborate on the technical means and effects adopted by this application to achieve the predetermined purpose, the following specifically describes, with reference to the accompanying drawings and preferred embodiments, a data storage method, storage medium, and system based on RAID technology proposed by this application, including its specific implementation manners, structures, features, and effects. In the following description, different "one embodiment" or "another embodiment" do not necessarily refer to the same embodiment. In addition, specific features, structures, or characteristics in one or more embodiments can be combined in any suitable form.

[0024] Unless otherwise defined, all technical and scientific terms used herein have the same meaning as commonly understood by those skilled in the technical field to which this application belongs.

[0025] The following specifically describes the specific solutions of a data storage method, storage medium, and system based on RAID technology provided by this application with reference to the accompanying drawings.

[0026] A data storage method based on RAID technology in an embodiment of this application is applied to a storage device.

[0027] Please refer to Figure 1 , which shows a schematic diagram of the storage device of this application.

[0028] As Figure 1 shown, the storage device 100 includes n flash memory chips. n is an integer greater than or equal to 2.

[0029] The storage device may include, for example, a solid-state drive.

[0030] A flash memory chip can also be understood as a channel. Each flash memory chip includes a plurality of basic storage units, namely flash memory cells.

[0031] The data stored in the storage device is actually stored in the flash memory cells. Here, the data includes user data and parity data.

[0032] User data refers to various information stored by users in the storage device, including documents, images, audio, programs, etc.

[0033] Parity data refers to additional data generated to ensure the accuracy and integrity of user data. Parity data is obtained by calculating user data through a specific algorithm.

[0034] Figure 1 The storage device shown in

[0035] Specifically, the storage device may apply RAID5 technology.

[0036] RAID5 is a striped storage method with distributed parity. Through RAID5 technology, user data and parity data can be distributed across multiple flash chips.

[0037] In Figure 1 the example, n takes the value of 5, that is, the storage device 100 includes flash chips 11-1 to flash chips 11-5. Each flash chip includes a number of data blocks and a parity block. In Figure 1 the example, D i represents a data block, and P j represents a parity block. Both i and j are integers greater than or equal to 0.

[0038] A data block refers to the basic unit for storing user data in the storage device, and a data block can occupy multiple flash cells.

[0039] A parity block refers to the basic unit for storing parity data in the storage device, and a parity block can occupy multiple flash cells.

[0040] In RAID5 technology, data blocks or parity blocks at the same position in each flash chip form a stripe, and there is one parity block in each stripe. Thus, each flash chip includes a number of data blocks and a number of parity blocks.

[0041] In Figure 1 the example, in the storage device, data blocks or parity blocks arranged at the front of 5 flash chips form stripe 12. Such a striped distribution can disperse data storage across multiple flash chips to improve data read / write speed and reduce the situation where some flash chips are frequently read / written with data, forming read / write hotspots and affecting the uniform distribution of data, etc.

[0042] In a possible embodiment, the storage device 100 may further include a controller 13.

[0043] The controller 13 can be used to perform control operations on the flash chips of the storage device.

[0044] For example, the controller 13 can be used to swap data blocks and parity blocks according to the method of the embodiment of the present application.

[0045] The following will detail a data storage method based on RAID technology provided by an embodiment of the present application.

[0046] Please refer to Figure 2 , the flowchart of the data storage method based on RAID technology provided by an embodiment of the present application.

[0047] As Figure 2As shown, the data storage method based on RAID technology according to the embodiments of the present application includes operations S210 to S230.

[0048] In operation S210, obtain the operation information of each data block and parity block in each flash chip.

[0049] Exemplarily, the operation information may include at least one of the number of write operations, the number of erase operations, and the number of modification operations.

[0050] A write operation refers to writing data into a flash cell. An erase operation refers to resetting the data stored in a flash cell. A modification operation refers to reading the original data in a flash cell and writing new data into another flash cell. Each modification operation includes a consecutive read operation and a write operation.

[0051] In a possible embodiment, the self-monitoring, analysis, and reporting technology (SMART) information of the storage device may include the operation information of each data block and parity block in each flash chip.

[0052] In operation S220, determine the target swapping method according to the operation information.

[0053] In the embodiments of the present application, the distribution of parity blocks and data blocks in a stripe is optimized by swapping the parity blocks and data blocks in the stripe. Here, the stripe can be any stripe in the storage device or can be understood as the first stripe.

[0054] In the storage device, each first stripe includes (n - 1) data blocks and one parity block. In each first stripe, the parity block and the data block can be swapped, so that a first stripe has (n - 1) swapping methods, and x flash chips have a total of r swapping methods. r is the product of (n - 1) and x. x is an integer greater than or equal to 1.

[0055] Each swapping method corresponds to a wear level of the storage device. In order to reduce the wear level of the storage device, the target swapping method with the minimum wear level of the storage device can be selected from the r swapping methods.

[0056] In operation S230, swap the parity block and the data block in the first stripe according to the target swapping method to obtain the swapped data block and the swapped parity block.

[0057] Swapping the parity block and the data block can be understood as: swapping the physical addresses of the data block and the parity block in the first stripe and updating the mapping table of the logical address and the physical address.

[0058] The target swapping method is the one with the least wear degree of the storage device among the r swapping methods. Therefore, swapping the parity block and the data block in the first stripe according to the target swapping method can reduce the wear degree of the storage device, improve the performance and service life of the storage device.

[0059] In some embodiments, the wear of the flash memory chip is reduced by reducing the number of parity blocks in the flash memory chip. However, on the one hand, this method will reduce the data reliability of the data blocks in the same stripe, and there is still a situation where the wear of the flash memory chip where the parity block is located is too high and the wear among the flash memory chips of the storage device is uneven.

[0060] In the embodiment of the present application, it is not necessary to reduce the number of parity blocks of the flash memory chip, so the accuracy of the data blocks in the same stripe can be guaranteed. In addition, in the embodiment of the present application, taking the wear degree of the storage device as a reference, and using the target swapping method with the least wear degree of the storage device to swap the parity block and the data block in the first stripe can optimize the distribution method of the parity block and the data block, ensure the lowest wear degree of the storage device, and thus improve the performance and service life of the storage device.

[0061] When there is a large amount of user data stored in the storage device and the user data is related, the user data may be stored in multiple stripes, and the operations between the related user data are also related.

[0062] For this reason, in an embodiment of the present application, the related data blocks in the storage device can be copied to a new stripe (the new stripe here is the first stripe). The multiple operations originally required for each of the related data blocks can be replaced by operations on the entire first stripe to reduce the operation overhead of the data blocks (the operation overhead of the data blocks includes data block addressing, parity block update, etc.) and the wear degree of the storage device.

[0063] Specifically, the data storage method based on the RAID technology in the embodiment of the present application may further include: determining the degree of association between a first data block and a second data block according to the operation information of the data block. And, when the degree of association between the first data block and the second data block is greater than or equal to a first threshold, determining the first stripe according to the first data block and the second data block.

[0064] The first data block and the second data block are two different data blocks in the storage device.

[0065] In a possible embodiment, the degree of association between the first data block and the second data block is related to a first parameter and / or a second parameter.

[0066] The first parameter represents the difference in the number of operations between the first data block and the second data block within a first time period.

[0067] The second parameter characterizes the sum of the time intervals between the operation times of each block of the first data block and the corresponding operation times of the second data block within the first time period.

[0068] The first time period can be a set time period before the current moment. For example, the first time period can be 48 hours before the current moment.

[0069] When the degree of association between the first data block and the second data block is related to the first parameter, the following formula (1) can be used to determine the degree of association Q between the first data block and the second data block i,j 。

[0070]

[0071] d i 、d j are the number of operations of the first data block and the second data block within the first time period respectively, i represents the i-th data block, and j represents the j-th data block. |d i -d j | is the absolute value of the difference in the number of operations of the first data block and the second data block within the first time period. The smaller the value of |d i -d j |, the more similar the operation frequencies of the first data block and the second data block within the first time period, the higher the degree of association between the first data block and the second data block, and the first data block and the second data block should be in the same first stripe.

[0072] When the degree of association between the first data block and the second data block is related to the second parameter, the following formula (2) can be used to determine the degree of association Q between the first data block and the second data block i,j 。

[0073]

[0074] t i,m,j is the time interval between the m-th operation time of the first data block and the corresponding operation time of the second data block within the first time period. Here, "corresponding" can be understood as within the first time period, the operation time of the m-th operation of the first data block is closest to the operation time of a certain operation of the second data block. is the sum of the time intervals between the operation times of each block of the first data block and the corresponding operation times of the second data block within the first time period, the smaller the value of, the more similar the operation times of the first data block and the second data block within the first time period, the higher the degree of association between the first data block and the second data block, and the first data block and the second data block should be in the same first stripe.

[0075] When the degree of association between the first data block and the second data block is related to both the first parameter and the second parameter, the following formula (3) can be used to determine the degree of association Q between the first data block and the second data block i,j .

[0076]

[0077] In a possible embodiment, the degree of association Q calculated through the above formulas (1) to (3) can also be i,j normalized to obtain q i,j , and q i,j can be compared with a first threshold to determine whether the first data block and the second data block are used as the two data blocks of the first stripe.

[0078] Exemplarily, the sigmoid function can be used to normalize the degree of association Q between the first data block and the second data block i,j to obtain q i,j .

[0079] The value range of q i,j is (0, 1). The first threshold can take a value greater than 0 and less than 1.

[0080] Exemplarily, the first threshold can take the value 0.8.

[0081] In summary, in the embodiments of the present application, the first data block and the second data block with a higher degree of association can be copied and placed in the first stripe to increase the possibility of operating on the entire stripe, reduce the number of operations of the storage device, and extend the service life of the storage device.

[0082] The storage device includes n flash memory chips, and the wear degree of each flash memory chip affects the service life of the storage device. To improve the service life of the storage device, the wear degrees of the respective flash memory chips need to be more balanced.

[0083] The parity block is the one with the highest update frequency in the first stripe, and the parity block is also a factor affecting the wear degree of the flash memory chip.

[0084] Therefore, in an embodiment of the present application, by reasonably allocating the number of parity blocks to each flash memory chip, it is possible to prevent the flash memory chips where some parity blocks with a higher update frequency are located from reaching their life cycles faster and affecting the service life of the storage device. That is, in the embodiments of the present application, the wear degrees between the respective flash memory chips can be made more balanced, improving the performance and service life of the solid-state drive.

[0085] Specifically, the data storage method based on the RAID technology according to the embodiments of the present application may further include: for any flash chip, determining the historical wear degree of the flash chip according to the operation information of the data block. And, determining the number of parity blocks of each flash chip according to the total number of parity blocks of the storage device and the historical wear degree of each flash chip.

[0086] Thus, among the n flash chips of the storage device, the flash chips with a lower historical wear degree can be allocated more parity blocks, and the flash chips with a higher historical wear degree can be allocated fewer parity blocks. This can make the wear degrees among the flash chips of the storage device more balanced and improve the service life of the storage device.

[0087] Flash chips are used to store and update user data and parity data. Therefore, it is more accurate to use the number of operations of user data and / or parity data in the flash chip as an evaluation of the wear degree of the flash chip. The number of operations here may include: the number of writes and the number of erases.

[0088] Therefore, in a possible embodiment, for any flash chip, the historical wear degree of the flash chip is the sum of the number of writes and the number of erases of all data blocks and / or all parity blocks of the flash chip.

[0089] Taking the storage device including n flash chips, where one flash chip n i includes e1 data blocks and e2 parity blocks as an example, for n i , the historical wear degree of the flash chip is the sum of the number of writes and the number of erases of e1 data blocks, or the historical wear degree of the flash chip is the sum of the number of writes and the number of erases of e2 parity blocks, or the predicted wear degree of the flash chip is the sum of the number of writes and the number of erases of both e1 data blocks and e2 parity blocks.

[0090] In a possible embodiment, for example, it can be implemented by the following embodiment: a specific example of determining the number of parity blocks of each flash chip according to the total number of parity blocks of the storage device and the historical wear degree of each flash chip:

[0091] For any flash chip, determining the parity block quantity parameter of the flash chip according to the historical wear degree of the flash chip. And, determining the number of parity blocks of each flash chip according to the total number of parity blocks of the storage device and the parity block numerical parameter of each flash chip.

[0092] The parity block quantity parameter is related to the third parameter and / or the fourth parameter.

[0093] The third parameter is the sum of the differences between the historical wear levels of any one flash memory chip and those of the other flash memory chips. In the case where the storage device includes n flash memory chips, the storage device corresponds to n third parameters.

[0094] The fourth parameter is the maximum value among the n third parameters.

[0095] When the check block quantity parameter is related to the third parameter, the following formula (4) can be used to determine the check block quantity parameter W of the k-th flash memory chip k .

[0096]

[0097] s p and s k are respectively the historical wear levels of the p-th flash memory chip and the k-th flash memory chip. n is the number of flash memory chips in the storage device. is the sum of the differences between the historical wear level of the p-th flash memory chip and the historical wear levels of the other flash memory chips.

[0098] When the check block quantity parameter is related to the fourth parameter, the following formula (5) can be used to determine the check block quantity parameter W of the k-th flash memory chip k .

[0099]

[0100] It can be understood that the third parameter, that is is the sum of the differences between the historical wear level of the p-th flash memory chip and the historical wear levels of the other flash memory chips. The storage device includes n flash memory chips, and each flash memory chip corresponds to a third parameter. Then, the n flash memory chips correspond to n third parameters. It can also be understood that the value of p ranges from 1 to n, thus generating n third parameters. The fourth parameter, that is is the maximum value among the n third parameters.

[0101] When the check block quantity parameter is related to both the third parameter and the fourth parameter, the following formula (6) can be used to determine the check block quantity parameter W of the k-th flash memory chip k .

[0102]

[0103] The larger the value of

[0104] the smaller the historical wear level of the k-th flash memory chip in the storage device compared to those of the other flash memory chips, and the more check blocks it can receive.In the embodiments of the present application, the check block numerical parameters of each flash memory chip can be used as the ratio for allocating the number of check blocks to the flash memory chips. Thus, the number of check blocks for each flash memory chip is determined according to the check block numerical parameters and the total number of check blocks of the storage device.

[0105] In summary, in the embodiments of the present application, the number of check blocks can be reasonably allocated to each flash memory chip to ensure that the historical wear degrees of the flash memory chips among the n flash memory chips of the storage device are more balanced, so as to improve the service life of the storage device.

[0106] In a possible embodiment, the wear degree of the storage device is related to a fifth parameter and / or a sixth parameter.

[0107] In a possible embodiment, by swapping parameters, a target swapping method can be determined from r swapping methods. For any swapping method, the swapping parameter characterizes the rationality degree of the swapping method.

[0108] Exemplarily, the swapping parameter is negatively correlated with the wear degree of the storage device. For example, the swapping parameter is inversely proportional to the wear degree of the storage device.

[0109] The fifth parameter is the sum of the differences between the predicted wear degree of each flash memory chip and the average value of the predicted wear degrees of the n flash memory chips.

[0110] The sixth parameter is the maximum value among the predicted wear degrees of the n flash memory chips.

[0111] When the swapping parameter is related to the fifth parameter, the following formula (7) can be used to determine the fifth parameter f of the c-th swapping method c , and the following formula (8) can be used to determine the swapping parameter G of the c-th swapping method c .

[0112]

[0113] b a is the predicted wear degree of the a-th flash memory chip, is the average value of the predicted wear degrees of the n flash memory chips in the storage device. n is the number of flash memory chips in the storage device.

[0114] characterizes the uniformity degree of the predicted wear degrees of the n flash memory chips in the storage device, the smaller the value of, the more uniform the predicted wear degrees of the n flash memory chips are, which is more beneficial to extending the service life of the storage device.

[0115] When the check block number parameter is related to the sixth parameter, the following formula (9) can be used to determine the sixth parameter f of the c-th swapping method c, formula (10) can be used to determine the swapping parameter G of the c-th swapping method c .

[0116] f c = max{b a}} (9)

[0117]

[0118] The above max{b a}} is the maximum value among the predicted wear levels of n flash memory chips.

[0119] Since the entire storage device will be phased out when the wear of a single flash memory chip reaches the maximum, max{b a}} is related to the overall wear level of the storage device. The smaller the value of max{b a}}, the smaller the overall wear level of the storage device, and the longer the service life of the storage device.

[0120] In the case where the swapping parameter is related to the fifth parameter and the sixth parameter, the following formula (11) can be used to determine the sixth parameter f of the c-th swapping method c , and formula (12) can be used to determine the swapping parameter G of the c-th swapping method c .

[0121]

[0122] In a possible embodiment, for any flash memory chip, the predicted wear level of the flash memory chip can be the same as the historical wear level of the flash memory chip.

[0123] In a possible embodiment, for any flash memory chip, the predicted wear level of the flash memory chip can be related to the seventh parameter and the eighth parameter. For example, the predicted wear level of the flash memory chip can be the sum of the seventh parameter and the eighth parameter.

[0124] The seventh parameter is the sum of the write times and erase times of all data blocks and / or all parity blocks of the flash memory chip before the data block and parity block are swapped.

[0125] The seventh parameter can be understood as: for any swapping method, the swapping method indicates that in any one of the first stripes, a parity block is swapped with one of the data blocks. According to this swapping method, before the swap of any flash memory chip, the sum of the write times and erase times of all data blocks and / or all parity blocks of the flash memory chip.

[0126] The eighth parameter is at least one of the write times, erase times, and modification times of the flash memory chip within the second time period after the data block and parity block are swapped.

[0127] The eighth parameter can be understood as follows: for any swapping method, the swapping method indicates that in any one of the first stripes, a parity block is swapped with one of the data blocks. According to this swapping method, for any flash memory chip after swapping, at least one of the number of write operations, the number of erase operations, and the number of modification operations of the flash memory chip within the second time period.

[0128] The second time period can be the same as or different from the first time period.

[0129] In the case where the storage device needs to frequently write user data, the eighth parameter can be the number of write operations of the flash memory chip within the second time period after the data block and the parity block are swapped.

[0130] In the case where the storage device needs to frequently write user data and delete user data, the eighth parameter can be the sum of the number of write operations and the number of erase operations of the flash memory chip within the second time period after the data block and the parity block are swapped.

[0131] Other cases of the eighth parameter are similar to the above cases and will not be elaborated here.

[0132] In the embodiments of the present application, the seventh parameter can be understood as a parameter for evaluating the historical operations of the flash memory chip before swapping, and can also be used to evaluate the historical wear degree of the flash memory chip. The eighth parameter can be understood as the wear degree of the flash memory chip after swapping in a relatively recent period of time. Therefore, it will be more accurate to determine the third wear parameter and then determine the swapping parameter by combining the seventh parameter and the eighth parameter.

[0133] In summary, the above embodiments of the present application can determine the target swapping method. For example, an instruction indicating the target swapping method can also be sent to the controller of the storage device, so that the data blocks and parity blocks in the storage device can be swapped according to the target swapping method. The swapped data blocks can be used to store user data, and the swapped parity blocks can be used to store parity data. Thus, the wear degrees of the respective flash memory chips of the storage device are more balanced, and the performance and service life of the storage device can be improved.

[0134] As Figure 3 shown, the embodiments of the present application also provide a block diagram of a data storage system based on RAID technology.

[0135] The data storage system based on RAID technology can be applied to a storage device. The storage device includes n flash memory chips, and each flash memory chip includes a plurality of data blocks and a plurality of parity blocks.

[0136] The data storage system based on RAID technology can include: a first module 310, a second module 320, and a third module 330.

[0137] The first module is used to obtain the operation information of each data block and parity block in each flash memory chip.

[0138] The second module is used to determine the target swapping method according to the operation information.

[0139] The target swapping method is the one with the least wear degree of the storage device among r swapping methods. The wear degree of the storage device represents the wear degree of the storage device, and the swapping method represents that the data blocks and parity blocks of any first stripe are swapped with each other. Each first stripe includes (n - 1) data blocks and one parity block. r is the product of (n - 1) and x, where x is the number of first stripes, and x is an integer greater than or equal to 1.

[0140] The third module is used to swap the parity block and data block in the first stripe according to the target swapping method to obtain the swapped data block and swapped parity block in the storage device.

[0141] The swapped data block is used to store user data, and the swapped parity block is used to store parity data.

[0142] An embodiment of the present application further provides an electronic device, including a storage device and a processor. The storage device is used to store executable program code, and the processor can be used to call and run the executable program code from the storage device, so that the electronic device executes the above data storage method based on the RAID technology.

[0143] The processor can send an instruction indicating the target swapping method to the controller of the storage device, so that the storage device can swap the data block and parity block with each other according to the target swapping method.

[0144] In other embodiments, a computer program product is further provided. When the computer program product runs on an electronic device such as a computer, the electronic device is enabled to execute the above related steps to implement a visual recognition method for water supply and drainage pipeline maintenance provided in the above embodiment.

[0145] In other embodiments, a computer-readable storage medium is further provided. The computer-readable storage medium stores computer program code. When the computer program code runs on a computer, the computer is enabled to execute the above related method steps to implement the data storage method based on the RAID technology provided in the above embodiment.

[0146] Among them, the provided system, device, computer program product, and computer-readable storage medium are all used to execute the data storage method based on the RAID technology provided above. Therefore, the beneficial effects that can be achieved can refer to the beneficial effects in the data storage method based on the RAID technology provided above, and will not be elaborated here.

[0147] It should be noted that the above order of the embodiments of the present application is only for description and does not represent the superiority or inferiority of the embodiments. The processes depicted in the drawings do not necessarily require the specific order or continuous order shown to achieve the desired results. In some embodiments, multitasking and parallel processing are also possible or may be advantageous.

[0148] Each embodiment in this specification is described in a progressive manner. For the same or similar parts among the embodiments, reference can be made to each other. The key point of each embodiment is to illustrate the differences from other embodiments.

Claims

1. A data storage method based on RAID technology, characterized in that, Applied to a storage device, the storage device includes n flash memory chips, each flash memory chip includes a plurality of data blocks and a plurality of parity blocks, n is an integer greater than or equal to 2, and the method includes: Obtain the operation information of each data block and parity block in each of the flash memory chips; According to the operation information, determine a target swapping method, which is the one with the smallest wear degree of the storage device among r swapping methods. The wear degree of the storage device represents the wear degree of the storage device, and the swapping method represents that the data blocks and parity blocks of any one of the first stripes are swapped with each other. Each of the first stripes includes (n - 1) data blocks and one parity block. r is the product of (n - 1) and x, where x is the number of the first stripes, and x is an integer greater than or equal to 1; According to the target swapping method, swap the parity blocks and data blocks in the first stripe to obtain the swapped data blocks and swapped parity blocks in the storage device. The swapped data blocks are used to store user data, and the swapped parity blocks are used to store parity data.

2. The data storage method based on RAID technology according to claim 1, characterized in that The method further includes: According to the operation information of the data blocks, determine the association degree between a first data block and a second data block, where the first data block and the second data block are two different data blocks in the storage device; When the association degree between the first data block and the second data block is greater than or equal to a first threshold, determine the first stripe according to the first data block and the second data block.

3. The data storage method based on RAID technology according to claim 2, wherein, The association degree between the first data block and the second data block is related to a first parameter and / or a second parameter. The first parameter represents the difference in the number of operations between the first data block and the second data block within a first time period, and the second parameter represents the sum of the time intervals between the respective operation times of the first data block and the corresponding operation times of the second data block within the first time period.

4. The data storage method based on RAID technology according to claim 1, characterized in that The method further includes: For any one of the flash memory chips, determine the historical wear degree of the flash memory chip according to the operation information of the data blocks; According to the total number of parity blocks of the storage device and the historical wear degree of each flash memory chip, determine the number of parity blocks of each flash memory chip.

5. The data storage method based on the RAID technology according to claim 4, wherein For any one of the flash memory chips, the historical wear degree of the flash memory chip is the sum of the write times and erase times of all the data blocks and / or all the parity blocks of the flash memory chip.

6. The data storage method based on RAID technology according to claim 4 or 5, characterized in that The step of determining the number of parity blocks of each flash memory chip according to the total number of parity blocks of the storage device and the historical wear degree of each flash memory chip includes: For any one of the flash memory chips, determine a parity block quantity parameter of the flash memory chip according to the historical wear degree of the flash memory chip. The parity block quantity parameter is related to a third parameter and / or a fourth parameter. The third parameter is the sum of the differences between the historical wear degree of any one of the flash memory chips and the historical wear degrees of other flash memory chips; the fourth parameter is the maximum value among the n third parameters; Determine the number of parity blocks of each flash memory chip according to the total number of parity blocks of the storage device and the parity block numerical parameters of each flash memory chip.

7. The data storage method based on RAID technology according to claim 1, characterized in that, The wear level of the storage device is related to a fifth parameter and / or a sixth parameter. The fifth parameter is the sum of the differences between the predicted wear levels of each flash memory chip and the average predicted wear level of n flash memory chips. The sixth parameter is the maximum value among the predicted wear levels of n flash memory chips.

8. The data storage method based on RAID technology according to claim 7, characterized in that, For any flash memory chip, the predicted wear level of the flash memory chip is related to a seventh parameter and an eighth parameter. The seventh parameter is the sum of the write times and erase times of all data blocks and / or all parity blocks of the flash memory chip before the data block and the parity block are swapped. The eighth parameter is at least one of the write times, erase times, and modification times of the flash memory chip within a second time period after the data block and the parity block are swapped.

9. A computer-readable storage medium, characterized in that, Comprising a computer program or instruction, when the computer program or instruction runs on a computer, enabling the computer to execute the RAID technology-based data storage method according to any one of claims 1-8.

10. A data storage system based on RAID technology, characterized in that, Applied to a storage device, the storage device includes n flash memory chips, and the system includes: a module for executing the RAID technology-based data storage method according to any one of claims 1-8.

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