Computer system, computing node and switching node

Abstract

The invention discloses a computer system, computing nodes and switching nodes, and relates to the technical field of computers, a server cabinet comprises a plurality of computing nodes, a plurality of switching nodes and a plurality of independent cable assemblies, and each cable assembly forms an independent connection channel between the computing node and the switching node. One computing node comprises a plurality of module interfaces and a plurality of first connectors, the plurality of module interfaces of the computing node are used for connecting a plurality of accelerator modules, and one switching node comprises a plurality of second connectors. One cable assembly corresponds to a part of the accelerator module connected with each computing node, a part of the first connector of each computing node and a part of the second connector of each switching node; wherein in one cable assembly, the first connector of the computing node and the second connector of the switching node are interconnected through a communication link according to the matching relation of M: N, and the first connector of the computing node and the accelerator module connected with the first connector are interconnected through the communication link.

Description

Technical Field

[0001] This application relates to the field of computer technologies, and in particular, to a computer system, a computing node, and a switching node. Background Art

[0002] In the related art, multiple computing nodes (i.e., computing server nodes) equipped with accelerator modules such as OAM (Open Accelerator Module) cards can be used. Through a switching node as a data link relay and adopting a specific physical connection form, full interconnection of data between each accelerator module can be achieved, and each node can be integrated into the same cabinet to provide centralized power supply and centralized heat dissipation, thereby obtaining a computer system.

[0003] In a computer system, connectors are provided in both the computing node and the switching node. The computing node and each switching node adopt a certain connection topology for cable connection. The computing node includes several accelerator modules and is externally provided with multiple connectors. A connection design in the related art is that all signals of each accelerator module are connected to the same connector of the computing node. Therefore, each connector only includes all signals of one accelerator module.

[0004] However, since a certain accelerator module of all computing nodes is connected to the connector at the same position of the computing node and then connected to the same switching node through a cable assembly. Therefore, in the architecture design, each switching node is connected to all signals of a certain accelerator module of all computing nodes. If one switching node fails, all connections of a certain accelerator module of all computing nodes will be disconnected. It can be seen that the computer system in the related art has problems of low redundancy and poor reliability. Summary of the Invention

[0005] This application provides a computer system, a computing node, and a switching node to at least solve the problems of low redundancy and poor reliability existing in the server cabinet in the related art.

[0006] According to one aspect of the embodiments of the present application, a computer system is provided, including: a plurality of computing nodes, a plurality of switching nodes, and a plurality of independent cable assemblies. Each cable assembly forms an independent connection channel between the computing node and the switching node. One computing node includes a plurality of module interfaces and a plurality of first connectors. The plurality of module interfaces of the computing node are used to connect a plurality of accelerator modules. One switching node includes a plurality of second connectors. One cable assembly corresponds to a part of the accelerator modules connected to each computing node, a part of the first connectors of each computing node, and a part of the second connectors of each switching node; wherein, within one cable assembly, the first connectors of the computing node and the second connectors of the switching node are interconnected through a communication link according to an M:N ratio relationship, and the first connectors of one computing node and the connected accelerator modules are interconnected through a communication link, where M is the number of second connectors connected by one first connector, N is the number of first connectors connected by one second connector, M is a positive integer greater than or equal to 2, and N is a positive integer greater than or equal to 2.

[0007] According to one aspect of the embodiments of the present application, a computing node is further provided, which is applied to a computer system. The computing node establishes a plurality of independent connection channels with the switching nodes of the computer system through a plurality of independent cable assemblies of the computer system. The computing node includes a plurality of module interfaces and a plurality of first connectors. The plurality of module interfaces of the computing node are used to connect a plurality of accelerator modules. One cable assembly corresponds to a part of the accelerator modules and a part of the first connectors of the computing node; wherein, within one cable assembly, the first connectors of the computing node are interconnected with the second connectors of the switching node through a communication link according to an M:N ratio relationship, and the accelerator modules connected to the computing node and the first connectors are interconnected through a communication link, where M is the number of second connectors connected by one first connector, N is the number of first connectors connected by one second connector, M is a positive integer greater than or equal to 2, and N is a positive integer greater than or equal to 2.

[0008] According to one aspect of the embodiments of the present application, there is also provided a switching node, which is applied to a computer system. The switching node establishes a plurality of independent connection channels with computing nodes of the computer system through a plurality of independent cable assemblies of the computer system. The switching node includes a plurality of second connectors, and one of the cable assemblies corresponds to some of the second connectors of the switching node. Wherein, within one of the cable assemblies, the second connectors of the switching node are interconnected with the first connectors of the computing nodes through a communication link according to an M:N ratio relationship, where M is the number of second connectors connected to one first connector, N is the number of first connectors connected to one second connector, M is a positive integer greater than or equal to 2, and N is a positive integer greater than or equal to 2.

[0009] Through the present application, since a plurality of independent cable assemblies are provided in the computer system, and independent connection channels are formed between the computing nodes and the switching node through each independent cable assembly, and one cable assembly corresponds to some accelerator modules and some first connectors of each computing node, and some second connectors of each switching node. The setting of the above independent cable assemblies can reduce the possibility of the entire switching node failing. And within one cable assembly, the accelerator modules and the first connectors of the same computing node are interconnected through a communication link, and there is a one-to-many or many-to-many ratio relationship between the first connectors of the computing nodes and the second connectors of the switching node, that is, one connector of the computing node is connected to at least two connectors of the switching node, which can avoid the situation that all connections of a certain accelerator module are disconnected due to the failure of one connector of the switching node. Therefore, the technical effects of improving the redundancy and reliability of the computer system can be achieved, and further solve the technical problems of low redundancy and poor reliability existing in the computer system in the related art. BRIEF DESCRIPTION OF THE DRAWINGS

[0010] In order to more clearly illustrate the embodiments of the present application, the drawings required for use in the embodiments will be briefly introduced below. Obviously, the drawings in the following description are only some embodiments of the present application. For those of ordinary skill in the art, other drawings can be obtained based on these drawings without creative efforts.

[0011] Figure 1 It is a schematic diagram of an optional computer system according to an embodiment of the present application.

[0012] Figure 2 It is a schematic diagram of another optional computer system according to an embodiment of the present application.

[0013] Figure 3 It is a schematic diagram of yet another optional computer system according to an embodiment of the present application.

[0014] Figure 4 It is a block diagram of an optional computer system according to an embodiment of the present application.

[0015] Figure 5 It is a schematic diagram of another optional computer system according to an embodiment of the present application.

[0016] Figure 6 It is a schematic diagram of another optional computer system according to an embodiment of the present application.

[0017] Figure 7 It is a schematic diagram of another optional computer system according to an embodiment of the present application.

[0018] Figure 8 It is a schematic diagram of another optional computer system according to an embodiment of the present application.

[0019] Figure 9 It is a schematic diagram of another optional computer system according to an embodiment of the present application.

[0020] Figure 10 It is a schematic diagram of another optional computer system according to an embodiment of the present application.

[0021] Figure 11 It is a schematic diagram of another optional computer system according to an embodiment of the present application.

[0022] Figure 12 It is a schematic diagram of another optional computer system according to an embodiment of the present application.

[0023] Figure 13 It is a schematic diagram of another optional computer system according to an embodiment of the present application.

[0024] Figure 14 It is a schematic diagram of another optional computer system according to an embodiment of the present application.

[0025] Figure 15 It is a schematic diagram of another optional computer system according to an embodiment of the present application.

[0026] Figure 16 It is a schematic diagram of another optional computer system according to an embodiment of the present application.

[0027] Figure 17 It is a schematic diagram of another optional computer system according to an embodiment of the present application.

[0028] Figure 18 It is a schematic diagram of another optional computer system according to an embodiment of the present application.

[0029] Figure 19It is a structural block diagram of an optional computing node according to an embodiment of the present application.

[0030] Figure 20 It is a structural block diagram of an optional switching node according to an embodiment of the present application. Detailed implementation manners

[0031] Next, the technical solutions in the embodiments of the present application will be clearly and completely described in conjunction with the accompanying drawings in the embodiments of the present application. Obviously, the described embodiments are only a part of the embodiments of the present application, rather than all the embodiments. Based on the embodiments in the present application, all other embodiments obtained by those of ordinary skill in the art without creative efforts belong to the protection scope of the present application.

[0032] It should be noted that in the description of the present application, the terms "include", "comprise" or any other variant thereof are intended to cover non-exclusive inclusion, so that a process, method, article or device including a series of elements not only includes those elements, but also includes other elements not expressly listed, or further includes elements inherent to such process, method, article or device. The terms "first", "second", etc. in the present application are used to distinguish similar objects, rather than to describe a specific order or sequence.

[0033] According to one aspect of the embodiments of the present application, a computer system is provided. The computer system in this embodiment can be applied in the field of computer technology and can be applied to the process of AI (Artificial Intelligence) model training and inference. In this scenario, the computer system can be a server cabinet. For example, an AI all-in-one cabinet server (or an AI all-in-one cabinet).

[0034] Taking the AI all-in-one cabinet server as an example, with the increasing development of artificial intelligence, AI large models emerge in an endless stream. The AI all-in-one cabinet server can be the basis for AI model training and inference. In the AI all-in-one cabinet server, multiple computing nodes (computing server nodes) equipped with accelerator modules can be used as data link relays through a switching node (switch), and in a specific physical connection form, full interconnection of data can be achieved between each computing node, and each node can be integrated in the same cabinet to facilitate centralized power supply and centralized heat dissipation. Among them, the interconnection between the computing node and the switching node can have various physical forms. For example, orthogonal backplane-free connection or cable connection, etc. In this embodiment, the cable assembly connection method can be adopted.

[0035] Here, the accelerator module can improve computing performance, optimize data transmission, reduce power consumption, support large-scale cluster deployment, improve system flexibility, and optimize inference efficiency. It is a key component of the computing node. The accelerator module can be any hardware module that can improve the performance of specific computing tasks. For example, OAM (Open Accelerator Module), and the type of OAM can be selected according to needs. It can be, but is not limited to, FPGA (Field-Programmable Gate Array), ASIC (Application-Specific Integrated Circuit), GPU (Graphics Processing Unit), etc. The switching node can also be referred to as a switching unit, switch, etc. The cable assembly is a component used to connect different nodes in the server cabinet. For example, cable tray, and it can also be other similar components with the function of supporting and managing cables. Each cable can be understood as a communication link between two endpoints (for example, the connectors of the computing node and the switching node).

[0036] For example, taking the accelerator module as a GPU and the cable assembly as a cable tray, the AI all-in-one cabinet server can integrate multiple computing nodes and switching nodes equipped with GPU cards (OAM cards) in the same cabinet, and provide a server cabinet with centralized power supply and centralized heat dissipation. The interconnection between the computing nodes and the switch can adopt the connection method of cable tray cables.

[0037] As Figure 1 shown, Figure 1 shows a server cabinet design in the related technology. The server cabinet includes 8 computing nodes on the upper and lower sides respectively, and 12 switching nodes arranged in the middle. High-speed connectors are set in both the computing nodes and the switching nodes, and a certain connection topology is adopted between the computing nodes and each switching node for cable connection. For example, the first connector on the left side of computing node 1 (i.e., 1.1) is connected to the first connector on the left side of switching node 1. The second connector on the left side of computing node 1 (i.e., 1.2) is connected to the first connector of switching node 2.

[0038] It should be noted that Figure 1 the connectors in Figure 1The numbers in it are only for more intuitively showing the connection relationships of the connectors in the computing nodes and the switching nodes. The numbers of the connectors can be used to distinguish different connectors within the same node and can also identify the proximity relationships between different connectors. In actual scenarios, the above numbers may not exist on the connectors.

[0039] A computing node includes several OAM modules and externally sets multiple first connectors. Figure 2 shows Figure 1 A design inside the computing node of the whole cabinet design shown in. In this design, the signals of each OAM module are all connected to one connector. Therefore, each connector only includes all the signals of one OAM module. The redundancy of this design is 0 and the reliability is low. This is because each OAM module of the computing node will be connected to the connector at the same position of this computing node and then connected to the same (one) switching node through the cable tray. Therefore, in the architecture design, each switching node is connected to all the signals of the specific OAM module of all computing nodes. If one switching node fails, all the connections of the specific OAM (such as OAM_A) of all computing nodes will be cut off. In this design, the wiring inside the computing node may be relatively smooth, but the OAM modules inside a single computing node cannot be interconnected within the board through the switching node. The overall architecture is too poor, the redundancy is too low, and the reliability is poor.

[0040] To improve the redundancy of the server cabinet, the signals of the accelerator modules can be evenly distributed to all the connectors. A design inside the computing node can be as Figure 3 shown. The signals of each OAM module are evenly distributed to all the connectors, and each connector includes the signals of each OAM module in this computing node. For example, for Figure 2 connector 1 in, it includes 1 / 4 of the signals of OAM_A, 1 / 4 of the signals of OAM_B, 1 / 4 of the signals of OAM_C, and 1 / 4 of the signals of OAM_D.

[0041] This design has extremely high redundancy and high reliability, and realizes the full interconnection of each OAM module of each computing node. Even if multiple switching nodes fail, the full interconnection between the OAM modules of each computing node can still be achieved when only one switching node remains. Or when multiple connectors in a single computing node fail and only one connector can be used, the full interconnection can also be achieved. This design architecture can realize the cross-board interconnection of the OAM modules inside a single computing node through the switching node, can achieve full interconnection, and has extremely high reliability. However, the wiring of the OAM modules inside the computing node crosses severely, and the design requirements for the computing node are high.

[0042] It can be seen that in the architecture where server cabinets are interconnected through cable assemblies, when designing computing nodes, the design of computing nodes may be too complex, or the design of computing nodes may not meet the requirements of full interconnection of each OAM module in the cabinet and has low reliability. In addition, for similar computer systems including computing nodes and switching nodes, the above problems also exist.

[0043] In order to at least partially solve the above technical problems, in this embodiment, a grouped computer system is proposed. A plurality of independent cable assemblies are provided in the cabinet, and the first connector and the second connector are interconnected in their respective corresponding independent cable assemblies in a specified ratio relationship. Through reasonable ratio relationship and connection relationship design, redundant design of signals can be achieved in each cable assembly, thereby solving the above technical problems.

[0044] Optionally, in this embodiment, as Figure 4 shown, the above computer system may include: a plurality of computing nodes 401, a plurality of switching nodes 402, and a plurality of independent cable assemblies 403. Each cable assembly 403 forms an independent connection channel between the computing node 401 and the switching node 402. A computing node 401 includes a plurality of module interfaces 4011 and a plurality of first connectors 4012. The plurality of module interfaces 4011 of the computing node 401 are used to connect a plurality of accelerator modules. A switching node 402 includes a plurality of second connectors 4021. A part of the accelerator modules connected to each computing node 401, a part of the first connectors 4012 of each computing node 401, and a part of the second connectors 4021 of each switching node 402 in a cable assembly 403 correspond; wherein, within a cable assembly 403, the first connector 4012 of the computing node 401 and the second connector 4021 of the switching node 402 are interconnected through a communication link in an M:N ratio relationship. The first connector 4012 of a computing node 401 and the connected accelerator modules are interconnected through a communication link. Here, M is the number of second connectors 4021 connected to a first connector 4012, N is the number of first connectors 4012 connected to a second connector 4021, M is a positive integer greater than or equal to 2, and N is a positive integer greater than or equal to 2.

[0045] Inside the computing node, there are multiple accelerator modules (connected through the module interfaces of the computing node) and multiple first connectors. Here, let the number of accelerator modules in a computing node be X and the number of first connectors be Y. The number of accelerator modules is the most basic setting and can be determined according to the initial business requirements, which is the initial condition. The number of first connectors can be determined according to the design ratio of the computing node to the switching node during the initial design, and can also be adjusted according to the size of the connector, the number of pins, etc. The reduction in the number needs to be reduced according to different ratios.

[0046] When X is less than Y, each first connector needs to contain more than 1 signal of the accelerator module, and each first connector contains at most X signals of the accelerator module. When X is greater than or equal to Y, each first connector contains at least 1 signal of the accelerator module, and each first connector contains at most X signals of the accelerator module. Therefore, regardless of the relationship between X and Y, each first connector contains at least 1 signal of the accelerator module and at most X signals of the accelerator module. For example, as Figure 5 shown, Figure 5 illustrates the optional connection methods between the accelerator module and the first connector in different corresponding relationships. In addition, when each first connector corresponds to a specific number of OAM modules, there are also various connection methods for the connection relationship between each first connector and the OAM module, as Figure 6 shown.

[0047] In this embodiment, the computer system includes a plurality of independent cable assemblies. Each independent cable assembly can form an independent connection channel between the computing node and the switching node, and one cable assembly corresponds to some accelerator modules and some first connectors of each computing node, and some second connectors of each switching node. The first connectors and second connectors corresponding to different cable assemblies are different. The accelerator modules of different cable assemblies can be different or the same. For the case where different cable assemblies correspond to the same accelerator module, different cable assemblies correspond to different sets of pins of the same accelerator module.

[0048] For a computing node, the accelerator modules and first connectors in the computing node can be grouped according to the number of cable assemblies (K, where K is a positive integer greater than or equal to 2), and the grouping of the accelerator modules, the grouping of the first connectors, and the cable assemblies are in one-to-one correspondence. Since the number of cable assemblies is at least two, the number of groups of the accelerator modules and the number of groups of the first connectors are also at least two.

[0049] For example, as Figure 7As shown, there are two independent cable assemblies. There are 3 OAM modules and 6 first connectors in the computing node. Here, the first connectors and the OAM modules can both be divided into two groups, and each group corresponds to an independent cable assembly respectively. In the first group (the left group), CON_1 includes 1 / 2 of the signals of OAM_A, CON_2 includes 1 / 4 of the signals of OAM_B, and CON_3 includes 1 / 2 of the signals of OAM_A plus 1 / 4 of the signals of OAM_B. In the second group (the right group), CON_4 includes 1 / 2 of the signals of OAM_C plus 1 / 4 of the signals of OAM_B, CON_5 includes 1 / 4 of the signals of OAM_B, and CON_6 includes 1 / 2 of the signals of OAM_C.

[0050] For a switching node, multiple second connectors of the switching node can be grouped in the same way. Similar to the grouping of the aforementioned first connectors and accelerator modules, each group also corresponds to an independent cable assembly. For the sake of easy distinction, here the grouping of the accelerator modules is called the accelerator grouping, the grouping of the first connectors is called the first grouping, and the grouping of the second connectors is called the second grouping. Therefore, one cable assembly corresponds to one accelerator grouping, one first grouping, and one second grouping. An independent cable assembly can be called a sub-cable assembly. For the case where the cable assembly is a cable tray, an independent cable assembly is a sub-cable tray.

[0051] For example, as Figure 8 shown, for a server cabinet with two independent sub-cable trays, the first connectors, OAMs, and second connectors are all divided into 2 groups. Each accelerator grouping, first grouping, and second grouping corresponds to one of the independent sub-cable trays. At the cable tray level of the server cabinet, each group is a set of independent cable trays, and between groups, they are independent of each other at the cable tray level and have no connection relationship.

[0052] In this embodiment, within one cable assembly, the first connectors of the computing node and the second connectors of the switching node are interconnected through a communication link according to an M:N ratio relationship. Here, M is the number of second connectors connected by one first connector, and N is the number of first connectors connected by one second connector. M is a positive integer greater than or equal to 2, and N is a positive integer greater than or equal to 1. That is, one first connector is connected to at least 2 second connectors, and one second connector is connected to at least one first connector. Here, the ratio relationship refers to the proportional relationship between the number M of second connectors connected by one first connector in the computing node and the number N of first connectors connected by one second connector in the switching node.

[0053] It should be noted that, as Figure 1 and Figure 8 shown, in the cable tray of the original design before being divided into independent cable trays, the first connector of each computing node is only connected to one second connector of one switching node, and the second connector of each switching node is also only connected to one first connector of one computing node. At this time, the ratio relationship is 1:1, which does not meet the ratio relationship of M≥2, N≥2.

[0054] However, as Figure 9 shown, Figure 9 shows a single cable tray design that is not divided into independent cable trays. There are 12 switching nodes in the middle, and each computing node has 6 connectors. In switching node A, the leftmost second connector connects the leftmost first connectors of the first computing node and the second computing node, and switching node A connects the connectors at the same position (the leftmost) of all computing nodes. The first connector of each computing node is connected to one of the second connectors of two switching nodes, and the second connector of each switching node is connected to one of the first connectors of two computing nodes. At this time, M = N = 2, that is, the ratio relationship between the connectors of the computing nodes and the connectors of the switching nodes is 2:2, which meets the ratio relationship of M≥2, N≥2. In Figure 9 the cables between the connectors of the computing nodes and the connectors of the switching nodes are omitted and not shown.

[0055] It should be noted that in this embodiment, the accelerator module of the computing node refers to the accelerator module connected through the module interface of the computing node, which can be a part of the computing node or an externally plugged accelerator module on the computing node.

[0056] Through the embodiments provided in this application, a computer system includes: a plurality of computing nodes, a plurality of switching nodes, and a plurality of independent cable assemblies. Each cable assembly forms an independent connection channel between a computing node and a switching node. A computing node includes a plurality of module interfaces and a plurality of first connectors. The plurality of module interfaces of the computing node are used to connect a plurality of accelerator modules. A switching node includes a plurality of second connectors. A part of the accelerator modules connected to each computing node, a part of the first connectors of each computing node, and a part of the second connectors of each switching node correspond to one cable assembly; wherein, within one cable assembly, the first connectors of the computing node and the second connectors of the switching node are interconnected through a communication link according to an M:N ratio relationship. The first connectors of a computing node and the connected accelerator modules are interconnected through a communication link, where M is the number of second connectors connected to one first connector, N is the number of first connectors connected to one second connector, M is a positive integer greater than or equal to 2, and N is a positive integer greater than or equal to 2. This solves the technical problems of low redundancy and poor reliability existing in the server cabinets in the related art, and improves the redundancy and reliability of the computer system.

[0057] In an exemplary embodiment, for the convenience of cable routing, within one cable assembly, the M second connectors connected to one first connector belong to M switching nodes, and the positions of different second connectors on the corresponding switching nodes are the same.

[0058] For example, as Figure 9 shown, the leftmost first connector 1.1 on computing node A is connected to 2 second connectors belonging to different switching nodes, namely the leftmost first second connectors on switching node A and switching node B; the second leftmost first connector 1.2 on computing node A is also connected to 2 second connectors belonging to different switching nodes, namely the leftmost first second connectors on switching node C and switching node D. It can be seen that the positions of the second connectors on the M different switching nodes connected to the same first connector are the same.

[0059] Through this embodiment, connecting the second connectors with the same position on different switching nodes by one first connector can make the cable routing neater and improve the maintenance convenience.

[0060] In an exemplary embodiment, within one cable assembly, the N first connectors connected to one second connector belong to the same computing node or belong to at least two computing nodes.

[0061] The N first connectors connected to one second connector can belong to the same computing node, such as Figure 1 and Figure 8As shown; alternatively, the N second connectors to which a second connector is connected respectively belong to at least two different computing nodes.

[0062] In addition, a second connector connects to N first connectors belonging to different computing nodes, and this connection method can enhance the flexibility of data transmission within the computer system. Even if some computing nodes are damaged, other computing nodes can still maintain normal communication with this second connector.

[0063] Through this embodiment, the N first connectors to which a second connector is connected belong to the same computing node or belong to at least two computing nodes, which can improve the flexibility of connection relationship configuration while improving the reliability of the system.

[0064] In an exemplary embodiment, in order to improve the redundancy of the system, within a cable assembly, the N first connectors to which a second connector is connected belong to N computing nodes. The positions of different first connectors on the corresponding computing nodes can be the same or can be adjusted based on wiring requirements. At this time, the positions of different first connectors on the corresponding computing nodes can be different.

[0065] For example, as Figure 9 shown, the leftmost first second connector on switching node A is connected to 2 first connectors belonging to different computing nodes, namely the leftmost first connectors 1.1 and 2.1 on computing nodes A and B respectively; the second leftmost second connector on switching node A is also connected to 2 second connectors belonging to different computing nodes, namely the leftmost first connectors 3.1 and 4.1 on computing nodes C and D respectively. It can be seen that the positions of the first connectors on the N different computing nodes to which the same second connector is connected are the same on the computing nodes.

[0066] Through this embodiment, the first connectors within a computing node connect to the second connectors with the same position on different switching nodes, which can make the wiring neater and improve the convenience of maintenance.

[0067] In an exemplary embodiment, in order to facilitate the wiring inside the computing cable assembly, within a computing node, the multiple accelerator modules connected to this computing node are divided into K accelerator groups according to the proximity relationship between the accelerator modules, where K is the total number of cable assemblies, and K is a positive integer greater than or equal to 2. One accelerator group corresponds to one cable assembly.

[0068] For example, as Figure 8As shown, the 4 accelerator modules are arranged in order of position as OAM_A, OAM_B, OAM_C, and OAM_D. When they are divided into 2 groups, according to the proximity relationship by position, OAM_A and OAM_B are divided into the first accelerator group, and OAM_C and OAM_D are divided into the second accelerator group. Each accelerator group corresponds to a cable assembly. The first accelerator group corresponds to the cable assembly on the left, and the second accelerator group corresponds to the cable assembly on the right. And each accelerator group is only connected to the first connector belonging to the same cable assembly.

[0069] In addition, it should be noted that in the case where the number of accelerator modules cannot be divisible by K, as Figure 7 shown, at this time, an accelerator module can be simultaneously divided into multiple groups, and this accelerator module needs to be simultaneously connected to the first connectors of multiple groups. For the convenience of connection routing, here OAM_B in the middle position is divided into the left and right groups, which can reduce the cross wiring.

[0070] Through this embodiment, by dividing the accelerator modules according to the proximity relationship, the wiring inside the computing node can be simplified, the crossing and length of the signal lines can be reduced, the data transmission efficiency can be improved, and the maintenance convenience can be enhanced.

[0071] In an exemplary embodiment, the total number of cable assemblies is K, where K is a positive integer greater than or equal to 2, and both M and N are integral multiples of K.

[0072] In this embodiment, in order to achieve a full-interconnection architecture between the computing nodes within each independent cable assembly in the computer system, within each independent cable assembly, the number of connectors (including the first connector and the second connector) becomes 1 / K of the total number of connectors. Here, the value of K can be adjusted according to the situation. The number of connectors within each independent cable assembly needs to be an integer, and K needs to be able to divide the total number of connectors evenly, that is, both M and N need to be integral multiples of K. And after being divided into multiple independent cable assemblies, the connection topology between the computing nodes and the switching nodes needs to be adjusted accordingly.

[0073] Particularly, the setting of the total number K of the cable assemblies can also consider the number of accelerator modules and the number of the first connectors. According to the relationship between the number of accelerator modules and the number of the first connectors, appropriate allocation is made to facilitate the realization of the full-interconnection architecture of the accelerator modules.

[0074] Through this embodiment, by reasonably designing the total number K of the cable assemblies according to the ratio relationship, the flexibility of the computer system design can be improved.

[0075] In an exemplary embodiment, in order to improve the redundancy of the architecture, within a cable assembly, one accelerator module connected is interconnected with at least two first connectors belonging to the same computing node.

[0076] Here, an accelerator module is interconnected with at least two first connectors. In the case where a switching node connected to one of the first connectors fails, the accelerator module can still be invoked according to the switching nodes connected to the other first connectors, thereby improving the reliability of the computer system.

[0077] Through this embodiment, by the strategy of connecting each accelerator module to multiple first connectors, the reliability of the connection and the flexibility of data transmission can be improved.

[0078] In an exemplary embodiment, within a cable assembly, one accelerator module connected is interconnected with each first connector belonging to the same computing node. By interconnecting one accelerator module within the above-mentioned cable assembly with all the connectors belonging to the same computing node within the same cable assembly, full interconnection between the accelerator module and the connectors within the computing node can be achieved.

[0079] Exemplarily, for the computing node as shown in Figure 7 , there are 6 first connectors within the computing node and 3 OAM modules are connected. Here, the first connectors and the OAM modules can both be divided into two groups, and each group corresponds to an independent cable assembly respectively. Within the first group (the left group), each first connector includes 1 / 3 of the signal of OAM_A plus 1 / 6 of the signal of OAM_B. Within the second group (the right group), each first connector includes 1 / 3 of the signal of OAM_C plus 1 / 6 of the signal of OAM_B. Here, within each group of the computing node, each first connector includes the signals of each OAM module within the group.

[0080] Through this embodiment, by achieving full interconnection between the accelerator module and the connectors within the computing node, the redundancy and reliability of the system can be improved.

[0081] In an exemplary embodiment, within a cable assembly, the pins of one first connector are split into M pin groups, and each pin group is interconnected with each accelerator module connected to the same computing node.

[0082] It should be noted that one pin group of the first connector can also be used to associate with the pins of the second connector connected. In the case where one first connector is connected to M second connectors, the pins of one first connector also need to be correspondingly split into M pin groups.

[0083] Optionally, in the case where each pin group is not connected to each accelerator module within the corresponding accelerator group, as shown in Figure 10As shown, the computing nodes are connected to 4 OAM modules, divided into two independent cable assemblies on the left and right. Each independent cable assembly includes several computing node connectors. The ratio of computing nodes to switching nodes is 4:4. The first connectors in the left independent cable assembly, each first connector includes signals of 2 OAM modules: OAM_A and OAM_B. The first connectors in the right independent cable assembly, each first connector includes signals of 2 OAM modules: OAM_C and OAM_D. Among the connectors of the left independent cable assembly, OAM_A and OAM_B each occupy half of the pin numbers of each connector, that is, 2 of the 4 pin groups of a first connector are respectively connected to OAM_A and OAM_B. Although it satisfies that one accelerator module in an accelerator group is connected to all the first connectors in the corresponding first group, it does not satisfy that each pin group is connected to each accelerator module in the corresponding accelerator group.

[0084] In Figure 10 After the connection topology with a 4:4 ratio, all the OAM_A and OAM_C connected to by all the computing nodes are only connected to switching nodes 1 and 2, and not connected to switching nodes 3 and 4. At the same time, all the OAM_B and OAM_D connected to by all the computing nodes are only connected to switching nodes 3 and 4, and not connected to switching nodes 1 and 2. That is, each OAM module is only connected to half of the switching nodes. That is, from the perspective of the switching nodes, each switching node is only connected to only two OAM modules connected to by all the computing nodes. This connection method does not satisfy the full-interconnection architecture. If exactly half of the switching nodes break down, half of the OAM modules of all the computing nodes cannot be interconnected. Here, the full-interconnection architecture means that even if only 1 switching node can be used, all the OAM modules connected to by all the computing nodes can be interconnected, but the bandwidth is extremely low.

[0085] In the above pin allocation method of directly dividing the signals of the OAM modules equally according to the quantity to each connector, due to the ratio problem, the granularity of the signal distribution of the OAM modules to each switching node is not fine enough. Therefore, each switching node cannot obtain the signals of all the OAM modules connected to by the computing nodes.

[0086] To at least partially solve the above problems, in this embodiment, since the computing node connectors are divided into multiple independent cable assemblies by group, in order to simplify the design of the computing node, each independent cable assembly group only corresponds to a part of the accelerator modules connected to the computing node. Therefore, it is necessary to start from the granularity of connector allocation. In addition, there are special requirements for the pin design on the first connector of the computing node. It is not possible to simply divide the first connector into several proportioned parts and fill in different accelerator modules. Instead, under different proportions, each proportioned part of each first connector needs to include the signals of each accelerator module in the group.

[0087] Since the signals of all accelerator modules are not included in each first connector, after each computing node corresponds to a single switching node in each independent cable assembly, on the single switching node, the sum of the signals of the accelerator modules on each second connector belonging to multiple independent cable assemblies is equal to the signals of each accelerator module of all computing nodes.

[0088] For example, as Figure 11 shown. There is an independent cable assembly on each side, and in Figure 11 the ratio relationship between the first connector of the computing node and the second connector of the switching node is 2:2. Therefore, each first connector needs to be split into two proportioned parts, and each proportioned part (pin group) includes the signals of 2 OAM modules in the group. Here, each proportioned part corresponds to a pin group of the first connector and also corresponds to a second connector of a switching node.

[0089] Applying the Figure 11 shown allocation method to the Figure 10 shown cable assembly, the effect is as Figure 12 shown. In Figure 12 the ratio relationship between the connectors of the computing node and the switching node is 4:4. Among them, in one first connector of the computing node, each proportioned part of each pin group includes the signals of OAM_A and OAM_B or OAM_C and OAM_D in the independent cable assembly group. On the switching node, each switching node includes the signals of OAM_A, OAM_B, OAM_C, and OAM_D of 16 computing nodes, achieving full interconnection.

[0090] Through this embodiment, each pin group of the first connector is connected to all accelerator modules in the group, which can ensure the realization of a full interconnection architecture and improve reliability.

[0091] In an exemplary embodiment, in order to balance the signal load, within a cable assembly, the signal of one connected accelerator module is evenly distributed to each connected first connector.

[0092] In this embodiment, the data stream from the accelerator module is finely segmented and evenly distributed to each of the first connectors connected, so that the amount of signals borne by each first connector is roughly the same, which can balance the loads of the connectors and avoid transmission bottlenecks caused by local overload.

[0093] Through this embodiment, by evenly distributing the signals of the accelerator module, the balance and efficiency of data transmission can be ensured.

[0094] In an exemplary embodiment, in order to evenly distribute the signals of the accelerator module, in a cable assembly, among the M pin groups of a first connector, the number of pins included in each pin group is the same.

[0095] It should be noted that each pin group of a first connector includes the signals of each accelerator module within the same computing node of the same cable assembly, that is, the amount of signals included in each pin group is the same. Therefore, the number of pins included in each pin group is also the same.

[0096] Through this embodiment, by ensuring that the number of pins included in each pin group is the same, the resource allocation can be balanced, thereby improving the communication efficiency and stability of the computer system.

[0097] In an exemplary embodiment, in order to ensure the fair allocation of resources of each accelerator group, multiple accelerator modules in a computing node are divided into K accelerator groups according to the total number of accelerator modules included, and the number of accelerator modules included in different accelerator groups is the same.

[0098] In this embodiment, the number of groups K can be confirmed based on the total number of connectors, and then the accelerator modules are divided. The number of accelerator modules in each accelerator group is the total number of accelerator modules / K. After that, the signals of the accelerator modules in the accelerator group can be evenly distributed to the connected first connectors, so as to ensure that the amount of signals borne by each first connector is roughly the same.

[0099] Through this embodiment, by evenly dividing the number of accelerator modules in each accelerator group, it can be ensured that the amount of signals borne by each first connector is roughly the same, thereby achieving the balanced allocation of accelerator resources.

[0100] In an exemplary embodiment, when the total number L of accelerator modules connected to a computing node is an integer multiple of K, multiple accelerator modules connected to a computing node are sequentially divided into K accelerator groups, and the number of accelerator modules included in an accelerator group is L / K.

[0101] For example, as Figure 8 shown, the total number L of accelerator modules is 4, the number of groups K is 2, and each accelerator group includes 2 accelerator modules.

[0102] Correspondingly, when the total number L of accelerator modules connected to a computing node is not an integer multiple of K, the multiple accelerator modules connected to a computing node are sequentially divided into K accelerator groups according to the positional proximity relationship between the pins of the accelerator modules. The accelerator modules in an accelerator group include at most partial pins of two accelerator modules; or an integer number of accelerator modules and at most partial pins of two accelerator modules.

[0103] For example, as Figure 7 shown, the total number L of accelerator modules is 3, the number of groups K is 2, and L is not an integer multiple of K. At this time, OAM_A and OAM_B are divided into the first accelerator group according to the positional proximity relationship, and OAM_B and OAM_C are divided into the second accelerator group. And based on the positional proximity relationship between the pins of the accelerator modules, the partial pins of OAM_B close to OAM_A are divided into the first accelerator group, and the partial pins of OAM_B close to OAM_C are divided into the second accelerator group. Here, the first group includes an entire OAM_A and partial pins of OAM_B, and the second group includes an entire OAM_C and partial pins of OAM_B.

[0104] Through this embodiment, in the case where the accelerator modules are not divisible by the number of groups, some accelerators are shared among different groups, and still, the amount of signals borne by each first connector can be kept substantially the same, improving the flexibility of computer system design.

[0105] In an exemplary embodiment, the total number of second connectors in a switching node is less than or equal to the total number of computing nodes in the computer system, and the total number of switching nodes in the computer system is less than or equal to the total number of first connectors in a computing node.

[0106] In this embodiment, the second connectors of a switching node are respectively connected to the first connectors at the same position of each computing node. In the case where the ratio is 1:1, one second connector is connected to one first connector of a computing node. At this time, the number of second connectors in the switching node is equal to the number of computing nodes in the computer system. In the case where the ratio is not 1:1, taking the ratio of 2:2 as an example, one second connector is connected to one first connector of two computing nodes. At this time, only half of the number of computing nodes is required for the number of second connectors to complete the connection, and the number of second connectors in the switching node is less than the number of computing nodes in the computer system.

[0107] In this embodiment, the second connectors of a switching node are respectively connected to the first connectors at the same position of each computing node. That is, the first connectors at each different position of a computing node are respectively connected to different switching nodes. In the case where the ratio relationship is 1:1, one first connector is connected to one second connector of a switching node. At this time, the number of switching nodes in the computer system is equal to the number of first connectors in the computing nodes. In the case where the ratio relationship is not 1:1, taking the ratio relationship of 2:2 as an example, one first connector is connected to one second connector of each of two different switching nodes, and different first connectors can be connected to the same second connector. At this time, the number of switching nodes in the computer system can be less than the number of first connectors in the computing nodes.

[0108] Through this embodiment, by controlling the number of second connectors in the switching node and the number of switching nodes, it is possible to avoid resource waste caused by redundant switching nodes and unnecessary allocation of accelerator signals, improve the efficiency of data transmission. In addition, the number of second connectors does not exceed the number of computing nodes, which can reduce the hardware cost and optimize the network architecture.

[0109] In an exemplary embodiment, in order to avoid signal interference between different independent cable assemblies, an isolation device is provided between adjacent cable assemblies. Optionally, there is no cable connecting the two adjacent cable assemblies to each other.

[0110] It should be noted that after the independent cable assemblies are isolated, the signals on the left and right sides cannot communicate with each other, which may cause the connection relationship of the groups to need to be adjusted accordingly. For example, as Figure 13 shown, Figure 13 For Figure 9 the state of the cable assembly shown after being separated from the middle into two independent cable assemblies. Due to the isolation in the middle, the signals on the left and right sides cannot communicate with each other, which results in that part ① in the computing node was originally connected to the corresponding arrow position of the switching node, but cannot be connected due to the isolation. Similarly, part ② in the computing node cannot be connected to the corresponding arrow position of the switching node. In this case, it is necessary to adjust the connection relationship between the computing nodes and the switches in the independent cable assemblies on the left and right sides.

[0111] Figure 13 In Figure 14 the original ratio was 2:2. After being divided into two independent cable assemblies, inside each independent cable assembly, the ratio of the connectors of the computing nodes and the switching nodes is still the original ratio of 2:2, resulting in that a single switch on each side of the cable assembly cannot be connected to all computing nodes and requires the independent cable assembly on the other side as a supplement. For example, it can be adjusted to the structure as Figure 14 shown, by turning the independent cable assembly on the right upside down, which is opposite to the left side, and the designs of the independent cable assemblies on both sides are different. HoweverFigure 14 Neither of the independent cable assemblies on both sides shown is a complete fully interconnected architecture. Only the upper half or the lower half is a fully interconnected architecture, with poor reliability and requires further processing.

[0112] In this embodiment, after dividing the original cable assembly into K independent cable assemblies, the ratio of the connectors within each independent cable assembly can be adjusted accordingly. The adjusted ratio is K times the original ratio. Taking the original ratio relationship of M:N as an example, the adjusted ratio relationship becomes KM:KN. After adjusting the ratio, a fully interconnected connection topology can still be maintained within each independent cable assembly, and it can be ensured that the designs of each independent cable assembly are exactly the same, thereby reducing the design complexity.

[0113] For example, within a single cable assembly, if the number of the first connectors of the computing nodes is set as m and the number of the second connectors of the switching nodes is set as n, as Figure 15 shown, taking the ratio relationship between the computing nodes and the switching nodes as 1:1 as an example, after dividing it into 2 independent cable assemblies, as Figure 16 shown, the ratio relationship of the connectors within each independent cable assembly becomes m / 2:n / 2, that is, the ratio relationship becomes 2:2. Each independent cable assembly still has a fully interconnected architecture, and the interconnection architecture topologies on both the left and right sides are exactly the same. Here, the ratio relationship is used to describe the quantitative relationship of the connections between the connectors of the computing nodes and the connectors of the switching nodes (switches). The specific connection relationship can be set as needed. The figure is only a schematic diagram of one kind of connection ratio.

[0114] Another example, as Figure 17 shown, after dividing a single cable assembly into 4 independent cable assemblies, the ratio relationship within each independent cable assembly becomes m / 4:n / 4, that is, the ratio relationship becomes 4:4.

[0115] Still another example, as Figure 18 shown, the original ratio of the number of connectors is m / 2:n / 2, and the ratio relationship is 2:2. On this basis, after dividing it into 2 independent cable assemblies, the ratio relationship within each independent cable assembly becomes m / 4:n / 4, that is, the ratio relationship becomes 4:4.

[0116] Through this embodiment, by isolating different independent cable assemblies, signal interference between different independent cable assemblies can be avoided, while simplifying the circuit layout and improving the maintainability.

[0117] In an exemplary embodiment, the accelerator module in the computing node is an OAM module.

[0118] In the design of AI all-in-one cabinet servers, accelerator modules are usually used to improve the computing performance of the servers. As an open standard accelerator module, the OAM module has high scalability and standardization characteristics, and can effectively execute the tasks of AI all-in-one cabinet servers.

[0119] In the architecture of the computer system proposed in the foregoing embodiments, the OAM module is uniformly used as the accelerator module, which can effectively integrate and utilize the OAM module in the computing node, maintain the high performance, stability and reliability of the system, and ensure that the design inside the computing node is relatively simple.

[0120] Through this embodiment, by using the OAM module as the accelerator module in the computing node and combining with the computer system architecture solution in the foregoing embodiments, a high-performance and highly reliable computer system can be constructed, which helps to improve the computing power and stability of the server.

[0121] According to another aspect of the embodiments of the present application, a computing node is further provided. The computing node can be used in the computer system provided in the foregoing embodiments. The computing node establishes multiple independent connection channels with the switching node of the computer system through multiple independent cable assemblies of the computer system. Those that have been described will not be repeated.

[0122] Figure 19 is a structural block diagram of an optional computing node according to the embodiments of the present application. As Figure 19 shown in the figure, the computing node includes a plurality of module interfaces 1902 and a plurality of first connectors 1904. The plurality of module interfaces 1902 of the computing node are used to connect a plurality of accelerator modules, and a part of the accelerator modules and a part of the first connectors 1904 connected to the computing node by a cable assembly correspond.

[0123] Among them, within a cable assembly, the first connector 1904 of the computing node is interconnected with the second connector of the switching node through a communication link according to an M:N ratio relationship, and the accelerator module connected to the computing node and the first connector 1904 are interconnected through a communication link, where M is the number of second connectors connected by a first connector 1904, N is the number of first connectors 1904 connected by a second connector, M is a positive integer greater than or equal to 2, and N is a positive integer greater than or equal to 2.

[0124] Through the embodiments provided by this application, a computing node is provided, which is applied to a computer system. The computing node establishes multiple independent connection channels with the switching node of the computer system through multiple independent cable assemblies of the computer system. The computing node includes multiple module interfaces and multiple first connectors. The multiple module interfaces of the computing node are used to connect multiple accelerator modules. One cable assembly corresponds to some of the accelerator modules and some of the first connectors of the computing node. Among them, within one cable assembly, the first connector of the computing node is interconnected with the second connector of the switching node through a communication link according to the M:N ratio relationship, and the accelerator modules and the first connectors connected by the computing node are interconnected through a communication link. Here, M is the number of second connectors connected by one first connector, N is the number of first connectors connected by one second connector, M is a positive integer greater than or equal to 2, and N is a positive integer greater than or equal to 2. This solves the technical problems of low redundancy and poor reliability existing in the computer system in the related art, and achieves the technical effect of improving the redundancy and reliability of the computer system.

[0125] According to another aspect of the embodiments of the present application, a switching node is further provided. This switching node can be used in the computer system provided in the foregoing embodiments. The switching node establishes multiple independent connection channels with the computing node of the computer system through multiple independent cable assemblies of the computer system. Those that have been described will not be repeated here.

[0126] Figure 20 is a structural block diagram of an optional switching node according to the embodiments of the present application. As Figure 20 shown in, the switching node includes multiple second connectors 2002, and one cable assembly corresponds to some of the second connectors 2002 of the switching node.

[0127] Among them, within one cable assembly, the second connector 2002 of the switching node is interconnected with the first connector 1904 of the computing node through a communication link according to the M:N ratio relationship. Here, M is the number of second connectors 2002 connected by one first connector 1904, N is the number of first connectors 1904 connected by one second connector 2002, M is a positive integer greater than or equal to 2, and N is a positive integer greater than or equal to 2.

[0128] Through the embodiments provided by this application, a switching node is provided, which is applied to a computer system. The switching node establishes multiple independent connection channels with the computing nodes of the computer system through multiple independent cable assemblies of the computer system. The switching node includes multiple second connectors, and one cable assembly corresponds to a part of the second connectors of the switching node. Among them, within one cable assembly, the second connectors of the switching node are interconnected with the first connectors of the computing nodes through communication links according to an M:N ratio relationship, where M is the number of second connectors connected to one first connector, N is the number of first connectors connected to one second connector, M is a positive integer greater than or equal to 2, and N is a positive integer greater than or equal to 2. This solves the technical problems of low redundancy and poor reliability existing in the computer system in the related art, and achieves the technical effect of improving the redundancy and reliability of the computer system.

[0129] Obviously, those skilled in the art should understand that the above-mentioned modules or steps of this application can be implemented by a general-purpose computing device. They can be concentrated on a single computing device or distributed on a network composed of multiple computing devices. They can be implemented by program codes executable by the computing device. Thus, they can be stored in a storage device and executed by the computing device. And in some cases, the steps shown or described can be executed in a sequence different from that here, or they can be separately fabricated into individual integrated circuit modules, or multiple modules or steps among them can be fabricated into a single integrated circuit module to be implemented. In this way, this application is not limited to any specific combination of hardware and software.

[0130] The above are only the preferred embodiments of this application and are not used to limit this application. For those skilled in the art, this application can have various changes and modifications. Any modification, equivalent replacement, improvement, etc. made within the principle of this application shall be included within the protection scope of this application.

Claims

1. A computer system, characterized in that, Comprising: A plurality of computing nodes, a plurality of switching nodes, and a plurality of independent cable assemblies. Each cable assembly forms an independent connection channel between the computing node and the switching node. One computing node includes a plurality of module interfaces and a plurality of first connectors. The plurality of module interfaces of the computing node are used to connect a plurality of accelerator modules. One switching node includes a plurality of second connectors. One cable assembly corresponds to a part of the accelerator modules connected to each computing node, a part of the first connectors of each computing node, and a part of the second connectors of each switching node; wherein, Within one cable assembly, the first connectors of the computing node and the second connectors of the switching node are interconnected through a communication link according to an M:N ratio relationship. The first connectors of one computing node and the connected accelerator modules are interconnected through a communication link. Wherein, M is the number of second connectors connected to one first connector, N is the number of first connectors connected to one second connector, M is a positive integer greater than or equal to 2, and N is a positive integer greater than or equal to 2.

2. The computer system according to claim 1, wherein Within one cable assembly, the M second connectors connected to one first connector belong to the same switching node or belong to at least two switching nodes.

3. The computer system according to claim 2, wherein Within one cable assembly, the M second connectors connected to one first connector belong to M switching nodes, and the positions of the different second connectors on the corresponding switching nodes are the same.

4. The computer system according to claim 1, wherein Within one cable assembly, the N first connectors connected to one second connector belong to the same computing node or belong to at least two computing nodes.

5. The computer system according to claim 4, wherein Within one cable assembly, the N first connectors connected to one second connector belong to N computing nodes, and the positions of the different first connectors on the corresponding computing nodes are the same.

6. The computer system according to claim 1, wherein Within one computing node, the connected plurality of accelerator modules are divided into K accelerator groups according to the position proximity relationship between the accelerator modules. Wherein, K is the total number of the cable assemblies, K is a positive integer greater than or equal to 2, and one accelerator group corresponds to one cable assembly.

7. The computer system according to claim 6, wherein When the total number L of the accelerator modules connected to one computing node is an integer multiple of K, the connected plurality of accelerator modules of one computing node are sequentially divided into K accelerator groups, and the number of accelerator modules included in one accelerator group is L / K; When the total number L of the accelerator modules connected to one computing node is not an integer multiple of K, the connected plurality of accelerator modules of one computing node are sequentially divided into K accelerator groups according to the position proximity relationship between the pins of the accelerator modules. The accelerator modules in one accelerator group include at most two partial pins of the accelerator modules; or an integer number of accelerator modules and at most two partial pins of the accelerator modules.

8. The computer system according to claim 1, wherein Within one cable assembly, one connected accelerator module is interconnected with at least two first connectors belonging to the same computing node.

9. The computer system according to claim 8, wherein Within one of the cable assemblies, one connected accelerator module is interconnected with each first connector belonging to the same computing node.

10. The computer system according to claim 8, wherein Within one of the cable assemblies, the signals of one connected accelerator module are evenly distributed to each of the interconnected first connectors.

11. The computer system according to claim 1, wherein Within one of the cable assemblies, the pins of one first connector are split into M pin groups, and each pin group is interconnected with each accelerator module connected to the same computing node.

12. The computer system according to claim 11, wherein, Within one of the cable assemblies, among the M pin groups of one first connector, the number of pins included in each pin group is the same.

13. The computer system according to claim 1, wherein The interconnection architecture topologies of multiple cable assemblies are the same, and the number of accelerator modules, the number of first connectors, and the number of second connectors within different cable assemblies are the same.

14. The computer system according to claim 1, wherein The total number of the cable assemblies is K, where K is a positive integer greater than or equal to 2, and both M and N are integral multiples of K.

15. The computer system according to claim 1, wherein The total number of second connectors in one switching node is less than or equal to the total number of computing nodes in the computer system, and the total number of switching nodes in the computer system is less than or equal to the total number of first connectors in one computing node.

16. The computer system according to claim 1, wherein An isolation device is provided between adjacent cable assemblies.

17. The computer system according to claim 16, wherein, There is no cable interconnecting two adjacent cable assemblies.

18. The computer system according to any one of claims 1 to 17, characterized in that, The accelerator module in the computing node is an OAM module.

19. A computing node, characterized in that, Applied to a computer system, the computing node establishes multiple independent connection channels with the switching nodes of the computer system through multiple independent cable assemblies of the computer system. The computing node includes multiple module interfaces and multiple first connectors. The multiple module interfaces of the computing node are used to connect multiple accelerator modules. One cable assembly corresponds to some of the accelerator modules and some of the first connectors of the computing node; wherein, Within one of the cable assemblies, the first connector of the computing node is interconnected with the second connector of the switching node through a communication link according to the ratio relationship of M:N, and the accelerator module and the first connector connected to the computing node are interconnected through a communication link, where M is the number of second connectors connected by one first connector, N is the number of first connectors connected by one second connector, M is a positive integer greater than or equal to 2, and N is a positive integer greater than or equal to 2.

20. An exchange node, characterized in that, Applied to a computer system, the switching node establishes multiple independent connection channels with the computing nodes of the computer system through multiple independent cable assemblies of the computer system. The switching node includes multiple second connectors. One cable assembly corresponds to some of the second connectors of the switching node; wherein, Within one of the cable assemblies, the second connector of the switching node is interconnected with the first connector of the computing node through a communication link according to the ratio relationship of M:N, where M is the number of second connectors connected by one first connector, N is the number of first connectors connected by one second connector, M is a positive integer greater than or equal to 2, and N is a positive integer greater than or equal to 2.

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