Image acquisition method and imaging system based on double-sided array visible light detector

Abstract

The invention relates to the field of image processing, and provides an image acquisition method and an imaging system based on a double-sided array visible light detector, and the method comprises the steps: determining a first frame effective signal of a first half region of the double-sided array visible light detector, and determining a second frame effective signal of a second half region; shaping the second frame of effective signal, performing OR operation on the first frame of effective signal and the second frame of effective signal to determine a third frame of effective signal, setting the third frame of effective signal as a high level when the dark line of the first half region is read out, and setting the third frame of effective signal as a low level after the effective line of the second half region is read out; and controlling the double-sided array visible light detector to perform image acquisition based on the third frame effective signal. The method and the device are used for solving the defect that the real-time requirement cannot be met when a double-sided array visible light detector is used for image acquisition in the related technology, and in the scheme of the invention, the frame effective signals of the two subareas of the detector are integrated, so that the images of the two half areas are exposed at the same time, and the real-time requirement is met.

Description

Technical Field

[0001] The present invention relates to the technical field of image processing, and particularly to an image acquisition method and an imaging system based on a double-sided array visible light detector. Background Art

[0002] Visible light detectors include single-sided arrays and double-sided arrays. Among them, when a single-sided array visible light detector improves image resolution and dynamic range, it often faces signal loss, noise interference, and imaging speed bottlenecks. These problems affect image quality and limit the performance of real-time applications. A double-sided array visible light detector arranges pixel arrays on the upper and lower sides, and signal acquisition and processing in the upper and lower half regions can be performed in parallel. This design effectively reduces signal loss and interference, and significantly improves the imaging speed, especially suitable for real-time imaging applications that require rapid processing.

[0003] When a double-sided array visible light detector is applied to fields such as hyperspectral cameras, due to filter manufacturing errors or film pasting process errors, it is required to open windows in the upper and lower half regions of the visible light detector respectively, that is, to set the effective image regions in the upper and lower half regions, and the scales are inconsistent, and the upper and lower half regions cannot be collected simultaneously. For this situation, there are two processing methods in the related art. The first is to store one frame of image data in the upper and lower half regions in an external large-capacity storage chip, such as DDR3, and then read it out sequentially. The second method is to achieve alternate exposure and sequential reading in the upper and lower half regions by configuring the visible light detector.

[0004] Both of the above two implementation methods have their own drawbacks. The first method has a complex hardware design and high power consumption. Adding a DDR3 chip will greatly increase the power consumption of the entire system. The second method cannot expose the upper and lower half regions simultaneously, resulting in the images of the upper and lower half regions not being synchronized in real time and not meeting the real-time requirements. Summary of the Invention

[0005] The present invention provides an image acquisition method and an imaging system based on a double-sided array visible light detector to solve the defect that the real-time requirement cannot be met when using a double-sided array visible light detector for image acquisition in the related art. In the solution of the present application, by integrating the frame valid signals of the two partitions of the detector respectively, simultaneous exposure of the images in the two half regions is achieved, meeting the real-time requirement, and no additional hardware design is required, reducing power consumption.

[0006] The present invention provides an image acquisition method based on a double-sided array visible light detector, including:

[0007] Determining a first frame valid signal of a first half region of a double-sided array visible light detector and determining a second frame valid signal of a second half region;

[0008] After shaping the second frame valid signal, perform an OR operation on the first frame valid signal and the second frame valid signal to determine the third frame valid signal. The third frame valid signal is set to a high level when the dark rows in the first half region are read out, and is set to a low level after the valid rows in the second half region are read out.

[0009] Based on the third frame valid signal, control the dual-sided array visible light detector to perform image acquisition.

[0010] Among them, shaping the second frame valid signal includes:

[0011] Start dark row counting at the rising edge of the second frame valid signal, and set the second frame valid signal to be shaped to a low level.

[0012] During image acquisition, set the second frame valid signal to be shaped to a high level.

[0013] According to the image acquisition method based on the dual-sided array visible light detector provided by the present invention, determining the first frame valid signal of the first half region of the dual-sided array visible light detector and determining the second frame valid signal of the second half region includes:

[0014] Determine the number of first valid rows, the number of first invalid rows in the first half region of the dual-sided array visible light detector, and the number of second valid rows in the second half region.

[0015] Based on the number of first valid rows and the number of first invalid rows, determine the number of second invalid rows in the second half region of the dual-sided array visible light detector.

[0016] Input the number of first valid rows, the number of first invalid rows, the number of second valid rows, and the number of second invalid rows into the dual-sided array visible light detector, and obtain the first frame valid signal and the second frame valid signal output by the dual-sided array visible light detector.

[0017] According to the image acquisition method based on the dual-sided array visible light detector provided by the present invention, determining the number of first valid rows and the number of first invalid rows in the first half region of the dual-sided array visible light detector includes:

[0018] Obtain the first start row, the first end row, and the first dark row in the first half region of the dual-sided array visible light detector.

[0019] Based on the first start row and the first end row, calculate the number of first valid rows.

[0020] Based on the first dark row, calculate the number of first invalid rows.

[0021] According to the image acquisition method based on a double-sided array visible light detector provided by the present invention, determining the number of ineffective rows in the second half area of the double-sided array visible light detector based on the number of effective rows in the first area and the number of ineffective rows in the first area includes:

[0022] Sum the number of effective rows in the first area and the number of ineffective rows in the first area to obtain the number of ineffective rows in the second half area.

[0023] According to the image acquisition method based on a double-sided array visible light detector provided by the present invention, performing dark row counting at the rising edge of the second frame of effective signal includes:

[0024] Obtain the maximum number of dark rows in the second half area of the double-sided array visible light detector;

[0025] Modify the second dark row in the second half area based on the magnitude relationship between the maximum number of dark rows and the number of ineffective rows in the second half area;

[0026] Perform dark row counting based on the modified second dark row.

[0027] According to the image acquisition method based on a double-sided array visible light detector provided by the present invention, modifying the second dark row in the second half area based on the magnitude relationship between the maximum number of dark rows and the number of ineffective rows in the second half area includes:

[0028] If the number of ineffective rows in the second half area is greater than the maximum number of dark rows in the second half area, modify the second dark row to the maximum number of dark rows;

[0029] If the number of ineffective rows in the second half area is less than or equal to the maximum number of dark rows in the second half area, modify the second dark row to the number of ineffective rows in the second half area.

[0030] The present invention also provides an image acquisition system based on a double-sided array visible light detector, including:

[0031] A signal acquisition unit, configured to determine the first frame of effective signal in the first half area of the double-sided array visible light detector and determine the second frame of effective signal in the second half area;

[0032] A signal processing unit, configured to perform shaping on the second frame of effective signal, and perform an OR operation on the first frame of effective signal and the second frame of effective signal to determine a third frame of effective signal, where the third frame of effective signal is set to a high level when the dark rows in the first half area are read out, and set to a low level after the effective rows in the second half area are read out;

[0033] An image acquisition unit, configured to control the double-sided array visible light detector to perform image acquisition based on the third frame of effective signal;

[0034] The signal processing unit is further configured to:

[0035] Start dark row counting at the rising edge of the second frame valid signal, and set the second frame valid signal to be shaped to a low level;

[0036] During image acquisition, set the second frame valid signal to be shaped to a high level.

[0037] The present invention also provides a real-time imaging system based on a double-sided array visible light detector, including:

[0038] A control chip, including a memory, a processor, and a computer program stored on the memory and executable on the processor. When the processor executes the program, it implements an image acquisition system based on any of the above double-sided array visible light detectors;

[0039] A double-sided array visible light detector, including a first half region and a second half region;

[0040] An image display device, configured to image the images acquired by the double-sided array visible light detector.

[0041] The present invention also provides a non-transitory computer-readable storage medium, on which a computer program is stored. When the computer program is executed by a processor, it implements an image acquisition system based on any of the above double-sided array visible light detectors.

[0042] The present invention also provides a computer program product, including a computer program. When the computer program is executed by a processor, it implements an image acquisition system based on any of the above double-sided array visible light detectors.

[0043] In the image acquisition method based on the double-sided array visible light detector provided by the present invention, the frame valid signals of the two partitions of the double-sided array visible light detector can be respectively obtained. By shaping the two frame valid signals and then performing an OR operation, the frame valid signals of the two partitions can be changed from an independently controlled state to a synchronous state. Furthermore, synchronous image exposure of the two partitions can be achieved, pseudo single-sided array operation can be realized, and the drawback that the frame valid signals of the two partitions are not synchronized, resulting in the two partitions not being able to be exposed simultaneously, can be avoided, meeting the synchronization requirements when using a visible light detector for image acquisition. BRIEF DESCRIPTION OF THE DRAWINGS

[0044] In order to more clearly illustrate the technical solutions in the present invention or the prior art, the following will briefly introduce the drawings required for use in the description of the embodiments or the prior art. Obviously, the drawings in the following description are some embodiments of the present invention. For those of ordinary skill in the art, other drawings can be obtained based on these drawings without creative efforts.

[0045] Figure 1 It is a flowchart of an image acquisition method provided by an embodiment of the present invention;

[0046] Figure 2 It is a block diagram of the array composition of a double-sided visible light detector provided by an embodiment of the present invention;

[0047] Figure 3 It is a schematic structural diagram of an image acquisition system provided by an embodiment of the present invention;

[0048] Figure 4 It is a schematic structural diagram of a real-time imaging system provided by an embodiment of the present invention;

[0049] Figure 5 It is a schematic diagram of the connection relationship between a detector and a control chip provided by an embodiment of the present invention;

[0050] Figure 6 It is a structural flowchart of an image acquisition method provided by an embodiment of the present invention;

[0051] Figure 7 It is a timing diagram of an image acquisition method provided by an embodiment of the present invention;

[0052] Figure 8 It is a schematic diagram of the physical structure of an electronic device provided by an embodiment of the present invention. Detailed implementation manners

[0053] To make the objectives, technical solutions and advantages of the present invention clearer, the technical solutions in the present invention will be clearly and completely described below with reference to the accompanying drawings in the present invention. Obviously, the described embodiments are some, but not all, of the embodiments of the present invention. All other embodiments obtained by those of ordinary skill in the art based on the embodiments in the present invention without making creative efforts shall fall within the protection scope of the present invention.

[0054] Figure 1 It is a flowchart of an image acquisition method provided by an embodiment of the present invention.

[0055] As Figure 1 shown, this embodiment provides an image acquisition method based on a double-sided visible light detector, including:

[0056] Step 101, determining the first frame of valid signals in the first half area of the double-sided visible light detector, and determining the second frame of valid signals in the second half area;

[0057] In practical applications, the double-sided visible light detector may include a first half area and a second half area, and the first half area and the second half area are independently controlled and work independently. Among them, the first half area may be referred to as the TOP half area, and the second half area may be referred to as the BOTTOM half area.

[0058] Exemplarily, the model of the double-sided array visible light detector in this embodiment can be CIS2521F.

[0059] Since the first half area and the second half area work independently, in this embodiment, the first frame valid signal of the first half area and the second frame valid signal of the second half area can be obtained respectively. The frame valid signal (FVAL) is a control signal used to indicate whether a certain frame of image data is valid. For example, during the image transmission process, if the frame valid signal is at a high level when transmitting a certain frame of image data, it represents that this frame of image data is a valid frame; if it is at a low level, it represents the end of the frame data or that this frame of image data is invalid.

[0060] Step 102: After shaping the second frame valid signal, perform an OR operation on the first frame valid signal and the second frame valid signal to determine a third frame valid signal. The third frame valid signal is set to a high level when the dark rows of the first half area are read out, and is set to a low level after the valid rows of the second half area are read out;

[0061] Among them, shaping the second frame valid signal includes:

[0062] Start dark row counting at the rising edge of the second frame valid signal, and set the second frame valid signal to be shaped to a low level;

[0063] During image acquisition, set the second frame valid signal to be shaped to a high level.

[0064] The OR operation is a kind of Boolean operation. Its core rule is that as long as one operand is true (1), the result is true (1); only when all operands are false (0), the result is false (0).

[0065] In practical applications, after performing an OR operation on the first frame valid signal and the second frame valid signal, the final single-sided array frame valid signal can be obtained. This signal can be pulled high when the dark rows of the first half area are read out, and pulled low after the valid image data rows of the second half area are read out, realizing seamless connection of the readout of the valid image data rows in the first half area and the second half area.

[0066] In practical applications, after obtaining the first frame of valid signal and the second frame of valid signal of the dual-sided array visible light detector, the frame valid signals of the two half-areas can be integrated. Specifically, the frame valid signal of the visible light detector is generally pulled high during the physical row readout, that is, pulled high during the readout of the dark row and the valid image row, and is at a low level during the readout of the pre-scan row. In this step, the frame valid signal of the second half-area is shaped so that it is only pulled high during the readout of the valid image row of the second half-area. Therefore, dark row counting needs to be performed. First, the number of the second dark rows in the second half-area needs to be determined. If the number of the second invalid rows in the second half-area is greater than the maximum number of dark rows, the number of dark rows in the second half-area is modified to the maximum number of dark rows; otherwise, the number of the second dark rows is modified to the number of the second invalid rows. When the rising edge of the second frame of valid signal arrives, start dark row counting through the row valid signal and pull down the frame valid signal to be shaped. When outputting the valid image data, keep the frame valid signal to be shaped pulled high until the readout of the valid image data is completed.

[0067] Step 103: Based on the third frame of valid signal, control the dual-sided array visible light detector to perform image acquisition.

[0068] Specifically, the third frame of valid signal obtained by the OR operation can be used to screen the image data collected by the dual-sided array visible light detector, and the image data that does not meet the third frame of valid signal can be excluded therefrom.

[0069] In the image acquisition method based on the dual-sided array visible light detector provided in this embodiment, the frame valid signals of the two partitions of the dual-sided array visible light detector can be obtained respectively. After shaping the two frame valid signals and then performing the OR operation, the frame valid signals of the two partitions can be changed from the state of independent control to the synchronous state. Furthermore, the two partitions can perform synchronous image acquisition at the same time, realizing the pseudo single-sided array operation, avoiding the drawback that the frame valid signals of the two partitions are not synchronous, resulting in the two partitions not being able to be exposed simultaneously, and meeting the synchronization requirements when using the visible light detector for image acquisition.

[0070] In the exemplary embodiment, the determining the first frame of valid signal of the first half-area of the dual-sided array visible light detector and the second frame of valid signal of the second half-area includes:

[0071] Determine the number of the first valid rows, the number of the first invalid rows of the first half-area of the dual-sided array visible light detector, and the number of the second valid rows of the second half-area;

[0072] Based on the number of the first valid rows and the number of the first invalid rows, determine the number of the second invalid rows of the second half-area of the dual-sided array visible light detector;

[0073] Input the number of the first valid rows, the number of the first invalid rows, the number of the second valid rows, and the number of the second invalid rows into the double-sided array visible light detector, and obtain the first frame of valid signal and the second frame of valid signal output by the double-sided array visible light detector.

[0074] Among them, determining the number of the first valid rows and the number of the first invalid rows of the first half area of the double-sided array visible light detector includes:

[0075] Obtain the first starting row, the first ending row, and the first dark row of the first half area of the double-sided array visible light detector;

[0076] Based on the first starting row and the first ending row, calculate the number of the first valid rows;

[0077] Based on the first dark row, calculate the number of the first invalid rows.

[0078] In practical applications, the array composition of the double-sided array visible light detector generally includes invalid rows with configurable readout row numbers, and the invalid rows include dark rows and pre-scan rows. The dark rows are several fixed rows of the array that cannot collect real images. The pre-scan rows are virtual invalid data rows read before the dark rows and used to configure the readout timing. The number of configurable rows is often much larger than the number of effective image data rows. In this step, calculate the number of the first valid rows of the first half area according to the serial port configuration data and determine the number of the first invalid rows of the first half area.

[0079] Figure 2 It is the array composition block diagram of the double-sided array visible light detector provided by the embodiment of the present invention.

[0080] As Figure 2 shown, the image data of each half area of the double-sided array visible light detector provided in this embodiment includes configurable effective image rows and configurable invalid data rows. The invalid data rows include 16 physical dark rows and pre-scan rows with a maximum number of 261048 rows. The effective image rows can start from row 0, and the maximum row address is 1079, that is, at most 1080 rows.

[0081] Further, the number of the first valid rows of the first half area satisfies the following formula:

[0082] M T = T END - T START + 1

[0083] Among them, T END is the first ending row, and T START is the first starting row.

[0084] The number of the first invalid rows can be set to the minimum value of the first dark row to ensure the high-frequency frames of image acquisition.

[0085] In an exemplary embodiment, determining the number of invalid rows in the second half-region of the double-sided array visible light detector based on the number of valid rows in the first half-region and the number of invalid rows in the first half-region includes:

[0086] Adding the number of valid rows in the first half-region to the number of invalid rows in the first half-region to obtain the number of invalid rows in the second half-region.

[0087] The number of invalid rows in the second half-region satisfies the following formula:

[0088] N BINVAL = M T + N TINVAL

[0089] where M T is the number of valid rows in the first half-region, and N TINVAL is the number of invalid rows in the first half-region.

[0090] where starting the dark row count at the rising edge of the second-frame valid signal includes:

[0091] Obtaining the maximum number of dark rows in the second half-region of the double-sided array visible light detector;

[0092] Modifying the second dark row in the second half-region based on the magnitude relationship between the maximum number of dark rows and the number of invalid rows in the second half-region;

[0093] Performing a dark row count based on the modified second dark row.

[0094] where modifying the second dark row in the second half-region based on the magnitude relationship between the maximum number of dark rows and the number of invalid rows in the second half-region includes:

[0095] If the number of invalid rows in the second half-region is greater than the maximum number of dark rows in the second half-region, modifying the second dark row to the maximum number of dark rows;

[0096] If the number of invalid rows in the second half-region is less than or equal to the maximum number of dark rows in the second half-region, modifying the second dark row to the number of invalid rows in the second half-region.

[0097] The image acquisition system provided by the present invention will be described below. The image acquisition system based on the double-sided array visible light detector described below can be correspondingly referred to the image acquisition method based on the double-sided array visible light detector described above.

[0098] Figure 3 is a schematic structural diagram of the image acquisition system provided by an embodiment of the present invention.

[0099] As shown in Figure 3As shown in the figure, an image acquisition system based on a double-sided array visible light detector includes:

[0100] A signal acquisition unit 301, configured to determine a first frame of valid signal of the first half area of the double-sided array visible light detector, and determine a second frame of valid signal of the second half area;

[0101] A signal processing unit 302, configured to shape the second frame of valid signal, and perform an OR operation on the first frame of valid signal and the second frame of valid signal to determine a third frame of valid signal, where the third frame of valid signal is set to a high level when the dark row in the first half area is read out, and is set to a low level after the valid rows in the second half area are read out;

[0102] An image acquisition unit 303, configured to control the double-sided array visible light detector to perform image acquisition based on the third frame of valid signal.

[0103] Figure 4 It is a schematic structural diagram of a real-time imaging system provided by an embodiment of the present invention.

[0104] As Figure 4 shown, the present invention further provides a real-time imaging system based on a double-sided array visible light detector, including a control chip, configured to implement the image acquisition method based on a double-sided array visible light detector described in any one of the above embodiments;

[0105] A double-sided array visible light detector, including a first half area and a second half area;

[0106] An image display device, configured to image the image acquired by the double-sided array visible light detector.

[0107] Wherein, the first half area and the second half area of the double-sided array visible light detector can perform image exposure synchronously.

[0108] Specifically, the control chip can be a Field Programmable Gate Array (FPGA). In addition to the FPGA, the double-sided array visible light detector, and the image display device, the real-time imaging system may further include a camera power supply circuit, and the camera power supply circuit may include a +12V power interface, an FPGA power supply circuit, a visible light detector power supply circuit, a DAC drive circuit, and an operational amplifier subtraction circuit.

[0109] Among them, the FPGA power supply circuit uses a switching power supply chip to power on the FPGA chip sequentially. The visible light detector power supply circuit uses a low dropout linear voltage regulator chip to provide low-ripple power supply for the visible light detector. The DAC drive circuit and the operational amplifier subtraction circuit are standby modules for powering the visible light detector, and their output voltages are adjustable, facilitating the switching of the bias voltage when changing the working mode of the visible light detector.

[0110] In this embodiment, the dual-sided array visible light detector provided has a model number of CIS2521F and operates in an externally triggered rolling shutter mode. Its characteristics are that it has two independently operating upper and lower half-areas, namely the first half-area and the second half-area, and the two half-areas are independently controlled. Both the first half-area and the second half-area have an external trigger control pin READ for controlling the exposure and imaging of the visible light detector, multiple register configuration pins for internal register configuration, and a pulse indication signal pin CHARGE_TRANS, which controls the edge of the READ signal when it is at a low level.

[0111] Furthermore, the exposure control of the visible light detector is achieved by controlling the READ signal to be pulled high or low through the FPGA. The visible light detector detects the READ signal at the rising edge of the line valid. When the rising edge of the READ signal is detected, the visible light detector starts to expose, and when the falling edge of the READ signal is detected, the exposure ends and the readout of the image data begins.

[0112] Figure 5 It is a schematic diagram of the connection relationship between the detector and the control chip provided by the embodiment of the present invention.

[0113] As Figure 5As shown in the figure, each half region of the detector has independent input clock pins CLK_IN, external trigger pin READ, JTAG configuration pins, data synchronization clock output pin SCLK, pulse indication signal pin CHARGE_TRANS, 11-bit image data output pin DATA, frame valid signal F_VALID, and line valid signal L_VALID. Among them, F_VALID is pulled high when reading dark lines and valid image lines in physical lines, i.e., invalid lines, and is pulled low when reading pre-scan lines and at other times. L_VALID is pulsed high at the start of each line and low at the end. CHARGE_TRANS is a flag signal, which takes the line as a cycle. The high level indicates that the ADC is collecting data. At this time, it is best not to give control signal pulses to avoid interrupting the ADC collection. The READ signal is the external trigger signal for the exposure and readout of CIS2521F. The exposure control of the visible light detector is achieved by controlling the READ signal to be pulled high or low through the FPGA. The visible light detector detects the READ signal at the rising edge of the line valid. When the rising edge of the READ signal is detected, the visible light detector starts to expose, and when the falling edge of the READ signal is detected, the exposure ends and the readout of image data starts. CIS2521F has multiple registers for mode configuration. The present invention mainly relates to registers 6, 7, and 8. Register 6 is the register for configuring the starting row address of the valid image in the half region, register 7 is the register for configuring the ending row address of the valid image in the half region, and register 8 is for configuring the number of invalid data rows in the half region. When the value of register 8 is less than or equal to 16, the invalid data rows are all dark lines; when the value of register 8 is greater than 16, the invalid data rows include pre-scan lines and dark lines.

[0114] Furthermore, the register configuration of CIS2521F adopts the JTAG interface, and the upper and lower half regions have independent JTAG configuration interfaces.

[0115] Furthermore, as Figure 2 shown, the image data of each half region of CIS2521F includes configurable valid image lines and configurable invalid data lines. The invalid data lines include 16 physical dark lines and pre-scan lines with a maximum number of 261048 lines. The valid image lines can start from row 0 and have a maximum of 1080 lines.

[0116] The FPGA includes an RS422 serial port receiving module, an ROI parameter calculation module, a JTAG data sending module, a detector control module, a frame valid signal waveform integration module, and an image data collection module.

[0117] The RS422 serial port receiving module is used to receive the register configuration information and camera control information transmitted from the host computer, including the start and end rows TSTART and TEND of the effective image area in the first half area, the start and end rows BSTART and BEND of the effective image area in the second half area, frame rate, exposure time and other parameters.

[0118] The ROI parameter calculation module is used to calculate the number of invalid rows in the second half area according to the data received by the RS422 serial port receiving module, so as to ensure that the data does not overlap while the first half area and the second half area are exposed simultaneously, and read out the visible light detector in turn. The number of effective image data rows M in the first half area T = T END - T START + 1. The number of invalid rows N in the first half area TINVAL is set to the minimum value of the dark row to ensure the high frame rate of image acquisition. According to the calculation result M of the number of effective image rows in the first half area T and the number of invalid rows N TINVAL to determine the number of invalid rows N in the second half area BINVAL = M T + N TINVAL .

[0119] The JTAG data sending module is used to configure the internal registers of the visible light detector, and write the information such as the start and end rows of the effective images in the two half areas and the configuration of the number of invalid rows into the visible light detector.

[0120] The detector control module is used to control the external trigger signal READ of the visible light detector. This module synchronously controls the READ signals of the first and second half areas according to the frame rate F and exposure time T EXP sent by the host computer. After the register configuration is completed, the READ signal is pulled high at the first falling edge of CHARGE_TRANS, and counting starts at the first rising edge of the READ signal. When the counting time reaches T EXP , wait for the falling edge of CHARGE_TRANS to pull the READ signal low. When the counting time reaches 1 / F seconds, wait for the falling edge of CHARGE_TRANS to pull the READ signal high again, so that the visible light detector performs the exposure of the next frame, and start to loop the above steps.

[0121] The frame valid signal waveform integration module is used to generate the final frame valid signal waveform for receiving pseudo single-sided array image data. In this module, first, the number of dark rows in the second half region is judged. After determining the number of dark rows in the second half region, the dark row count starts at the rising edge of the frame valid signal in the second half region, and the frame valid signal to be shaped is pulled low. When the count value reaches the second dark row, the count value is cleared and the frame valid signal to be shaped is pulled high. When outputting valid image data, the frame valid signal to be shaped remains high until the reading of the valid image data is completed. Finally, the frame valid signals of the second half region and the first half region after shaping are ORed to obtain the final pseudo single-sided array frame valid signal. This signal is pulled high when reading the dark rows in the first half region and pulled low after the reading of the valid image data rows in the second half region is completed, realizing the seamless connection of the reading of the valid image data rows in the first half region and the second half region.

[0122] The image data acquisition module uses the shaped frame valid signal to perform pseudo single-sided array acquisition of the image data and transmits it to the host computer for display through the cameralink interface.

[0123] Figure 6 It is the flow structure diagram of the image acquisition method provided by the embodiment of the present invention.

[0124] Figure 7 It is the timing diagram of the image acquisition method provided by the embodiment of the present invention.

[0125] Next, in combination with the real-time imaging system provided by the present application, the image acquisition system provided by the present application will be introduced in detail, as Figure 6 and Figure 7 shown, including the following steps:

[0126] Step 1: Send through the host computer and receive the exposure time T EXP =1ms, frame rate F = 100HZ, the first starting row and the first ending row of the first half region, the second starting row and the second ending row of the second half region. The first starting row and the first ending row of the first half region are respectively denoted as T START =0 and T END =99, the second starting row and the second ending row of the second half region are respectively denoted as B START =0 and B END =199.

[0127] Step 2: Calculate the number of first valid rows in the first half region and determine the number of first invalid rows in the first half region in the ROI parameter calculation module. The number of first valid rows in the first half region is denoted as M T =T END -T START +1 = 99 - 0 + 1 = 100 rows. The number of first invalid rows N in the first half region TINVALSet to 2 in the program to ensure a high frame rate for image acquisition. Calculate the result M based on the number of valid rows in the first half-region T = 100 rows and the number of invalid rows N in the first half-region TINVAL = 2 to determine the number of invalid rows N in the second half-region BINVAL = M T + N TINVAL = 100 + 2 = 102 rows.

[0128] Step 3: Send the result of Step 2 to the visible light detector through the JTAG data sending module via the JTAG interface and complete the register configuration, enabling the visible light detector to operate normally in the externally-triggered rolling shutter mode, and successfully configuring the start and end addresses of the valid image rows and the number of invalid rows.

[0129] Step 4: Control the exposure and imaging of the visible light detector through the detector control module. First, set the working clock input CLK_IN of the visible light detector to 130 MHZ, and the main clock of the detector control module also uses the same-source 130 MHZ clock. Then, according to the frame rate F and exposure time T sent by the host computer EXP synchronously control the READ signals of the first half-region and the second half-region. After the register configuration is completed, wait for the falling edge of the first CHARGE_TRANS to arrive. When the falling edge of CHARGE_TRANS is detected, simultaneously raise the READ signals of the first half-region and the second half-region. The visible light detector starts to expose, and use a counter to start counting the exposure time. Since the 130 M main clock is used, the maximum value of the exposure time count should be 130M * T EXP / 1000 - 1 = 130M / 1000 - 1 = 129999, and the maximum value of the frame time count should be 130M * (1 / F) - 1 = 130M * (1 / 100) - 1 = 1299999. When the count value reaches 129999, wait for the next falling edge of CHARGE_TRANS to arrive and then pull down the READ signal to ensure that the exposure time of each frame is the same. Otherwise, there may be a time difference of one row between the exposure times of frames, resulting in image flickering. When the count value reaches 1299999, clear the count value and raise the READ signal again to enable the visible light detector to perform the exposure of the next frame and start cycling.

[0130] Step 5: Generate the final frame valid signal waveform for pseudo single-sided array operation through the frame valid signal waveform integration module. In this module, first judge the number of dark rows N in the second half-region BBLACK , since the number of invalid rows N in the second half-region of the embodiment of the present invention BINVAL = 102 rows, which is greater than the number of the maximum dark row value, so the number of dark rows N in the second half-region BBLACK= 16. After determining the number of dark rows, start dark row counting at the rising edge of the frame valid signal in the second half region. Each time the rising edge of the line valid signal is detected, the count value is incremented by 1, and the frame valid signal to be shaped is pulled low. When the count value reaches 16, the count value is cleared and the frame valid signal to be shaped is pulled high. When outputting the valid image data, the frame valid signal to be shaped is continuously pulled high until the reading of the valid image data is completed. Finally, perform an OR operation on the shaped frame valid signals of the second half region and the first half region to obtain the final pseudo single-sided array frame valid signal. This signal is pulled high during the dark row reading in the first half region and pulled low after the reading of the valid image data rows in the second half region is completed, realizing a seamless connection for the reading of the valid image data rows in the first half region and the second half region.

[0131] Step 6: Use the shaped frame valid signal through the image data acquisition module to perform pseudo single-sided array acquisition on the image data and transmit it to the host computer for display through the Cameralink interface. The main clock of the Cameralink transmission chip in the camera system uses 65 MHZ and the dual TAP mode is used, that is, two pixels are transmitted to the host computer at a time, ensuring a relatively high frame rate.

[0132] Figure 8 An example of a schematic physical structure diagram of an electronic device is shown as Figure 8 shown. The electronic device may include: a processor 810, a communication interface 820, a memory 830, and a communication bus 840. Among them, the processor 810, the communication interface 820, and the memory 830 communicate with each other through the communication bus 840. The processor 810 can call the logical instructions in the memory 830 to execute an image acquisition method based on a double-sided array visible light detector. The method includes:

[0133] Determine the first frame valid signal of the first half region of the double-sided array visible light detector, and determine the second frame valid signal of the second half region;

[0134] After shaping the second frame valid signal, perform an OR operation on the first frame valid signal and the second frame valid signal to determine a third frame valid signal. The third frame valid signal is set to a high level during the dark row reading in the first half region and set to a low level after the reading of the valid rows in the second half region is completed;

[0135] Based on the third frame valid signal, control the double-sided array visible light detector to perform image acquisition;

[0136] Among them, shaping the second frame valid signal includes:

[0137] Start dark row counting at the rising edge of the second frame valid signal, and set the second frame valid signal to be shaped to a low level;

[0138] During image acquisition, set the second frame valid signal to be shaped to a high level.

[0139] In addition, when the logical instructions in the above-mentioned memory 830 are implemented in the form of software functional units and sold or used as independent products, they can be stored in a computer-readable storage medium. Based on such an understanding, the technical solution of the present invention, in essence, or the part that contributes to the prior art, or a part of this technical solution, can be embodied in the form of a software product. This computer software product is stored in a storage medium and includes several instructions for causing a computer device (which can be a personal computer, a server, or a network device, etc.) to execute all or part of the steps of the methods of the various embodiments of the present invention. The aforementioned storage medium includes: various media such as USB flash drives, mobile hard disks, read-only memories (ROM, Read-Only Memory), random access memories (RAM, Random Access Memory), magnetic disks, or optical discs that can store program codes.

[0140] On the other hand, the present invention also provides a computer program product. The computer program product includes a computer program. The computer program can be stored on a non-transitory computer-readable storage medium. When the computer program is executed by a processor, the computer can execute the image acquisition method based on a double-sided array visible light detector provided by the above-mentioned various methods. The method includes:

[0141] Determine the first frame valid signal of the first half area of the double-sided array visible light detector, and determine the second frame valid signal of the second half area;

[0142] After shaping the second frame valid signal, perform an OR operation on the first frame valid signal and the second frame valid signal to determine a third frame valid signal. The third frame valid signal is set to a high level during the dark row readout of the first half area and set to a low level after the valid row readout of the second half area is completed;

[0143] Based on the third frame valid signal, control the double-sided array visible light detector to perform image acquisition;

[0144] Among them, shaping the second frame valid signal includes:

[0145] Start dark row counting at the rising edge of the second frame valid signal, and set the second frame valid signal to be shaped to a low level;

[0146] During image acquisition, set the second frame valid signal to be shaped to a high level.

[0147] In another aspect, the present invention also provides a non-transitory computer-readable storage medium, on which a computer program is stored. When the computer program is executed by a processor, it implements an image acquisition method based on a two-sided array visible light detector provided by the above-mentioned various methods. The method includes:

[0148] Determine the first frame of valid signals in the first half area of the two-sided array visible light detector, and determine the second frame of valid signals in the second half area;

[0149] After shaping the second frame of valid signals, perform an OR operation on the first frame of valid signals and the second frame of valid signals to determine the third frame of valid signals. The third frame of valid signals is set to a high level when the dark rows in the first half area are read out, and is set to a low level after the valid rows in the second half area are read out;

[0150] Based on the third frame of valid signals, control the two-sided array visible light detector to perform image acquisition;

[0151] Among them, shaping the second frame of valid signals includes:

[0152] Start dark row counting at the rising edge of the second frame of valid signals, and set the second frame of valid signals to be shaped to a low level;

[0153] During image acquisition, set the second frame of valid signals to be shaped to a high level.

[0154] The device embodiments described above are merely illustrative. The units described as separate components may or may not be physically separated, and the components shown as units may or may not be physical units, that is, they may be located in one place, or may be distributed to multiple network units. Some or all of the modules can be selected according to actual needs to achieve the purpose of the solution of this embodiment. Those of ordinary skill in the art can understand and implement it without creative labor.

[0155] Through the description of the above embodiments, those skilled in the art can clearly understand that each embodiment can be implemented by means of software plus a necessary general hardware platform, and of course, it can also be implemented by hardware. Based on this understanding, the above technical solution, in essence, or the part that contributes to the prior art can be embodied in the form of a software product. The computer software product can be stored in a computer-readable storage medium, such as ROM / RAM, magnetic disk, optical disk, etc., including several instructions for causing a computer device (which can be a personal computer, server, or network device, etc.) to execute the methods of each embodiment or some parts of the embodiments.

[0156] Finally, it should be noted that the above embodiments are only used to illustrate the technical solutions of the present invention, rather than to limit it; although the present invention has been described in detail with reference to the foregoing embodiments, those of ordinary skill in the art should understand that they can still modify the technical solutions described in the foregoing embodiments, or perform equivalent replacements for some of the technical features; and these modifications or replacements do not make the essence of the corresponding technical solutions deviate from the spirit and scope of the technical solutions of the embodiments of the present invention.

Claims

1. An image acquisition method based on a double-sided array visible light detector, characterized in that, Including: Determining a first frame of valid signals in a first half region of a double-sided array visible light detector, and determining a second frame of valid signals in a second half region; After shaping the second frame of valid signals, performing an OR operation on the first frame of valid signals and the second frame of valid signals to determine a third frame of valid signals, where the third frame of valid signals is set to a high level when dark rows in the first half region are read out, and is set to a low level after the readout of valid rows in the second half region is completed; Based on the third frame of valid signals, controlling the double-sided array visible light detector to perform image acquisition; Wherein, shaping the second frame of valid signals includes: Starting dark row counting at the rising edge of the second frame of valid signals, and setting the second frame of valid signals to be shaped to a low level; During image acquisition, setting the second frame of valid signals to be shaped to a high level.

2. The image acquisition method based on the double-sided array visible light detector according to claim 1, wherein The determining a first frame of valid signals in a first half region of the double-sided array visible light detector, and determining a second frame of valid signals in a second half region includes: Determining a first number of valid rows, a first number of invalid rows in a first half region of the double-sided array visible light detector, and a second number of valid rows in a second half region; Based on the first number of valid rows and the first number of invalid rows, determining a second number of invalid rows in a second half region of the double-sided array visible light detector; Inputting the first number of valid rows, the first number of invalid rows, the second number of valid rows, and the second number of invalid rows into the double-sided array visible light detector, and obtaining a first frame of valid signals and a second frame of valid signals output by the double-sided array visible light detector.

3. The image acquisition method based on the double-sided array visible light detector according to claim 2, wherein, The determining a first number of valid rows and a first number of invalid rows in a first half region of the double-sided array visible light detector includes: Obtaining a first starting row, a first ending row, and a first dark row in a first half region of the double-sided array visible light detector; Based on the first starting row and the first ending row, calculating the first number of valid rows; Based on the first dark row, calculating the first number of invalid rows.

4. The image acquisition method based on the double-sided array visible light detector according to claim 2, wherein, The based on the first number of valid rows and the first number of invalid rows, determining a second number of invalid rows in a second half region of the double-sided array visible light detector includes: Summing the first number of valid rows and the first number of invalid rows to obtain a second number of invalid rows in a second half region.

5. The image acquisition method based on a double-sided array visible light detector according to claim 1, characterized in that The starting dark row counting at the rising edge of the second frame of valid signals includes: Obtaining a maximum number of dark rows in a second half region of the double-sided array visible light detector; Based on the size relationship between the maximum number of dark rows and the second number of invalid rows, modifying the second dark row in the second half region; Performing dark row counting based on the modified second dark row.

6. The image acquisition method based on a double-sided array visible light detector according to claim 5, wherein The based on the size relationship between the maximum number of dark rows and the second number of invalid rows, modifying the second dark row in the second half region includes: If the second number of invalid rows is greater than the maximum number of dark rows in the second half region, modifying the second dark row to the maximum number of dark rows; If the second number of invalid rows is less than or equal to the maximum number of dark rows in the second half region, modifying the second dark row to the second number of invalid rows.

7. An image acquisition system based on a double-sided array visible light detector, characterized in that, Including: A signal acquisition unit, configured to determine a first frame of valid signal in the first half region of the double-sided array visible light detector, and determine a second frame of valid signal in the second half region; A signal processing unit, configured to shape the second frame of valid signal, and perform an OR operation on the first frame of valid signal and the second frame of valid signal to determine a third frame of valid signal, where the third frame of valid signal is set to a high level when the dark rows in the first half region are read out, and is set to a low level after the valid rows in the second half region are read out; An image acquisition unit, configured to control the double-sided array visible light detector to perform image acquisition based on the third frame of valid signal; Wherein the signal processing unit is further configured to: Start dark row counting at the rising edge of the second frame of valid signal, and set the second frame of valid signal to be shaped to a low level; Set the second frame of valid signal to be shaped to a high level during image acquisition.

8. A real-time imaging system based on a double-sided array visible light detector, characterized in that, Comprising: A control chip, configured to implement the image acquisition method based on the double-sided array visible light detector according to any one of claims 1-6; A double-sided array visible light detector, including a first half region and a second half region; An image display device, configured to image the image acquired by the double-sided array visible light detector.

Images