Low-power-consumption dual-firmware chip system and starting control method thereof, electronic equipment and storage medium

Abstract

The invention discloses a low-power-consumption dual-firmware chip system and a starting control method thereof, electronic equipment and a storage medium. The starting control method comprises the steps that a chip obtains a bootcode Bootrom from a read-only memory and starts the bootcode Bootrom; running the application firmware; before application firmware enters a low-power-consumption mode, a CPU register is backed up to a non-power-down RAM in advance; the system enters a low-power-consumption mode; after the low-power-consumption mode of the system is awakened, due to the fact that the CPU is powered off and restarted, a boot code Bootrom is obtained from the read-only memory and started; the low-power-consumption firmware is operated, the PLL is recovered by the low-power-consumption firmware, then the CPU clock is switched to the faster PLL, the Flash and the CPU are recovered, and finally the application firmware is skipped back; the application firmware recovers the clock and the sub-function module by using the address returned in the low-power-consumption mode; and continuing to process the application service. According to the invention, the portability of low-power-consumption items can be remarkably improved.

Description

Technical Field

[0001] The present invention belongs to the field of electronic information technology, relates to a chip system, and particularly relates to a low-power dual-firmware chip system, a startup control method thereof, an electronic device, and a storage medium. Background Art

[0002] With the increasing attention paid to energy issues by people and the gradual development of wearable devices, the power consumption performance of products has received more and more attention, and more and more chips have added low-power modes to meet the gradually increasing low-power requirements. The low-power mode of a chip is often achieved by turning off most of the sub-modules. In order to achieve extremely low power consumption, the power supply of the CPU is even turned off. When the CPU of the chip is powered on again, by default, it restarts from the Bootrom, and then initializes the stack and heap areas. This process not only takes a long time but also causes the stack data to be lost.

[0003] In view of this, there is an urgent need to design a new chip system today to overcome at least some of the above-mentioned defects existing in the existing chip system. Summary of the Invention

[0004] The present invention provides a low-power dual-firmware chip system, a startup control method thereof, an electronic device, and a storage medium, which can significantly improve the portability of low-power projects.

[0005] To solve the above technical problems, according to one aspect of the present invention, the following technical solution is adopted:

[0006] A startup control method for a low-power dual-firmware chip system, the startup control method comprising:

[0007] Step S1, the chip obtains the startup code Bootrom from the read-only memory and starts up;

[0008] Step S2, running the application firmware;

[0009] Step S3, before the application firmware enters the low-power mode, the CPU registers are backed up to the non-volatile RAM in advance;

[0010] Step S4, the system enters the low-power mode;

[0011] Step S5, after the low-power mode of the system is awakened, since the CPU is powered off and restarted, it obtains the startup code Bootrom from the read-only memory and starts up, obtains the startup code Bootrom from the read-only memory and starts up, and the CPU determines that the low-power firmware should be executed for this startup;

[0012] Step S6: Run the low-power firmware. The low-power firmware restores the phase-locked loop (PLL), then switches the CPU clock to a faster PLL, restores the Flash and the CPU, and finally jumps back to the application firmware. The application firmware restores the clock and sub-function modules using the address returned in the low-power mode.

[0013] Step S7: Continue to process the application services.

[0014] As an implementation of the present invention, in the low-power mode, the RAM where the heap and stack areas are located does not lose power and the data is not lost.

[0015] As an implementation of the present invention, the sub-function module includes at least one of the ADC, USB, and AUADC function modules.

[0016] According to another aspect of the present invention, the following technical solution is adopted: A low-power dual-firmware chip system, the low-power dual-firmware chip system includes:

[0017] A startup module for controlling the chip to obtain the startup code Bootrom from the read-only memory and start up;

[0018] An application firmware for backing up the CPU registers to the non-volatile RAM before entering the low-power mode and then running the low-power firmware. The application firmware also restores the clock and sub-function modules using the address returned in the low-power mode.

[0019] A low-power firmware for restoring the phase-locked loop (PLL), switching the CPU clock to a faster PLL, restoring the Flash and the CPU, and then jumping back to the application firmware.

[0020] As an implementation of the present invention, in the low-power mode, the RAM where the heap and stack areas are located does not lose power and the data is not lost.

[0021] As an implementation of the present invention, the sub-function module includes at least one of the ADC, USB, and AUADC function modules.

[0022] According to yet another aspect of the present invention, the following technical solution is adopted: An electronic device, including a memory, a processor, and a computer program stored on the memory and executable on the processor. When the processor executes the computer program, the steps of the above method are implemented.

[0023] According to yet another aspect of the present invention, the following technical solution is adopted: A storage medium storing computer program instructions, and when the computer program instructions are executed by a processor, the steps of the above method are implemented.

[0024] The beneficial effects of the present invention are as follows: The low-power dual-firmware chip system, its startup control method, electronic device, and storage medium proposed by the present invention can significantly improve the portability of low-power projects.

[0025] After the chip exits the low-power mode, the present invention can restore it to the state before entering the low-power mode and then continue to execute the subsequent code, making it more convenient for users to use the low-power mode. To achieve this effect, the chip needs to restore all sub-modules and protect the original stack space. The present invention proposes to make a separate firmware for the restoration of the CPU and Flash, so that any low-power project can use this firmware to restore the CPU and Flash, which can significantly improve the portability of low-power projects. BRIEF DESCRIPTION OF THE DRAWINGS

[0026] Figure 1 It is a flowchart of the startup control method of the low-power dual-firmware chip system in an embodiment of the present invention.

[0027] Figure 2 It is a schematic diagram of the composition of the low-power dual-firmware chip system in an embodiment of the present invention.

[0028] Figure 3 It is a schematic diagram of the low-power firmware continuing to enter the low-power mode in an embodiment of the present invention.

[0029] Figure 4 Flowchart of the startup control method of the low-power dual-firmware chip system in an embodiment of the present invention

[0030] Figure 5 It is a schematic diagram of the composition of the electronic device in an embodiment of the present invention. DETAILED DESCRIPTION OF THE EMBODIMENTS

[0031] The preferred embodiments of the present invention will be described in detail below with reference to the accompanying drawings.

[0032] To further understand the present invention, the preferred implementation schemes of the present invention will be described below in conjunction with embodiments. However, it should be understood that these descriptions are only for further explaining the features and advantages of the present invention, rather than limiting the claims of the present invention.

[0033] The description of this part only focuses on several typical embodiments, and the present invention is not limited to the scope described in the embodiments. The mutual replacement of the same or similar prior art means and some technical features in the embodiments is also within the scope of the description and protection of the present invention.

[0034] The expression of the steps in each embodiment in the specification is only for convenience of description, and the implementation manner of the present application is not limited by the order of step implementation.

[0035] "Connection" in the specification includes both direct connection and indirect connection, such as connection through some active devices, passive devices or conduction media; it may also include connection through other active devices or passive devices that are well-known to those skilled in the art based on achieving the same or similar functional purposes, such as connection through circuits or components such as switches and follower circuits.

[0036] The present invention discloses a startup control method for a low-power dual-firmware chip system. Figure 1 、 Figure 4 is a flowchart of the startup control method for the low-power dual-firmware chip system in an embodiment of the present invention; please refer to Figure 1 、 Figure 4 The startup control method includes:

[0037]

Step S1

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Step S2

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Step S3

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Step S4

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Step S5

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Step S6

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Step S7

[0044] The present invention also discloses a low-power dual-firmware chip system, which includes: a startup module, an application firmware, and a low-power firmware.

[0045] The startup module is used to control the chip to obtain the startup code Bootrom from the read-only memory and start up.

[0046] The application firmware is used to back up the CPU registers to the non-volatile RAM before entering the low-power mode, and then run the low-power firmware; the application firmware also uses the address returned in the low-power mode to restore the clock and sub-function modules; in one embodiment, the sub-function modules include at least one of the ADC, USB, and AUADC function modules.

[0047] The low-power firmware is used to restore the phase-locked loop PLL, switch the CPU clock to a faster PLL, and then restore the Flash and the CPU, and then jump back to the application firmware.

[0048] In one embodiment of the present invention, in the low-power mode, the RAM where the heap and stack areas are located does not lose power and the data is not lost.

[0049] The normal startup process of the chip starts from the Bootrom and then runs the application firmware. Before entering the low-power mode, the application firmware backs up the CPU registers to the non-volatile RAM in advance and then enters the low-power mode; in addition, in the low-power mode, the ram where the heap and stack areas are located cannot lose power and the data cannot be lost. After waking up from the low-power state, since the CPU is powered off and restarted, it starts from the Bootrom. The Bootrom determines that this startup is a recovery from the low-power state and jumps to the low-power mode. The low-power firmware restores the PLL, then switches the cpu clock to a faster PLL, then restores the Flash and the CPU, and finally jumps back to the application firmware. The application firmware only needs to restore the clock and sub-modules after the address returned in the low-power mode, and then can continue to process the application services.

[0050] The low-power firmware can also complete certain specific tasks and then continue to enter the sleep mode until a wake-up event occurs and then restore the application firmware. In this way, the advantage of the low-power dual-firmware system is more obvious, because this system can directly complete the task without restoring to the application firmware, and then continue to enter the low-power mode, reducing the active time of the chip, thereby reducing the average power consumption. The schematic of the low-power firmware continuing to enter the low-power mode is as Figure 3 shown.

[0051] In a usage scenario of the present invention, the low-power software system includes two independently compiled firmwares, one is the application firmware (APP_FW) and the other is the low-power firmware (LP_FW). The application firmware implements low power consumption based on the tickless mechanism of FreeRTOS, that is, when there are no other tasks ready to run, the system enters the IDLE task. In the IDLE task, the system can know the sleep time of the system, and then enter the hardware PDS15 low-power mode (CPU, peripherals, WiFi powered off, RAM not powered off), thereby realizing the low power consumption of the system.

[0052] In actual application scenarios, the reasons for waking up from low power consumption include: FreeRTOS timing tasks, WiFi data packets, and external GPIO interrupts, etc. These wake-up sources are processed by the low-power firmware. The main division of labor between the application firmware and the low-power firmware is as follows:

[0053] Application firmware (APP_FW): Initialization of peripheral GPIOs; Application business logic; Low-power mode setting and wake-up source (RTC, GPIO, DTIM) setting; Re-initialization of peripheral GPIOs after waking up from low power consumption.

[0054] Low-power firmware (LP_FW): GPIO wake-up judgment; RTC wake-up judgment; DTIM reception and wake-up judgment; Flash XIP mode recovery.

[0055] The low-power firmware can implement frequent periodic tasks. Since the low-power firmware runs on the RAM and does not need to restore the flash, the power consumption of jumping to the application firmware to execute the task after restoring the flash can be saved.

[0056] The present invention also discloses an electronic device, Figure 5 which is a schematic diagram of the composition of the electronic device in an embodiment of the present invention; please refer to Figure 5 , at the hardware level, the electronic device includes a memory, a processor, and at least one network interface; the processor can be a microprocessor, and the memory can include a memory, such as a random access memory (RAM), and can also include a non-volatile memory, etc. Of course, the electronic device can also be provided with other hardware as needed.

[0057] The processor, network interface, and memory can be interconnected through an internal bus, and the internal bus can be an ISA (Industry Standard Architecture) bus, a PCI (Peripheral Component Interconnect Standard) bus, or an EISA (Extended Industry Standard Architecture) bus, etc.; the bus can include an address bus, a data bus, a control bus, etc. The memory is used to store programs (which can include an operating system program and an application program); the program can include program code, and the program code can include computer operation instructions. The memory can include a memory and a non-volatile memory, and provide instructions and data to the processor.

[0058] In one embodiment, the processor can read the corresponding program from the non-volatile memory into the memory and then run; the processor can execute the program stored in the memory and is specifically used to perform the following operations (as Figure 1 shown):

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Step S7

[0066] The present invention further discloses a storage medium, on which computer program instructions are stored. When the computer program instructions are executed by a processor, the following steps of the method of the present invention are implemented (as Figure 1 shown):

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Step S1

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Step S2

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Step S3

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Step S4

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Step S5

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Step S6

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Step S7

[0074] In summary, the low-power dual-firmware chip system, its startup control method, electronic device, and storage medium proposed by the present invention can significantly improve the portability of low-power projects.

[0075] It should be noted that the present application can be implemented in software and / or a combination of software and hardware. For example, it can be implemented using an application-specific integrated circuit (ASIC), a general-purpose computer, or any other similar hardware device. In some embodiments, the software program of the present application can be executed by a processor to implement the above steps or functions. Similarly, the software program of the present application (including related data structures) can be stored in a computer-readable recording medium. For example, a RAM memory, a magnetic or optical drive, or a floppy disk and similar devices. Additionally, some steps or functions of the present application can be implemented using hardware. For example, as a circuit that cooperates with a processor to execute each step or function.

[0076] The technical features of the above-described embodiments can be combined arbitrarily. For the sake of brevity of description, not all possible combinations of the technical features in the above embodiments are described. However, as long as there is no contradiction in the combination of these technical features, it should be considered to be within the scope described in this specification.

[0077] The description and application of the present invention herein are illustrative and are not intended to limit the scope of the present invention to the above embodiments. The effects or advantages involved in the embodiments may not be reflected in the embodiments due to various interfering factors, and the description of the effects or advantages is not used to limit the embodiments. Modifications and changes to the disclosed embodiments are possible, and various components of substitution and equivalence of the embodiments are known to those of ordinary skill in the art. Those skilled in the art should clearly understand that the present invention can be implemented in other forms, structures, arrangements, proportions, and with other components, materials, and parts without departing from the spirit or essential characteristics of the present invention. Other modifications and changes can be made to the disclosed embodiments without departing from the scope and spirit of the present invention.

Claims

1. A startup control method for a low-power dual-firmware chip system, characterized in that The startup control method includes: Step S1: The chip obtains the startup code Bootrom from the read-only memory and starts up; Step S2: Run the application firmware; Step S3: Before entering the low-power mode, the application firmware backs up the CPU registers to the non-volatile RAM in advance; Step S4: The system enters the low-power mode; Step S5: After the low-power mode of the system is awakened, since the CPU powers off and restarts, it obtains the startup code Bootrom from the read-only memory and starts up. The CPU determines that the low-power firmware should be executed for this startup; Step S6: Run the low-power firmware. The low-power firmware restores the phase-locked loop PLL, then switches the CPU clock to a faster phase-locked loop PLL, then restores the Flash and the CPU, and finally jumps back to the application firmware. The application firmware restores the clock and sub-function modules using the address returned in the low-power mode; Step S7: Continue to process the application services.

2. The startup control method of the low-power dual-firmware chip system according to claim 1, wherein: In the low-power mode, the RAM where the heap and stack areas are located does not lose power and the data is not lost.

3. A low-power dual-firmware chip system, characterized in that, The low-power dual-firmware chip system includes: A startup module for controlling the chip to obtain the startup code Bootrom from the read-only memory and start up; Application firmware for backing up the CPU registers to the non-volatile RAM before entering the low-power mode, and then running the low-power firmware. The application firmware also restores the clock and sub-function modules using the address returned in the low-power mode; Low-power firmware for restoring the phase-locked loop PLL, switching the CPU clock to a faster phase-locked loop PLL, then restoring the Flash and the CPU, and then jumping back to the application firmware.

4. The low-power dual-firmware chip system according to claim 3, wherein: In the low-power mode, the RAM where the heap and stack areas are located does not lose power and the data is not lost.

5. An electronic device, comprising a memory, a processor, and a computer program stored on the memory and executable on the processor, characterized in that, When the processor executes the computer program, it implements the steps of the method according to any one of claims 1 to 2.

6. A storage medium having computer program instructions stored thereon, characterized in that, When the computer program instructions are executed by the processor, it implements the steps of the method according to any one of claims 1 to 2.

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