Sum and difference device
By using multi-layer microstrip printed boards and metallized vias in phased array antennas, the problems of large volume, large weight and complex installation are solved, and the size and lightweight of the sum-machine are achieved, which facilitates high integration of phased array antennas.
Patent Information
- Application Number
- CN202510313822.3
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- Filing Date
- 2025-03-17
- Publication Date
- 2025-07-18
AI Technical Summary
The summation device in existing phased array antennas has large volume, large weight, and complex installation, which is not conducive to high integration requirements and is complex in connection, which affects the miniaturization and lightweight of phased array antennas.
The summation and difference device with a multi-layer microstrip printed board as the carrier is used to realize the summation and difference beam through the etching circuit and metallized vias, and the SIW transmission structure and the microstrip line transition structure are used to form a multi-layer microstrip plate to realize the summation and difference processing of signals.
It realizes the miniaturization and lightweight of the differential device, facilitates the integration with phased array antenna, simplifies the installation process, and meets the requirements of high integration.
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Figure CN120341539A_ABST
Abstract
Description
Technical Field
[0001] This application relates to the fields of communication and radar, and particularly to a sum-difference device that can be widely applied to the front end of a phased array. Background Art
[0002] In a phased array antenna, for example, the sum-difference device is one of the key modules of radio frequency hardware, which can simultaneously add or subtract two or more signals. Its main function is to implement sum and difference beams, improving the system's angle and distance measurement accuracy and tracking ability. At the present stage, phased array antenna technology is becoming increasingly mature. Especially in the millimeter-wave band with a relatively short wavelength, there are higher requirements for high integration, miniaturization, and lightweight. In the past, the sum-difference device in a phased array antenna was installed independently as an important module and was close to other radio frequency hardware, and was connected by means of plug-in or even external cables. The disadvantages are as follows: 1. The structure is independent, the connection with other modules of the phased array antenna is complex, and additional connectors or even cable assemblies are required, which is not conducive to the integration of the phased array antenna; 2. Most traditional sum-difference device designs are based on air waveguide transmission forms. The air waveguide structure has a large space. Even through miniaturization design, restricted by processes, materials, etc., it still occupies a relatively large volume of the phased array antenna, often causing the volume of the phased array antenna to increase; The air waveguide transmission depends on the metal structure, and the mass is relatively heavy, which is not conducive to the lightweight of the phased array antenna. Summary of the Invention
[0003] The purpose of this application is to provide a new sum-difference device for a phased array antenna, which realizes the sum and difference beams of the phased array antenna through the etched circuit and metallized vias on the microstrip printed circuit board. The sum-difference device with the microstrip printed circuit board as the carrier has a small volume, a light weight, and is easy to integrate with other modules of the phased array antenna.
[0004] The sum-difference device provided in this application is applied to a phased array antenna and includes: a carrier made of a multi-layer microstrip printed circuit board, and the carrier is in a king character shape; a sum signal port and a cross difference signal port are oppositely arranged on both sides of the carrier, and the sum signal port is located in the middle position of the carrier; a first quadrant sub-port and a fourth quadrant sub-port are also oppositely arranged on both sides of the carrier, forming a first group of signal units, and the first group of signal units is located on one side of the sum signal port; a second quadrant sub-port and a third quadrant sub-port are also oppositely arranged on both sides of the carrier, forming a second group of signal units, and the second group of signal units is located on the other side of the sum signal port; a first-stage sum-difference device basic unit, the first-stage sum-difference device basic unit includes an oblong slit and metallized holes arranged around the oblong slit, and the first-stage sum-difference device basic unit is arranged in the middle of the signal transmission path of the first group of signal units.
[0005] In some embodiments, the multi-layer microstrip printed circuit board is composed of three dielectric layers and four metal ground layers, and a multi-layer microstrip board with alternating dielectric layers and metal layers is formed through a lamination process.
[0006] In some embodiments, the multi-layer microstrip printed circuit board includes a first metal layer, a first dielectric layer, a second metal layer, a second dielectric layer, a third metal layer, a third dielectric layer, and a fourth metal layer that are alternately stacked.
[0007] In some embodiments, the multi-layer microstrip printed circuit board further includes: a first SIW transmission structure formed by punching metallized vias in the copper-clad areas of the first dielectric layer and the third dielectric layer; a second SIW transmission structure formed by using a copper paste sintering process to form metallized vias connecting the second metal layer and the third metal layer.
[0008] In some embodiments, the first group of signal units includes the first SIW transmission structure, the second SIW transmission structure, and a SIW-to-microstrip line transition structure. The SIW-to-microstrip line transition structure includes a first waveguide transmission line, a second waveguide transmission line, and a third waveguide transmission line. The first waveguide transmission line is located at the top of the first group of signal units. The second waveguide transmission line extends from one end of the first waveguide transmission line to the middle of the signal transmission path of the first group of signal units. The third waveguide transmission line is symmetrically arranged at the other end of the first waveguide transmission line and the second waveguide transmission line.
[0009] In some embodiments, the second group of signal units also includes the first SIW transmission structure, the second SIW transmission structure, and a SIW-to-microstrip line transition structure. The SIW-to-microstrip line transition structure includes a first waveguide transmission line, a second waveguide transmission line, and a third waveguide transmission line. The first waveguide transmission line is located at the top of the second group of signal units. The second waveguide transmission line extends from one end of the first waveguide transmission line to the middle of the signal transmission path of the second group of signal units. The third waveguide transmission line is symmetrically arranged at the other end of the first waveguide transmission line and the second waveguide transmission line.
[0010] In some embodiments, the first sum-difference unit base is also provided in the middle of the signal transmission path of the second group of signal units.
[0011] In some embodiments, it further includes a second sum-difference unit base. The second sum-difference unit base is provided on the signal transmission path of the sum signal port or on the signal transmission path of the cross-difference signal port.
[0012] In some embodiments, it further includes a pitch difference port and an azimuth difference port. The pitch difference port is arranged adjacent to the sum signal port on one side of the sum signal port, and the azimuth difference port is arranged adjacent to the cross difference signal port on one side of the cross difference signal port.
[0013] In some embodiments, the signal output direction of the sum signal port is the same as the signal output direction of the cross difference signal port.
[0014] In the present application, the sum-difference device includes a carrier, a sum signal port, a cross difference signal port, a first quadrant sub-port, a fourth quadrant sub-port, a second quadrant sub-port, a third quadrant sub-port, and a first-stage sum-difference device basic unit. The carrier is made of a multi-layer microstrip printed circuit board, and the multi-layer microstrip printed circuit board is composed of three dielectric layers and four metal ground layers, and a multi-layer microstrip board with alternating dielectric layers and metal layers is formed through a lamination process. The first and third dielectric layers are copper-clad and then metallized vias are drilled to implement the SIW transmission structure. In the second layer, a copper paste sintering process is used to form metallized vias connecting the second and third metal grounds to achieve signal transmission between the first and third dielectric layers, solving the problems in the prior art such as large volume, heavy weight, complex installation of the sum-difference device, and being not conducive to the high integration requirements of phased arrays at the present stage. Description of the Drawings
[0015] In order to more clearly illustrate the technical solutions of the embodiments of the present application, the drawings required for use in the embodiments will be briefly introduced below. Obviously, the drawings in the following description are some embodiments of the present application. For those of ordinary skill in the art, other drawings can be obtained based on these drawings without creative efforts.
[0016] Figure 1 It is a schematic diagram of the overall sum-difference device of an embodiment provided by the embodiment of the present application.
[0017] Figure 2 It is a side view of the carrier of the sum-difference device of an embodiment provided by the embodiment of the present application.
[0018] Figure 3 It is a schematic diagram of the electrical basic module of the sum-difference device of an embodiment provided by the embodiment of the present application. Detailed Embodiments
[0019] Next, the technical solutions in the embodiments of the present application will be clearly and completely described in conjunction with the drawings in the embodiments of the present application. Obviously, the described embodiments are only some embodiments of the present application, rather than all embodiments. Based on the embodiments in the present application, all other embodiments obtained by those of ordinary skill in the art without creative efforts belong to the scope of protection of the present application.
[0020] In the description of the application, unless otherwise clearly specified and defined, the terms "connected", "connected to", and "fixed" shall be understood in a broad sense. For example, it can be a fixed connection, a detachable connection, or integrated; it can be a mechanical connection or an electrical connection; it can be directly connected or indirectly connected through an intermediate medium, and it can be the communication inside two components or the interaction relationship between two components. For those of ordinary skill in the art, the specific meanings of the above terms in this application can be understood according to specific circumstances.
[0021] Unless otherwise defined, all technical and scientific terms used in this application have the same meaning as commonly understood by those skilled in the technical field to which this application belongs. The terms used in the description of this application are only for the purpose of describing specific embodiments and are not intended to limit this application. The term "and / or" used in this application includes any and all combinations of one or more of the related listed items. The following will describe in detail some embodiments of this application with reference to the accompanying drawings. Without conflict, the following embodiments and the features in the embodiments can be combined with each other.
[0022] Please refer to Figure 1 、 Figure 2 and Figure 3 , an embodiment of this application provides a sum-difference device applied to a phased array antenna, which includes: a carrier, a sum signal port, a cross-difference signal port, four sub-ports, and a first-stage sum-difference device basic unit.
[0023] The carrier is made of a multi-layer microstrip printed circuit board, and the carrier is in the shape of a king character.
[0024] The sum signal port and the cross-difference signal port are the total ports of the sum-difference device, and the sum signal port and the cross-difference signal port are relatively arranged on the upper and lower sides of the carrier as the total ports of the sum-difference device, and the sum signal port is located at the middle position of the carrier.
[0025] In one embodiment, there are four total ports of the sum-difference device, which are respectively a sum port and three difference ports, namely a sum signal port, an elevation difference signal port, an azimuth difference signal port, and a cross-difference signal port.
[0026] Among them, the elevation difference port is arranged adjacent to the sum signal port on one side of the sum signal port, and the azimuth difference port is arranged adjacent to the cross-difference signal port on one side of the cross-difference signal port.
[0027] Please refer to Figure 1 、 Figure 2 and Figure 3, the pitch difference port and the sum signal port are arranged at the top of the middle position of the carrier, and the azimuth difference port and the cross difference signal port are arranged at the bottom of the middle position of the carrier, that is, the pitch difference port and the sum signal port are arranged on the second horizontal stroke of the king-shaped carrier, and the azimuth difference port and the cross difference signal port are also arranged on the second horizontal stroke of the king-shaped carrier, that is, the total ports are arranged at the middle position of the carrier.
[0028] In one embodiment, the signal output direction of the sum signal port is the same as the signal output direction of the cross difference signal port.
[0029] Among them, the four sub-ports are the first quadrant sub-port, the second quadrant sub-port, the third quadrant sub-port and the fourth quadrant sub-port respectively. The first quadrant sub-port and the fourth quadrant sub-port are also oppositely arranged on the upper and lower sides of the carrier, forming a first group of signal units, and the first group of signal units is located on one side of the sum signal port.
[0030] In one embodiment, the first quadrant sub-port and the fourth quadrant sub-port are arranged on the third horizontal stroke of the king-shaped carrier, that is, the first group of signal units is arranged on the right side of the carrier.
[0031] The second quadrant sub-port and the third quadrant sub-port are also oppositely arranged on the upper and lower sides of the carrier, forming a second group of signal units, and the second group of signal units is located on the other side of the sum signal port.
[0032] In one embodiment, the second quadrant sub-port and the third quadrant sub-port are arranged on the first horizontal stroke of the king-shaped carrier, that is, the second group of signal units is arranged on the left side of the carrier.
[0033] Please refer to Figure 1 , Figure 2 and Figure 3 , the first-stage sum-difference basic unit includes an oval slit and metallized holes arranged around the oval slit, and the first-stage sum-difference basic unit is arranged in the middle of the signal transmission path of the first group of signal units.
[0034] In one embodiment, the first-stage sum-difference basic unit is also arranged in the middle of the signal transmission path of the second group of signal units.
[0035] In one embodiment, it further includes a second-stage sum-difference basic unit, and the second-stage sum-difference basic unit is arranged on the signal transmission path of the sum signal port or on the signal transmission path of the cross difference signal port.
[0036] Please refer to Figure 1 , Figure 2 andFigure 3 The multi-layer microstrip printed circuit board is composed of three dielectric layers and four metal ground layers, and a multi-layer microstrip board with alternating dielectric layers and metal layers is formed through a lamination process. The multi-layer microstrip printed circuit board includes a first metal layer, a first dielectric layer, a second metal layer, a second dielectric layer, a third metal layer, a third dielectric layer, and a fourth metal layer that are alternately stacked. The multi-layer microstrip printed circuit board further includes: a first SIW transmission structure and a second SIW transmission structure. The first SIW transmission structure is formed by drilling metallized vias in the copper-clad areas of the first dielectric layer and the third dielectric layer. The second SIW transmission structure is formed by using a copper paste sintering process to form metallized vias connecting the second metal layer and the third metal layer. That is, the sum-difference unit uses the multi-layer microstrip printed circuit board as a carrier. The multi-layer microstrip printed circuit board is composed of three dielectric layers and four metal ground layers, and a multi-layer microstrip board with alternating dielectric layers and metal layers is formed through a lamination process. Metallized vias are drilled after copper-cladding the first and third dielectric layers to realize the SIW transmission structure. In the second layer, a copper paste sintering process is used to form metallized vias connecting the second and third metal grounds, realizing signal transmission between the first and third dielectric layers. The sum-difference unit in this embodiment is applied to a Ka-band phased array antenna. The Ka band refers to the frequency band in the electromagnetic spectrum ranging from 26.5 to 40 GHz, which is usually used for satellite communication. A phased array antenna refers to an array antenna whose radiation angle and radiation range can be controlled. SIW refers to a substrate integrated waveguide, a structure that forms an equivalent waveguide transmission by drilling grounded metal holes in a dielectric.
[0037] In one embodiment, the first-stage sum-difference unit basic unit includes an oval slot and metallized holes provided around the oval slot. The first-stage sum-difference unit basic unit is provided in the middle of the signal transmission path of the first group of signal units. The first group of signal units includes the first SIW transmission structure, the second SIW transmission structure, and an SIW-to-microstrip line transition structure. The SIW-to-microstrip line transition structure includes a first waveguide transmission line, a second waveguide transmission line, and a third waveguide transmission line. The first waveguide transmission line is located at the top of the first group of signal units. The second waveguide transmission line is formed by extending from one end of the first waveguide transmission line towards the middle of the signal transmission path of the first group of signal units, that is, the second waveguide transmission line extends from one end of the first waveguide transmission line towards the direction of the first-stage sum-difference unit basic unit. The third waveguide transmission line is symmetrically arranged at the other end of the first waveguide transmission line with respect to the second waveguide transmission line.
[0038] In one embodiment, the first-stage sum-difference unit includes an oblong slot and metallized holes provided around the oblong slot. The first-stage sum-difference unit is disposed in the middle of the signal transmission path of the second group of signal units. The second group of signal units also includes the first SIW transmission structure, the second SIW transmission structure, and an SIW-to-microstrip transition structure. The SIW-to-microstrip transition structure includes a first waveguide transmission line, a second waveguide transmission line, and a third waveguide transmission line. Among them, the first waveguide transmission line is located at the top of the second group of signal units. The second waveguide transmission line is formed by extending from one end of the first waveguide transmission line towards the middle of the signal transmission path of the second group of signal units, that is, the second waveguide transmission line extends from one end of the first waveguide transmission line towards the direction of the first-stage sum-difference unit. The third waveguide transmission line is symmetrically disposed at the other end of the first waveguide transmission line and the second waveguide transmission line.
[0039] In one embodiment, the elevation difference port and the sum signal port are disposed at the top of the middle position of the carrier. The azimuth difference port and the cross difference signal port are disposed at the bottom of the middle position of the same dielectric layer of the carrier. That is, the elevation difference port and the sum signal port are arranged offset front and back on the second horizontal stroke of the king-shaped carrier. The azimuth difference port and the cross difference signal port are also disposed on the second horizontal stroke of the king-shaped carrier, but the total ports are disposed at the middle positions of different dielectric layers of the carrier. That is, the azimuth difference port and the cross difference signal port are arranged offset up and down on the second horizontal stroke of the king-shaped carrier.
[0040] In one embodiment, the second-stage sum-difference basic unit is disposed on the signal transmission path of the sum signal port. The sum signal port also includes the first SIW transmission structure, the second SIW transmission structure, and an SIW-to-microstrip transition structure. The SIW-to-microstrip transition structure includes a first waveguide transmission line, a second waveguide transmission line, and a third waveguide transmission line. Among them, the first waveguide transmission line is located at the top of the sum signal port. The second waveguide transmission line is formed by extending from one end of the first waveguide transmission line towards the second-stage sum-difference basic unit. The third waveguide transmission line is symmetrically disposed at the other end of the first waveguide transmission line and the second waveguide transmission line.
[0041] In one of the embodiments, the second-stage sum-difference basic unit is disposed on the signal transmission path of the cross-difference signal port. The cross-difference signal port also includes the first SIW transmission structure, the second SIW transmission structure, and an SIW-to-microstrip transition structure. The SIW-to-microstrip transition structure includes a first waveguide transmission line, a second waveguide transmission line, and a third waveguide transmission line. Among them, the first waveguide transmission line is located at the top of the sum signal port. The second waveguide transmission line is formed by extending from one end of the first waveguide transmission line in the direction of the second-stage sum-difference basic unit. The third waveguide transmission line is symmetrically disposed at the other end of the first waveguide transmission line and the second waveguide transmission line.
[0042] In the embodiment of the present application, when the first group of signals are respectively input from the first quadrant sub-port and the fourth quadrant sub-port, the signals first pass through the SIW-to-microstrip transition structure from different-position microstrip lines to the first SIW transmission structure or the second SIW transmission structure. Then the signals pass through the first-stage sum-difference basic unit. After the first-stage sum-difference basic unit performs a summation process on the signals, the first-stage sum-difference basic unit outputs a first group of first-stage sum signals on the same-layer dielectric of the microstrip line. After the first-stage sum-difference basic unit performs a difference process on the signals, the first-stage sum-difference basic unit transmits the signals through the metallized via constraint region of the second layer of dielectric to another layer of dielectric to output a first group of first-stage difference signals.
[0043] When the second group of signals are respectively input from the second quadrant sub-port and the third quadrant sub-port, the signals first pass through the SIW-to-microstrip transition structure from different-position microstrip lines to the first SIW transmission structure or the second SIW transmission structure. Then the signals pass through the first-stage sum-difference basic unit. After the first-stage sum-difference basic unit performs a summation process on the signals, the first-stage sum-difference basic unit outputs a second first-stage sum signal on the same-layer dielectric of the microstrip line. After the first-stage sum-difference basic unit performs a difference process on the signals, the first-stage sum-difference basic unit transmits the signals through the metallized via constraint region of the second layer of dielectric to another layer of dielectric to output a second first-stage difference signal.
[0044] The first-stage sum signals of the first group and the first-stage sum signals of the second group are further output to the sum port and the difference port through the second-stage sum-difference basic unit, that is, the sum port and the elevation difference port output a second-stage sum signal; the first-stage difference signal of the first group and the first-stage difference signals of the second group are further output to the sum port and the difference port through another second-stage sum-difference basic unit, that is, the azimuth difference port and the cross difference port output a second-stage difference signal. That is, the SIW sum-difference device of the Ka-band phased array antenna includes a total port and sub-ports. There are four total ports, namely one sum port and three difference ports, that is, the sum signal port, the elevation difference signal port, the azimuth difference signal port, and the cross difference signal port. There are four sub-ports, namely the first quadrant sub-port, the second quadrant sub-port, the third quadrant sub-port, and the fourth quadrant sub-port. The first and fourth, and the second and third groups of sub-ports respectively form two groups of first-stage sum and difference signals through the first-stage sum-difference basic unit. Further, the two groups of first-stage sum signals are further output to the sum port and the difference port through the second-stage sum-difference basic unit, that is, the sum port and the elevation difference port; the two groups of first-stage difference signals are further output to the sum port and the difference port through another second-stage sum-difference basic unit, that is, the azimuth difference port and the cross difference port.
[0045] The sum-difference device of the new phased array provided by the embodiment of the present application uses the SIW structure to realize the sum-difference beam. The sum-difference beam of the phased array antenna is realized by etching circuits and metallized vias on the microstrip printed board. The SIW sum-difference device of the Ka-band phased array antenna is based on a multi-layer microstrip printed board, which is composed of three dielectric layers and four metal ground layers, and forms a multi-layer microstrip board with alternating dielectric layers and metal layers through a lamination process. The first and third dielectric layers are copper-clad and then drilled with metallized vias to realize the SIW transmission structure. The copper paste sintering process is used on the second layer to form metallized vias connecting the second and third metal grounds, realizing signal transmission between the first and third dielectric layers.
[0046] The electrical performance components realized on the multi-layer microstrip printed board include SIW transmission structures, sum-difference basic units, SIW-to-microstrip line transitions, etc., where the sum-difference basic unit contains part of the SIW transmission structure. Two groups of signals respectively pass through the SIW-to-microstrip line transition from different positions of the microstrip line to the SIW transmission structure and then to the sum-difference basic unit. The sum-difference basic unit performs a summation process on the signals and outputs the sum signal on the same-layer dielectric of the microstrip line; the sum-difference basic unit performs a difference process on the signals, and then transmits them to another dielectric layer through the metallized via constraint area of the second dielectric layer to output the difference signal, so as to solve the problems in the prior art such as large volume, large weight, complex installation of the sum-difference device, and being not conducive to the high integration requirements of the current phased array.
[0047] In the description of the embodiments of the present application, it should be noted that the orientation or positional relationship of the terms "center", "upper", "lower", "left", "right", "vertical", "horizontal", "inner", "outer", etc. is based on the orientation or positional relationship shown in the drawings. It is only for the convenience of describing the present application and simplifying the description, rather than indicating or implying that the device or component referred to must have a specific orientation, be constructed and operated in a specific orientation. Therefore, it should not be construed as a limitation to the present application.
[0048] The above-disclosed is only a preferred embodiment of the present application. Of course, it cannot be used to limit the scope of the claims of the present application. Those of ordinary skill in the art can understand the entire or part of the processes of implementing the above embodiments, and the equivalent changes made according to the claims of the present application still fall within the scope covered by the present application.
Claims
1. A sum-difference device, applied to a phased array antenna, characterized in that Including: A carrier, which is made of a multi-layer microstrip printed circuit board and is in the shape of a king character; A sum signal port and a cross-difference signal port are oppositely arranged on both sides of the carrier, and the sum signal port is located at the middle position of the carrier; A first quadrant sub-port and a fourth quadrant sub-port are also oppositely arranged on both sides of the carrier, forming a first group of signal units, and the first group of signal units is located on one side of the sum signal port; A second quadrant sub-port and a third quadrant sub-port are also oppositely arranged on both sides of the carrier, forming a second group of signal units, and the second group of signal units is located on the other side of the sum signal port; A first-stage sum-difference basic unit, which includes an oval slot and metallized holes arranged around the oval slot, and the first-stage sum-difference basic unit is arranged in the middle of the signal transmission path of the first group of signal units.
2. The adder-subtractor according to claim 1, characterized in that, The multi-layer microstrip printed circuit board is composed of three dielectric layers and four metal ground layers, and a multi-layer microstrip board with alternating dielectric layers and metal layers is formed through a lamination process.
3. The adder-subtractor according to claim 2, wherein The multi-layer microstrip printed circuit board includes alternately stacked first metal layer, first dielectric layer, second metal layer, second dielectric layer, third metal layer, third dielectric layer, and fourth metal layer.
4. The adder-subtractor according to claim 3, characterized in that, The multi-layer microstrip printed circuit board further includes: A first SIW transmission structure, which is formed by drilling metallized vias in the copper-clad areas of the first dielectric layer and the third dielectric layer; A second SIW transmission structure, which is formed by using a copper paste sintering process to form metallized vias connecting the second metal layer and the third metal layer.
5. The adder-subtractor according to claim 4, characterized in that, The first group of signal units includes the first SIW transmission structure, the second SIW transmission structure, and a SIW-to-microstrip line transition structure. The SIW-to-microstrip line transition structure includes a first waveguide transmission line, a second waveguide transmission line, and a third waveguide transmission line. Among them, the first waveguide transmission line is located at the top of the first group of signal units, the second waveguide transmission line extends from one end of the first waveguide transmission line to the middle of the signal transmission path of the first group of signal units, and the third waveguide transmission line is symmetrically arranged at the other end of the first waveguide transmission line and the second waveguide transmission line.
6. The adder-subtractor according to claim 4, characterized in that, The second group of signal units also includes the first SIW transmission structure, the second SIW transmission structure, and a SIW-to-microstrip line transition structure. The SIW-to-microstrip line transition structure includes a first waveguide transmission line, a second waveguide transmission line, and a third waveguide transmission line. Among them, the first waveguide transmission line is located at the top of the second group of signal units, the second waveguide transmission line extends from one end of the first waveguide transmission line to the middle of the signal transmission path of the second group of signal units, and the third waveguide transmission line is symmetrically arranged at the other end of the first waveguide transmission line and the second waveguide transmission line.
7. The adder-subtractor according to claim 1, characterized in that, The first-stage sum-difference basic unit is also arranged in the middle of the signal transmission path of the second group of signal units.
8. The adder-subtractor according to claim 7, wherein Further comprising a second-stage sum-difference unit, the second-stage sum-difference unit is disposed on the signal transmission path of the sum signal port or on the signal transmission path of the cross-difference signal port.
9. The adder-subtractor according to claim 8, characterized in that, Further comprising a pitch difference port and an azimuth difference port, the pitch difference port is disposed adjacent to the sum signal port on one side of the sum signal port, and the azimuth difference port is disposed adjacent to the cross-difference signal port on one side of the cross-difference signal port.
10. The adder-subtractor according to claim 9, characterized in that, The signal output direction of the sum signal port is the same as the signal output direction of the cross-difference signal port.