LED power supply safety control system and method with over-temperature protection function

Abstract

The present invention discloses an LED power supply safety control system and method with an over-temperature protection function, specifically relating to the field of thermal management technology for LED driver power supplies, and is used to address the visual flicker problem induced by the implementation of traditional over-temperature protection mechanisms. By real-time monitoring the temperature of key power supply parts, the luminous flux response delay characteristics of the light source and the human eye's visual sensitivity frequency parameters are obtained when the temperature exceeds the limit; the light fluctuation frequency component caused by the power derating operation is calculated based on the delay parameters; the dynamic visual adaptation characteristics are analyzed in combination with changes in ambient lighting; the perceptual sensitivity equivalent frequency is corrected and obtained; when the frequency is lower than the human eye's sensitivity threshold, the derating rate is optimized through closed-loop iteration to meet the standard; and finally, the power derating is executed at the optimized rate. This decouples the thermal protection process from human visual perception, eliminating the light source flicker phenomenon while ensuring the thermal safety of the power supply.

Description

Technical Field

[0001] The present invention relates to the technical field of thermal management of LED drive power supplies, and more particularly to a safety control system and method for an LED power supply with an over-temperature protection function. Background Art

[0002] LED lighting devices are widely used due to their high efficiency and energy-saving features. However, as a core component, LED driver power supplies face significant challenges in terms of the reliability of their internal electronic components when operating in high-temperature environments. To prevent permanent damage to components or even safety incidents caused by excessive temperatures, modern LED driver power supplies generally integrate over-temperature protection (OTP). A common protection strategy is to proactively reduce the output power (i.e., implement "derating") when the temperature of a key part of the power supply exceeds a preset safety threshold. This strategy suppresses temperature rise by reducing power consumption, striving to stabilize the temperature within a safe range, thereby achieving hardware protection while maintaining uninterrupted lighting. This OTP method, based on power derating, has become an important and widely adopted safety control measure in the industry.

[0003] However, existing over-temperature protection solutions based on active derating face the following challenges: if the timing characteristics of the power reduction adjustment (i.e., the speed and regularity of the derating process) do not match the photoelectric response characteristics of the LED light source it drives (such as the delay and inertia of luminous flux changes), this can induce a specific fluctuation pattern in the light source output. If this fluctuation falls into the low-frequency range that the human visual system is sensitive to, even if the power supply itself effectively avoids overheating risks and continues to provide lighting, it can cause flickering in applications (especially those with strict lighting quality requirements) that can be uncomfortable or interfere with visual tasks. Summary of the Invention

[0004] In order to overcome the above-mentioned defects of the prior art, embodiments of the present invention provide an LED power supply safety control system and method with an over-temperature protection function to solve the problems raised in the above-mentioned background technology.

[0005] To achieve the above object, the present invention provides the following technical solutions:

[0006] A method for safely controlling an LED power supply with an over-temperature protection function includes the following steps:

[0007] S1. Real-time monitoring of the temperature of key parts of the LED power supply. When the temperature exceeds the set protection threshold, the pre-stored luminous flux response delay time constant and the lower limit of the human visual sensitivity frequency are obtained;

[0008] S2. Calculate the light fluctuation frequency component corresponding to the current initial derating rate based on the luminous flux response delay time constant;

[0009] S3, detecting the changing trend of the ambient light intensity, and analyzing the dynamic visual adaptation characteristics based on the changing trend of the ambient light intensity;

[0010] S4, performing perceptual sensitivity correction on the light fluctuation frequency component according to the dynamic visual adaptation characteristics to generate a perceptual sensitivity equivalent frequency;

[0011] S5. When the perceptual sensitivity equivalent frequency is lower than the lower limit of the human eye's visual sensitivity frequency, the initial derating rate is increased until the newly generated perceptual sensitivity equivalent frequency is not lower than the lower limit of the human eye's visual sensitivity frequency, thereby obtaining an optimized derating rate;

[0012] S6. Perform output power derating operation according to the optimized derating rate.

[0013] In a preferred embodiment, the temperature of key parts of the LED power supply is monitored in real time. When the temperature exceeds a set protection threshold, the pre-stored luminous flux response delay time constant and the lower limit of the human eye visual sensitivity frequency are obtained, including:

[0014] Synchronously sample the junction temperature of the power switch tube of the LED power supply and the surface temperature of the magnetic components;

[0015] When any sampled temperature value exceeds the set protection threshold for three consecutive times, it is determined that the over-temperature protection trigger condition is met;

[0016] When the over-temperature protection condition is triggered, the pre-stored luminous flux response delay time constant and the lower limit value of the human eye visual sensitivity frequency are obtained.

[0017] In a preferred embodiment, obtaining the pre-stored luminous flux response delay time constant and the lower limit of the human eye visual sensitivity frequency is specifically as follows:

[0018] Obtaining the LED light source package model code of the current drive circuit, querying the light source characteristic mapping table pre-stored in the non-volatile memory according to the LED light source package model code, and extracting the corresponding luminous flux response delay time constant from the light source characteristic mapping table;

[0019] The current lighting scene classification identifier is read through the scene recognition interface, and the lower limit value of the human eye visual sensitivity frequency associated with the corresponding scene is retrieved from the visual perception parameter database based on the lighting scene classification identifier.

[0020] In a preferred embodiment, calculating the light fluctuation frequency component corresponding to the current initial derating rate according to the luminous flux response delay time constant includes:

[0021] Read the initial derating rate stored in the current drive circuit microcontroller;

[0022] Get the current effective value of the luminous flux response delay time constant;

[0023] A conversion model is established based on the inverse relationship between the light flux response delay time constant and the light fluctuation frequency component;

[0024] Input the initial derating rate into the conversion model for calculation;

[0025] Outputs the value of the optical fluctuation frequency component corresponding to the current initial derating rate.

[0026] In a preferred embodiment, detecting the changing trend of the ambient light intensity and analyzing the dynamic visual adaptation characteristics based on the changing trend of the ambient light intensity include:

[0027] Detect the illuminance measurement value sequence of the current ambient lighting source at three consecutive sampling points;

[0028] Identify the order in which the maximum and minimum measured values appear in the illumination sequence;

[0029] Determine whether the direction of illumination change is increasing or decreasing based on the position sequence;

[0030] When the change direction is an increasing trend, the benchmark adaptation time dominated by photopic vision is selected from the preset physiological parameter library;

[0031] When the change direction is a decreasing trend, a benchmark adaptation time dominated by dark vision is selected from the preset physiological parameter library;

[0032] The baseline adaptation time is corrected based on the absolute value of the illuminance change rate and the direction of change: the light adaptation time constant is shortened in proportion to the change rate under an increasing trend, and the dark adaptation time constant is extended in proportion to the change rate under a decreasing trend;

[0033] Output is a two-channel dynamic visual adaptation feature set carrying directional features.

[0034] In a preferred embodiment, performing perceptual sensitivity correction on the light fluctuation frequency component according to the dynamic visual adaptation characteristic to generate a perceptual sensitivity equivalent frequency includes:

[0035] Extracting the light adaptation time constant and the dark adaptation time constant from the dynamic visual adaptation characteristic parameter set;

[0036] The photopic adaptation time constant is input into the physiological response transfer function to calculate the photopic perception gain factor;

[0037] The dark adaptation time constant is input into the time integration operator to calculate the dark vision cumulative effect factor;

[0038] performing bidirectional frequency domain modulation on the light fluctuation frequency components;

[0039] The modulation results are combined to generate a phase-continuous perceptual sensitivity equivalent frequency output value.

[0040] In a preferred embodiment, the bidirectional frequency domain modulation includes: a photopic perception gain factor for enhancing the high-frequency response of the frequency component; and a scotopic cumulative effect factor for suppressing the low-frequency fluctuation of the frequency component.

[0041] In a preferred embodiment, when the perceptual sensitivity equivalent frequency is lower than the lower limit of the human eye visual sensitivity frequency, the initial derating rate is increased until the newly generated perceptual sensitivity equivalent frequency is not lower than the lower limit of the human eye visual sensitivity frequency, thereby obtaining an optimized derating rate, including:

[0042] Establish a comparative relationship between the current perceptual sensitivity equivalent frequency and the lower limit of the human eye's visual sensitivity frequency;

[0043] When the comparison result shows lower than, set the initial derating rate change step value;

[0044] Increase the current derating rate value according to the initial derating rate change step value;

[0045] regenerate the light fluctuation frequency component based on the increased derating rate value;

[0046] performing a perceptual sensitivity correction operation on the regenerated light fluctuation frequency component to generate a new perceptual sensitivity equivalent frequency;

[0047] Compare the newly generated perceptual sensitivity equivalent frequency with the lower limit of the human eye's visual sensitivity frequency again;

[0048] Repeating the cycle of increasing the derating rate and regenerating the comparison;

[0049] When the newly generated perceptual sensitivity equivalent frequency reaches or exceeds the lower limit of the human eye's visual sensitivity frequency, the operation cycle is terminated;

[0050] The effective derating rate value at this time is recorded as the optimized derating rate output.

[0051] In a preferred embodiment, performing the output power derating operation according to the optimized derating rate includes:

[0052] Loading the values stored in the dedicated storage area for optimizing the derating rate and converting them into power control signal waveform parameters;

[0053] Configure the driving timing sequence of the power switch tube and generate a pulse width modulation waveform according to the driving timing sequence;

[0054] Transmitting the pulse width modulation waveform to the gate of the power switch tube through the isolation drive circuit;

[0055] Monitor the output power change gradient in real time and adjust the duty cycle change rate of the pulse width modulation waveform;

[0056] When the deviation between the output power change gradient and the optimized derating rate exceeds the allowable range, the duty cycle fine-tuning compensation mechanism is activated;

[0057] After confirming that the output power is stable at the target derating value, lock the current drive parameters to maintain power output.

[0058] In another aspect, the present invention provides an LED power supply safety control system with an over-temperature protection function, comprising the following modules:

[0059] The parameter acquisition module is used to monitor the temperature of key parts of the LED power supply in real time. When the temperature exceeds the set protection threshold, it obtains the pre-stored luminous flux response delay time constant and the lower limit of the human eye's visual sensitivity frequency;

[0060] A component calculation module, configured to calculate the light fluctuation frequency component corresponding to the current initial derating rate according to a light flux response delay time constant;

[0061] Adaptation analysis module, used to detect the changing trend of ambient light intensity and analyze dynamic visual adaptation characteristics based on the changing trend of ambient light intensity;

[0062] A perception correction module, configured to correct the perception sensitivity of the light fluctuation frequency component according to the dynamic visual adaptation characteristics and generate a perception sensitivity equivalent frequency;

[0063] A rate optimization module is used to increase the initial derating rate when the perceptual sensitivity equivalent frequency is lower than the lower limit of the human eye's visual sensitivity frequency until the newly generated perceptual sensitivity equivalent frequency is not lower than the lower limit of the human eye's visual sensitivity frequency, thereby obtaining an optimized derating rate;

[0064] The derating execution module is used to execute the output power derating operation according to the optimized derating rate.

[0065] Compared with the prior art, the present invention has the following beneficial effects:

[0066] 1. By establishing a deep coupling mechanism between the photoelectric response characteristics of the light source and the human visual perception model, the flicker problem in traditional LED power supply over-temperature protection is resolved. By dynamically mapping the luminous flux response delay parameters to frequency components and combining them with the visual adaptation characteristics driven by ambient light for perceptual correction, an equivalent frequency assessment model of human visual sensitivity is constructed. This achieves a precise match between the power reduction process and the light source's flicker characteristics, ensuring that the light fluctuations generated by the derating operation remain above the human eye's sensitivity threshold. While maintaining thermal safety protection capabilities, this significantly reduces the interference of light source output fluctuations on visual tasks. This is particularly suitable for visually sensitive environments such as surgical lighting and precision laboratories, improving lighting comfort and usability.

[0067] 2. A closed-loop optimization architecture dynamically adjusts the derating trajectory: By comparing the equivalent frequency with the human eye's sensitivity threshold in real time, the system adaptively optimizes the power adjustment rate, achieving an optimal balance between the power supply's thermal time constant and the visual perception boundary. This rapidly suppresses temperature rise while avoiding protection delays caused by excessive derating. This ensures both the thermal safety margin of electronic components and the stability of the light environment, achieving a coordinated optimization of hardware reliability and visual comfort. BRIEF DESCRIPTION OF THE DRAWINGS

[0068] Figure 1 This is a flow chart of a method for safely controlling an LED power supply with an over-temperature protection function according to the present invention;

[0069] Figure 2 This is a schematic diagram of the structure of an LED power supply safety control system with an over-temperature protection function according to the present invention. DETAILED DESCRIPTION

[0070] The following will provide a clear and complete description of the technical solutions in the embodiments of the present invention in conjunction with the accompanying drawings. Obviously, the described embodiments are only part of the embodiments of the present invention, not all of the embodiments. All other embodiments obtained by ordinary technicians in this field based on the embodiments of the present invention without making any creative efforts shall fall within the scope of protection of the present invention.

[0071] Example 1: Figure 1 The present invention provides a method for safely controlling an LED power supply with an over-temperature protection function, which includes the following steps:

[0072] S1. Real-time monitoring of the temperature of key parts of the LED power supply. When the temperature exceeds the set protection threshold, the pre-stored luminous flux response delay time constant and the lower limit of the human visual sensitivity frequency are obtained;

[0073] S2. Calculate the light fluctuation frequency component corresponding to the current initial derating rate based on the luminous flux response delay time constant;

[0074] S3, detecting the changing trend of the ambient light intensity, and analyzing the dynamic visual adaptation characteristics based on the changing trend of the ambient light intensity;

[0075] S4, performing perceptual sensitivity correction on the light fluctuation frequency component according to the dynamic visual adaptation characteristics to generate a perceptual sensitivity equivalent frequency;

[0076] S5. When the perceptual sensitivity equivalent frequency is lower than the lower limit of the human eye's visual sensitivity frequency, the initial derating rate is increased until the newly generated perceptual sensitivity equivalent frequency is not lower than the lower limit of the human eye's visual sensitivity frequency, thereby obtaining an optimized derating rate;

[0077] S6. Perform output power derating operation according to the optimized derating rate.

[0078] S1. Real-time monitoring of the temperature of key parts of the LED power supply. When the temperature exceeds the set protection threshold, the pre-stored luminous flux response delay time constant and the lower limit of the human eye's visual sensitivity frequency are obtained. The specific implementation is as follows:

[0079] Real-time temperature monitoring of key LED power supply components is achieved through the following method: A thermistor integrated within the metal-oxide-semiconductor field-effect transistor chip monitors the semiconductor junction temperature. The diode's forward voltage drop, which is inversely proportional to temperature, is converted into a 0 to 5 volt analog voltage signal via a dedicated integrated circuit. This signal is fed into a microcontroller's built-in 12-bit analog-to-digital converter (ADC) channel, where it is sampled every 10 milliseconds. The sampled values are converted to Celsius values using a linear interpolation formula, with a temperature conversion factor of 0.5 degrees Celsius per millivolt. The transformer core surface temperature is monitored using an epoxy-encapsulated negative temperature coefficient (NTC) thermistor. Its nominal resistance at 25 degrees Celsius is 10 kiloohms, and its thermal constant is -3950°C. The thermistor forms one leg of a Wheatstone bridge circuit. The bridge's output differential voltage is amplified 20 times by an instrumentation amplifier before being fed into the ADC. The sampling timing of the two temperature acquisition channels is controlled by the microcontroller's general timer module. The timer is configured in up-counting mode. When the count value reaches 1000, the analog-to-digital conversion start signal is triggered to ensure that the sampling interval error is less than 1%.

[0080] When the sampled power switch junction temperature or the magnetic component surface temperature exceeds the preset threshold of 135 degrees Celsius three times in a row, the over-temperature protection trigger condition is determined to have been met. This determination is performed using two independent 8-bit shift registers: the power switch temperature sample is stored in the first shift register, and the magnetic component temperature is stored in the second shift register. After each sample, the value is compared with the threshold. If it exceeds the threshold, a digital 1 is shifted into the lowest bit of the corresponding shift register; otherwise, a digital 0 is shifted in. If the lowest three bits of either register are all 1, the corresponding flag in the over-temperature protection status register is immediately set. This flag is implemented using a set-first flip-flop, and the state change response delay is less than 100 nanoseconds.

[0081] When the overtemperature protection status flag is set, the parameter acquisition operation is initiated. The 6-character package model code stored in the 1024-bit electrically erasable programmable read-only memory (EEPM) on the LED light source substrate is read via the serial peripheral interface bus. The encoding format complies with the alphanumeric format defined by the International Electrotechnical Commission (IEC) 62203 standard. This code is used as a query key to access the light source characteristic mapping table stored in block 0 of the serial flash memory. The mapping table data structure is fixed-length record format, with each record consisting of a 16-byte encoded string and a 4-byte floating-point time constant value. The luminous flux response delay time constant is obtained by applying a step stimulus from 10% to 90% of the nominal current using a programmable current source during LED production testing. Simultaneously, the high-speed photodiode output voltage waveform is sampled at a sampling rate of 1,000,000 times / second. The time interval for the output voltage to rise from 10% to 90% of the steady-state value is calculated and multiplied by a thermoelectric conversion coefficient of 0.85 to store the value in the mapping table. This coefficient is calibrated by comparing the response time difference at ambient temperatures of 25°C and 85°C.

[0082] A dual-path mechanism is used to obtain scene classification identifiers. The physical path detects the state combination of four DIP switches. Each switch's on / off state corresponds to a single-bit binary value. A grounded switch reads 0, and a 3.3V power supply reads 1. This four-bit combination forms an integer identifier ranging from 0 to 15. The electrical path parses the standard identifier field of the controller area network bus data frame, extracting bits 18 to 21 of the extended identifier to form the scene identifier. The identifier is used as an index key to query a visual perception parameter database stored in an electrically erasable programmable read-only memory (EEPROM). The database uses a balanced binary tree structure to organize data records. Each record contains a 4-byte scene identifier and a 4-byte single-precision floating-point frequency parameter. The lower limit of the human visual sensitivity frequency is set by first referencing the standard brightness function curve published by the International Commission on Illumination (CIIE) to obtain a baseline value for the critical flicker frequency under light adaptation conditions. A dynamic margin is then added to this baseline value: 2.0 Hz for operating room scenarios, 1.0 Hz for road lighting scenarios, and 3.0 Hz for cinema scenarios. The principle of dynamic margin setting is based on the visual task accuracy requirements of different scenarios. The operating room scene requires high visual recognition accuracy, so a larger margin is set.

[0083] The exception handling mechanism includes the following layered design: When an unregistered package model code is detected, the preset global default value of 1.5 milliseconds is automatically used as the luminous flux response delay time constant. This value is determined by statistically analyzing the median parameters of 50 common LED models. If a scene identification code verification error occurs, the default frequency value of 8.0 Hz, corresponding to the road lighting scene, is forced to be used. If a non-volatile memory read operation returns a verification error, the system automatically retries three times before switching to the same logical address in the backup storage area to read the data. The hardware watchdog timer is set to a 500 millisecond timeout period, and a system reset signal is triggered when the timer overflows. Memory access verification uses a cyclic redundancy check algorithm with a generator polynomial of hexadecimal 11021 (decimal 69665) and a check bit width of 16 bits.

[0084] Hardware implementation verification method for key technical parameters: Temperature monitoring accuracy is calibrated in a constant temperature bath using a first-class standard platinum resistance thermometer, with a maximum error of ±2.5°C within the operating temperature range of -40°C to 125°C. Luminous flux delay time measurement uses a programmable current source to generate a driving current with a 2.5-microsecond rising edge. This is verified using a 200-MHz bandwidth photoelectric probe and a high-speed oscilloscope, with the deviation between the measured data and the stored value being less than 3%. Scene parameter retrieval delay is measured using a logic analyzer to measure the controller area network bus data frame transmit and receive timestamps, with a maximum response delay of 110 microseconds. Memory reliability testing is performed under an ambient temperature of 85°C with 10,000 consecutive read and write cycles, with a bit error rate of less than 1×10 -9 The system reset function was verified by manually injecting a register lockup fault. The system automatically resumed operation within 499 milliseconds after the fault was injected.

[0085] S2. Calculate the light fluctuation frequency component corresponding to the current initial derating rate based on the luminous flux response delay time constant. The specific implementation is as follows:

[0086] The initial derating rate is acquired via the microcontroller's direct memory access channel. This parameter is stored in a dedicated register at hexadecimal address 0x7E08 in the memory-mapped area. The register uses a 32-bit fixed-point format: the upper 16 bits store the integer portion, and the lower 16 bits store the fractional portion. When the system detects that the overtemperature protection trigger condition has been met, the firmware initiates a direct memory access transfer, configured for single-shot transfer mode and with a data width of four bytes. The raw value read is converted to the actual derating rate by multiplying it by a factor of 0.001. This factor is set based on the power supply's rated power range: 0.001 for a 100-watt power supply and 0.0005 for a 200-watt power supply. This conversion is performed in the arithmetic logic unit and takes no more than 500 nanoseconds.

[0087] The process for extracting the luminous flux response delay time constant is based on the package model code obtained in the previous step. The system sends a query command to the serial flash memory via a four-wire serial peripheral interface, configured for a 15 MHz clock frequency. The command frame consists of a six-byte encoding string and a two-byte checksum, using a cyclic redundancy check (CRC) algorithm with a polynomial of 0x11021. The flash memory performs a sequential search in the light source characteristic mapping table starting at address 0x1000, with each record occupying 20 bytes of storage space. After a successful match, a four-byte single-precision floating-point number is extracted from the twelve-byte offset address of the record as the valid constant. This value undergoes a range check before being loaded into the processor to ensure it is within the range of 0.1 to 10.0 milliseconds.

[0088] The conversion model is constructed based on the dynamic response of light sources. The benchmark conversion coefficient (k) was determined through laboratory measurements: Ten typical LED package types were selected. A programmable current source was used to apply a step change from 10% to 90% of the rated current, while the luminous flux rise curve was recorded at a 500 nanosecond sampling interval. The time it took to rise from 10% to 90% of the steady-state value was calculated as the delay constant (τ). A spectrum analyzer was used to capture the fundamental frequency component (f) of the output light fluctuations. The τ·f product of multiple data sets was calculated, and the median of the fifth to fifteenth digits of the sorted product values was taken. This median was then multiplied by a constant factor of 3.1416 to obtain the final benchmark conversion coefficient. During system initialization, the benchmark conversion coefficient is written to the read-only configuration area, located in the address range 0x2000 to 0x2003.

[0089] Calculation operations are performed in a strict sequence within the floating-point processing unit: The first step loads the luminous flux response delay time constant into floating-point register FP0; the second step loads the reference conversion coefficient into register FP1; the third step performs the division operation FP1 / FP0, storing the result in the intermediate register TMP; the fourth step loads the initial derating rate into register FP2; and the fifth step performs the division operation TMP / FP2, storing the result in the destination register DST. Each operation utilizes the IEEE 754 single-precision floating-point standard, with rounding set to nearest-even. Hardware overflow detection is enabled during the calculation process, triggering a floating-point exception interrupt when the exponent exceeds 126.

[0090] Before outputting the calculation result, a triple validation check is performed: the first level checks whether the value is within the range of 0.1 to 1000.0 Hz; the second level confirms that the value's sign is positive; and the third level verifies that the value has 23 significant digits of binary precision. Passing validation writes the data to the memory buffer area 0x3000 to 0x3FFF, using four-byte alignment. The third bit of the status register at address 0x5002 is also updated. If validation fails, the system uses a fallback: the default frequency value of 5.0 Hz stored at address 0x4004 is used as the output, and event code 0xE1 is logged in the error log.

[0091] The exception handling system includes a hierarchical fault-tolerance mechanism. Parameter invalidation strategies include: When the luminous flux response delay constant is less than 0.1 milliseconds, it automatically switches to 1.2 milliseconds; when it is greater than 10.0 milliseconds, it switches to 8.0 milliseconds; and when the initial derating rate is 0.0 per second, it is replaced with 0.5 per second. A fault counter at address 0x6000 records the number of operational anomalies. A safety mode is activated after reaching the threshold of three. In safety mode, the system bypasses the calculation process and directly outputs a fixed value of 10.0 Hz. All abnormal events are recorded in real time in a non-volatile memory log area. Each log entry occupies 16 bytes: a four-byte timestamp (in milliseconds), a four-byte error code, and eight bytes of additional information.

[0092] The hardware resource configuration requirements are clear: the calculation process must run on a microcontroller equipped with a hardware floating-point unit, with a minimum clock speed of 30 MHz. Memory allocation requirements are: eight bytes for the input parameter area, eight bytes for the intermediate calculation area, and four bytes for the output area. Real-time performance is monitored via a hardware timer, with a total calculation time limit of 200 microseconds, comprising 50 microseconds for the parameter loading phase, 100 microseconds for the division phase, and 50 microseconds for the output verification phase. Temperature adaptability measures include extending the calculation time limit to 240 microseconds at -40°C and reducing memory access frequency by 20% at 85°C.

[0093] The verification test plan establishes a complete benchmark framework: the test platform includes a programmable parameter injection module that supports test vectors combining input luminous flux response delay time constants (0.5-5.0 milliseconds) and initial derating rates (2-10 per second). A 500MHz bandwidth oscilloscope monitors key nodes in the calculation process: address bus signals monitor input parameter loading status; data bus signals analyze intermediate results; and floating-point exception pins detect error states. Accuracy is verified by comparing theoretical calculated values with system output values, with an allowable deviation set to ±5%. Long-term reliability testing is performed in a temperature cycling chamber: 2000 cycles of temperature change from -40°C to 85°C, each with a temperature ramp rate of 5°C / minute, for a total duration of 500 hours. The test results are required to have an error rate of less than 0.01%.

[0094] All units are expressed using international standards: time is expressed in ms (milliseconds), frequency in Hz (hertz), and rate in % / s (percent per second). Numerical notation: Integers with more than three digits are separated by commas (e.g., 1,000), and floating-point numbers are rounded to three significant digits. Physical constants used in the calculation process are accurate to four decimal places, including pi (3.1416) and the natural logarithm base (2.7183). Core operation timing performance indicators are: maximum parameter loading time of 42 microseconds, average division time of 92 microseconds, and minimum result output time of 38 microseconds. System recovery time indicators: soft error recovery is less than 10 microseconds, and hard reset recovery is less than 1 millisecond.

[0095] Dynamic update mechanism for reference conversion coefficients: The coefficient calibration process can be re-executed through the system maintenance interface. After calculation, the new coefficients are written to the backup storage area at address 0x8000. Before writing, they are verified by two independent calculations. Once the verification is consistent, the storage area is switched: the memory address mapping table is updated, redirecting addresses 0x2000 to 0x2003 to the new data area. The update process must be completed before the next overtemperature protection trigger. The system records the update log and saves the previous version of the coefficients as a rollback copy. The operator can set an automatic update cycle of three months to one year to ensure that the coefficients match the aging characteristics of the light source.

[0096] S3. Detect the changing trend of the ambient light intensity and analyze the dynamic visual adaptation characteristics based on the changing trend of the ambient light intensity. The specific implementation is as follows:

[0097] Illuminance measurement of the ambient lighting source is performed using three photoelectric sensor units arranged on the monitoring surface of the device. Each unit contains a photodiode and a current-to-voltage conversion circuit. The three units are arranged in a circular pattern at a 120-degree angle and synchronously trigger a sampling cycle every 10 milliseconds. The sampling timing is controlled by the rising edge of channel 1 of microcontroller timer 3. The analog voltage output by each sensor unit is quantized to an integer value ranging from 0 to 4095 by a 12-bit analog-to-digital converter. This value is then converted to an actual illuminance value in the range of 0 to 100,000 lux using a linear mapping. Data from three consecutive sampling points is stored in a time-series buffer. The buffer is managed using a first-in-first-out (FIFO) strategy: newer data overwrites the oldest data, always retaining the most recent three sampling data sets.

[0098] The process for identifying extreme values in an illumination sequence is as follows: The measured values at three time points in the buffer are loaded into a comparator array. The first comparator compares the values at timestamps t0 and t1 and outputs an index of the larger value. The second comparator compares the values at t1 and t2. The third comparator ultimately determines the position index of the global maximum and minimum values. The position index is defined as the time point number (0 for t0, 1 for t1, and 2 for t2), and the index value is stored in bits [7:6] of the processor's status register. This operation takes less than 200 nanoseconds, ensuring real-time performance.

[0099] The direction of change is determined based on the logical relationship between the maximum and minimum values: when the maximum index is equal to 2 and the minimum index is equal to 0, an increasing trend is marked; when the maximum index is equal to 0 and the minimum index is equal to 2, a decreasing trend is marked. The result of the determination is stored in the status register bit [5]. The change of the bit state triggers the subsequent parameter selection operation in real time. In scenes with severe light fluctuations (such as lightning), the system activates the noise suppression mechanism: when the difference between adjacent time points changes by more than 50%, the determination is suspended and re-analysis is waited for the next sampling cycle.

[0100] When an increasing trend is detected, the photopic parameter area, pre-set to a specific address range on the serial flash memory chip, is accessed. This area stores physiologically validated photopic benchmark adaptation time constants, derived from cone cell response data in the Commission International de Illumination (CIEPubl.200:2011). The benchmark constant value is initially set to 140 milliseconds (standard at 25°C) and is stored as a single-precision floating-point number. This selection is accomplished by sending a read command to physical address 0x5000 on the chip via the serial peripheral interface bus, with a data transfer rate of 20 Mbps.

[0101] When a decreasing trend is detected, the scotopic vision parameter area starting at address 0x6000 on the same memory chip is accessed. The scotopic vision reference constant is derived from the CIE standard for rod cell recovery characteristics, with the reference value set to 1800 milliseconds. The read command format consists of an 8-bit opcode and a 24-bit address field. The 32-bit data returned by the chip is directly loaded into the processor's floating-point registers. In high-temperature environments (>70°C), the system automatically activates temperature compensation: the read value is multiplied by the temperature attenuation factor, which decreases by 0.1% for every 1°C increase.

[0102] The steps for calculating the illuminance change rate and correcting the baseline time are as follows: First, calculate the absolute value of the maximum illuminance change (i.e., the difference between the maximum and minimum values) over three time points. Divide this absolute value by the 20-millisecond sampling window (the total span of three 10-millisecond sampling points) to obtain the absolute value of the rate of change (in kilolux / second). The correction rule is implemented as follows: For an increasing trend, the light adaptation time constant is calculated as "baseline value minus (rate of change multiplied by a scaling factor)," with a fixed value of 0.04 milliseconds / kilolux. For a decreasing trend, the dark adaptation time constant is calculated as "baseline value plus (rate of change multiplied by a scaling factor)," with a fixed value of 0.06 milliseconds / kilolux. The scaling factor is based on the Alpern visual pigment bleaching recovery curve model and is calibrated using clinical visual perception data.

[0103] The dual-channel feature set output stage creates a data structure containing two fields: Field 1 stores the corrected light adaptation time constant (in milliseconds), and Field 2 stores the corrected dark adaptation time constant (in milliseconds). The data structure is written to the shared memory area at addresses 0x2000-0x2007, using little-endian format. The write operation triggers a hardware interrupt, which the interrupt service routine reads and verifies. In extreme light environments (>100,000 lux), the system enforces parameter limit protection: the light adaptation time must be no less than 50 milliseconds, and the dark adaptation time must be no more than 3000 milliseconds.

[0104] The dynamic adaptive feature's exception handling architecture includes three layers of fault tolerance. The first layer uses the previously valid parameter set when an abnormal illuminance sensor signal is detected (three consecutive identical sampling values). The second layer loads firmware backup parameters (120 milliseconds for light adaptation and 2000 milliseconds for dark adaptation) when access to non-volatile memory fails. The third layer forces output to the boundary value when a proportional calculation overflows. All abnormal events are recorded in an error log, with log entries containing microsecond-accurate timestamps and error type codes.

[0105] The physiological parameter verification solution was built on a medical optical testing platform. A standard light source generator was used to simulate illuminance variations from 10 to 10,000 lux, while a high-speed eye tracker was used to record the retinal electrophysiological responses of volunteers. Optic nerve conduction delay data were obtained from 50 healthy subjects, with photopic adaptation times ranging from 120-160 milliseconds and scotopic adaptation times from 1500 to 2200 milliseconds. The system's output parameters were required to be within 15% of clinical test results, and were validated through 200 sets of comparative tests.

[0106] Core parameter setting principles: The photopic benchmark of 140 milliseconds was chosen based on the median photochemical activation time of cones; the scotopic benchmark of 1800 milliseconds was based on the rhodopsin regeneration kinetic constant. The scaling factor was determined by measuring the critical flicker frequency at different rates of change on a light gradient test platform and inferring the optimal scaling factors of 0.04 and 0.06 based on a pupil diameter variation model. The temperature compensation coefficient was determined based on a model that models the relationship between semiconductor carrier mobility and temperature.

[0107] The hardware platform configuration requirements include a processor with a floating-point unit (clocked at ≥50 MHz) and 12 KB of memory allocated for data processing. Timing metrics, measured using a logic analyzer, show a total sampling to trend determination time of ≤250 μs, and temperature compensation calculation time of ≤50 μs. Environmental adaptability requirements include a baseline value + 20% margin adjustment at -40°C; a 90% attenuation factor at 85°C.

[0108] All numerical units strictly adhere to international notation: milliseconds for time, klx for illuminance, and klx / s for rate of change. Parameter recording rules: Floating-point numbers are retained to three significant digits, and the structure fields are ordered with light adaptation first and dark adaptation last. Fully automatic calibration is performed every 30 days: a 500 klx / s gradient signal is input using a standard light source to verify the deviation of the system's output time constant. If the deviation exceeds 5%, the scale factor is automatically updated and the calibration record is saved.

[0109] S4. Performing perceptual sensitivity correction on the light fluctuation frequency component according to the dynamic visual adaptation characteristics to generate a perceptual sensitivity equivalent frequency. The specific implementation is as follows:

[0110] The process for extracting the light adaptation and dark adaptation time constants from the dynamic visual adaptation parameter set is as follows: The microcontroller directly accesses the 8-byte storage area starting at memory address 0x2000. The first 4 bytes of this area store the light adaptation time constant in IEEE 754 single-precision floating-point format, in milliseconds; the last 4 bytes store the dark adaptation time constant, in the same format and units. After data is read, an integrity check is performed to verify that the value falls within the valid range of 50ms to 500ms (light adaptation) and 500ms to 3000ms (dark adaptation). The check algorithm uses a cyclic redundancy check (CRC) calculation, with the generating polynomial in hexadecimal notation 0x11021. If data exceeds the valid range, it is automatically replaced with the default value stored at address 0xFF00 (100ms for light adaptation and 2000ms for dark adaptation), and an exception code 0x01 is recorded in non-volatile memory.

[0111] The calculation process for converting the light adaptation time constant into a gain factor for photopic vision perception is performed in a dedicated circuit. First, the input value is loaded into the floating-point unit register. The conversion function is defined as the sum of 2.0 divided by 1 and the natural constant e raised to the power of the light adaptation time constant, minus 0.00001. The natural constant e is fixed at 2.71828. The calculation result is temporarily stored in a buffer register. Ambient temperature correction reads the temperature sensor data in real time, applying a correction factor of 1.0 at a base temperature of 25°C, with an increase of 0.005 for every 1°C increase. The final gain factor is limited to a range of 0.8 to 1.8, with a limit clamping mechanism activated if the value exceeds the range.

[0112] The dark adaptation time constant is input into the time integrator as follows: The time integrator is configured with a discrete integration step size of 50 ms. The calculation process is as follows: the total time is divided into several equal segments according to the step size. For each segment, the integral operation "e minus t divided by the dark adaptation time constant raised to the power of the step size parameter" is performed, where t represents the starting time of the segment. The integration results of each segment are summed to obtain the cumulative effect factor of dark vision. When the dark adaptation time constant exceeds 2000 ms, the hardware accelerator (implemented based on the CORDIC algorithm) is automatically enabled to ensure that the calculation cycle does not exceed 500 ms. The calculation result is stored in memory address 0x3000 as a single-precision floating-point number.

[0113] Bidirectional frequency-domain modulation is implemented according to the following protocol: the frequency components of the light fluctuations are fed into two independent processing channels. The high-frequency boost channel applies a second-order Butterworth filter with the gain parameter set to the current photopic perception gain factor and a fixed cutoff frequency of 15 Hz. The low-frequency rejection channel applies an infinite impulse response filter with the filter coefficient set to the scotopic cumulative effect factor multiplied by 0.01 and a stopband frequency set to 3 Hz. The output signals of both channels are fed into a complex signal synthesizer: the high-frequency channel signal is connected to the real input, and the low-frequency channel signal is connected to the imaginary input. The complex output of the complex signal synthesizer is stored in buffer address 0x4000.

[0114] The final stage of generating the perceptual sensitivity equivalent frequency (PEF) reads the complex signal from the buffer and calculates its modulus (the square root of the sum of the squares of the real and imaginary parts). This modulus calculation uses the Newton iteration method, with three iterations required to achieve the required accuracy. The phase continuity detector compares the angular change between the current output and the previous output. If the angular difference exceeds 0.5 radians, a five-point linear interpolation smoothing process is initiated: linear interpolation is performed within a window of five consecutive sampling points, with an interpolation step size of 0.1 radians. The final result is quantized to three significant digits and stored in memory address 0x5000. Phase continuity monitoring data is recorded in the monitoring register at address 0x5010, with bit 3 indicating a phase abnormality.

[0115] The technical verification plan was implemented according to the following standards: a programmable signal generator was used to input a standard 10Hz light fluctuation frequency. Three scenario combinations were tested: Scenario 1 (light adaptation 130ms / dark adaptation 1500ms) had an expected output of 13.5Hz±0.5Hz; Scenario 2 (light adaptation 500ms / dark adaptation 2300ms) had an expected output of 7.2Hz±0.3Hz; and Scenario 3 (light adaptation 100ms / dark adaptation 1800ms) had an expected output of 11.8Hz±0.4Hz. The verification equipment used a 200MHz bandwidth oscilloscope, with the probe connected to the output of the complex signal synthesizer. The test required that the phase jump be less than 0.1 radian for three consecutive measurements.

[0116] Core parameter setting explanation: The Butterworth filter's 15Hz cutoff frequency is set according to the International Organization for Standardization (ISO) 13489 standard. The natural constant e, 2.71828, is defined using a standard mathematical constant library. The five-point linear interpolation step size of 0.1 radians is determined based on the minimum phase resolution requirement of the Shannon sampling theorem. The temperature correction coefficient, adjusted by 0.005°C per °C, is derived from experimental data on temperature drift of photoelectric converter devices.

[0117] Exception handling utilizes a three-stage strategy: First-stage input parameter excursions are forcibly replaced with the default value combination stored at address 0xFF00. Second-stage processing timeout monitoring triggers a hardware watchdog reset if the light adaptation transition exceeds 100μs or the dark adaptation integration exceeds 500ms. Third-stage phase anomalies, after three cumulative phase anomalies, automatically switch to historical average output mode (taking the average of the last ten valid outputs). All abnormal events are logged: each log entry occupies 16 bytes (4-byte timestamp + 4-byte error code + 8-byte additional information).

[0118] Verification platform configuration requirements: The main control chip must have a floating-point unit (such as an ARM Cortex-M4F architecture) and a main frequency of no less than 50 MHz. The minimum memory allocation is 30 bytes: 8 bytes for input parameters, 12 bytes for intermediate variables, and 10 bytes for output data. Execution time constraints: The entire process must be completed within 300 μs, including 80 μs for gain calculation, 120 μs for integral calculation, 50 μs for frequency domain modulation, and 50 μs for output generation.

[0119] Calibration and Maintenance Procedures: Perform online calibration every 90 days. Input a standard 10Hz test signal through the maintenance interface, and capture the output waveform using a storage oscilloscope. Automatically adjust the five-point interpolation parameters based on phase continuity (less than 0.1 radian jumps). Perform a dual-zone check before writing new parameters: data in the backup zone must be consistent with the primary zone before they take effect. Calibration records contain the old and new parameters, the checksum, and a timestamp.

[0120] Production test standards: Run the test sequence continuously for 48 hours at 85°C. Record output data every two hours, with a frequency fluctuation range of less than 0.2 Hz. A phase continuity pass rate of at least 99% is required. The final test report includes temperature curves, frequency output curves, and phase transition histogram data.

[0121] S5. When the perceptual sensitivity equivalent frequency is lower than the lower limit of the human eye's visual sensitivity frequency, the initial derating rate is increased until the newly generated perceptual sensitivity equivalent frequency is not lower than the lower limit of the human eye's visual sensitivity frequency, thereby obtaining an optimized derating rate. The specific implementation is as follows:

[0122] The comparison between the current perceptual sensitivity equivalent frequency and the lower limit of human visual sensitivity frequency is established as follows: the microcontroller directly reads the perceptual sensitivity equivalent frequency value from memory address 0x5000, stored in floating-point format in Hz. Simultaneously, the lower limit of human visual sensitivity frequency is loaded from address 0xA000. These two values are then transmitted to the hardware comparator unit for a differential operation: the difference between the perceptual sensitivity equivalent frequency and the lower limit of human visual sensitivity frequency is calculated. If the difference is less than -0.01Hz, the comparator outputs a low signal; otherwise, it outputs a high signal. This state is mapped to bit 7 of the system status register: a bit value of 0 indicates the value is below the threshold, while a bit value of 1 indicates the value is met. This state change triggers a level 3 priority interrupt request through the interrupt controller, which is responded to by the interrupt service routine within 5μs.

[0123] The process for setting the initial derating rate step value is as follows: With bit 7 of the status register set to 0, the processor accesses the step configuration table located at address 0x8000 in flash memory. Each row in this table contains five fields: power level range (0-200W), reference rate in % / s, minimum step value, maximum step value, and adaptive coefficient range (0.01-0.1). The actual output power value obtained by the power detection circuit is matched to the closest power level row. The calculation uses the formula: final step value = minimum step value + adaptive coefficient × (reference rate - current rate). The result is written to the dedicated register at address 0x7000 in 16-bit fixed-point format with an accuracy of 0.001% / s.

[0124] The steps for increasing the derating rate value are as follows: First, the current derating rate value is read from address 0x6000 in single-precision floating-point format. Then, the step value is retrieved from address 0x7000. An addition operation is performed in the floating-point unit: new rate value = current rate + step value. The result is temporarily stored in the buffer at address 0x7100. Next, a boundary validity check is performed: if the new rate value is greater than 30% / s, it is forced to 30%; if it is less than 1% / s, it is set to 1%. Data that passes the check is updated to the derating rate storage location at address 0x6000. The entire process is monitored by a hardware timer; if it takes longer than 50μs, a timeout alarm is triggered.

[0125] Regenerating the light fluctuation frequency component strictly follows Step 2: Input parameters are obtained from address 0x2004 for the luminous flux response delay time constant in milliseconds, and from address 0x6000 for the new derating rate in % / s. The calculation process defined in Step 2 of the original method is fully executed: accessing the preset conversion model → calculating based on the inverse relationship → outputting the light fluctuation frequency component to storage location 0x3000. This process uses a 200μs timeout protection mechanism and a dedicated hardware coprocessor to ensure real-time performance. The newly generated component value directly overwrites the previous result; historical data is not retained.

[0126] The operation for generating the new perceptual sensitivity equivalent frequency fully reuses step 4: Input parameters include the light fluctuation frequency component at address 0x3000, the light adaptation time constant at address 0x2008, and the dark adaptation time constant at address 0x200C. The process defined in step 4 of the method is strictly followed: parameter extraction → calculation of gain factor and integral effect factor → bidirectional frequency-domain modulation → generation of phase-continuous output. The resulting data is written to a newly allocated buffer at address 0x5100. All exception handling mechanisms in step 4 of the original method are inherited, and all error events are recorded in a separate log partition at address 0xF000. A single operation is subject to a time constraint of 300 μs.

[0127] The closed-loop control process for the second comparison is as follows: the new equivalent frequency value of the sensor sensitivity is read from address 0x5100 and input into the comparator unit along with the lower limit value at address 0xA000. The same differential algorithm as the initial comparison is used: if the new value minus the lower limit value is less than -0.01Hz, the system is considered to require further optimization. The system incorporates an anti-shake mechanism: it requires three consecutive low comparison results before confirming the status. The result is updated in real time to the status register bit 7, and the state change edge re-triggers the interrupt request loop. Simultaneously, the loop counter at address 0x7200 automatically increments by 1.

[0128] The execution procedure for the operation loop is configured as follows: the system sets a maximum number of loops of 5.0. Each loop consists of the following sequence: check the status register bit → calculate the step value → increase the rate → regenerate the components → generate a new equivalent frequency → compare again. The total duration of a single loop is controlled within 1000μs and is monitored by a watchdog timer. When the loop count reaches 5.0, all operations are terminated, regardless of the current status. In low-temperature environments of -40°C, the single loop duration is relaxed to 1200μs.

[0129] The control strategy for terminating an operation loop is as follows: When bit 7 of the status register changes to 1, the loop control unit executes a termination sequence: first, freezing the loop counter at address 0x7200; then disabling the status register update circuit; and finally, clearing all relevant interrupt flags. Simultaneously, a ready signal is sent to the power management unit. In a high-temperature environment of 85°C, a 50ns compensation is added to the operation delay. The system records the number of valid loops in the log storage area at address 0x8100.

[0130] The final operation for outputting the optimized derating rate is to read the final derating rate value from address 0x6000, convert it to a new format, and write it to the optimized rate storage area at address 0x8000. The data is stored in single-precision floating-point format, retaining three significant digits. Bit 0 of the global status register is set high, indicating the completion of the optimization process. Before output, a secondary data check is performed to confirm that the value is within the valid range of 1% to 30%. Otherwise, the nearest boundary value is used instead. The final result is transmitted to the power execution unit via the control bus for use.

[0131] The exception handling framework includes three levels of protection: Primary protection forces the system to output a preset value of 10% / s when the loop count reaches the upper limit of 5.0; Intermediate protection skips the current iteration if a single loop times out by 1000μs; and Advanced protection switches to golden section optimization if five consecutive exceptions are triggered within 10 minutes. All exceptions are logged in the partition at address 0xF000, with each log occupying 16 bytes of storage space: a 4-byte timestamp, a 4-byte error code, and an 8-byte snapshot of key parameters.

[0132] The technical verification plan specifically includes: building a test platform with an initial equivalent frequency of 8Hz and a lower limit of human eye sensitivity of 10Hz. A 200MHz logic analyzer is used for full monitoring, recording the rate value and equivalent frequency value changes for each cycle. Core verification metrics include: achieving a target of over 10Hz within 3-4 cycles; and a final rate falling within the 15%-25% / s range. A temperature cycling test is performed: 10 consecutive cycles from -40°C to 25°C to 85°C, confirming normal functionality and a maximum number of cycles of ≤6. The success rate indicator requires a 99% or higher test pass rate.

[0133] Parameter settings are based on an adaptive coefficient of 0.05 calibrated using a gradient descent method, achieving the optimal value experimentally at 100W power. The 5.0-cycle limit is based on worst-case test results: a 3Hz difference requires five iterations. A 1% rate limit ensures the power supply never enters sleep mode. The three-step determination in the anti-shake mechanism is based on signal stabilization time test data.

[0134] The production test protocol stipulates that full-range verification should be performed during the product burn-in test phase. The initial equivalent frequency range is set between 6Hz and 9.9Hz, with test points incremented by 0.1Hz. Each test point is cycled 100 times, with a compliance rate of >99%; the average number of iterations is 3.5; and the maximum derating rate is ≤27% / s. The final test report includes a convergence curve distribution diagram and abnormal event statistics.

[0135] Resource monitoring mechanism implementation: Resource counters are active throughout the loop, with each iteration consuming ≤ 20,000 clock cycles; memory increments are limited to 16 bytes; and processor load peaks at 70%. In high-temperature environments >85°C, time constraints are relaxed by 20%. The watchdog timer is set to a 3ms reset period, fully covering the worst-case 5ms operation duration.

[0136] S6. Execute output power derating operation according to the optimized derating rate, which is specifically implemented as follows:

[0137] The process for loading the value stored in the dedicated storage area for the optimized derating rate and converting it into power control signal waveform parameters is as follows: The processor accesses the optimized derating rate value at address 0x8000, stored as a single-precision floating-point number in % / s. This value is then input into the waveform parameter generation unit, which utilizes a 32-bit computational architecture. The conversion algorithm is defined as: Duty cycle change rate = optimized derating rate × power conversion factor. The power conversion factor is determined by the power supply topology: 0.01 for a buck circuit, 0.008 for a boost circuit, and 0.009 for a buck-boost circuit. The calculated result is converted into a 16-bit pulse-width modulation control parameter, with the upper 8 bits storing the initial duty cycle value and the lower 8 bits storing the change step value. The parameter set is written to register address 0x9000 in a two-byte data packet.

[0138] The specific process for configuring the power switch drive timing sequence is as follows: The pulse-width modulation control parameters are read from address 0x9000 and decomposed into two independent variables: the initial duty cycle and the step value. The drive timing sequence is designed as a four-stage structure: Stage 1 sets the dead time to 50ns; Stage 2 configures the maximum on-time to 2μs; Stage 3 defines the minimum off-time to 300ns; and Stage 4 programs the step period to 10μs. The timing parameters are stored in the dedicated timer configuration registers at addresses 0x9200-0x9203. Once the configuration takes effect, the hardware pulse-width modulation generator automatically generates waveforms according to the timing sequence, with the output base frequency set to 100kHz±100Hz.

[0139] The implementation path for transmitting the pulse-width modulated waveform to the gate of the power switch via the isolated drive circuit is as follows: the pulse-width modulated waveform output pin is connected to the input of a high-speed optocoupler isolator (using an industry-standard high-speed optocoupler). The isolator output drives a push-pull amplifier circuit, which uses a dual-complementary structure for the push-pull metal-oxide semiconductor field-effect transistors. The gate drive resistor is configured with a 10Ω resistor, with a rise time control target of less than 80ns and a fall time control target of less than 60ns. Real-time drive power monitoring is achieved via a 0.5Ω sampling resistor. When the drive current exceeds the preset threshold, an overcurrent protection interrupt is immediately triggered, with an interrupt priority level of 2.

[0140] The real-time output power gradient monitoring mechanism involves sampling the output bus voltage using a resistor divider circuit, typically with a 51:1 ratio. Output current is detected using a magnetically balanced Hall-effect sensor. The collected data is transmitted to the processor at a 10kHz sampling frequency. Real-time power calculation uses the formula: instantaneous voltage multiplied by instantaneous current. The gradient is calculated using a three-point difference method: current power value minus the power value 3ms ago divided by the 3ms interval. The gradient calculation result is stored in a dedicated memory location at address 0x9300 in mW / ms. This value is updated every 100μs.

[0141] The control logic for adjusting the duty cycle rate of the PWM waveform is as follows: The current output power gradient is read and compared with the optimized derating rate target (mW / ms) after unit conversion. If the actual gradient is less than 90% of the target, the duty cycle step value is increased by 10%. If the actual gradient is greater than 110%, the duty cycle step value is decreased by 10%. The adjustment signal is written to register address 0x9210, which maps to the dynamic step register of the PWM generator. The adjustment operation must be completed within 5μs, and waveform phase continuity is automatically maintained by hardware.

[0142] When the output power gradient deviates from the optimized derating rate beyond the allowable range, the following rules apply: the allowable range is set to ±15% of the optimized derating rate target. Exceeding this range activates a three-level fine-tuning compensation mechanism: Level 1 adjusts the duty cycle by 20%; Level 2 modifies the timing parameters to extend the cycle by 10μs; and Level 3 reduces the pulse-width modulation frequency to 80kHz. The compensation rules are stored in a lookup table starting at address 0x9400, with each 5% increase in deviation triggering a higher level of compensation. Compensation signals are transmitted to the control core via a priority level 4 interrupt.

[0143] The implementation details for activating the duty cycle fine-tuning compensation mechanism are as follows: the compensation unit reads the current deviation value and calculates the compensation amount = deviation value × 0.8 coefficient. The compensation sequence is as follows: first, the duty cycle is changed by the step value × 1.2 coefficient; then, a 50μs delay is applied to monitor the system response; and finally, the gradient value is evaluated to see if it has improved after compensation. The evaluation result is stored in the monitoring area at address 0x9500 and is used to decide whether to enable a higher level of compensation. The compensation mechanism is limited to a maximum of 3 levels; exceeding 3 levels automatically triggers a system alarm.

[0144] After confirming that the output power is stable at the target derating value, the stability criteria are: the power sampling value variation range is ≤ ±2% for 50 consecutive times; and the power gradient value is < 5% of the optimized derating rate for 100ms. The stability state is monitored by a dedicated comparator, and the output pin is connected to bit 5 of the system status register. When this bit transitions from low to high, the system enters a stable state.

[0145] The final operation to lock the current drive parameters and maintain power output is as follows: The lock sequence performs three atomic operations: freezing the PWM timer configuration registers; disabling the dynamic step adjustment function; and fixing the output drive parameters to the nonvolatile memory address 0x9800. The locked state continuously monitors environmental changes: if the ambient temperature changes by more than ±10°C or the input voltage fluctuates by more than ±15%, the lock is automatically released and readjusted. During the lock period, the maximum power fluctuation must be ≤±1.5%.

[0146] The fine-tuning compensation exception handling process is as follows: if the gradient improvement rate after a single compensation operation is less than 20%, the compensation failure event code 0xB1 is logged. If three consecutive compensation attempts fail to achieve the expected results, the system switches to the backup compensation table at address 0x9900. After 10 cumulative compensation failures, the system activates safety mode, fixing the output to 60% of the rated power. All exception events are written to the ring log buffer at addresses 0x9A00-0x9AFF, with each log entry containing 16 bytes of information.

[0147] The technical verification test plan was implemented using a programmable electronic load test bench with an initial power setting of 100W and an optimized derating rate of 10% / s. A four-channel oscilloscope was used to monitor key nodes: Channel 1 tracked the gate drive waveform; Channel 2 captured the output power gradient; and Channel 3 recorded the duty cycle curve. Core test requirements included: power gradient tracking error ≤ ±5%; compensation response time < 80μs; steady-state settling time < 500ms; and steady-state power fluctuation ≤ 1.5%. High-temperature testing at 85°C allowed for a relaxed tracking error of ≤ ±8%.

[0148] Compensation parameter setting explanation: The first-level compensation coefficient of 0.8 was determined through load step response experiments and optimized using 30% to 70% load sudden change tests. The three-level compensation mechanism is designed based on the thermal response characteristics of the power switch: the first level corresponds to the electrical response stage, the second level to the heat transfer delay stage, and the third level to the structural thermal capacity saturation stage. The tolerance range of ±15% is based on international standards for switching power supply dynamic response.

[0149] Production test specifications clearly state that each finished product undergoes three derating test sequences: Group 1, optimized rate 10% / s; Group 2, 20% / s; and Group 3, 5% / s. Each test sequence measures five key parameters: initial overshoot ≤ 8%; settling time < 600ms; gradient error ≤ 7%; compensation trigger count < 4; and steady-state error ≤ 2%. Failed products will trigger a maintenance code 0xC1, requiring the product to return to the compensation parameter calibration process for recalibration.

[0150] Hardware resource monitoring requirements: During drive parameter locking, system resource utilization must be 30%, including 15% for the pulse width modulation generator, 10% for the monitoring circuit, and 5% for the compensation unit. Within the input voltage range of 180V to 240V, the dynamic adjustment function consumes 2.5mJ of energy per operation. The thermal design meets the harshest operating conditions: Under continuous derating at 90% load, the MOSFET junction temperature must be <110°C.

[0151] This embodiment dynamically models the light-dark adaptation characteristics of the human retina as programmable time parameters and designs a dual-channel visual perception path to separately address gain and integral effects. At the control strategy level, the power derating process is transformed into an equivalent frequency optimization problem. A closed-loop iterative mechanism based on the perceived sensitivity equivalent frequency constrains the power adjustment trajectory in real time, achieving light output transitions that are imperceptible to the human eye. At the system integration level, a dynamic visual adaptation characteristic parameter set serves as the cross-domain control hub, enabling a synergistic coupling effect between the light source response characteristics and the power supply adjustment. Specifically, in the execution phase, a state determination method based on sequence extreme value positions overcomes the lag inherent in the amplitude criterion alone. The physiological sensitivity frequency threshold is converted into a real-time optimization criterion for the derating rate, breaking through the path dependency of traditional over-temperature protection on the temperature threshold. In the power execution phase, a gradient tracking compensation architecture is pioneered to address the stability control challenges of the variable-rate derating process. This cross-domain collaborative mechanism, integrating visual physiological models, adaptive frequency optimization, and closed-loop power control, eliminates flicker perception while ensuring thermal safety.

[0152] Example 2: Figure 2 The following is a schematic diagram of the structure of the LED power supply safety control system with over-temperature protection function of the present invention. The LED power supply safety control system with over-temperature protection function includes the following modules:

[0153] The parameter acquisition module is used to monitor the temperature of key parts of the LED power supply in real time. When the temperature exceeds the set protection threshold, it obtains the pre-stored luminous flux response delay time constant and the lower limit of the human eye's visual sensitivity frequency;

[0154] A component calculation module, configured to calculate the light fluctuation frequency component corresponding to the current initial derating rate according to a light flux response delay time constant;

[0155] Adaptation analysis module, used to detect the changing trend of ambient light intensity and analyze dynamic visual adaptation characteristics based on the changing trend of ambient light intensity;

[0156] A perception correction module, configured to correct the perception sensitivity of the light fluctuation frequency component according to the dynamic visual adaptation characteristics and generate a perception sensitivity equivalent frequency;

[0157] A rate optimization module is used to increase the initial derating rate when the perceptual sensitivity equivalent frequency is lower than the lower limit of the human eye's visual sensitivity frequency until the newly generated perceptual sensitivity equivalent frequency is not lower than the lower limit of the human eye's visual sensitivity frequency, thereby obtaining an optimized derating rate;

[0158] The derating execution module is used to execute the output power derating operation according to the optimized derating rate.

[0159] The calculations involved in the embodiments are all dimensionless numerical calculations, and the preset parameters and thresholds in the calculations are set by those skilled in the art according to actual conditions.

[0160] The above embodiments may be implemented in whole or in part through software, hardware, firmware, or any other combination thereof. When implemented using software, the above embodiments may be implemented in whole or in part in the form of a computer program product.

[0161] Those skilled in the art will appreciate that the modules and algorithm steps of each example described in conjunction with the embodiments disclosed herein can be implemented in electronic hardware, or a combination of computer software and electronic hardware. Whether these functions are performed in hardware or software depends on the specific application of the technical solution and the invention constraints. Professional and technical personnel can use different methods to implement the described functions for each specific application, but such implementation should not be considered beyond the scope of this application.

[0162] In addition, each functional module in each embodiment of the present application may be integrated into one processing module, or each module may exist physically separately, or two or more modules may be integrated into one module.

[0163] In the several embodiments provided in this application, it should be understood that the disclosed systems, devices and methods can be implemented in other ways. For example, the device embodiments described above are merely schematic. For example, the division of the modules is only a logical function division. In actual implementation, there may be other division methods, such as multiple modules or components can be combined or integrated into another system, or some features can be ignored or not executed. Another point is that the mutual coupling or direct coupling or communication connection shown or discussed can be through some interfaces, indirect coupling or communication connection of devices or modules, which can be electrical, mechanical or other forms.

[0164] The above description is merely a specific embodiment of the present application, but the scope of protection of the present application is not limited thereto. Any changes or substitutions that can be easily conceived by a person skilled in the art within the technical scope disclosed in this application should be included in the scope of protection of this application. Therefore, the scope of protection of this application should be based on the scope of protection of the claims.

[0165] Finally: The above description is only a preferred embodiment of the present invention and is not intended to limit the present invention. Any modifications, equivalent substitutions, improvements, etc. made within the spirit and principles of the present invention should be included in the scope of protection of the present invention.

Claims

1. A method for safely controlling an LED power supply with an over-temperature protection function, characterized in that: The steps include: S1. Real-time monitoring of the temperature of key parts of the LED power supply. When the temperature exceeds the set protection threshold, the pre-stored luminous flux response delay time constant and the lower limit of the human visual sensitivity frequency are obtained; S2. Calculate the light fluctuation frequency component corresponding to the current initial derating rate based on the luminous flux response delay time constant; S3, detecting the changing trend of the ambient light intensity, and analyzing the dynamic visual adaptation characteristics based on the changing trend of the ambient light intensity; S4, performing perceptual sensitivity correction on the light fluctuation frequency component according to the dynamic visual adaptation characteristics to generate a perceptual sensitivity equivalent frequency; S5. When the perceptual sensitivity equivalent frequency is lower than the lower limit of the human eye's visual sensitivity frequency, the initial derating rate is increased until the newly generated perceptual sensitivity equivalent frequency is not lower than the lower limit of the human eye's visual sensitivity frequency, thereby obtaining an optimized derating rate; S6. Perform output power derating operation according to the optimized derating rate.

2. The LED power supply safety control method with over-temperature protection function according to claim 1, characterized in that: Real-time monitoring of the temperature of key parts of the LED power supply. When the temperature exceeds the set protection threshold, the pre-stored luminous flux response delay time constant and the lower limit of the human eye's visual sensitivity frequency are obtained, including: Synchronously sample the junction temperature of the power switch tube of the LED power supply and the surface temperature of the magnetic components; When any sampled temperature value exceeds the set protection threshold three times in a row, it is determined that the over-temperature protection trigger condition is met; When the over-temperature protection condition is triggered, the pre-stored luminous flux response delay time constant and the lower limit value of the human eye visual sensitivity frequency are obtained.

3. The LED power supply safety control method with over-temperature protection function according to claim 2, characterized in that: The specific method for obtaining the pre-stored luminous flux response delay time constant and the lower limit of the human eye visual sensitivity frequency is as follows: Obtaining the LED light source package model code of the current drive circuit, querying the light source characteristic mapping table pre-stored in the non-volatile memory according to the LED light source package model code, and extracting the corresponding luminous flux response delay time constant from the light source characteristic mapping table; The current lighting scene classification identifier is read through the scene recognition interface, and the lower limit value of the human eye visual sensitivity frequency associated with the corresponding scene is retrieved from the visual perception parameter database based on the lighting scene classification identifier.

4. The LED power supply safety control method with over-temperature protection function according to claim 1, characterized in that: The light fluctuation frequency component corresponding to the current initial derating rate is calculated based on the luminous flux response delay time constant, including: Read the initial derating rate stored in the current drive circuit microcontroller; Get the current effective value of the luminous flux response delay time constant; A conversion model is established based on the inverse relationship between the light flux response delay time constant and the light fluctuation frequency component; Input the initial derating rate into the conversion model for calculation; Outputs the value of the optical fluctuation frequency component corresponding to the current initial derating rate.

5. The LED power supply safety control method with over-temperature protection function according to claim 1, characterized in that: Detect the changing trend of ambient light intensity and analyze the dynamic visual adaptation characteristics based on the changing trend of ambient light intensity, including: Detect the illuminance measurement value sequence of the current ambient lighting source at three consecutive sampling points; Identify the order in which the maximum and minimum measured values appear in the illumination sequence; Determine whether the direction of illumination change is increasing or decreasing based on the position sequence; When the change direction is an increasing trend, the benchmark adaptation time dominated by photopic vision is selected from the preset physiological parameter library; When the change direction is a decreasing trend, a benchmark adaptation time dominated by dark vision is selected from the preset physiological parameter library; The baseline adaptation time is corrected based on the absolute value of the illuminance change rate and the direction of change: the light adaptation time constant is shortened in proportion to the change rate under an increasing trend, and the dark adaptation time constant is extended in proportion to the change rate under a decreasing trend; Output is a two-channel dynamic visual adaptation feature set carrying directional features.

6. The LED power supply safety control method with over-temperature protection function according to claim 1, characterized in that: The perceptual sensitivity of the light fluctuation frequency component is corrected according to the dynamic visual adaptation characteristics to generate a perceptual sensitivity equivalent frequency, including: Extracting the light adaptation time constant and the dark adaptation time constant from the dynamic visual adaptation characteristic parameter set; The photopic adaptation time constant is input into the physiological response transfer function to calculate the photopic perception gain factor; The dark adaptation time constant is input into the time integration operator to calculate the dark vision cumulative effect factor; performing bidirectional frequency domain modulation on the light fluctuation frequency components; The modulation results are combined to generate a phase-continuous perceptual sensitivity equivalent frequency output value.

7. The LED power supply safety control method with over-temperature protection function according to claim 6, characterized in that: Bidirectional frequency domain modulation includes: the photopic perception gain factor acts to enhance the high-frequency response of the frequency component; the scotopic cumulative effect factor acts to suppress the low-frequency fluctuation of the frequency component.

8. The LED power supply safety control method with over-temperature protection function according to claim 1, characterized in that: When the perceptual sensitivity equivalent frequency is lower than the lower limit of the human eye's visual sensitivity frequency, the initial derating rate is increased until the newly generated perceptual sensitivity equivalent frequency is not lower than the lower limit of the human eye's visual sensitivity frequency, and the optimized derating rate is obtained, including: Establish a comparative relationship between the current perceptual sensitivity equivalent frequency and the lower limit of the human eye's visual sensitivity frequency; When the comparison result shows lower than, set the initial derating rate change step value; Increase the current derating rate value according to the initial derating rate change step value; regenerate the light fluctuation frequency component based on the increased derating rate value; performing a perceptual sensitivity correction operation on the regenerated light fluctuation frequency component to generate a new perceptual sensitivity equivalent frequency; Compare the newly generated perceptual sensitivity equivalent frequency with the lower limit of the human eye's visual sensitivity frequency again; Repeating the cycle of increasing the derating rate and regenerating the comparison; When the newly generated perceptual sensitivity equivalent frequency reaches or exceeds the lower limit of the human eye's visual sensitivity frequency, the operation cycle is terminated; The effective derating rate value at this time is recorded as the optimized derating rate output.

9. The LED power supply safety control method with over-temperature protection function according to claim 1, characterized in that: Perform output power derating operations according to the optimized derating rate, including: Loading the values stored in the dedicated storage area for optimizing the derating rate and converting them into power control signal waveform parameters; Configure the driving timing sequence of the power switch tube and generate a pulse width modulation waveform according to the driving timing sequence; Transmitting the pulse width modulation waveform to the gate of the power switch tube through the isolation drive circuit; Monitor the output power change gradient in real time and adjust the duty cycle change rate of the pulse width modulation waveform; When the deviation between the output power change gradient and the optimized derating rate exceeds the allowable range, the duty cycle fine-tuning compensation mechanism is activated; After confirming that the output power is stable at the target derating value, lock the current drive parameters to maintain power output.

10. An LED power supply safety control system with an over-temperature protection function, used to implement the LED power supply safety control method with an over-temperature protection function according to any one of claims 1 to 9, characterized in that: Includes the following modules: The parameter acquisition module is used to monitor the temperature of key parts of the LED power supply in real time. When the temperature exceeds the set protection threshold, it obtains the pre-stored luminous flux response delay time constant and the lower limit of the human eye's visual sensitivity frequency; A component calculation module, configured to calculate the light fluctuation frequency component corresponding to the current initial derating rate according to a light flux response delay time constant; Adaptation analysis module, used to detect the changing trend of ambient light intensity and analyze dynamic visual adaptation characteristics based on the changing trend of ambient light intensity; A perception correction module, configured to correct the perception sensitivity of the light fluctuation frequency component according to the dynamic visual adaptation characteristics and generate a perception sensitivity equivalent frequency; A rate optimization module is used to increase the initial derating rate when the perceptual sensitivity equivalent frequency is lower than the lower limit of the human eye's visual sensitivity frequency until the newly generated perceptual sensitivity equivalent frequency is not lower than the lower limit of the human eye's visual sensitivity frequency, thereby obtaining an optimized derating rate; The derating execution module is used to execute the output power derating operation according to the optimized derating rate.

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