Conductive backboard, manufacturing method of conductive backboard and photovoltaic module

Abstract

The invention discloses a conductive back plate, a manufacturing method of the conductive back plate and a photovoltaic module, relates to the technical field of photovoltaics, and is used for achieving the purposes of high conversion efficiency, low unit manufacturing cost, high unit production efficiency and high module reliability in cooperation with a photovoltaic cell. The conductive back plate comprises a carrier plate and a patterned conductive layer; the conductive layer is a metal layer arranged on the carrier plate, and the roughness Ra of a functional surface, which is used for being electrically contacted with the battery piece, of the conductive layer is 0.02-0.3 mu m.

Description

[0001] This application is a divisional application of the patent application with the application number 202411703954.9 and the invention creation name "A Conductive Backplane, a Manufacturing Method of the Conductive Backplane and a Photovoltaic Module". The filing date of the patent application with the application number 202411703954.9 is November 26, 2024. Technical Field

[0002] The present invention relates to the field of photovoltaic technology, and in particular to a conductive backplane, a manufacturing method of the conductive backplane and a photovoltaic module. Background Art

[0003] Currently, the production of photovoltaic modules usually adopts the solder ribbon connection technology or the conductive backplane connection technology. The photovoltaic modules manufactured by the conductive backplane technology have advantages such as high appearance quality, high power, and high conversion efficiency.

[0004] For the photovoltaic modules using the conductive backplane technology, after a long-term reliability test in a high-temperature and high-humidity environment, the power attenuation of the photovoltaic modules is relatively large, and the power value of the photovoltaic modules decays close to 5%, seriously affecting the outdoor use of the photovoltaic modules. How to provide a photovoltaic product or product component with high corresponding conversion efficiency of the photovoltaic cell, low unit manufacturing cost, high unit production efficiency, and high component reliability is very important in the field of photovoltaic product manufacturing. Summary of the Invention

[0005] The purpose of the present invention is to provide a conductive backplane, a manufacturing method of the conductive backplane and a photovoltaic module, so as to achieve the purpose of high corresponding conversion efficiency of the photovoltaic cell, low unit manufacturing cost, high unit production efficiency, and high component reliability.

[0006] In a first aspect, the present invention provides a conductive backplane, including a carrier board and a patterned conductive layer;

[0007] The conductive layer can be a metal layer provided on the carrier board, and the roughness Ra of the functional surface of the conductive layer for electrical contact with the cell is 0.02 μm to 0.3 μm.

[0008] In the case of adopting the above technical solution, the roughness of the functional surface of the conductive layer for contacting the battery cell is different from the conventional requirement. The roughness Ra is selected to be reduced to 0.02 μm to 0.3 μm to improve the reflectivity of the conductive backplane, so that the battery cell has a better light absorption effect under illumination and the photoelectric conversion efficiency is improved. And based on the process of using conductive adhesive to conduct the conductive layer and the battery cell in the manufacturing process of the photovoltaic module, the design of the roughness of the functional surface of the conductive layer has a great relationship with the efficient introduction and efficient action of the conductive adhesive in the subsequent process. The roughness of the functional surface of the conductive layer designed in this application can not only promote the flow of the conductive adhesive in the molten state of the conductive adhesive but also increase the bonding area of the two sides of the molten conductive adhesive (the conductive layer and the battery cell respectively), improve the efficiency of the conductive adhesive process and the reliability of the conductive adhesive, and reduce the stress between the conductive adhesive and the battery cell and the conductive layer, avoiding the occurrence of hidden cracks in the battery cell due to large stress. In addition, in some alternative implementation manners, the conductive layer at least selects a first metal layer and a second metal layer. The roughness Ra1 of the functional surface of the first metal layer in contact with the carrier plate is relatively high, and Ra1 is 0.3 μm to 0.5 μm. The functional surface of the first metal layer with a high roughness can have a greater bonding strength with the carrier plate, thereby improving the reliability of the photovoltaic module, expanding the selection range of the conductive layer material, and being able to reasonably select materials based on the conductivity and material cost, so that the conductive layer has good conductivity while reducing the cost. The conductive backplane of this application realizes the effects of synergistic photovoltaic cell conversion efficiency, low unit manufacturing cost, high unit production efficiency, and high component reliability as a whole design solution. In some alternative implementation solutions, based on the convenience of the subsequent process of peeling the ineffective area (waste removal area) of the conductive layer, the peeling efficiency and the effectiveness of peeling, this application also performs roughness treatment on the specific area of the edge of each effective area (or called effective unit, effective area unit, etc. with similar functions) of the functional surface of the conductive layer. And based on the electrical isolation requirement between adjacent effective area units of the conductive layer of the conductive backplane, this application performs roughness treatment on the side surface (or called side surface, that is, the third area, the same hereinafter) of each effective area of the conductive layer to improve or ensure the electrical isolation performance between two adjacent effective areas, further improving the reliability of the conductive backplane product and the reliability of the photovoltaic module using this conductive backplane. In some implementation solutions of this application, based on the high requirements for the safety of the photovoltaic module product, this application also discloses a method for treating the edge area and the side surface area of the effective area of the conductive layer to increase the volume resistivity of these areas, and an inward concave wavy body structure treatment method for these area surfaces to further effectively improve the electrical isolation performance between adjacent effective areas of the conductive layer, thereby improving the electrical safety requirements of the conductive backplane product and the safety of the photovoltaic module using the conductive backplane.

[0009] In a second aspect, the present invention also provides a manufacturing method of a conductive backplane, including:

[0010] providing a carrier plate;

[0011] Provide a conductive layer disposed on the carrier plate; wherein, the conductive layer includes a metal layer, and the roughness Ra of the functional surface of the conductive layer for electrical contact with the battery cell is 0.02 μm to 0.3 μm;

[0012] Composite carrier plate and conductive layer.

[0013] The manufacturing method of the conductive backplane can manufacture the conductive backplane in the first aspect, so it has the same beneficial effects as the first aspect and will not be repeated here.

[0014] In some possible implementation manners, providing a conductive layer composed of at least a first metal layer and a second metal layer stacked further includes patterning the conductive layer according to a prefabricated circuit pattern, so that the conductive layer can be matched with the battery cell electrode or pad point in the subsequent process to achieve effective conduction connection. This patterning process can be completed in advance and then the patterned conductive layer is combined with the carrier plate. In some implementation solutions, it is also possible to first combine the stacked conductive layer with the carrier plate and then pattern the conductive layer carried on the carrier plate.

[0015] In some possible implementation manners, the edge specific area (the first area) of the first effective area of the functional surface of the first metal layer or the edge specific area (the second area) of the second effective area of the functional surface of the second metal layer is processed by using the roughness treatment process and solution disclosed in this application, so that the roughness Ra3 of the corresponding first area is 0.3 μm to 100 μm, and the roughness Ra4 of the second area is 0.02 μm to 80 μm. Adopting such a technical solution can facilitate the subsequent process of peeling off the ineffective area (waste removal area) of the conductive layer, and improve the peeling efficiency and effectiveness. In some implementation solutions of this application, based on the high requirements for the safety of photovoltaic module products, the edge area and side surface area of the effective area of the conductive layer can be processed by using the laser treatment process, doping process, spraying insulating material and other processes disclosed in this application to increase the bulk resistivity of these areas, and the inner concave wavy body structure can be processed on the surface of these areas by using the laser engraving process or chemical engraving process disclosed in this application to further effectively improve the electrical isolation performance between adjacent effective areas of the conductive layer, thereby improving the electrical safety requirements of the conductive backplane products and the safety of the photovoltaic modules using the conductive backplane. In the production process of some conductive backplanes with coordinated production rhythm and process design, the pattern process, roughness treatment process, bulk resistivity treatment process and inner concave wavy body structure setting process disclosed in this application can be reasonably adjusted in the operation sequence, combined, and the same or similar technical means can be used to complete the above-mentioned conductive layer treatment processes or technologies in the same process according to the reasonable design of the production rhythm and process, so as to reduce the production cost per unit time, improve the production efficiency, and at the same time improve the reliability of the backplane and the products using the backplane.

[0016] In a third aspect, the present invention also provides a photovoltaic module, including the conductive backplane as described in any one of the above. This photovoltaic module has the same beneficial effects as the conductive backplane described in the first aspect and any one of the above, and will not be elaborated here.

[0017] The conductive backplane, manufacturing method and photovoltaic module using the conductive backplane disclosed in this application are comprehensive technical solutions that synergistically improve product reliability, photoelectric conversion efficiency, reduce production costs, and improve production efficiency. BRIEF DESCRIPTION OF THE DRAWINGS

[0018] The drawings described herein are used to provide a further understanding of the present invention and constitute a part of the present invention. The schematic embodiments of the present invention and their descriptions are used to explain the present invention and do not constitute an improper limitation to the present invention. In the drawings:

[0019] Figure 1 It is a schematic structural diagram of a combination of a conductive backplane and a battery cell provided by an embodiment of the present invention;

[0020] Figure 2 Schematic diagram of reflectivity comparison between the low-roughness copper foil and the existing conventional-roughness copper foil in the embodiment of the present invention;

[0021] Figure 3 Top view schematic diagram of a partial area of a conductive backplane in the embodiment of the present invention;

[0022] Figure 4-1 Schematic diagram of the pre-patterned or patterned conductive layer of a conductive backplane in the embodiment of the present invention (from the perspective of the second metal layer);

[0023] Figure 4-2 Schematic diagram of the pre-patterned or patterned conductive layer of a conductive backplane in another embodiment of the present invention (from the perspective of the first metal layer);

[0024] Figure 5 is Figure 4-1 Partial three-dimensional cross-sectional schematic diagram of the conductive layer of the conductive backplane in

[0025] Figure 6 Schematic diagram of the concave corrugated body structure provided on the effective area of the conductive layer in the embodiment of the present application;

[0026] Figure 7 Flow schematic diagram of a manufacturing method of a conductive backplane provided by the embodiment of the present invention.

[0027] Reference numerals: 1 is a carrier plate, 2 is a conductive layer, 21 is a first metal layer, 211 is a first effective area, 2111 is a first area, 22 is a second metal layer, 221 is a second effective area, 2211 is a second area, 23 is a third area, 24 is an ineffective area, 3 is an adhesive film, 31 is an opening, and 4 is a battery cell. Detailed implementation manners

[0028] In order to make the technical problems, technical solutions and beneficial effects to be solved by the present invention clearer, the present invention will be further described in detail below with reference to the accompanying drawings and embodiments. It should be understood that the specific embodiments described herein are only used to explain the present invention and are not used to limit the present invention.

[0029] It should be noted that when an element is referred to as being "fixed to" or "disposed on" another element, it can be directly on the other element or indirectly on the other element. When an element is referred to as being "connected to" another element, it can be directly connected to the other element or indirectly connected to the other element.

[0030] In addition, the terms "first" and "second" are used for descriptive purposes only and should not be construed as indicating or implying relative importance or implicitly specifying the quantity of the indicated technical features. Thus, features defined with "first" and "second" may explicitly or implicitly include one or more of such features. In the description of the present invention, "a plurality of" means two or more unless otherwise specifically defined. "Several" means one or more unless otherwise specifically defined.

[0031] In the description of the present invention, it should be understood that the orientation or positional relationship indicated by the terms "upper", "lower", "front", "rear", "left", "right", etc. is based on the orientation or positional relationship shown in the drawings, and is only for the convenience of describing the present invention and simplifying the description, rather than indicating or implying that the indicated device or element must have a specific orientation, be constructed and operated in a specific orientation, and thus should not be construed as a limitation to the present invention.

[0032] In the description of the present invention, it should be noted that unless otherwise clearly specified and defined, the terms "mounted", "connected" and "coupled" should be understood in a broad sense. For example, it may be a fixed connection, a detachable connection, or an integral connection; it may be a mechanical connection or an electrical connection; it may be directly connected or indirectly connected through an intermediate medium, and may be the communication inside two elements or the interaction relationship between two elements. For those of ordinary skill in the art, the specific meanings of the above terms in the present invention can be understood according to specific circumstances.

[0033] In the description of the present application, layers, plates and films can be used interchangeably in a broad sense. The carrier plate in the present application can be a polymer-based adhesive film or a non-adhesive film plate, or a glass plate with fluidity under specific processes. The carrier plate can be selected to be transparent, semi-transparent or opaque according to the requirements of the use scenario, and the carrier plate has at least the property of being insulating under certain conditions.

[0034] In the present application, the conductive layer can be a metal conductive layer such as copper foil, aluminum foil, zinc foil, etc., or a copper foil containing doping elements such as nickel, and a doped metal foil such as aluminum foil.

[0035] In the description of the present application, unless otherwise specified, the expressions "mapping area", "corresponding area" or "projection area" used in the present application have the same or similar meanings, that is, the orthographic projection of a certain component, material or position on other regional surfaces. The "preset", "reserved", "prefabricated" or "predesigned" used in the present application does not necessarily require obvious marking on the conductive backplane or the conductive layer during the manufacturing of the conductive backplane or the processing of the conductive layer disclosed in the present application.

[0036] In the description of the present application, as Figure 3The conductive layer shown can be patterned (or referred to as graphitized) by various processes or technical means according to a pre-designed pattern style, such as laser die-cutting, mechanical die-cutting, chemical etching, milling machines, etc. The conductive layer can be divided into an effective area and an ineffective area according to the pre-designed pattern style (or other expressions with the same or equivalent meaning, such as a preset circuit pattern, a prefabricated circuit pattern, a pre-designed pattern, etc.) or patterning. Both the effective area and the ineffective area can be composed of multiple small areas (i.e., small units) with the same or similar styles. In this application, the effective area can also be referred to as other names with the same, equivalent, or similar functions as the effective area in this application, such as a conductive area, an effective unit, an effective area unit, a busbar conductive layer, etc.; the ineffective area can be referred to as other names with the same, equivalent, or similar functions as the ineffective area in this application, such as a pre-removal area, a removal area, a removal region, a removal channel, an ineffective area unit, etc.

[0037] In the description of this application, unless otherwise specified, the numerical ranges disclosed in this application include the endpoints, and in the case of roughness, volume resistivity, etc. where the surface or volume is used as the test or calculation basis, such data are average values.

[0038] Such as Figure 1 And Figure 3As shown in the figure, an embodiment of the present invention provides a conductive backplane, which includes a carrier plate 1 and a patterned conductive layer 2. Among them, the conductive layer 2 at least includes a first metal layer 21 and a second metal layer 22 arranged in a stacked manner. The first metal layer 21 is disposed on the carrier plate 1, and the second metal layer 22 is disposed on the first metal layer 21. The first metal layer 21 and the second metal layer 22 can be combined together by mechanical pressing, or the second metal layer 22 can be plated on the first metal layer 21 by electroplating. When there are other metal layers, the same method can be used for combination. The roughness Ra1 of the functional surface of the first metal layer 21 is 0.3 μm to 0.5 μm. It should be noted that the functional surface of the first metal layer 21 is the side in contact with the carrier plate 1, and the roughness of other sides of the first metal layer 21 can be the same as or different from that of the functional surface. The roughness Ra2 of the functional surface of the second metal layer 22 is 0.02 μm to 0.3 μm. The functional surface of the second metal layer 22 is the side away from the carrier plate 1, that is, the side used for electrical contact with the battery cell 4. The roughness of other sides of the second metal layer 22 can be the same as or different from that of the functional surface. In the conductive backplane product, the functional surface of the second metal layer 22 with a roughness Ra2 of 0.02 μm to 0.3 μm in this embodiment can be embodied as the substantial area of the second effective area 221 of the second metal layer 22. The substantial area can be embodied as the area in the conductive layer 2 that is not in direct conductive contact with the battery cell 4. For example, except for the area connected by a specific conductive adhesive, other effective areas in contact with the adhesive film 3. This substantial area can also be embodied as most of the area or a large area after removing the special treatment area (the special treatment area can be the area where the conductive adhesive is attached, or the second area where roughness, volume resistivity, and concave structure treatment are performed in the following embodiments) in the conductive backplane product. Similarly, in the conductive backplane product, the functional surface of the first metal layer 21 with a roughness of 0.3 μm to 0.5 μm in this application embodiment can be embodied as the substantial area of the first effective area 211 of the first metal layer 21. The substantial area can also be most of the effective area or a large area of the effective area after removing the first area mentioned in the following embodiments. The surface (or area) roughness numerical range disclosed in this application is the average roughness numerical range of this surface or area. An exemplary test method is: take a point on the surface as the center point, and perform external radiation with a certain distance as the radius (for example, 0.5 cm) centered on this center point to determine the high and low points of the radiation area, and then use a certain algorithm to take the average value to determine the average roughness numerical value of this radiation area. It should be noted that the roughness test method disclosed in this application is only one of the examples. Currently, there are various roughness test instruments and test methods that can be applied to the roughness control and test in the embodiments of this application.

[0039] In the case of adopting the above technical solution, the conductive backplane selects the first metal layer 21 and the second metal layer 22 which are stacked. Among them, the roughness Ra1 of the functional surface of the first metal layer 21 in contact with the carrier plate 1 is relatively high, and Ra1 is 0.3 μm to 0.5 μm. The functional surface of the first metal layer 21 with high roughness can have a greater bonding strength with the carrier plate 1, thereby improving the reliability of the photovoltaic module. After the photovoltaic module completes the reliability test under high temperature and high humidity environment, it is not easy to have local damage due to insufficient bonding. The roughness Ra2 of the functional surface of the second metal layer 22 for electrically contacting the battery cell 4 is different from the requirement of high roughness adopted for pursuing high bonding force in the conventional case. Instead, the roughness is reduced to 0.02 μm to 0.3 μm to improve the reflectivity of the conductive backplane, so that the battery cell has a better light absorption effect under light and improves the photoelectric conversion efficiency. And based on the process of using conductive adhesive to conduct the conductive layer and the battery cell in the manufacturing process of the photovoltaic module using the conductive backplane, the design of the roughness of the functional surface of the second metal layer 22 has a great relationship with the effective introduction and efficient action of the conductive adhesive in the subsequent process. In this application, the designed rough functional surface of the second metal layer 22 can not only promote the flow of the conductive adhesive in the molten state of the conductive adhesive but also increase the bonding area of both sides of the solidified adhesive after the molten conductive adhesive (the functional surface of the second metal layer 22 and the battery cell 4 respectively), improve the flow introduction efficiency of the molten conductive adhesive between the battery cell 4 and the second metal layer 22 in the conductive adhesive process and the reliability of the conductive adhesive, and can reduce the stress between the conductive adhesive and the battery cell 4 and the second metal layer 22, avoiding the occurrence of hidden cracks in the battery cell 4 due to large stress. In addition, since the conductive layer 2 selects at least the first metal layer 21 and the second metal layer 22, the selection range of the materials of the conductive layer 2 is expanded, and materials can be reasonably selected based on the electrical conductivity and material cost of the materials, so that the conductive layer 2 has good electrical conductivity while reducing costs. The conductive backplane of this application, as an overall design solution, realizes the effects of high photovoltaic cell conversion efficiency, low unit manufacturing cost, high unit production efficiency, and high module reliability.

[0040] Figure 3It is a top view schematic diagram of a conductive backplane according to an embodiment disclosed in the present application (viewed from the second metal layer 22). Looking down from the direction of the second metal layer 22, a glue film 3 can be covered on the second metal layer 22, and the conductive layer 2 is patterned according to a pre-designed circuit pattern. During or after the patterning process, the conductive layer 2 is divided into an effective area and a waste removal area (invalid area 24), and adjacent effective area units are separated by the waste removal area. The patterning process can be carried out by die-cutting from the functional surface of the first metal layer 21, and the waste removal area is peeled off from the side of the functional surface of the first metal layer 21 to complete the patterning process; the patterning process can also be carried out by die-cutting from the functional surface of the second metal layer 22, and the waste removal area is peeled off from the side of the functional surface of the second metal layer 22 to complete the patterning process. In some embodiments, an opening 31 area can be formed by pre-drilling holes in the glue film 3 of the conductive backplane according to the electrode pattern of the battery cell to be matched in the subsequent stage, and conductive glue can be introduced into the opening 31 area during the subsequent component manufacturing process to electrically connect the conductive layer 2 and the battery cell. On the basis of the above embodiments, in some embodiments, the roughness of a specific area of the functional surface of the conductive layer 2 (the first metal layer 21 or the second metal layer 22) (the functional surface of the conductive layer 2 includes the functional surface of the first metal layer 21 and the functional surface of the second metal layer 22) can be processed. The specific area can be an area that spreads into the effective area starting from the intersection line of the effective area and the adjacent invalid area 24 (this intersection line can also be called the boundary of the effective area, unless otherwise specified, the expressions appearing in other places in the present application have the same meaning as the expression here). Generally, it shall not spread to the position of the conductive glue action point reserved in the effective area of the conductive layer 2 (corresponding to the opening 31 area of the glue film 3). In the present application, for the convenience of clearly introducing the technical solution, the position points or attachment areas of the conductive glue introduced during the subsequent component manufacturing process on the conductive layer 2 are called the reserved position points of the conductive backplane, but it should be noted that during the manufacturing process of the conductive backplane disclosed in the present application, especially during the various process treatments of the conductive layer, it is not required to mark the reserved position points on the conductive layer 2. According to the different front and back directions of the patterning intervention of the conductive layer or the different front and back sides of the peeling of the invalid area 24, different treatments can be carried out on the specific area of the aforementioned conductive layer 2, which are respectively:

[0041] (1) In some embodiments, when the conductive layer 2 is patterned from the functional surface of the first metal layer 21 according to a pre-designed circuit pattern or the invalid area 24 of the conductive layer 2 is peeled off from the functional surface of the first metal layer 21, as Figure 4-2 shown, the roughness Ra3 of the first area 2111 of the functional surface of the first metal layer 21 (in this embodiment, the first area 2111 is the aforementioned specific area of the conductive layer 2) is processed to be 0.3 μm to 100 μm. Among them, as Figure 4-2As shown in the accompanying drawings, the first area 2111 is a specific edge area of each first effective area 211, and the first area 2111 can be multiple according to the designed number of first effective areas 211. In the embodiment, the first area 2111 is the area where the intersection line of each first effective area 211 of the conductive layer 2 and the adjacent ineffective area 24 is the starting point for spreading to the first effective area 211. Generally, the first area 2111 shall not spread to the reserved point of the conductive backplane in the mapping area of the first metal layer 21. In some preferred embodiments, the spreading distance of the first area 2111 is 10μm-100μm.

[0042] (2) In some embodiments, when the conductive layer 2 is patterned from the functional surface of the second metal layer 22 according to a pre-designed pattern or when the ineffective area 24 of the conductive layer 2 is peeled off from the functional surface of the second metal layer 22, as shown in FIG. Figure 3 and 4-1 As shown in the accompanying drawings, the roughness Ra4 of the second area 2211 of the functional surface of the second metal layer 22 is 0.02μm to 80μm, wherein the second area 2211 of the functional surface of the second metal layer 22 in this embodiment is the edge specific area of each of the second effective areas 221 mentioned above, and the second area 2211 can be multiple according to the design number of the second effective areas 221. In the embodiment, the second area 2211 of the functional surface of the second metal layer 22 is the area where the intersection line of each second effective area 221 of the conductive layer 2 and the adjacent invalid area 24 is the starting point to spread to the second effective area 221, and generally the spreading distance of the second area 2211 does not exceed the reserved point of the conductive backplane in the mapping area of the functional surface of the second metal layer 22. In the preferred embodiment, the distance between the spreading area and the intersection line of the second effective area 221 and the adjacent invalid area 24 is 10μm-100μm.

[0043] In the above-mentioned embodiment, the roughness design and processing of the first area 2111 of the first metal layer 21 of the conductive layer 2 or the second area 2211 of the second metal layer 22 facilitates the effective contact between the stripping device and the conductive layer 2 during the conductive layer patterning process and can efficiently strip the invalid area 24 between two adjacent effective areas, so as to facilitate the completion of the waste removal process, wherein the stripping device can be an adsorption stripping device, a mechanical tearing stripping device, or other stripping devices that need to use roughness to enhance contact. It should be noted that in some conductive backplane manufacturing processes with reasonable production tact and process design, the roughness processing of the first area 2111 and the patterning process of the conductive layer 2, or the roughness processing of the second area 2211 and the patterning process of the conductive layer 2 can be completed in the same process and / or using the same or identical process.

[0044] In an independent embodiment within the scope of the present invention or on the basis of one or more of the above embodiments,Figure 5 As shown, the roughness of the third region 23 of the conductive layer 2 that can be processed is 0.1 μm to 80 μm. Among them, the third region 23 is a side region formed between each effective region and the adjacent ineffective region 24 of the patterned or patternable conductive layer 2 (i.e., the side surface region of the effective region of the conductive layer 2). This side region is located between the functional surfaces of the first metal layer 21 and the second metal layer 22. Since the conductive layer 2 is composed of at least the first metal layer 21 and the second metal layer 22 stacked, therefore, the third region 23 includes two stacked parts, namely the side region of the first metal layer 21 and the side region of the second metal layer 22. The roughness of the side region of the first metal layer 21 and the roughness of the side region of the second metal layer 22 can be the same or different. In some embodiments, the roughness of the third region 23 can be between 0.1 μm and 80 μm, preferably between 3 μm and 80 μm; in some embodiments, the roughness of the third region 23 can be between 3 μm and 40 μm. It should be noted that the roughness of the third region 23 can be designed according to the changes in the properties of the adhesive film of the carrier plate 1 (or the carrier plate 1) and / or the adhesive film 3 provided on the second metal layer 22, such as the melting temperature, curing temperature, flowability, unit weight, etc. (especially for future new materials or adhesive films with new properties). The electrical isolation performance between adjacent effective region units of the conductive layer 2 of the conductive backplane determines the safety of the conductive backplane and the photovoltaic module using the conductive backplane assembly. Incomplete waste removal, bubbles and other reasons are likely to cause the adjacent effective region units to be connected, resulting in a short circuit of the photovoltaic module, thus affecting the reliability of the photovoltaic module. The treatment of the roughness of the third region 23 of the conductive layer 2 in this embodiment of the present application can enable the adhesive film fluid to flow to the ineffective region 24 (or ineffective channel) of the conductive layer 2 during the subsequent composite process of the conductive layer 2 and the carrier plate 1 (or the composite process of the carrier plate 1, the conductive layer 2 and the adhesive film 3), that is, when flowing between adjacent effective region units, it can enable the third region 23 to better hang the adhesive film fluid, or provide the adhesion between the adhesive film and the third region 23, so that the adhesive film fluid can be effectively and completely filled in the waste removal region during the conductive backplane composite process, thereby effectively isolating adjacent effective region units of the conductive layer 2 and improving the reliability of the conductive backplane and the photovoltaic module using the conductive backplane. It should be noted that in some preferred embodiments, the treatment of the roughness of the third region 23 and the patterning process of the conductive layer 2 can be completed in the same process and / or by using the same or the same process.

[0045] The design of the surface roughness of the functional surface of the conductive layer, the design of the roughness of the specific area at the edge of the effective area of the conductive layer, the design of the roughness of the first area, the second area and the third area of the metal layer of the conductive layer disclosed in the foregoing embodiments not only starts from the reliability of the conductive backplane and the photovoltaic module, but also starts from the photoelectric conversion efficiency of the photovoltaic module, the cost per unit time, and takes into account the compounding of the conductive backplane, the production process rhythm of the photovoltaic module and the overall production efficiency, providing an overall design scheme to achieve the effects of high photoelectric conversion efficiency of the photovoltaic cell, low unit manufacturing cost, high unit production efficiency and high module reliability.

[0046] In an independent embodiment within the scope of the inventive concept or on the basis of one or more of the foregoing embodiments, on the basis of taking into account improving the photoelectric conversion of the photovoltaic module, reducing the cost of the conductive backplane, and improving the production efficiency, to improve the electrical safety of the conductive backplane, such as Figure 3 and Figure 5 As shown, the conductive layer 2 of the conductive backplane provided by some embodiments of the present application includes an effective area, an ineffective area 24 and the side surface (the third area 23) of the effective area of the conductive layer. The volume resistivity treatment is performed on the second area 2211 and the third area 23 of the second effective area 221 of the second metal layer 22, so that the volume resistivity of the second area 2211 is greater than the rest of the second effective area 221, and the volume resistivity of the third area 23 is greater than the volume resistivity of the rest of the conductive layer 2. It should be noted that the first area 2111, the second area 2211 and the third area 23 mentioned in this application document have a certain thickness and have measurable volume resistivity. In this embodiment, the second area 2211 is the area spreading from the boundary of the second effective area 221 (that is, the intersection line of the second effective area 221 and the adjacent ineffective area 24, and the expression in other places in this application is the same as the explanation here) to the same second effective area 221. Generally, the spreading distance of the second area 2211 does not exceed the mapping or projection area of the reserved point of the conductive backplane on the second effective area 221. On the basis of this embodiment, the technical solution of this embodiment is introduced as follows according to the layer structure of the conductive layer 2:

[0047] As Figure 1 shown, the conductive layer 2 includes a first metal layer 21 and a second metal layer 22. As Figure 4-1As shown, the effective area is the second effective area 221 of the second metal layer 22. The second effective area 221 includes the second area 2211 of the functional surface of the second metal layer 22 and the remaining area of the second metal layer 22, that is, the effective area on the second metal layer 22. In addition to including the second area 2211 of the functional surface of the second metal layer 22, it also includes the remaining area of the second metal layer 22 (excluding the invalid area 24). The second area 2211 is the area that spreads from the boundary of the second effective area 221 of the second metal layer 22 to the second effective area 221. Generally, the spreading distance of the second area 2211 does not exceed the mapping area of the reserved point position of the conductive backplane on the functional surface of the second metal layer 22. As Figure 4-2As shown, the effective region is the first effective region 211 of the first metal layer 21. The first effective region 211 includes the first region 2111 of the functional surface of the first metal layer 21 and the remaining region of the first metal layer 21, that is, the effective region on the first metal layer 21, which, in addition to including the first region of the functional surface of the first metal layer 21, also includes the remaining region of the first metal layer 21 (excluding the invalid region 24); the first region 2111 is a region that spreads from the boundary of the first effective region 211 of the first metal layer 21 to the first effective region 211. Generally, the spreading distance of the first region 2111 does not exceed the mapping region of the reserved points of the conductive backplane on the functional surface of the first metal layer 21. In a preferred embodiment, the spreading distance of the first region 2111 and the second region 2211 from the boundary of the effective region of their respective metal layers to the effective region is 0.1 μm - 20 mm, and the preferred spreading distance can be 10 μm - 100 μm. In this embodiment, the bulk resistivity of the third region 23 can also be processed so that the bulk resistivity of the third region 23 is greater than the bulk resistivity of the remaining region of the conductive layer 2. On the basis of the above-mentioned improvement of the bulk resistivity of the third region 23, at least one of the first region 2111 of the first metal layer 21 and the second region 2211 of the second metal layer 22 can be processed to increase the bulk resistivity of this region to be correspondingly greater than the bulk resistivity of the remaining region of the first metal layer 21 (that is, the region other than the first region 2111 and the third region 23) and the bulk resistivity of the remaining region of the second metal layer 22 (that is, the region other than the second region 2211 and the third region 23). The technical solution of this embodiment improves the electrical isolation performance between adjacent effective regions of the conductive layer by processing specific regions on the side surface and the upper and lower surfaces of the edge of the effective region of the conductive layer, thereby improving the safety and reliability of the photovoltaic conductive backplane and the components using this conductive backplane. It should be noted that there are various ways to process the bulk resistivity of these regions. For example, Group V or Group VI elements can be doped in specific regions on the edge of the effective region of the conductive layer 2 by using CVD (Chemical Vapor Deposition) or PECVD (Plasma Enhance Chemical Vapour Deposition), and corrosion-resistant insulating materials can be sprayed on these regions, etc. This application exemplarily discloses several processing methods:

[0048] (1) Insulating materials such as alumina ceramics and ceramic polymers can be sprayed on these specific areas. In a preferred embodiment, a spraying device can be set at the laser head position when the conductive layer is patterned by laser, so that the alumina ceramic material can be sprayed simultaneously during the laser patterning process. The spraying area is controlled to spread from the effective area boundary of the conductive layer to the effective area by 0.1μm-20mm, and the preferred spraying range is 5mm. In an embodiment using an advanced spraying device, especially when the spray port can achieve micron-level control, the preferred spraying range is 10μm-100μm.

[0049] (2) The patterned conductive layer composed of copper foil can also be placed on a prefabricated grid plate, and specific edge areas of the effective area of the conductive layer (for example, including the first area 2111, the second area 2211 and the third area 23) are exposed to the grid, and other areas of the effective area are shielded by the plate structure of the grid plate. Then, the grid plate carrying the conductive layer is placed in a reaction container, and a sulfide and a phosphide (for example, phosphorus hypochlorite POCl3, etc.) are deposited on the specific area by a CVD chemical vapor deposition method to form a compound film containing sulfur and copper, phosphorus and copper, or phosphorus, sulfur and copper on the specific area.

[0050] (3) In a preferred embodiment, the patterning of the conductive layer and the volume resistivity processing of a specific area at the edge of the effective area of the conductive layer can be completed in the same process. The present application discloses a technical solution for combining the patterning and bulk resistivity processing steps using a laser processing process: when the conductive layer 2 is composed of two metal layers, namely, the first metal layer 21 is aluminum foil and the second metal layer 22 is copper foil, and the thickness of the conductive layer 2 is in the range of 40μm-60μm, the laser parameters can be selected based on the prefabricated circuit pattern, the thickness and material of the conductive layer 2, and the range of the first area 2111 and the second area 2211 of the effective area of the conductive layer 2. For the conductive backplane disclosed in the above embodiment of the present application, in which the range of the first area 2111 and / or the second area 2211 is 10μm-100μm, a laser with a frequency range of 50-500Hz, a circular spot diameter of 50μm, an operating speed range of 1000-20000mm / s, and a power range of 100% can be selected to perform laser engraving and sintering on the conductive layer 2 at a temperature of 5-55 degrees Celsius, 0.5-2 atmospheres, and an oxygen content of 10%-30% of the total gas.

[0051] On the basis of the above embodiments, in some embodiments, the conductive layer 2 of the conductive backplane disclosed in the present application adopts a resistivity of 1.65×10 -8 Ωm-5×10 -8 Ωm range of metal layer, the side surface area of the effective area of the conductive layer (corresponding to Figure 5 The third area 23) and / or the edge specific area (corresponding toFigure 4-1 the second region 2211 and / or Figure 4-2 the volume resistivity of the first region 2111) ranges from 3.15×10 -8 Ωm - 5×10 -8 Ωm. The volume resistivity of the side surface region and the edge specific region of the effective region of the conductive layer of the conductive backplane disclosed in the embodiments of the present application is at least greater than or equal to the remaining regions (excluding the side surface region and the edge specific region) of the effective region, thereby improving the electrical isolation performance between adjacent effective regions and enhancing the safety and reliability of the conductive backplane.

[0052] In an independent embodiment within the scope of the inventive concept or based on one or more of the foregoing embodiments, at least one of the first region 2111, the second region 2211, and the third region 23 of the conductive layer 2 in the foregoing embodiments may be processed such that at least one region has an inwardly concave wavy structure, and the wave crest of the wavy structure does not exceed the mapping region on the conductive layer of the reserved point position of the invalid region 24 closest to the conductive layer in the conductive backplane (that is, the action point of the conductive adhesive on the effective region closest to the waste removal channel in the conductive backplane, which can be referred to Figure 3 to the opening 31 position of the adhesive film 3 closest to the invalid region 24 shown). In a preferred embodiment, the side surface of the effective region of the conductive layer (corresponding to Figure 5 the third region 23) and the edge specific region surface (corresponding to Figure 4-1 the second region 2211 and / or Figure 4-2 the first region 2111) of the conductive layer may be structurally processed such that the side surface of the effective region and the edge specific region (which may be the first region 2111 and / or the second region 2211) have an inwardly concave wavy structure, and the wave crest of the wavy structure does not exceed the mapping region on the conductive layer of the reserved point position of the invalid region 24 closest to the conductive layer 2 in the conductive backplane. In a further preferred embodiment, as shown in the appendix Figure 6 it can be seen that inwardly concave wavy structures with staggered peaks may be provided on two opposite side surfaces (i.e., the third region 23) of adjacent second effective regions 221. It should be noted that the "wavy structure" here is only a general description of the shape of the inwardly concave structure, and the inwardly concave structure may also be in a shape similar to a pyramid. The inwardly concave wavy structure may be continuous or dispersed, and may be regular or irregular. By adopting the technical solution of this embodiment, the electrical isolation distance between adjacent second effective regions 221 can be increased by setting an inwardly concave structure on the side surface and / or the edge specific region of the second effective region 221 on the basis of a determined width of the invalid region 24 (i.e., the interval distance between adjacent second effective regions 221, which can also be referred to as the electrical isolation distance) or without changing the designed width of the invalid region 24, thereby enhancing the safety of the conductive backplane.

[0053] Based on the above embodiments or in some independent embodiments within the scope of the inventive concept of the present invention, the roughness Ra1 of the functional surface of the first metal layer 21 is not equal to the roughness Ra2 of the functional surface of the second metal layer 22. And / or, the material of the first metal layer 21 is different from the material of the second metal layer 22. Since the materials of the first metal layer 21 and the second metal layer 22 are different, the second metal layer 22 in electrical contact with the battery cell 4 can be separately selected with a material having better electrical conductivity, while the first metal layer 21 in contact with the carrier plate 1 can be selected with a lower-cost material, thereby not only meeting the better electrical conductivity of the conductive layer 2 but also reducing the unit material cost. Based on the synergistic effects of improving the bonding reliability between the conductive layer 2 and the carrier plate 1, improving the reflectivity of the second metal layer 22, thereby improving the photoelectric conversion efficiency, and improving the efficiency of the conductive adhesive process and the reliability of the conductive adhesive, Ra1 and Ra2 are selected to be not equal. In some embodiments of the present application, the conductive layer can be a metal conductive layer such as copper foil, aluminum foil, zinc foil, etc., or a doped metal foil such as copper foil or aluminum foil containing doping elements such as nickel. Exemplarily, the first metal layer 21 can be aluminum foil (including doped aluminum foil), and the roughness Ra1 of the functional surface of the aluminum foil is 0.3 μm to 0.5 μm, specifically 0.3 μm, 0.35 μm, 0.4 μm, 0.45 μm, 0.5 μm, etc. The second metal layer 22 can be copper foil (including doped copper foil), and the roughness Ra2 of the functional surface of the copper foil is 0.05 μm to 0.2 μm, specifically 0.05 μm, 0.1 μm, 0.15 μm, 0.2 μm, etc. Among them, the copper foil can be rolled on the aluminum foil, or the copper can be electroplated on the aluminum foil. Selecting the first metal layer 21 in contact with the carrier plate 1 as aluminum foil can reduce the cost of the conductive layer 2, and selecting the second metal layer 22 in electrical contact with the battery cell 4 as copper foil can improve the electrical conductivity with the battery cell 4. The roughness Ra1 of the functional surface of the aluminum foil is 0.3 μm to 0.5 μm, which improves the adhesion between the aluminum foil and the carrier plate 1 and improves the reliability of the photovoltaic module. At the same time, the roughness Ra2 of the functional surface of the copper foil is 0.05 μm to 0.2 μm, and the copper foil with low roughness can improve the reflectivity, which is beneficial to the battery cell to absorb light and improve the photoelectric conversion efficiency. In addition, considering the subsequent conductive adhesive process in a coordinated manner, the roughness of the functional surface of the copper foil in contact with the battery cell 4 in the present application can promote the fluidity of the adhesive film fluid, increase the bonding area of both sides of the subsequent molten conductive adhesive during curing, that is, improve the flow introduction efficiency of the molten conductive adhesive in the conductive adhesive process and the reliability of the conductive adhesive, and reduce the stress between the conductive adhesive and the battery cell 4 and the copper foil, avoiding the occurrence of hidden cracks in the battery cell 4 due to large stress.

[0054] Taking the copper foil metal layer with a functional surface roughness of 0.15 μm of the second metal layer 22 disclosed in the present application as an example, the reflectivity and power are respectively compared with the copper foil with a functional surface roughness of greater than or equal to 0.3 μm in the conductive layer of the conventional conductive backplane, as shown in Table 1 andFigure 2 As shown in:

[0055] Table 1. Comparison of power data of 72-size photovoltaic modules between the roughened copper foil disclosed in this application and the conventional conductive backplane copper foil

[0056]

[0057] As Figure 2 shown, the average surface reflectivity of the second metal layer copper foil with a conductive layer roughness of 0.15 μm in this application is 83.5, and the average surface reflectivity of the copper foil conductive layer with a conventional conductive backplane roughness equal to or greater than 0.3 μm is 74.0. Obviously, the reflectivity of the low-roughness copper foil in this application has been significantly improved. It can be seen from Table 1 that by processing the roughness of the functional surface of the second metal layer copper foil in the conductive layer of this application to 0.15 μm, the average power of the 72-size photovoltaic module is increased by about 2.43 W.

[0058] In some embodiments, the thickness of the conductive layer 2 is 30 μm to 100 μm, and specifically can be 30 μm, 40 μm, 50 μm, 55 μm, 60 μm, 70 μm, 80 μm, 90 μm, 100 μm, etc. For example, when the first metal layer 21 is an aluminum foil and the second metal layer 22 is a copper foil, the thickness of the aluminum foil can be 27 μm to 97 μm, accounting for 80% to 90% of the overall thickness of the conductive layer 2; the thickness of the copper foil can be 3 μm to 20 μm, accounting for 10% to 20% of the overall thickness of the conductive layer 2. In this way, while reducing the unit material cost of the conductive layer 2, the conductive layer 2 has good electrical conductivity.

[0059] In some embodiments, the tensile strength of the conductive layer 2 is greater than or equal to 200 MPa, and / or the resistivity of the conductive layer 2 is less than or equal to 5×10 -8 Ωm. The conductive layer 2 can simultaneously meet sufficient mechanical strength and good electrical conductivity.

[0060] Of course, the material of the conductive layer 2 can also be copper-aluminum, aluminum foil, copper foil plated with aluminum, copper foil plated with nickel, copper foil plated with tin, aluminum foil plated with copper, aluminum foil plated with tin, aluminum foil plated with nickel, etc. The materials of the first metal layer 21 and the second metal layer 22 are the same or different, and appropriate materials are selected according to electrical conductivity and material cost, expanding the material selection range.

[0061] In some independent embodiments within the scope of the inventive concept of the present invention or on the basis of the above embodiments, such as Figure 1As shown, in some embodiments, the conductive backplane further includes an adhesive film 3 disposed on the second metal layer 22. The second metal layer 22 is connected to the battery cell 4 through the adhesive film 3. The electrical connection between the conductive layer 2 and the battery cell 4 is achieved by introducing conductive adhesive into the opening 31 provided on the adhesive film 3. That is, the introduction of the adhesive film 3 can not only achieve the conductive connection between the second effective region 221 on the second metal layer 22 and the corresponding conductive region (which can be the PAD point on the battery cell) on the battery cell 4, but also cooperate effectively with the invalid region 24 (i.e., the waste removal region) of the conductive layer 2 to achieve insulation between different conductive regions of the battery cell 4. In addition, the efficiency of the conductive adhesive process and the reliability of the conductive adhesive are improved by the second metal layer 22 with low roughness, the stress between the conductive adhesive and the battery cell 4 and the second metal layer 22 is reduced, and the battery cell 4 is prevented from having hidden cracks due to large stress.

[0062] As Figure 7 shown, based on the conductive backplane under the concept of the present application or the conductive backplane described in any of the above embodiments, the embodiments of the present invention further provide a manufacturing method of a conductive backplane, including the following steps:

[0063] Step S100, as Figure 1 shown, provide a carrier plate 1; the carrier plate 1 can be a thermoplastic material or a glass material with an adhesive layer, etc. The carrier plate 1 can be a multi-layer composite material or a single-layer material, as long as it can be bonded to the conductive layer 2 and has characteristics such as load-bearing, sealing, corrosion resistance, and high temperature resistance. Specific limitations are not made here.

[0064] Step S200, provide a conductive layer 2 composed of at least a first metal layer 21 and a second metal layer 22 stacked; wherein, the first metal layer 21 is disposed on the carrier plate 1, the second metal layer 22 is disposed on the first metal layer 21, the roughness Ra1 of the functional surface of the first metal layer 21 is 0.3 μm to 0.5 μm, and the roughness Ra2 of the functional surface of the second metal layer 22 is 0.02 μm to 0.3 μm. Among them, the first metal layer 21 and the second metal layer 22 can be laminated into one body by mechanical pressing, or the second metal layer 22 can be electroplated on the first metal layer 21 by electroplating. The description of the functional surface can refer to the description in the above embodiments of the conductive backplane and will not be repeated here. In a preferred embodiment, the roughness of the functional surface of the first metal layer 21 is 0.45 μm, and the roughness of the functional surface of the second metal layer 22 is 0.15 μm. Compared with the prior art where the roughness of the functional surface of the conductive layer is generally greater than or equal to 0.3 μm, the present application adopts a comprehensive design scheme of increasing the roughness of the functional surface in contact with the carrier plate 1 and reducing the roughness of the functional surface close to the battery cell 4. The technical effects are the same as those introduced in the above embodiments of the conductive backplane and will not be repeated here.

[0065] Step S300: laminate the composite carrier 1 and the conductive layer 2. The carrier 1 and the conductive layer 2 can be laminated into one body by means of thermal pressing or normal-temperature pressing. During the lamination process, the contact layer between the carrier 1 and the first metal layer 21 has fluidity for at least a period of time.

[0066] Through the manufacturing method of the conductive backplane, the conductive backplane described in the above embodiments can be manufactured. Therefore, it has the same beneficial effects as the above embodiments of the conductive backplane and will not be elaborated here.

[0067] In some embodiments, step S200 of providing the conductive layer 2 composed of at least the first metal layer 21 and the second metal layer 22 laminated further includes the step of patterning the conductive layer 2. Among them, patterning the conductive layer 2 includes: die-cutting the conductive layer 2 according to a prefabricated circuit pattern (i.e., a pre-designed pattern). In addition to laser die-cutting, the patterning of the conductive layer 2 can also be carried out by mechanical die-cutting, chemical etching, milling machine, etc. In some embodiments, patterning die-cutting can be performed by irradiating from one side of the first metal layer 21 with a laser with selected performance parameters such as frequency, spot size, and speed, or by irradiating from one side of the second metal layer 22 with a laser. In this way, the already patterned conductive layer 2 is laminated on the carrier 1, which can avoid damage to the carrier 1 by the laser, and the irradiation direction of the laser can be carried out from any side of the conductive layer 2 without limitation. It should be noted that the conductive layer 2 can be patterned first, and after removing the waste of the ineffective conductive layer, the conductive layer 2 is laminated with the carrier 1. Or, the unpatterned conductive layer 2 can be combined with the carrier 1 first, and then the conductive layer 2 is patterned. At this time, in industrial production, it is recommended to preferably intervene from the side of the second metal layer 22 to pattern the conductive layer 2. For example, the patterned conductive layer 2 is completed by irradiating one side of the second metal layer 22 with a laser, or the laminated conductive layer 2 is patterned in a direction perpendicular to the plane of the second metal layer 22 or at a certain inclination angle with respect to the plane of the second metal layer 22 in accordance with the prefabricated pattern by means of mechanical cutting from the second metal layer 22 into the first metal layer 21.

[0068] In some independent embodiments within the scope of the inventive concept of the present invention or on the basis of the above embodiments, providing the conductive layer 2 composed of at least the first metal layer 21 and the second metal layer 22 in step S200 further includes the steps of: performing a roughness treatment on the first region 2111 of the functional surface of the first metal layer 21 so that the roughness Ra3 of the first region 2111 is 0.3 μm to 100 μm; or, performing a roughness treatment on the second region 2211 of the functional surface of the second metal layer 22 so that the roughness Ra4 of the second region 2211 is 0.02 μm to 80 μm. In the method provided in the embodiments of the present application, the conductive layer 2 composed of the first metal layer 21 and the second metal layer 22 forms an effective region, an invalid region 24, and a third region 23 during the patterning process; as Figure 4-1 and 4-2 shown, the effective region further includes: the first effective region 211 of the first metal layer 21 and the second effective region 221 of the second metal layer 22; the first effective region 211 of the first metal layer 21 includes the first region 2111 of the functional surface of the first metal layer 21 and the remaining region of the first metal layer 21 (that is, the remaining effective region of the first metal layer 21 except the first region 2111), and the second effective region 221 of the second metal layer 22 includes the second region 2211 of the functional surface of the second metal layer 22 and the remaining region of the second metal layer 22 (that is, the remaining effective region of the second metal layer 22 except the first region 2211). Now, an exemplary introduction to the roughness treatment of the first region 2111 and the second region 2211 will be given in combination with the above description of the regions:

[0069] (1) As Figure 4-2 shown in the attached drawings, when patterning the conductive layer 2 from the surface of the first metal layer 21 according to a pre-designed pattern or peeling off the invalid region 24 of the conductive layer 2 from the surface of the first metal layer 21, a roughness treatment can be performed on the first region 2111 of the functional surface of the first metal layer 21 so that the roughness Ra3 of the first region 2111 is 0.3 μm to 100 μm. The roughness treatment method can adopt various methods, such as mechanical method, chemical method, etc. When the range of the first region 2111 disclosed in the present application is 10 μm - 100 μm, the method of combining the patterning and the roughness treatment of specific regions of the conductive layer 2 with a thickness range of 40 μm - 60 μm by laser engraving means can be: selecting a laser with a frequency range of 50 - 500 Hz, a maximum spot width range of 50 μm, and a running speed range of 1000 - 20000 mm / s, preferably 6700 mm / s, to engrave and sinter the conductive layer 2 according to a preset circuit pattern or a preset patterning stencil.

[0070] (2) As Figure 3 and 4-1As shown in the attached drawings, when patterning the conductive layer 2 by intervening from the surface of the second metal layer 22 according to a pre-designed pattern or when peeling off the invalid area 24 of the conductive layer 2 by intervening from the surface of the second metal layer 22, the roughness Ra4 of the second area 2211 of the functional surface of the second metal layer 22 is 0.02 μm to 80 μm. The processing method can refer to the above processing of the roughness of the first area 2111 of the first metal layer 21.

[0071] It should be noted that the effective area, invalid area 24, first area 2111, second area 2211, and third area 23 involved in the method disclosed in the embodiments of the present application are consistent with or have corresponding identical expressions or indications to the respective areas in the embodiments of the conductive backplane disclosed above, and have corresponding relationships in terms of definition, scope, and other limiting factors. Therefore, they will not be elaborated in this method introduction.

[0072] In the above embodiments, the roughness treatment of the first area 2111 of the first metal layer 21 or the second area 2211 of the second metal layer 22 of the conductive layer 2 facilitates the effective contact between the peeling device and the conductive layer 2 during the patterning process and enables the efficient peeling of the invalid area 24 located in this area, facilitating the completion of the waste removal process. Among them, the peeling device can adopt an adsorption peeling device, a mechanical tearing peeling device, etc., which require the use of roughness to enhance contact. It should be noted that in some preferred embodiments, the roughness treatment of the first area 2111 and the patterning process of the conductive layer 2, or the roughness treatment of the second area 2211 and the patterning process of the conductive layer 2 can be completed in the same process and / or by using the same or identical process.

[0073] In some independent embodiments within the scope of the inventive concept of the present invention or on the basis of the above embodiments, providing the conductive layer 2 composed of at least the first metal layer 21 and the second metal layer 22 in step S200 further includes the steps:

[0074] Performing a roughness treatment on the third area 23 of the conductive layer 2 so that the roughness of the third area 23 is 0.1 μm to 80 μm. As Figure 5As shown, the third region 23 is a side region formed between each effective region and an adjacent ineffective region 24 of the patterned or patternable conductive layer 2. This side region is located between the functional surfaces of the first metal layer 21 and the second metal layer 22. Since the conductive layer 2 is composed of at least the first metal layer 21 and the second metal layer 22 stacked together, the third region 23 includes two stacked parts, namely the side region of the first metal layer 21 and the side region of the second metal layer 22. The roughness of the side region of the first metal layer 21 and the roughness of the side region of the second metal layer 22 can be the same or different. In some embodiments, the roughness of the third region 23 can be between 0.1 μm and 80 μm, preferably between 3 μm and 80 μm; in some embodiments, the roughness of the third region 23 can be between 3 μm and 40 μm. It should be noted that in some preferred embodiments, the treatment of the roughness of the third region 23 and the patterning process of the conductive layer 2 can be completed in the same process and / or by using the same or identical process.

[0075] In the above embodiments, the roughness treatment of the functional surface of the first metal layer, the functional surface of the second metal layer, the specific area of the effective area, and the side surface of the effective area of the conductive layer can be carried out in a variety of ways, including at least one of laser treatment method, mechanical treatment method, and chemical treatment method. Exemplarily, the mechanical treatment method can increase the roughness of the surface of the first metal layer by means of friction, cutting, grinding, etc. For example, using sandpaper or a grinding wheel to process the surface of the first metal layer can increase the roughness of the functional surface of the first metal layer. The chemical method is also called the etching method. Using chemical substances such as acid solution and alkali solution to process the functional surface of the first metal layer can remove part of the metal surface to form a rougher surface, thereby increasing its surface roughness. In particular, the nitrous oxide method can increase the roughness formed on the metal surface through a certain nitrogen-oxygen concentration and reaction time. Of course, the above roughness treatment methods can also reduce the roughness of the second metal layer, such as mechanical polishing, electrochemical polishing, and chemical mechanical polishing. Mechanical polishing can use mechanical methods such as grinding and abrasive polishing to process the surface of the second metal layer. By adjusting the polishing agent, polishing machine parameters, etc., its surface roughness can be reduced. Electrochemical polishing applies voltage and current to the surface of the second metal layer and performs a chemical reaction in an ionic solution to make the ions on the metal surface fall off to achieve the polishing effect. Compared with mechanical polishing, electrochemical polishing can more effectively reduce the surface roughness and can process the surface more uniformly without causing problems such as surface damage and scratches. Chemical mechanical polishing is a processing method that combines electrochemical polishing and mechanical polishing. It makes full use of the advantages of electrochemical reactions and mechanical actions and processes by controlling parameters such as polishing agent, polishing pressure, and polishing time to effectively reduce the metal surface roughness. It should be noted that in some preferred embodiments, the process of laser treatment of the roughness of the first area, the second area, and the third area of the conductive layer can be placed in the same processing step as the process of laser patterning of the conductive layer to simplify the process steps. Of course, the roughness of the first, second, and third areas can also be treated separately, and the roughness treatment method can also be mechanical method, chemical method, etc.

[0076] The design of the roughness of the functional surface of the metal layer of the conductive layer, the design of the roughness of the specific area of the conductive layer, the design of the roughness of the first area, the second area, and the third area of the metal layer of the conductive layer disclosed in the foregoing embodiments not only starts from the reliability of the conductive backplane and the photovoltaic module, but also starts from the photoelectric conversion efficiency, unit time cost of the photovoltaic module, and takes into account the composite of the conductive backplane, the production process rhythm of the photovoltaic module, and the overall production efficiency, providing an overall design scheme to achieve the effects of high photovoltaic cell conversion efficiency, low unit manufacturing cost, high unit production efficiency, and high module reliability.

[0077] In some independent embodiments under the concept of the manufacturing method disclosed in this application or on the basis of the foregoing embodiments, before the composite conductive layer 2 and the carrier plate 1, the manufacturing method further includes the step of treating the bulk resistivity of the side surface and the edge specific regions of the effective region of the conductive layer 2 (including the edge specific regions of the upper surface and / or the lower surface of the effective region of the conductive layer), so that the bulk resistivity of these regions is greater than that of the remaining regions of the effective region. There are various methods for treating the bulk resistivity. Elements of Group V or Group VI can be doped in these regions, insulating materials such as alumina ceramics can be sprayed in these regions, etc., in the treatment methods disclosed in the foregoing conductive backplane embodiments, or other chemical or physical methods can be used to treat the bulk resistivity of this region. A method for manufacturing the conductive backplane disclosed in the foregoing embodiments and composed of at least a first metal layer and a second metal layer using the solution of this embodiment is as follows:

[0078] Use laser ablation or chemical reaction to treat the bulk resistivity of the first region 2111 and the third region 23 to be greater than that of the remaining regions of the first metal layer 21 (that is, the remaining regions of the first metal layer 21 except the first region 2111 and the third region 23); or, use laser ablation or chemical reaction to treat the bulk resistivity of the second region 2211 and the third region 23 to be greater than that of the remaining regions of the second metal layer 22 (that is, the remaining regions of the second metal layer 22 except the second region 2211 and the third region 23); or, use laser ablation or chemical reaction to treat the bulk resistivity of the first region 2111, the second region 2211, and the third region 23 to be greater than that of the remaining regions of the conductive layer 2 (that is, the effective region of the conductive layer 2 except the first region 2111, the second region 2211, and the third region 23). Among them, a laser with a frequency of 50 - 500 Hz and a circular spot diameter of 10 - 100 μm can be selected to sinter the first region 2111 and / or the second region 2211, and the invalid region 24. The chemical process can be methods such as CVD and PECVD disclosed in the foregoing conductive backplane embodiments to form a deposition film containing sulfur, phosphorus, or sulfur-phosphorus compounds in these regions; insulating materials such as alumina ceramics can also be sprayed on these regions.

[0079] In some independent embodiments under the concept of the manufacturing method disclosed in this application or on the basis of the foregoing embodiments, before the composite carrier plate 1 and the conductive layer 2, the preparation method further includes the step of:

[0080] Process at least one of the first region 2111, the second region 2211, and the third region 23 by means of laser etching or chemical etching, so that at least one region has an inwardly concave wavy structure, and the wave crest of the wavy structure does not exceed the mapping region on the conductive layer 2 of the reserved point closest to the invalid region 24 in the conductive backplane in the conductive layer 2. The laser parameters for etching can be a frequency of 50 - 500 Hz, and the light spot can be set according to the perpendicular distance from the conductive adhesive action point closest to the invalid region 24 on the effective region to the boundary line of the effective region (generally not exceeding this perpendicular distance). For chemical etching, chemical etching agents such as hydrochloric acid or ferric chloride can be selected for treatment. During the treatment process, the concentration, temperature, corrosion time, etc. of the chemical etching agent are adjusted according to the size of the desired inwardly concave structure to control the etching process. For those of ordinary skill in the art, only limited experiments need to be carried out according to the set goals, the selected etching agent, reaction time, and environment, etc. to know.

[0081] Under the inventive concept of the present invention or on the basis of the foregoing embodiments, a method for manufacturing a conductive backplane with a conductive layer composed of a first metal layer of aluminum foil and a second metal layer of copper foil disclosed in the foregoing embodiments by using the manufacturing method of the present application is as follows:

[0082] Step 1: Provide a conductive layer 2 composed of aluminum foil and copper foil; the conductive layer 2 can be pre-pressed by mechanical pressing or electroplating to press the copper foil and the aluminum foil. The roughness of the functional surface of the aluminum foil is processed to be 0.45 μm, and the roughness of the copper foil is processed to be 0.15 μm. The overall thickness of the copper-aluminum foil conductive layer can be 40 μm - 60 μm, preferably 55 μm, and the average volume resistivity of the conductive layer 2 is 3.15×10 -8 Ωm.

[0083] Step 2-1: Process the conductive layer 2. The processing process is as follows: According to the performance of the conductive layer provided in Step 1, select a laser with a frequency of 177 Hz (or other preferred values within the range of 50 Hz - 500 Hz according to the conductive layer performance), a circular cursor diameter of 50 μm, and engrave and sinter the conductive layer 2 from the functional surface of the copper foil according to the prefabricated circuit pattern at a power of 100%, a speed of 1000 - 20000 nm / s (preferably 6700 nm / s) in an environment with a temperature of 5 - 55 °C (preferably 15 - 40 °C), 0.5 - 2 atmospheres (preferably 1 atmosphere), and an oxygen content accounting for 10% - 30% of the total gas, so that the roughness of the second region of the copper foil effective region is 0.02 μm - 80 μm, the roughness of the side surface of the conductive layer effective region is 0.1 μm - 80 μm, and the average volume resistivity of the second region 2211 and the third region 23 is 3.2×10 -8 Ωm.

[0084] Step 2-2: This step is an alternative to Step 2-1 or a preference based on 2-1. The conductive layer 2 is processed. The processing procedure is to use a laser with a frequency of 177 Hz and a circular cursor diameter of 50 μm to engrave and sinter the conductive layer 2 according to the preset circuit pattern from the functional surface of the copper foil at a power of 100% and a speed of 1000 - 20000 nm / s (preferably 6700 nm / s). During this processing, start the spraying device set at the laser head position to synchronously spray aluminum oxide ceramic material on the boundary area of the effective area. The spraying area is controlled to extend 0.1 μm - 20 mm (preferably 5 mm) from the boundary of the effective area as the starting line towards the effective area, resulting in a roughness of 0.02 μm - 80 μm in the area 10 μm - 100 μm inward from the boundary of the effective area on the functional surface of the conductive layer copper foil, and a roughness of 0.1 μm - 80 μm on the side surface of the effective area of the conductive layer. The volume resistivity of these areas is 5.1×10 -8 Ωm.

[0085] Step 3: Laser engraving treatment is performed on the side surface and specific areas at the edge of the effective area of the conductive layer (which can be the first area 2111 of the first metal layer aluminum foil and / or the second area 2211 of the second metal layer copper foil). The selected laser parameters are 50 - 500 Hz, and the spot pattern can be circular, rectangular, etc. The spot diameter needs to be defined and designed according to the perpendicular distance from the action area of the conductive adhesive introduced in the subsequent process on the functional surface of the conductive layer copper foil to the boundary line of the effective area, so that the formed concave structure does not exceed the action point of the conductive adhesive on the copper foil closest to the ineffective area of the conductive layer, and a concave wavy structure is formed on the side surface and specific areas at the edge. In a further preferred embodiment, a staggered concave wavy structure can be formed on two opposite side surfaces of adjacent effective areas.

[0086] Step 4: Provide an insulating carrier plate, and press the carrier plate 1 and the conductive layer 2 processed in the above steps to obtain a pressed product.

[0087] Step 5: Provide a film adhesive 3, and laminate the film adhesive 3 with the pressed product obtained in Step 4.

[0088] It should be noted that the above Steps 1 - 5 are only examples and do not impose any limitations on the processes, procedures, and steps of the manufacturing method disclosed in this application.

[0089] In some independent embodiments within the scope of the inventive concept of the present invention or based on the above embodiments, the manufacturing method disclosed in this application further includes the following steps:

[0090] Provide a film adhesive 3 and set it on the second metal layer 22;

[0091] Laminate the carrier plate 1, the conductive layer 2, and the film adhesive 3.

[0092] In one example, before the composite carrier 1 and the conductive layer 2 in step S300, the adhesive film 3 can be disposed on the second metal layer 22 first. Correspondingly, in step S300, the disposable composite carrier 1, the conductive layer 2 and the adhesive film 3 are used to obtain a conductive backplane. This operation can simplify the composite process and improve the manufacturing efficiency.

[0093] In another example, the composite carrier 1 and the conductive layer 2 in step S300 can be completed first to form a semi-finished product, and then the adhesive film 3 is disposed on the second metal layer 22, and the adhesive film 3 is secondarily combined with the semi-finished product to obtain a conductive backplane.

[0094] In the case of adopting the above technical solution, the carrier 1, the conductive layer 2 and the adhesive film 3 are combined into a whole. The second metal layer 22 is connected to the battery cell 4 through the adhesive film 3. The electrical connection between the conductive layer 2 and the battery cell 4 is realized by introducing conductive adhesive into the opening 31 provided in the adhesive film 3. That is, the introduction of the adhesive film 3 can not only realize the conductive connection between the second effective area on the second metal layer 22 and the corresponding conductive area (which can be the PAD point on the battery cell) on the battery cell 4, but also cooperate effectively with the ineffective area 24 (i.e., waste removal passage) of the conductive layer 2 to realize insulation between different conductive areas of the battery cell.

[0095] It should be noted that in the production process of some conductive backplanes where the production rhythm and process design are coordinated, those of ordinary skill in the art can reasonably adjust the operation sequence of some or all of the other production processes such as the patterning process, the roughness treatment process, the bulk resistivity treatment process and the process of setting the concave corrugated body structure disclosed in this application according to the reasonable design of the production rhythm and process, merge processes, and use the same or similar technical means to complete the above-mentioned conductive layer treatment processes or techniques in the same process to reduce the production cost per unit time and improve the production efficiency. However, all of these fall within the scope included and protected by this application and do not exceed the inventive concept of this application.

[0096] The conductive backplane and manufacturing method disclosed in this application, as an overall design solution, achieve the effects of high conversion efficiency of photovoltaic cells, low unit manufacturing cost, high unit production efficiency, and high component reliability. In some alternative implementation solutions, for the convenience of subsequent processes of peeling off the ineffective areas (waste removal areas) of the conductive layer, the peeling efficiency and effectiveness, this application also processes the roughness of specific areas at the edges of each effective area (or called effective unit, effective area unit, etc., with similar functions) on the functional surface of the conductive metal layer. And based on the electrical isolation requirements between adjacent conductive effective area units of the conductive backplane conductive layer, this application processes the roughness of the side surface (i.e., the third area) of each effective area of the conductive layer to improve or ensure the electrical isolation performance between two adjacent effective areas, further improving the reliability of the conductive backplane product and the reliability of the photovoltaic module using this conductive backplane. In some implementation solutions of this application, based on the high requirements for the safety of photovoltaic module products, this application also discloses methods for processing the edge areas and side surface areas of the effective areas of the conductive layer to increase the bulk resistivity of these areas, and processing these areas into an inward concave wavy body structure to further effectively improve the electrical isolation performance between adjacent effective areas of the conductive layer, thereby meeting the electrical safety requirements of the conductive backplane product and improving the safety of the photovoltaic module using the conductive backplane.

[0097] Based on the conductive backplane described in any of the above embodiments, the embodiments of the present invention also provide a photovoltaic module, which mainly includes a module frame, a packaging cover plate, solar cells, packaging adhesive film, and the conductive backplane described in any of the above embodiments, as well as a junction box. In some embodiments, the packaging cover plate is a transparent cover plate for transmitting light. In this embodiment, the packaging cover plate, the packaging adhesive film, the solar cells, and the conductive backplane are stacked in sequence and then the frame and the junction box are added. This photovoltaic module has the same beneficial effects as the conductive backplane in any of the above embodiments, and will not be elaborated here.

[0098] The photovoltaic module with this conductive backplane can be applied to heterojunction cell photovoltaic modules, back-contact cell photovoltaic modules, main-gridless cell photovoltaic modules, etc.

[0099] In the description of the above embodiments, specific features, structures, materials, or characteristics can be combined in a suitable manner in any one or more embodiments or examples.

[0100] The above is only the specific implementation manner of the present invention, but the protection scope of the present invention is not limited thereto. Any person skilled in the art within the technical scope disclosed by the present invention can easily think of changes or substitutions, which should all be covered by the protection scope of the present invention. Therefore, the protection scope of the present invention should be subject to the protection scope of the claims.

Claims

1. A conductive backplane, characterized in that, It includes a carrier board and a patterned conductive layer; The conductive layer is a metal layer disposed on the carrier board, and the roughness Ra of the functional surface of the conductive layer for electrical contact with the battery cell is 0.02 μm to 0.3 μm.

2. The conductive backplane according to claim 1, wherein The conductive layer at least includes a first metal layer and a second metal layer arranged in a stacked manner. The first metal layer is disposed on the carrier board, and the second metal layer is disposed on the first metal layer; The roughness Ra1 of the functional surface of the first metal layer is 0.3 μm to 0.5 μm; The roughness Ra2 of the functional surface of the second metal layer is 0.02 μm to 0.3 μm.

3. The conductive backplane according to claim 1, wherein The patterned conductive layer includes an effective area and an ineffective area; the effective area includes a first effective area of the first metal layer and a second effective area of the second metal layer; the first effective area includes a first area of the functional surface of the first metal layer, and the second effective area includes a second area of the functional surface of the second metal layer; The roughness Ra3 of the first area is 0.3 μm to 100 μm; wherein the first area is an area spreading from the boundary of the first effective area into the first effective area, and the spreading distance of the first area does not exceed the mapped area of the reserved point position of the conductive backplane on the functional surface of the first metal layer; Or, the roughness Ra4 of the second area is 0.02 μm to 80 μm; wherein the second area is an area spreading from the boundary of the second effective area into the second effective area, and the spreading distance of the second area does not exceed the mapped area of the reserved point position of the conductive backplane on the functional surface of the second metal layer.

4. The conductive backplane according to claim 3, wherein The spreading distance of the first area is 10 μm to 100 μm; Or, the spreading distance of the second area is 10 μm to 100 μm.

5. The conductive backplane according to any one of claims 1-3, characterized in that, The conductive layer includes a third area, and the roughness of the third area is 0.1 μm to 80 μm.

6. The conductive backplane according to claim 2 or 3, characterized in that, The conductive layer includes an effective area, an ineffective area, and a third area; The effective area includes a first effective area of the first metal layer and a second effective area of the second metal layer; the first effective area includes a first area of the functional surface of the first metal layer and the remaining area of the first metal layer, and the second effective area includes a second area of the functional surface of the second metal layer and the remaining area of the second metal layer; The first area is an area spreading from the boundary of the first effective area to the first effective area, and the spreading distance of the first area does not exceed the mapped area of the reserved point position of the conductive backplane on the functional surface of the first metal layer; the second area is an area spreading from the boundary of the second effective area to the second effective area, and the spreading distance of the second area does not exceed the mapped area of the reserved point position of the conductive backplane on the functional surface of the second metal layer; The third area is the side surface of the effective area of the conductive layer; The volume resistivity of the first area and the third area is greater than the volume resistivity of the remaining area of the first metal layer; Or, the volume resistivity of the second area and the third area is greater than the volume resistivity of the remaining area of the second metal layer; Alternatively, the bulk resistivity of the first region, the second region, and the third region is greater than the bulk resistivity of the remaining regions of the conductive layer.

7. The conductive backplane according to claim 6, wherein The spreading distance of the first region is 10 μm to 100 μm; or, the spreading distance of the second region is 10 μm to 100 μm.

8. The conductive backplane according to claim 6, wherein The volume resistivity of the first region and / or the second region, and the third region is 3.15×10 -8 Ωm to 5×10 -8 Ωm.

9. The conductive backplane according to claim 2 or 3, characterized in that, The conductive layer includes an effective region, an ineffective region, and a third region; The effective region includes a first effective region of the first metal layer and a second effective region of the second metal layer; the first effective region includes a first region of the functional surface of the first metal layer and the remaining regions of the first metal layer, and the second effective region includes a second region of the functional surface of the second metal layer and the remaining regions of the second metal layer; The first region is a region spreading from the boundary of the first effective region towards the first effective region, and the spreading distance of the first region does not exceed the mapping region of the reserved point of the conductive backplane on the functional surface of the first metal layer; the second region is a region spreading from the boundary of the second effective region towards the second effective region, and the spreading distance of the second region does not exceed the mapping region of the reserved point of the conductive backplane on the functional surface of the second metal layer; The third region is the side surface of the effective region of the conductive layer; At least one of the first region, the second region, and the third region has a wavy body structure that is concave with respect to the third region as a reference plane; the wave peaks of the wavy body structure do not correspondingly exceed the mapping region of the reserved point closest to the ineffective region of the conductive backplane on the conductive layer.

10. The conductive backplane according to claim 9, wherein The wavy body structures on the third regions of two adjacent effective regions are arranged with staggered peaks.

11. The conductive backplane according to claim 4 or 7 or 10, characterized in that, The Ra1 and the Ra2 are not equal; And / or, the material of the first metal layer is different from the material of the second metal layer.

12. The conductive backplane according to claim 11, wherein The first metal layer is an aluminum foil; the second metal layer is a copper foil, and the Ra2 is 0.05 μm to 0.2 μm.

13. The conductive backplane according to claim 4 or 7 or 10, characterized in that, The thickness of the conductive layer is 30 μm to 100 μm; And / or, the tensile strength of the conductive layer is greater than or equal to 200 MPa; and / or, the resistivity of the conductive layer is less than or equal to 5×10 -8 Ωm.

14. The conductive backplane according to claim 13, characterized in that, The conductive backplane further includes an adhesive film disposed on the second metal layer.

15. A manufacturing method of a conductive backplane, characterized in that, Including: Providing a carrier plate; Providing a conductive layer, the conductive layer being disposed on the carrier plate; Wherein the conductive layer includes a metal layer, and the roughness Ra of the functional surface of the conductive layer for electrical contact with the battery cell is 0.02 μm to 0.3 μm; Laminating the carrier plate and the conductive layer.

16. The manufacturing method according to claim 15, characterized in that, The step of providing a conductive layer includes: Providing a conductive layer formed by laminating at least a first metal layer and a second metal layer; wherein, the first metal layer is disposed on the carrier plate, the second metal layer is disposed on the first metal layer, the roughness Ra1 of the functional surface of the first metal layer is 0.3 μm to 0.5 μm, and the roughness Ra2 of the functional surface of the second metal layer is 0.02 μm to 0.3 μm.

17. The manufacturing method according to claim 16, characterized in that, The step of providing a conductive layer formed by laminating at least a first metal layer and a second metal layer further includes patterning the conductive layer; The patterning process of the conductive layer includes: die-cutting the conductive layer according to a prefabricated circuit pattern.

18. The manufacturing method according to claim 17, characterized in that, The conductive layer includes an effective area, an ineffective area, and a third area; the effective area includes a first effective area of the first metal layer and a second effective area of the second metal layer; the first effective area includes a first area of the functional surface of the first metal layer and the remaining area of the first metal layer, the second effective area includes a second area of the functional surface of the second metal layer and the remaining area of the second metal layer, the first area is an area spreading from the boundary of the first effective area to the first effective area, and the spreading distance of the first area does not exceed the mapped area of the reserved points of the conductive backplane on the functional surface of the first metal layer; the second area is an area spreading from the boundary of the second effective area to the second effective area, and the spreading distance of the second area does not exceed the mapped area of the reserved points of the conductive backplane on the functional surface of the second metal layer; The third area is the side surface of the effective area of the conductive layer; The providing of the conductive layer composed of at least a first metal layer and a second metal layer stacked further includes: Performing a roughness treatment on the first area so that the roughness Ra3 of the first area is 0.3 μm to 100 μm; Alternatively, performing a roughness treatment on the second area so that the roughness Ra4 of the second area is 0.02 μm to 80 μm.

19. The manufacturing method according to any one of claims 16-18, characterized in that, The conductive layer includes an effective area, an ineffective area, and a third area; the effective area includes a first effective area of the first metal layer and a second effective area of the second metal layer; the first effective area includes a first area of the functional surface of the first metal layer and the remaining area of the first metal layer, the second effective area includes a second area of the functional surface of the second metal layer and the remaining area of the second metal layer, the first area is an area spreading from the boundary of the first effective area to the first effective area, and the spreading distance of the first area does not exceed the mapped area of the reserved points of the conductive backplane on the functional surface of the first metal layer; the second area is an area spreading from the boundary of the second effective area to the second effective area, and the spreading distance of the second area does not exceed the mapped area of the reserved points of the conductive backplane on the functional surface of the second metal layer; The third area is the side surface of the effective area of the conductive layer; The providing of the conductive layer composed of at least a first metal layer and a second metal layer stacked further includes: Performing a roughness treatment on the third area so that the roughness of the third area is 0.1 μm to 80 μm.

20. The manufacturing method according to any one of claims 16 - 18, characterized in that, The conductive layer includes an effective area, an ineffective area, and a third area; the effective area includes a first effective area of the first metal layer and a second effective area of the second metal layer; the first effective area includes a first area of the functional surface of the first metal layer and the remaining area of the first metal layer, the second effective area includes a second area of the functional surface of the second metal layer and the remaining area of the second metal layer, the first area is an area spreading from the boundary of the first effective area towards the first effective area, and the spreading distance of the first area does not exceed the mapping area of the reserved point position of the conductive backplane on the functional surface of the first metal layer; the second area is an area spreading from the boundary of the second effective area towards the second effective area, and the spreading distance of the second area does not exceed the mapping area of the reserved point position of the conductive backplane on the functional surface of the second metal layer; The third area is the side surface of the effective area of the conductive layer; Before laminating the carrier board and the conductive layer, the manufacturing method further includes: Treating the volume resistivity of the first area and the third area to be greater than the volume resistivity of the remaining area of the first metal layer; Or, treating the volume resistivity of the second area and the third area to be greater than the volume resistivity of the remaining area of the second metal layer; Or, treating the volume resistivity of the first area, the second area, and the third area to be greater than the volume resistivity of the remaining area of the conductive layer.

21. The manufacturing method according to claim 20, characterized in that, The method for treating the volume resistivity includes: Doping group V or group VI elements in the first area and / or the second area, and the third area; wherein the spreading distance of the first area is 10 - 100 μm; or, the spreading distance of the second area is 10 - 100 μm; Or, sintering the first area and / or the second area, and the ineffective area with a laser having a frequency of 50 - 500 Hz and a circular spot diameter of 10 - 100 μm.

22. The manufacturing method according to any one of claims 16-18, characterized in that, The conductive layer includes an effective area, an ineffective area, and a third area; the effective area includes a first effective area of the first metal layer and a second effective area of the second metal layer; the first effective area includes a first area of the functional surface of the first metal layer and the remaining area of the first metal layer, the second effective area includes a second area of the functional surface of the second metal layer and the remaining area of the second metal layer, the first area is an area spreading from the boundary of the first effective area towards the first effective area, and the spreading distance of the first area does not exceed the mapping area of the reserved point position of the conductive backplane on the functional surface of the first metal layer; the second area is an area spreading from the boundary of the second effective area towards the second effective area, and the spreading distance of the second area does not exceed the mapping area of the reserved point position of the conductive backplane on the functional surface of the second metal layer; The third area is the side surface of the effective area of the conductive layer; Before laminating the carrier board and the conductive layer, the manufacturing method further includes: Process at least one of the first region, the second region, and the third region so that the at least one region has a wavy body structure that is concave with respect to the third region as a reference plane, and the peaks of the wavy body structure do not exceed the mapped region on the conductive layer of the reserved point closest to the invalid region in the conductive backplane.

23. The manufacturing method according to any one of claims 16-18, characterized in that, Further comprising: Providing a glue film and disposing it on the second metal layer; Laminating the carrier board, the conductive layer, and the glue film.

24. The manufacturing method according to claim 19, characterized in that, The method of roughness treatment includes at least one of laser treatment, mechanical treatment, and chemical treatment.

25. A photovoltaic module, characterized in that, Including the conductive backplane according to any one of claims 1-14.

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