Image sensor

Abstract

An image sensor is provided. The image sensor includes: a substrate including a photoelectric conversion region; a first color filter over the substrate; a second color filter adjacent to the first color filter in the first horizontal direction and over the substrate; a plurality of liner layers on an upper surface and sidewalls of each of the first color filter and the second color filter; an air gap between the first color filter and the second color filter; and a cover layer on an upper surface of each of the first color filter and the second color filter.

Description

[0001] This application claims the benefit of priority of Korean Patent Application No. 10-2024-0007640, filed with the Korean Intellectual Property Office on January 17, 2024, the disclosure of which is incorporated herein by reference in its entirety. Technical Field

[0002] The present disclosure generally relates to an image sensor, and more particularly, to an image sensor having color filters isolated by an air gap. Background Art

[0003] An image sensor may refer to a device that can convert an optical image into an electrical signal. Examples of image sensors may include, but are not limited to, charge-coupled device (CCD) type image sensors, complementary metal oxide semiconductor (CMOS) type image sensors (CIS), etc. These image sensors may be equipped with a plurality of pixels arranged in a two-dimensional (2D) matrix, and each pixel may output an image signal corresponding to the incident light energy. Each of the plurality of pixels may accumulate a photocurrent corresponding to the amount of light incident through a photoelectric conversion element, and may output a pixel signal based on the accumulated photocurrent. Recently, as the integration degree of image sensors has increased, the size of pixels has been continuously reduced, and / or the size of components of pixel circuits has also been continuously reduced. Summary of the Invention

[0004] One or more example embodiments of the present disclosure provide an image sensor having improved reliability and performance compared to existing image sensors.

[0005] According to an aspect of the present disclosure, an image sensor includes: a substrate including a photoelectric conversion region; a first color filter above the substrate; a second color filter adjacent to the first color filter in a first horizontal direction and above the substrate; a plurality of buffer layers on upper surfaces and sidewalls of each of the first color filter and the second color filter; an air gap between the first color filter and the second color filter; and a cover layer on upper surfaces of each of the first color filter and the second color filter.

[0006] According to an aspect of the present disclosure, an image sensor includes: a substrate including a photoelectric conversion region; a first color filter above the substrate; a second color filter adjacent to the first color filter in a first horizontal direction and above the substrate; a first trench between the first color filter and the second color filter; a first plurality of buffer layers conformally disposed on a bottom surface of the first trench, a first sidewall of the first trench, and a second sidewall of the first trench; a first air gap in the first trench; and a plurality of cover layers on the first air gap, a top surface of the first color filter, and a top surface of the second color filter.

[0007] According to one aspect of the present disclosure, an image sensor includes: a substrate including a photoelectric conversion region; a first color filter above the substrate; a second color filter above the substrate adjacent to the first color filter in a first horizontal direction; a third color filter above the substrate adjacent to the first color filter in a second horizontal direction intersecting the first horizontal direction; a first trench between the first color filter and the second color filter; a second trench between the second color filter and the third color filter; a plurality of liner layers conformally disposed on a bottom surface of the first trench, a first sidewall of the first trench, a second sidewall of the first trench, a bottom surface of the second trench, a first sidewall of the second trench, and a second sidewall of the second trench; a first air gap in the first trench; and a plurality of cover layers on a top surface of the first color filter, a top surface of the second color filter, a top surface of the third color filter, and in the second trench.

[0008] Additional aspects may be set forth in part in the description which follows, and in part may be obvious from the description, and / or may be learned by practice of the presented embodiments. BRIEF DESCRIPTION OF THE DRAWINGS

[0009] The above and other aspects, features, and advantages of some embodiments of the present disclosure will become more apparent from the following description taken in conjunction with the accompanying drawings.

[0010] Figure 1 is a circuit diagram of an image sensor according to an embodiment.

[0011] Figure 2 is a plan view showing an image sensor according to an embodiment.

[0012] Figure 3 is according to an embodiment along Figure 2 a cross-sectional view taken along line I-I'.

[0013] Figure 4 is a cross-sectional view of a pixel array region of an image sensor according to an embodiment.

[0014] Figure 5 is according to an embodiment along Figure 4 a cross-sectional view taken along line P-P'.

[0015] Figure 6 is according to an embodiment along Figure 4 a cross-sectional view taken along line Q-Q'.

[0016] Figure 7A is according to an embodiment along Figure 5 and Figure 6 a cross-sectional view taken along line A-A'.

[0017] Figure 7B is according to an embodiment along Figure 5 and Figure 6A cross-sectional view taken along line B-B'.

[0018] Figure 8 is according to an embodiment Figure 7A An enlarged cross-sectional view of region EX1.

[0019] Figure 9 is according to an embodiment Figure 7B An enlarged cross-sectional view of region EX2.

[0020] Figure 10 A cross-sectional view of the pixel array region of an image sensor according to an embodiment.

[0021] Figure 11 A cross-sectional view of the pixel array region of an image sensor according to an embodiment.

[0022] Figures 12A to 18B A cross-sectional view showing a process of manufacturing an image sensor according to an embodiment. DETAILED DESCRIPTION

[0023] The following description with reference to the accompanying drawings is provided to assist in a comprehensive understanding of embodiments of the present disclosure defined by the claims and their equivalents. Various specific details are included to assist in the understanding, but these details are only considered exemplary. Thus, those of ordinary skill in the art will recognize that various changes and modifications can be made to the embodiments described herein without departing from the scope and spirit of the disclosure. In addition, descriptions of well-known functions and structures are omitted for clarity and conciseness.

[0024] Regarding the description of the drawings, like reference numerals may be used to refer to like or related elements. It will be understood that, unless the relevant context clearly indicates otherwise, the singular form of a noun corresponding to an item may include one or more of the things. As used herein, each of the phrases such as "A or B", "at least one of A and B", "at least one of A or B", "A, B, or C", "at least one of A, B, and C", and "at least one of A, B, or C" may include possible combinations of the items listed together in the corresponding phrase. As used herein, terms such as "first" and "second" or "1st" and "2nd" may be used only to distinguish the corresponding components from another component and do not limit the components in other respects (e.g., importance or order). It will be understood that if an element (e.g., a first element) is referred to as "coupled", "coupled to", "connected with", or "connected to" another element (e.g., a second element) with or without the terms "operably" or "communicatively", it means that the element can be directly (e.g., wired), wirelessly, or via a third element coupled to the other element.

[0025] It will be understood that when an element or layer is referred to as being “on,” “above,” “over,” “under,” “beneath,” “below,” “connected to,” or “coupled to” another element or layer, the element or layer can be directly on, above, over, under, beneath, below, directly connected or coupled to the other element or layer, or there can be intervening elements or layers. In contrast, when an element is referred to as being “directly on,” “directly above,” “directly over,” “directly under,” “directly beneath,” “directly below,” “directly connected to,” or “directly coupled to” another element or layer, there are no intervening elements or layers.

[0026] The terms “upper (top),” “middle,” “lower (bottom),” etc. may be replaced with terms such as “first,” “second,” “third,” etc. for describing the relative position of elements. The terms “first,” “second,” “third” may be used to describe various elements, but these elements are not limited by these terms, and a “first element” may be referred to as a “second element.” Optionally or additionally, the terms “first,” “second,” “third,” etc. may be used to distinguish components from each other and do not limit the present disclosure. For example, the terms “first,” “second,” “third,” etc. may not necessarily involve any form of order or numerical meaning.

[0027] As used herein, when an element or layer is referred to as “covering,” “superimposed with,” or “surrounding” another element or layer, the element or layer can cover at least a portion of the other element or layer, where the portion can include a part of the other element or can include the whole of the other element. Similarly, when an element or layer is referred to as “penetrating” another element or layer, the element or layer can penetrate at least a portion of the other element or layer, where the portion can include a part of the other element or can include the whole dimension (e.g., length, width, depth) of the other element.

[0028] References throughout this disclosure to “one embodiment,” “an embodiment,” “example embodiment,” or similar language may indicate that a particular feature, structure, or characteristic described in connection with the indicated embodiment is included in at least one embodiment of the present technical solution. Thus, the phrases “in one embodiment,” “in an embodiment,” “in an example embodiment,” and similar language throughout this disclosure may, but do not necessarily, all refer to the same embodiment. The embodiments described herein are example embodiments, and thus, the disclosure is not limited thereto and can be implemented in various other forms.

[0029] As used herein, each of the terms "AlO", "HfO", "SiN", "SiO", "SiON", etc. may refer to a material made of the elements included in each of the terms and is not a chemical formula representing a stoichiometric relationship.

[0030] Hereinafter, various embodiments of the present disclosure will be described with reference to the accompanying drawings.

[0031] Figure 1 is a circuit diagram of an image sensor 50 according to an embodiment.

[0032] Referring to Figure 1 , each of the unit pixel regions PX of the image sensor 50 may include a photoelectric conversion region PD, a transfer transistor TX, a source follower transistor SX, a reset transistor RX, and a selection transistor AX. The transfer transistor TX, the reset transistor RX, and the selection transistor AX may include a transfer gate TG, a reset gate RG, and a selection gate SG, respectively.

[0033] The photoelectric conversion region PD may be and / or may include a photodiode that includes an n-type impurity region and a p-type impurity region. The floating diffusion region FD may be used as the drain of the transfer transistor TX. The floating diffusion region FD may be used as the source of the reset transistor RX. The source follower transistor SX may be connected to the selection transistor AX.

[0034] The operation of the image sensor 50 will be described below with reference to Figure 1 . When light is blocked, a power supply voltage V DD may be applied to the drain of the reset transistor RX and the drain of the source follower transistor SX, and the reset transistor RX may be turned on to release the charge retained in the floating diffusion region FD. When the reset transistor RX is turned off and light from the outside is incident on the photoelectric conversion region PD, electron-hole pairs may be generated in the photoelectric conversion region PD. The holes may accumulate by moving to the p-type impurity region of the photoelectric conversion region PD, and the electrons may accumulate by moving to the n-type impurity region. When the transfer transistor TX is turned on, charges such as electrons and holes may be transferred to the floating diffusion region FD and accumulated. The gate bias of the source follower transistor SX may change in proportion to the amount of charge accumulation, resulting in a change in the source potential of the source follower transistor SX. When the selection transistor AX is turned on, the signal V caused by the charge may be read through the column line OUT .

[0035] The wiring may be electrically connected to at least one of the transfer gate TG, the reset gate RG, and the selection gate SG. The wiring may be configured to apply the power supply voltage V DD to the drain of the reset transistor RX or the drain of the source follower transistor SX. The wiring may include a column line connected to the selection transistor AX. The wiring may be as described with reference toFigure 2 and Figure 3 the described wiring.

[0036] Although a pixel including a photoelectric conversion region PD and four (4) transistors (e.g., transfer transistor TX, reset transistor RX, selection transistor AX, and source follower transistor SX) is shown in Figure 1 , the present disclosure is not limited thereto. For example, a plurality of pixels may be provided, and the reset transistor RX, the source follower transistor SX, and the selection transistor AX may be shared by adjacent pixels with each other. Accordingly, when compared with the conventional image sensor, the integration degree of the image sensor 50 may be improved.

[0037] Figure 2 is a plan view showing an image sensor 50 according to an embodiment. Figure 3 is a cross-sectional view taken along line I-I' of an embodiment according to Figure 2 the.

[0038] Referring to Figure 2 and Figure 3 , the image sensor 50 may include a sensor chip 1000 and a logic chip 2000. The sensor chip 1000 may include a photoelectric conversion layer 10, a first wiring layer 20, and a light transmission layer 30. The photoelectric conversion layer 10 may include a substrate 100, a unit pixel region 101 provided in the substrate 100, and a photoelectric conversion region 110 provided in the unit pixel region 101. Light incident from the outside may be converted into an electrical signal in the photoelectric conversion region 110.

[0039] Viewed from the plan view, the substrate 100 may include a pixel array region AR, an optical black region OB, and a pad region PAD. In the plan view, the pixel array region AR may be disposed at a central portion of the substrate 100. The pixel array region AR may include a plurality of unit pixel regions PX. The unit pixel region PX may output a photoelectric signal from the incident light. The unit pixel region PX may form columns and rows and may be two-dimensionally (2D) arranged. The columns may be parallel to a first horizontal direction (X direction). The rows may be parallel to a second horizontal direction (Y direction). In the present disclosure, the first horizontal direction (X direction) may be parallel to a first surface 100a of the substrate 100. The second horizontal direction (Y direction) may be parallel to the first surface 100a of the substrate 100 and may be different from the first horizontal direction (X direction). For example, the second horizontal direction (Y direction) may be substantially perpendicular to the first horizontal direction (X direction). A third direction (Z direction) may be substantially perpendicular to the first surface 100a of the substrate 100.

[0040] In a plan view, a pad region PAD may be provided at an edge portion of a substrate 100 and may surround a pixel array region AR. A second pad terminal 83 may be provided on the pad region PAD. The second pad terminal 83 may output an electrical signal generated in a unit pixel region PX to the outside. Optionally or additionally, an external electrical signal and / or voltage may be transmitted to the unit pixel region PX through the second pad terminal 83. Since the pad region PAD is disposed at the edge portion of the substrate 100, the second pad terminal 83 can be easily connected to the outside.

[0041] An optical black region OB may be disposed between the pixel array region AR and the pad region PAD of the substrate 100. In a plan view, the optical black region OB may surround the pixel array region AR. The optical black region OB may include a plurality of dummy regions 111. A signal generated in the dummy region 111 may be used as information for removing process noise hereafter. Hereinafter, reference is made to Figure 4 Describe the pixel array region AR of the image sensor.

[0042] Figure 4 is a cross-sectional view of a pixel array region of an image sensor 1 according to an embodiment.

[0043] The image sensor 1 may include the image sensor 50 described above with reference to Figures 1 to 3 and / or may be similar to the image sensor 50 described above with reference to Figures 1 to 3 in many aspects and may include additional features not mentioned above. Therefore, for the sake of brevity, the repeated description of the image sensor 1 described above with reference to Figures 1 to 3 may be omitted.

[0044] Referring to Figure 4 , the image sensor 1 may include a photoelectric conversion layer 10, a first wiring layer 20, and a light transmission layer 30. The photoelectric conversion layer 10 may include a substrate 100, a pixel isolation structure 140, and a device isolation pattern 103.

[0045] The substrate 100 may have a first surface 100a (or front surface) and a second surface 100b (or back surface) opposite to each other. Light may be incident on the second surface 100b of the substrate 100. The first wiring layer 20 may be disposed on the first surface 100a of the substrate 100, and the light transmission layer 30 may be disposed on the second surface 100b of the substrate 100. The substrate 100 may be a semiconductor substrate or a silicon-on-insulator (SOI) substrate. The semiconductor substrate may include, for example, a silicon (Si) substrate, a germanium (Ge) substrate, or a silicon-germanium (Si-Ge) substrate. The substrate 100 may include a first conductive type impurity. For example, the first conductive type impurity may include a p-type impurity such as, but not limited to, aluminum (Al), boron (B), indium (In), gallium (Ga), etc.

[0046] The substrate 100 may include a unit pixel region 101, and the unit pixel region 101 includes a photoelectric conversion region 110. The photoelectric conversion region 110 may be and / or may include a partial region of the photoelectric conversion region 110 described with reference to Figure 3 The unit pixel region 101 may be and / or may include a partial region of the unit pixel region 101 described with reference to Figure 3 The photoelectric conversion region 110 may be disposed in the unit pixel region 101 in the substrate 100. The photoelectric conversion region 110 may perform functions and roles that are substantially similar to and / or the same as those of the photoelectric conversion region PD of Figure 1 The photoelectric conversion region 110 may be a region in the substrate 100 doped with impurities of a second conductivity type. The impurities of the second conductivity type may have a conductivity type opposite to that of the impurities of the first conductivity type. The impurities of the second conductivity type may include n-type impurities such as, but not limited to, phosphorus (P), arsenic (As), bismuth (Bi), antimony (Sb), etc. The photoelectric conversion region 110 may be adjacent to the first surface 100a of the substrate 100. That is, the photoelectric conversion region 110 may be arranged closer to the first surface 100a than the second surface 100b. For example, each of the photoelectric conversion regions 110 may include a first region adjacent to the first surface 100a and a second region adjacent to the second surface 100b. An impurity concentration difference may be provided between the first region and the second region of the photoelectric conversion region 110. Therefore, the photoelectric conversion region 110 may have a potential slope between the first surface 100a and the second surface 100b of the substrate 100. As another example, the photoelectric conversion region 110 may not have a potential slope between the first surface 100a and the second surface 100b of the substrate 100.

[0047] The substrate 100 and the photoelectric conversion region 110 may form a photodiode. That is, the photodiode may be formed by the p-n junction of the substrate 100 of the first conductivity type and the photoelectric conversion region 110 of the second conductivity type. The photoelectric conversion region 110 that forms the photodiode may generate and accumulate photo charges in proportion to the intensity of the incident light.

[0048] As Figure 4As shown, the pixel isolation structure 140 may be disposed in the substrate 100 and may define a unit pixel region 101. For example, the pixel isolation structure 140 may be disposed between the unit pixel regions 101 of the substrate 100. When viewed in plan view, the pixel isolation structure 140 may have a grid structure. When viewed in plan view, the pixel isolation structure 140 may completely surround each of the unit pixel regions 101. The pixel isolation structure 140 may be disposed in a pixel isolation trench 140T, and the pixel isolation trench 140T may be recessed from a first surface 100a of the substrate 100. The pixel isolation structure 140 may extend from the first surface 100a of the substrate 100 toward a second surface 100b of the substrate 100. The pixel isolation structure 140 may be a deep trench isolation layer. The pixel isolation structure 140 may penetrate the substrate 100. The vertical height of the pixel isolation structure 140 may be substantially similar to and / or the same as the vertical thickness of the substrate 100. For example, the width of the pixel isolation structure 140 may gradually decrease from the first surface 100a of the substrate 100 to the second surface 100b of the substrate 100.

[0049] The pixel isolation structure 140 may include a conductive layer 142, an insulating liner 144, and an upper insulating layer 146. The conductive layer 142 may be disposed inside the pixel isolation trench 140T that penetrates the substrate 100. The insulating liner 144 may be disposed on the inner wall of the pixel isolation trench 140T that penetrates the substrate 100, may extend from the first surface 100a of the substrate 100 to the second surface 100b of the substrate 100, and may be disposed between the substrate 100 and the conductive layer 142. The upper insulating layer 146 may be disposed in a portion of the pixel isolation trench 140T adjacent to the first surface 100a of the substrate 100.

[0050] In an embodiment, the pixel isolation structure 140 may penetrate the substrate 100. For example, the pixel isolation structure 140 may be a front-side deep trench isolation (FDTI). In an embodiment, the pixel isolation structure 140 may not penetrate the substrate 100. For example, the pixel isolation structure 140 may be a back-side deep trench isolation (BDTI).

[0051] In an embodiment, the conductive layer 142 may include, but is not limited to, at least one of doped polysilicon, metal, metal silicide, metal nitride, and a metal-containing layer. The insulating liner 144 may include an insulating material, such as, but not limited to, silicon oxide (SiO), silicon nitride (SiN), or silicon oxynitride (SiON). The upper insulating layer 146 may include an insulating material, such as, but not limited to, silicon oxide (SiO), silicon nitride (SiN), or silicon oxynitride (SiON).

[0052] According to an embodiment, the device isolation pattern 103 may be disposed in the substrate 100. The bottom surface of the device isolation pattern 103 may be disposed in the substrate 100. The width of the device isolation pattern 103 may gradually decrease from the first surface 100a of the substrate 100 to the second surface 100b of the substrate 100. At least a part of the device isolation pattern 103 may be disposed on the upper sidewall of the pixel isolation structure 140 and may be connected to the upper sidewall of the pixel isolation structure 140. The depth of the device isolation pattern 103 may be smaller than the depth of the pixel isolation structure 140. The device isolation pattern 103 may include, for example, silicon oxide (SiO), silicon nitride (SiN), and / or silicon oxynitride (SiON).

[0053] As referred to above Figure 1 The transfer transistor TX described above may be disposed on the first surface 100a of the substrate 100. The transfer transistor TX may be electrically connected to the photoelectric conversion region 110, respectively.

[0054] According to an embodiment, the first wiring layer 20 may include a wiring insulating layer (e.g., the first wiring insulating layer 221 and the second wiring insulating layer 222), wirings (e.g., the first wiring 212 and the second wiring 213), and vias 215. The first wiring insulating layer 221 may cover the first surface 100a of the substrate 100. The first wiring insulating layer 221 may be disposed between the first wiring 212 and the first surface 100a of the substrate 100. The second wiring insulating layer 222 may be stacked on the first wiring insulating layer 221. The first wiring insulating layer 221 and the second wiring insulating layer 222 may include a non-conductive material. For example, the first wiring insulating layer 221 and the second wiring insulating layer 222 may include a silicon-based insulating material such as, but not limited to, silicon oxide (SiO), silicon nitride (SiN), and / or silicon oxynitride (SiON).

[0055] The first wiring 212 and the second wiring 213 may be disposed on the first wiring insulating layer 221. That is, the first wiring 212 and the second wiring 213 may be disposed in the second wiring insulating layer 222 stacked on the first surface 100a of the substrate 100. The first wiring 212 and the second wiring 213 may be vertically connected to the transfer transistor TX through the vias 215. The electrical signals converted in the photoelectric conversion region 110 may be signal-processed in the first wiring layer 20. In an embodiment of the present disclosure, the first wiring 212 and the second wiring 213 are disposed regardless of the arrangement of the photoelectric conversion region 110. That is, the first wiring 212 and the second wiring 213 may cross the upper portion of the photoelectric conversion region 110. The first wiring 212, the second wiring 213, and the vias 215 may include a metal material such as copper (Cu), tungsten (W), etc.

[0056] The light transmissive layer 30 may include a color filter CF (e.g., a first color filter CF1 and a second color filter CF2, hereinafter collectively referred to as "CF") and a microlens ML. The light transmissive layer 30 may collect and filter light incident from the outside to provide light to the photoelectric conversion layer 10.

[0057] That is, the color filter CF and the microlens ML may be disposed on the second surface 100b of the substrate 100. The color filter CF may be respectively disposed on the unit pixel regions 101. The microlens ML may be respectively disposed on the color filter CF. A post-insulating layer 302 and auxiliary insulating layers (e.g., a first auxiliary insulating layer 304 and a second auxiliary insulating layer 306) may be disposed between the second surface 100b of the substrate 100 and the color filter CF. The post-insulating layer 302 may cover the second surface 100b of the substrate 100. The post-insulating layer 302 may be in contact with the second surface 100b of the substrate 100. For example, the post-insulating layer 302 may include at least one of a bottom antireflection coating (BARC) layer, a fixed charge layer, an adhesion layer, and a protective layer. When the post-insulating layer 302 is used as a bottom antireflection layer, reflection of light may be prevented, such that light incident on the second surface 100b of the substrate 100 may reach the photoelectric conversion region 110 smoothly. The post-insulating layer 302, the first auxiliary insulating layer 304, and the second auxiliary insulating layer 306 may include a metal oxide (e.g., aluminum oxide (AlO) or hafnium oxide (HfO)) and / or a silicon-based insulating material (e.g., silicon oxide (SiO) or silicon nitride (SiN)).

[0058] The color filter CF may include primary color filters. For example, the color filter CF may include a first color filter to a third color filter having different colors. For example, each of the first color filter to the third color filter may include a green color filter, a red color filter, or a blue color filter. The first color filter to the third color filter may be arranged in a Bayer pattern. As another example, the first color filter to the third color filter may include color filters of other colors such as a cyan color filter, a magenta color filter, or a yellow color filter.

[0059] A cushion layer 308 may be provided to cover the top surface and sidewalls of the color filter CF. The cushion layer 308 may be disposed on the first auxiliary insulating layer 304 and the second auxiliary insulating layer 306 respectively exposed between the color filters CF. The cushion layer 308 may be conformally disposed on the top surface and sidewalls of the color filter CF and the top surfaces of the first auxiliary insulating layer 304 and the second auxiliary insulating layer 306 exposed between the color filters CF.

[0060] An air gap AG may be provided between the color filters CF. The color filters CF may be spaced apart from each other to form a space for forming the air gap AG. The air gap AG may be conformally disposed on the sidewalls of the color filters CF and the top surfaces of the first auxiliary insulating layer 304 and the second auxiliary insulating layer 306 exposed between the color filters CF.

[0061] The cover layer 310 may be disposed on the top surface of the color filter CF. The cover layer 310 may be arranged on a part of the sidewall and the top surface of the color filter CF. The cover layer 310 may include a part disposed between the color filters CF. The cover layer 310 may be arranged on some regions of the sidewall of the color filter CF. The cover layer 310 may be arranged on the cushion layer 308 on the top surface and the sidewall of the color filter CF. For example, the cover layer 310 may include a low temperature oxide (LTO), which may be a silicon oxide (SiO) layer. For example, the cover layer 310 may include a plasma enhanced oxide (PEOX) layer.

[0062] The auxiliary insulating layer 320 may be disposed on the cover layer 310. The auxiliary insulating layer 320 may be and / or may include a planarization layer disposed on the cover layer 310. The auxiliary insulating layer 320 may include at least one of, for example, a material based on a silicon oxide (SiO) layer, a material based on a silicon nitride (SiN) layer, a resin, and combinations thereof.

[0063] The microlenses ML may be respectively disposed on the top surface of the color filter CF. The microlenses ML may be respectively vertically stacked with the photoelectric conversion regions 110. In an embodiment, the microlenses ML may be connected to each other. The microlenses ML may be transparent and may transmit light. The microlenses ML may have a convex shape to collect the light incident on the unit pixel region 101. The microlenses ML may include an organic material. For example, the microlenses ML may include a photoresist material or a thermosetting resin.

[0064] Figures 5 to 9 A part of the pixel array region of the image sensor 1 according to an embodiment is shown. Figure 5 is along Figure 4 The cross-sectional view taken along the line P-P'. Figure 6 is along Figure 4 The cross-sectional view taken along the line Q-Q'. Figure 7A is along Figure 5 and Figure 6 The cross-sectional view taken along the line A-A'. Figure 7B is along Figure 5 and Figure 6 The cross-sectional view taken along the line B-B'. Figure 8 is Figure 7A The enlarged cross-sectional view of the region EX1. Figure 9 is Figure 7B The enlarged cross-sectional view of the region EX2.

[0065] Refer to Figure 5, a plurality of photoelectric conversion regions 110 (e.g., a first photoelectric conversion region 110A, a second photoelectric conversion region 110B, a third photoelectric conversion region 110C, and a fourth photoelectric conversion region 110D) may be arranged in a grid structure in the photoelectric conversion layer 10. The plurality of photoelectric conversion regions 110A to 110D may be respectively arranged in a plurality of unit pixel regions 101 (e.g., a first unit pixel region 101A, a second unit pixel region 101B, a third unit pixel region 101C, and a fourth unit pixel region 101D). For example, the second photoelectric conversion region 110B may be arranged adjacent to the first photoelectric conversion region 110A in a first horizontal direction (X direction). The third photoelectric conversion region 110C may be arranged adjacent to the first photoelectric conversion region 110A in a second horizontal direction (Y direction). Additionally, the fourth photoelectric conversion region 110D may be arranged adjacent to the first photoelectric conversion region 110A in a diagonal direction (D direction) of the first photoelectric conversion region 110A. The second photoelectric conversion region 110B and the third photoelectric conversion region 110C may be arranged adjacent to each other in a diagonal direction (D direction). The diagonal direction (D direction) may be a third horizontal direction that intersects the first horizontal direction (X direction) and the second horizontal direction (Y direction). That is, the fourth photoelectric conversion region 110D may be arranged not to overlap with the first photoelectric conversion region 110A in the first horizontal direction (X direction) and the second horizontal direction (Y direction). The fourth photoelectric conversion region 110D may be arranged adjacent to the second photoelectric conversion region 110B in the second horizontal direction (Y direction), and may be arranged adjacent to the third photoelectric conversion region 110C in the first horizontal direction (X direction).

[0066] In some embodiments, a pixel isolation structure 140 arranged in a vertical direction (Z direction) in the substrate 100 may define a plurality of unit pixel regions 101A to 101D. In some embodiments, the pixel isolation structure 140 may be arranged to surround each of the plurality of unit pixel regions 101A to 101D. The pixel isolation structure 140 may be arranged between any two of the plurality of unit pixel regions 101A to 101D. The pixel isolation structure 140 may have a grid shape between any two of the plurality of unit pixel regions 101A to 101D arranged in a grid structure. The pixel isolation structure 140 may extend in the first horizontal direction (X direction) and the second horizontal direction (Y direction) between the plurality of unit pixel regions 101A to 101D arranged in a grid structure.

[0067] Referring to Figure 6, the first color filter CF1, the second color filter CF2, the third color filter CF3, and the fourth color filter CF4 may be arranged in a lattice structure in the light transmission layer 30. For example, the second color filter CF2 may be arranged adjacent to the first color filter CF1 in the first horizontal direction (X direction). The third color filter CF3 may be arranged adjacent to the first color filter CF1 in the second horizontal direction (Y direction). The fourth color filter CF4 may be arranged adjacent to the second color filter CF2 in the second horizontal direction (Y direction) and adjacent to the third color filter CF3 in the first horizontal direction (X direction). The fourth color filter CF4 may be arranged adjacent to the first color filter CF1 in the diagonal direction (D direction). The third color filter CF3 may be arranged adjacent to the second color filter CF2 in the diagonal direction (D direction).

[0068] In some embodiments, the first trench TR1 may be arranged between two of the first color filter CF1, the second color filter CF2, the third color filter CF3, and the fourth color filter CF4. That is, the first trench TR1 may be arranged between two of the first color filter CF1, the second color filter CF2, the third color filter CF3, and the fourth color filter CF4 in the horizontal direction (e.g., the first horizontal direction (X direction) and / or the second horizontal direction (Y direction)). For example, the first trench TR1 may be arranged between the first color filter CF1 and the second color filter CF2, between the first color filter CF1 and the third color filter CF3, between the second color filter CF2 and the fourth color filter CF4, between the first color filter CF1 and the fourth color filter CF4, and between the third color filter CF3 and the fourth color filter CF4.

[0069] In some embodiments, the air gap AG may be arranged in the first trench TR1 between two of the first color filter CF1, the second color filter CF2, the third color filter CF3, and the fourth color filter CF4. That is, the air gap AG may be arranged in the first trench TR1 between a certain two of the first color filter CF1, the second color filter CF2, the third color filter CF3, and the fourth color filter CF4 in the horizontal direction (e.g., the first horizontal direction (X direction) and / or the second horizontal direction (Y direction)). For example, the air gap AG may be arranged in the first trench TR1 between the first color filter CF1 and the second color filter CF2, between the first color filter CF1 and the third color filter CF3, between the second color filter CF2 and the fourth color filter CF4, and between the third color filter CF3 and the fourth color filter CF4.

[0070] In some embodiments, the second trench TR2 may be disposed between two other ones of the first color filter CF1, the second color filter CF2, the third color filter CF3, and the fourth color filter CF4. That is, the second trench TR2 may be disposed between two other ones of the first color filter CF1, the second color filter CF2, the third color filter CF3, and the fourth color filter CF4 in a slant direction (e.g., the slant direction (direction D)). For example, the second trench TR2 may be disposed between the first color filter CF1 and the fourth color filter CF4 and between the second color filter CF2 and the third color filter CF3 in a slant direction (e.g., the slant direction (direction D)).

[0071] In some embodiments, the width of the first trench TR1 may be smaller than the width of the second trench TR2. That is, the width of the first trench TR1 in the horizontal direction (e.g., the first horizontal direction (X direction) and / or the second horizontal direction (Y direction)) may be smaller than the width of the second trench TR2 in the slant direction (e.g., the slant direction (direction D)).

[0072] In some embodiments, the cover layer 310 may be disposed between two of the first color filter CF1, the second color filter CF2, the third color filter CF3, and the fourth color filter CF4. That is, the cover layer 310 may be disposed between two of the first color filter CF1, the second color filter CF2, the third color filter CF3, and the fourth color filter CF4 in a slant direction (e.g., the slant direction (direction D)). For example, the cover layer 310 may be disposed between the second color filter CF2 and the third color filter CF3 and between the first color filter CF1 and the fourth color filter CF4.

[0073] Each of the first color filter CF1, the second color filter CF2, the third color filter CF3, and the fourth color filter CF4 may include one of a red color filter, a green color filter, and a blue color filter. For example, each of the first color filter CF1 and the fourth color filter CF4 may include a green color filter, the second color filter CF2 may include a red color filter, and the third color filter CF3 may include a blue color filter. However, this is only for ease of explanation and the present disclosure is not limited thereto. For example, depending on the unit pixel, the red color filter, the green color filter, or the blue color filter may be arranged in different ways. Optionally or additionally, depending on the unit pixel, each of the first color filter CF1, the second color filter CF2, the third color filter CF3, and the fourth color filter CF4 may include one of, for example, a cyan color filter, a magenta color filter, and a yellow color filter.

[0074] Refer together to Figure 7A and Figure 7B, the first color filter CF1, the second color filter CF2, the third color filter CF3, and the fourth color filter CF4 may be respectively disposed on a plurality of unit pixel regions 101A to 101D. For example, the first color filter CF1, the second color filter CF2, the third color filter CF3, and the fourth color filter CF4 may be respectively stacked with the plurality of unit pixel regions 101A to 101D in the vertical direction (Z direction).

[0075] Together with Figure 7A and Figure 7B referring together with Figure 8 , a first trench TR1 may be disposed between the first color filter CF1 and the second color filter CF2. That is, the first trench TR1 may be defined by the first color filter CF1 and the second color filter CF2. For example, the first trench TR1 may be defined by a sidewall CF1_S of the first color filter CF1 and a sidewall CF2_S of the second color filter CF2.

[0076] In some embodiments, the first trench TR1 may include a bottom surface on the top surfaces of the first auxiliary insulating layer 304 and the second auxiliary insulating layer 306, and both a sidewall CF1_S of the first color filter CF1 and a sidewall CF2_S of the second color filter CF2. In some embodiments, the width of the lower portion of the first trench TR1 in the first horizontal direction (X direction) may be greater than the width of the upper portion in the first horizontal direction (X direction). For example, the width in the first horizontal direction (X direction) may decrease away from the bottom surface in the vertically upward direction (+Z direction). In some embodiments, the width of the first trench TR1 in the first horizontal direction (X direction) may be constant, or may increase in the vertically upward direction (+Z direction).

[0077] In some embodiments, an air gap AG may be located in the first trench TR1. That is, the air gap AG may be disposed in the lower portion of the first trench TR1.

[0078] In some embodiments, the air gap AG may improve (e.g., prevent or suppress) the crosstalk phenomenon between color filters when including a material having a low refractive index (e.g., air with a refractive index of one (1)). For example, it may be possible to improve (e.g., prevent or suppress) the flow of an optical signal entering the first color filter CF1 to the second color filter CF2. Additionally, when compared with an existing image sensor, as the crosstalk phenomenon is improved (e.g., prevented or suppressed), noise may be reduced. That is, according to an embodiment, the image sensor 1 may have improved performance and reliability when compared with an existing image sensor.

[0079] In some embodiments, the liner layer 308 may be disposed on the bottom surface and two sidewalls of the first trench TR1, the top surface CF1_T of the first color filter CF1, and the top surface CF2_T of the second color filter CF2. For example, the liner layer 308 may cover the sidewalls CF1_S of the first color filter CF1 and the sidewalls CF2_S of the second color filter CF2 exposed by the first trench TR1. As another example, in the process for forming the image sensor 1 described below with reference to Figures 12A to 18B the liner layer 308 may cover the first color filter CF1 and the second color filter CF2 to prevent defects caused by fumes formed at high temperatures.

[0080] When compared with an existing image sensor, the image sensor 1 according to an embodiment may include a liner layer 308 to prevent and / or reduce defects caused by fumes. That is, according to an embodiment, the image sensor 1 may have improved performance and reliability when compared with an existing image sensor.

[0081] In some embodiments, the liner layer 308 may be conformally disposed on the bottom surface and two sidewalls of the first trench TR1, the top surface CF1_T of the first color filter CF1, and the top surface CF2_T of the second color filter CF2. For example, the liner layer 308 may be formed by atomic layer deposition (ALD). In an embodiment, the liner layer 308 may have a substantially constant and / or the same thickness. For example, the liner layer 308 may have a thickness of less than a few hundred angstroms (Å). The liner layer 308 may have a thickness of less than about 100 angstroms (Å).

[0082] In an embodiment, the liner layer 308 may include an oxide or a nitride. For example, the liner layer 308 may include, but is not limited to, silicon oxide (SiO), silicon nitride (SiN), and / or a metal oxide.

[0083] In some embodiments, the capping layer 310 may be disposed on the top surface CF1_T of the first color filter CF1 and the top surface CF2_T of the second color filter CF2. That is, the capping layer 310 may be disposed on the liner layer 308 on the top surface CF1_T of the first color filter CF1 and the top surface CF2_T of the second color filter CF2.

[0084] In some embodiments, the cover layer 310 may include a first sub - portion 310_1 disposed in the first trench TR1. For example, the first sub - portion 310_1 may be disposed between the first color filter CF1 and the second color filter CF2. As another example, the first sub - portion 310_1 may be stacked with the first color filter CF1 and the second color filter CF2 in the first horizontal direction (X - direction). That is, the first sub - portion 310_1 of the cover layer 310 may be disposed in the upper part of the first trench TR1. The cover layer 310 may not be disposed in the lower part of the first trench TR1. Thus, an air gap AG may be formed in the lower part of the first trench TR1. The first sub - portion 310_1 of the cover layer 310 may be integrally formed with the remaining portion of the cover layer 310 (e.g., the portion disposed on the first color filter CF1 and the second color filter CF2).

[0085] In some embodiments, the first sub - portion 310_1 of the cover layer 310 may not contact the cushion layer 308 on the bottom surface of the first trench TR1.

[0086] In some embodiments, since the cover layer 310 includes the first sub - portion 310_1 disposed in the first trench TR1, the vertical height of the portion of the cover layer 310 that overlaps with the first trench TR1 in the vertical direction (Z - direction) may be lower than the vertical height of the portion of the cover layer 310 that does not overlap with the first trench TR1 in the vertical direction (Z - direction). For example, the vertical height of the portion of the cover layer 310 that overlaps with the first trench TR1 in the vertical direction (Z - direction) may be lower than the vertical height of the portion of the cover layer 310 that overlaps with the color filters (e.g., the first color filter CF1 and the second color filter CF2) in the vertical direction (Z - direction).

[0087] In some embodiments, the air gap AG between the first color filter CF1 and the second color filter CF2 may be surrounded by the cushion layer 308 in the first trench TR1 and the cover layer 310. For example, the air gap AG between the first color filter CF1 and the second color filter CF2 may be surrounded by the cushion layer 308 in the first trench TR1 and the first sub - portion 310_1 of the cover layer 310. As another example, the upper part of the air gap AG may be surrounded by the first sub - portion 310_1 of the cover layer 310, and the lower part of the air gap AG may be surrounded by the cushion layer 308. In some embodiments, the upper part of the air gap AG may contact the first sub - portion 310_1 of the cover layer 310, and the lower part of the air gap AG may contact the cushion layer 308. For example, in some embodiments, the lower part of the air gap AG may contact the cushion layer 308 on the bottom surface of the first trench TR1.

[0088] Together with Figure 7A and Figure 7B Refer to together Figure 9, the second trench TR2 may be disposed between the second color filter CF2 and the third color filter CF3. The second trench TR2 may be defined by the second color filter CF2 and the third color filter CF3. For example, the second trench TR2 may be defined by the sidewall CF2_S of the second color filter CF2 and the sidewall CF3_S of the third color filter CF3.

[0089] In some embodiments, the second trench TR2 may include a bottom surface on the top surfaces of the first auxiliary insulating layer 304 and the second auxiliary insulating layer 306, and both the sidewall CF2_S of the second color filter CF2 and the sidewall CF3_S of the third color filter CF3.

[0090] In some embodiments, an air gap AG may not be disposed in the second trench TR2.

[0091] In some embodiments, the cushion layer 308 may be disposed on the bottom surface and two sidewalls of the second trench TR2, and the top surfaces CF2_T of the second color filter CF2 and CF3_T of the third color filter CF3. For example, the cushion layer 308 may cover the sidewall CF2_S of the second color filter CF2 and the sidewall CF3_S of the third color filter CF3 that may be exposed by the second trench TR2. In some embodiments, the cushion layer 308 may be conformally disposed on the bottom surface and two sidewalls of the second trench TR2, the top surface CF2_T of the second color filter CF2, and the top surface CF3_T of the third color filter CF3.

[0092] In some embodiments, the cover layer 310 may be disposed on the top surface CF2_T of the second color filter CF2 and the top surface CF3_T of the third color filter CF3. That is, the cover layer 310 may be disposed on the cushion layer 308 on the top surface CF2_T of the second color filter CF2 and the top surface CF3_T of the third color filter CF3.

[0093] In some embodiments, the cover layer 310 may include a second sub - portion 310_2 disposed in the second trench TR2. For example, the second sub - portion 310_2 may be disposed between the second color filter CF2 and the third color filter CF3. That is, the second sub - portion 310_2 may be disposed in the upper and lower portions of the second trench TR2. For example, the second sub - portion 310_2 may fill the interior of the second trench TR2. As another example, the second sub - portion 310_2 may fill the remaining space of the second trench TR2 on the cushion layer 308.

[0094] In some embodiments, since the cover layer 310 includes the second sub - portion 310_2 disposed in the second trench TR2, the vertical height of the portion of the cover layer 310 that overlaps the second trench TR2 in the vertical direction (Z - direction) may be lower than the vertical height of the portion of the cover layer 310 that does not overlap the second trench TR2 in the vertical direction (Z - direction).

[0095] In some embodiments, a second sub - portion 310_2 of the cover layer 310 disposed in the second trench TR2 may be disposed between a plurality of color filters CF (e.g., the second color filter CF2 and the third color filter CF3) in an oblique line direction (direction D) in a plan view, and may be used to physically support components. That is, according to an embodiment, the image sensor 1 may have improved performance and reliability compared to existing image sensors.

[0096] Figure 10 is a cross - sectional view of a pixel array region of the image sensor 1A according to an embodiment.

[0097] The image sensor 1A may include the image sensor 1 described above with reference to Figures 4 to 9 and / or may be similar to the image sensor 1 described above with reference to Figures 4 to 9 in many aspects, and may include additional features not mentioned above. Therefore, for the sake of brevity, the repeated description of the image sensor 1 described above with reference to Figures 4 to 9 may be omitted.

[0098] Referring to Figure 10 , an air gap AG may be disposed between the first color filter CF1 and the second color filter CF2. The cushion layer 308 may cover the top surfaces and side walls of the first color filter CF1 and the second color filter CF2, and the cover layer 310 may cover the top surfaces of the first color filter CF1 and the second color filter CF2 on the cushion layer 308.

[0099] That is, the cover layer 310 may not be disposed between the first color filter CF1 and the second color filter CF2. For example, the cover layer 310 may not overlap with the first color filter CF1 and the second color filter CF2 in the first horizontal direction (X direction).

[0100] Figure 11 is a cross - sectional view of a pixel array region of the image sensor 1B according to an embodiment. Hereinafter, the differences from the image sensor 1 described with reference to Figures 4 to 9 will be mainly described.

[0101] The image sensor 1B may include the image sensor 1 described above with reference to Figures 4 to 10 and the image sensor 1A and / or may be similar to the image sensor 1 and the image sensor 1A described above with reference to Figures 4 to 10 in many aspects, and may include additional features not mentioned above. Therefore, for the sake of brevity, the repeated description of the image sensor 1 and the image sensor 1A described above with reference to Figures 4 to 10 may be omitted.

[0102] Referring to Figure 11, the underlayer 308 may cover the top surfaces and sidewalls of the first color filter CF1 and the second color filter CF2, and the cover layer 310 may cover the top surfaces of the first color filter CF1 and the second color filter CF2 on the underlayer 308.

[0103] In some embodiments, the second air gap AG2 may be disposed between the second color filter CF2 and the third color filter CF3. That is, the second air gap AG2 may be surrounded by the cover layer 310 between the second color filter CF2 and the third color filter CF3. The second air gap AG2 may not be in contact with the underlayer 308 between the second color filter CF2 and the third color filter CF3. In some embodiments, the second air gap AG2 may be in contact with the underlayer 308 between the second color filter CF2 and the third color filter CF3.

[0104] Figures 12A to 18B is a cross-sectional view showing a process of manufacturing the image sensor 1 according to an embodiment.

[0105] Together with Figure 4 referring together Figure 12A and Figure 12B , in the substrate 100, unit pixel regions 101 (e.g., the first unit pixel region 101A, the second unit pixel region 101B, and the third unit pixel region 101C) may be defined by the pixel isolation structure 140, and photoelectric conversion regions 110 (e.g., the first photoelectric conversion region 110A, the second photoelectric conversion region 110B, and the third photoelectric conversion region 110C) may be provided in the first unit pixel region 101A to the third unit pixel region 101C. The post-insulating layer 302 and auxiliary insulating layers (e.g., the first auxiliary insulating layer 304 and the second auxiliary insulating layer 306) may be sequentially disposed on the second surface 100b of the substrate 100. A barrier layer FL may be formed on the first auxiliary insulating layer 304 and the second auxiliary insulating layer 306. For example, the first auxiliary insulating layer 304 may be formed on the second surface 100b of the substrate 100, the second auxiliary insulating layer 306 may be formed on the first auxiliary insulating layer 304, and then the barrier layer FL may be formed on the second auxiliary insulating layer 306. The barrier layer FL may include, for example, an oxide.

[0106] Together with Figure 3 referring together Figure 13A and Figure 13B , the barrier pattern FP may be formed by patterning the barrier layer FL. Some regions of the first auxiliary insulating layer 304 and the second auxiliary insulating layer 306 may be exposed through the barrier pattern FP. The barrier pattern FP may expose the regions where the color filters CF (e.g., Figure 4 the first color filter CF1 and the second color filter CF2) are to be formed.

[0107] Referring to Figure 14A and Figure 14B, a color filter CF (e.g., a first color filter CF1, a second color filter CF2, and a third color filter CF3) can be formed. That is, the color filter CF (e.g., the first color filter CF1, the second color filter CF2, and the third color filter CF3) can be formed in a partial area exposed by the fence pattern FP. For example, the first color filter CF1 can be formed on the first photoelectric conversion region 110A, the second color filter CF2 can be formed on the second photoelectric conversion region 110B, and the third color filter CF3 can be formed on the third photoelectric conversion region 110C.

[0108] Referring to Figure 15A and Figure 15B , the fence pattern FP can be removed. For example, the fence pattern FP can be removed using a wet etching process. Accordingly, a first trench TR1 and a second trench TR2 can be formed. That is, the first trench TR1 can be formed between the first color filter CF1 and the second color filter CF2, and the second trench TR2 can be formed between the second color filter CF2 and the third color filter CF3. The sidewalls of each of the first color filter CF1, the second color filter CF2, and the third color filter CF3 can be exposed through the first trench TR1 and the second trench TR2.

[0109] Referring to Figure 16A and Figure 16B , a cushion layer 308 covering the sidewalls of each of the first color filter CF1, the second color filter CF2, and the third color filter CF3 can be formed. That is, the cushion layer 308 can be conformally formed on the bottom surface and two sidewalls of the first trench TR1, the bottom surface and two sidewalls of the second trench TR2, and the top surfaces of each of the first color filter CF1, the second color filter CF2, and the third color filter CF3.

[0110] As described above, the process of forming the cushion layer 308 can be performed by an atomic layer deposition process. For example, the atomic layer deposition process can be performed at a temperature of about 50 degrees Celsius (°C). Accordingly, while performing the atomic layer deposition process, no smoke can be formed in the color filter CF (e.g., the first color filter CF1, the second color filter CF2, and the third color filter CF3), or less smoke can be formed.

[0111] Referring to Figure 17A and Figure 17B , a cover layer 310 can be formed above the top surfaces of the color filter CF (e.g., the first color filter CF1, the second color filter CF2, and the third color filter CF3). That is, the cover layer 310 can be formed above the top surfaces of each of the first color filter CF1, the second color filter CF2, and the third color filter CF3. The cover layer 310 can be formed on the cushion layer 308 on each of the first color filter CF1, the second color filter CF2, and the third color filter CF3.

[0112] The process of forming the cover layer 310 can be performed by a chemical vapor deposition (CVD) process. For example, the process of forming the cover layer 310 can be performed by plasma-enhanced chemical vapor deposition (PECVD). For example, the process of forming the cover layer 310 can be performed at a temperature of about 220 °C or lower.

[0113] That is, the cover layer 310 may include a portion disposed between the first color filter CF1 and the second color filter CF2. The cover layer 310 may include a portion disposed between the second color filter CF2 and the third color filter CF3. In this case, the entrance of the trench (e.g., the first trench TR1) between the first color filter CF1 and the second color filter CF2 may be narrow, such that not all of the cover layer 310 can be disposed in the space within the trench, but a portion of the cover layer 310 may be disposed only in the upper portion of the trench.

[0114] In this case, since the cover layer 310 is disposed only in a portion of the trench between the first color filter CF1 and the second color filter CF2, an air gap AG can be formed between the first color filter CF1 and the second color filter CF2.

[0115] Referring to Figure 18A and Figure 18B , an auxiliary insulating layer 320 and a microlens ML can be formed on the cover layer 310 to fabricate the image sensor 1.

[0116] Although the present disclosure has been specifically shown and described with reference to embodiments of the present disclosure, it will be understood that various changes in form and detail may be made therein without departing from the spirit and scope of the appended claims.

Claims

1. An image sensor, comprising: a substrate including a photoelectric conversion region; a first color filter above the substrate; a second color filter adjacent to the first color filter in a first horizontal direction and above the substrate; a plurality of liner layers on upper surfaces and sidewalls of each of the first color filter and the second color filter; an air gap between the first color filter and the second color filter; and a cover layer on upper surfaces of each of the first color filter and the second color filter.

2. The image sensor according to claim 1, further comprising: a third color filter adjacent to the first color filter in a second horizontal direction intersecting the first horizontal direction, wherein the cover layer includes a first sub - part between the second color filter and the third color filter.

3. The image sensor according to claim 2, wherein, The air gap is not between the second color filter and the third color filter.

4. The image sensor according to claim 1, wherein, The cover layer includes a second sub - part on an upper portion of the air gap and between the first color filter and the second color filter.

5. The image sensor according to claim 1, wherein, The plurality of liner layers includes at least one of an oxide layer and a nitride layer.

6. The image sensor according to claim 1, wherein, The cover layer includes a plasma - enhanced oxide layer.

7. An image sensor, comprising: a substrate including a photoelectric conversion region; a first color filter above the substrate; a second color filter adjacent to the first color filter in a first horizontal direction and above the substrate; a first trench between the first color filter and the second color filter; a first plurality of liner layers conformally disposed on a bottom surface of the first trench, a first sidewall of the first trench, and a second sidewall of the first trench; a first air gap in the first trench; and a plurality of cover layers on the first air gap, a top surface of the first color filter, and a top surface of the second color filter.

8. The image sensor according to claim 7, further comprising: a third color filter adjacent to the first color filter in a second horizontal direction intersecting the first horizontal direction, a second trench between the second color filter and the third color filter; and a second plurality of liner layers conformally disposed on a bottom surface of the second trench, a first sidewall of the second trench, and a second sidewall of the second trench.

9. The image sensor according to claim 7, further comprising: a third color filter adjacent to the first color filter in a second horizontal direction intersecting the first horizontal direction; and a second trench between the second color filter and the third color filter, wherein each of the plurality of cover layers includes a first sub - part in the second trench.

10. The image sensor according to claim 9, wherein, The air gap is not between the second color filter and the third color filter.

11. The image sensor according to claim 7, wherein, The plurality of cover layers includes a second sub - part in an upper portion of the first trench.

12. The image sensor according to claim 7, wherein, The first plurality of liner layers includes portions on a top surface of the first color filter and a top surface of the second color filter.

13. The image sensor according to claim 7, wherein, The first trench is defined by sidewalls of the first color filter and sidewalls of the second color filter.

14. The image sensor according to claim 7, wherein, The first air gap is at least partially surrounded by the first plurality of liner layers and the plurality of cover layers.

15. The image sensor according to claim 7, wherein, The first plurality of liner layers includes at least one of an oxide layer and a nitride layer.

16. The image sensor according to claim 7, further comprising: a third color filter adjacent to the first color filter in a second horizontal direction intersecting the first horizontal direction; a third trench between the first color filter and the third color filter; a second air gap in the third trench; and A third plurality of liner layers, conformally disposed on a bottom surface of a third trench, a first sidewall of the third trench, and a second sidewall of the third trench.

17. An image sensor, comprising: a substrate including a photoelectric conversion region; a first color filter above the substrate; a second color filter above the substrate and adjacent to the first color filter in a first horizontal direction; a third color filter adjacent to the first color filter in a second horizontal direction intersecting the first horizontal direction; a first trench between the first color filter and the second color filter; a second trench between the second color filter and the third color filter; a plurality of liner layers, conformally disposed on a bottom surface of the first trench, a first sidewall of the first trench, a second sidewall of the first trench, a bottom surface of the second trench, a first sidewall of the second trench, and a second sidewall of the second trench; a first air gap in the first trench; and a plurality of cover layers on top surfaces of the first color filter, the second color filter, and the third color filter and in the second trench.

18. The image sensor according to claim 17, wherein, The first air gap is at least partially surrounded by the plurality of liner layers and the plurality of cover layers.

19. The image sensor according to claim 17, wherein, The first air gap is not disposed in the second trench.

20. The image sensor according to claim 17, wherein, The first air gap is in contact with the plurality of liner layers.

Images