Back contact battery, battery assembly and photovoltaic system

Abstract

The invention is applicable to the field of photovoltaic technology, and provides a back contact cell, a cell assembly and a photovoltaic system, the back surface of the substrate comprises a plurality of first regions, the first regions are first doped regions or second doped regions, the first regions and the first edge of the substrate are arranged at intervals to form first spacer regions, and the second regions are second doped regions or second doped regions. In the direction far away from the first edge of the substrate, texture structures with different morphologies are arranged in the first spacer region, so that on one hand, the light trapping effect in the spacer region can be improved, and the light absorptivity can be increased; the texture structures with different morphologies can disperse electric field concentration at the edge of the PN junction, avoid local breakdown, reduce leakage current, change the geometric shape of the edge of the PN junction and optimize local electric field distribution so as to achieve the effect of enhancing PN isolation, and finally the photoelectric conversion efficiency of the cell and the reliability of the assembly are improved.

Description

Technical Field

[0001] The present invention belongs to the field of photovoltaic technology, and particularly relates to a back-contact battery, a battery module and a photovoltaic system. Background Art

[0002] The interdigitated back contact (IBC) battery is a high-efficiency solar cell technology. The positive and negative metal electrodes of the IBC battery are arranged in an interdigitated manner on the backlight surface of the battery. This design enables the front surface of the battery to have no metal grid line obstruction, thereby maximizing the light-receiving area, reducing optical losses, increasing the short-circuit current, and improving the overall photoelectric conversion efficiency. To prevent carriers from directly contacting in the N-type doped region and the P-type doped region, resulting in ineffective carrier collection, an isolation region needs to be provided at the junction of the P-type doped region and the N-type doped region. As the battery size decreases, the N-type doped region and the P-type doped region are arranged more closely. In the edge region of the battery, due to the edge region of the battery being easily scratched and worn, the PN isolation effect in the edge region deteriorates, resulting in a micro-leakage problem, increasing the possibility of short circuit, and ultimately reducing the photoelectric conversion efficiency of the battery and the reliability of the module made of such a battery. Summary of the Invention

[0003] The present invention provides a back-contact battery, aiming to solve the problem that in the edge region of the battery, due to the edge region of the battery being easily scratched and worn, the PN isolation effect in the edge region deteriorates, resulting in a micro-leakage problem, increasing the possibility of short circuit, and ultimately reducing the photoelectric conversion efficiency of the battery and the reliability of the module made of such a battery.

[0004] In a first aspect, the present invention provides a back-contact battery, including a substrate. The back surface of the substrate includes a plurality of first regions, and the first regions are a first doped region or a second doped region. The first regions and a first edge of the substrate are spaced apart to form a first spacer region. In a direction away from the first edge of the substrate, the first spacer region has texture structures with different morphologies.

[0005] By providing a spacer region between the doped region and the edge of the substrate, and in a direction away from the edge of the substrate, by providing texture structures with different morphologies in the spacer region, on the one hand, the light-trapping effect in the spacer region can be improved, the light absorption rate can be increased. In addition, the texture structures with different morphologies can disperse the electric field concentration at the edge of the PN junction, avoid local breakdown, reduce the leakage current, and can change the geometric shape of the edge of the PN junction, optimize the local electric field distribution, so as to achieve the effect of strengthening PN isolation, ultimately improving the photoelectric conversion efficiency of the battery and the reliability of the module.

[0006] Optionally, the back surface of the substrate further includes a plurality of second regions, the first regions and the second regions are arranged alternately at intervals, one of the first regions and the second regions is the first doping region, and the other is the second doping region, and the doping types of the first doping region and the second doping region are opposite.

[0007] The above-mentioned alternate arrangement of the first regions and the second regions at intervals can effectively promote the efficient separation and collection of carriers (electrons and holes), optimize the carrier migration path, and reduce the on-resistance.

[0008] Optionally, the second region and the second edge of the substrate are arranged at intervals to form a second interval region, and in the direction away from the second edge of the substrate, the second interval region has texture structures with different morphologies.

[0009] By setting texture structures with different morphologies in the interval region, on the one hand, the light trapping effect in the interval region can be improved, and the light absorption rate can be increased. In addition, the texture structures with different morphologies can disperse the electric field concentration at the edge of the PN junction, avoid local breakdown, reduce the leakage current, can change the geometric shape of the edge of the PN junction, optimize the local electric field distribution, so as to achieve the effect of strengthening the PN isolation, and finally improve the photoelectric conversion efficiency of the battery and the reliability of the component.

[0010] Optionally, the first edge and the second edge are oppositely arranged on the back-contact battery.

[0011] Optionally, the first interval region is a suede structure.

[0012] The above-mentioned first isolation region is set as a suede structure, which can realize multiple reflections and scatterings of light in the first isolation region, extend the optical path, enhance the absorption of long-wavelength light (such as near-infrared light), improve the utilization rate of incident light, and thus improve the light conversion efficiency of the component.

[0013] Optionally, the second interval region is a suede structure.

[0014] The above-mentioned second isolation region is set as a suede structure, which can realize multiple reflections and scatterings of light in the second isolation region, extend the optical path, enhance the absorption of long-wavelength light (such as near-infrared light), improve the utilization rate of incident light, and thus improve the light conversion efficiency of the component.

[0015] Optionally, the first interval region includes a first texture region and a second texture region, the first texture region has a first texture structure, the second texture region has a second texture structure, and the first texture structure and the second texture structure have different morphologies.

[0016] The combination of two different morphologies of texture structures can, on the one hand, enhance the light trapping effect in the spacer region and increase the light absorption rate. Additionally, the texture structures with different morphologies can disperse the electric field concentration at the edge of the PN junction, avoid local breakdown, reduce leakage current, change the geometric shape at the edge of the PN junction, optimize the local electric field distribution, so as to achieve the effect of strengthening the PN isolation, ultimately improving the photoelectric conversion efficiency of the battery and enhancing the reliability of the module.

[0017] Optionally, within a unit area, the number of the first texture structures in the first texture region is greater than the number of the second texture structures in the second texture region.

[0018] A larger number of the first texture structures enhances light absorption, provides more carrier transport paths, can shorten the lateral diffusion distance of carriers, and reduce the probability of bulk recombination. The second texture structures preferentially deposit high-quality passivation layers to suppress interface recombination. The second texture structures are distributed at the edge of the battery to disperse the edge electric field intensity and reduce the leakage current density. A larger number of the first texture structures mainly enhances light absorption and carrier collection, while a smaller number of the second texture structures optimizes passivation and electric field distribution, thus improving the battery efficiency as a whole.

[0019] Optionally, the first texture structure includes a raised structure.

[0020] The above-mentioned raised structure can extend the optical path through multiple reflections, significantly reduce the surface reflectivity, and especially enhance the short-wave absorption.

[0021] Optionally, the shape of the raised structure includes a pyramidal-like shape and / or a frustum shape.

[0022] The above-mentioned pyramidal-like shape can extend the optical path through multiple reflections, significantly reduce the surface reflectivity, and especially enhance the short-wave absorption. The directional edges of the frustum shape can guide the light to propagate obliquely, improve the absorption efficiency of long-wavelength light, and reduce the transmission loss.

[0023] Optionally, the array of raised structures is a plurality of pyramidal-like shapes and / or frustums arranged in sequence, and the longitudinal cross-sectional shape of the raised structure is at least one of a triangle and an irregular quadrilateral.

[0024] The above-mentioned pyramidal-like structure can extend the propagation path of light inside the material through multi-angle reflection and refraction, improve the light absorption rate, especially significant for long-wavelength light (such as near-infrared); the above-mentioned frustum / irregular quadrilateral can achieve an asymmetric design to disrupt the regular reflection path of light, increase the scattering probability, and reduce the surface reflection loss.

[0025] Optionally, the interval between the vertices of adjacent raised structures is 0.5 - 3 μm.

[0026] When the vertex intervals of adjacent protrusions are within this range, light undergoes multiple reflections between the protrusion structures, reducing the surface reflectivity to below 5%, especially enhancing the absorption of near-infrared light.

[0027] Optionally, the height of the protrusion structure in the thickness direction of the back-contact battery is 0.2 - 2 μm.

[0028] When the height of the protrusion structure in the thickness direction of the back-contact battery is within this range, it can cover a wider spectral range, disrupt periodic interference reflection, and achieve low reflection in the full wavelength band.

[0029] Optionally, the second texture structure includes a recessed structure.

[0030] The recessed structure can achieve a light trapping effect, where light undergoes multiple reflections within the recessed structure, further improving the light trapping ability.

[0031] Optionally, the shape of the recessed structure includes a pit and a quasi-inverted pyramid structure and / or a hole structure disposed within the pit.

[0032] The inverted pyramid structure within the pit can form a "secondary light trapping", where light undergoes multiple reflections within the pit, further improving the light trapping ability. The nanoscale holes trigger a light localization effect, enhancing the absorption in specific wavelength bands (such as near-infrared light).

[0033] Optionally, multiple recessed structures are distributed in an island-like manner within the second texture region.

[0034] As isolated scattering units, when the size of the recessed structures matches the wavelength of the incident light, Mie resonance is excited, enhancing the local light field intensity. Especially in the near-infrared band, the absorption efficiency is improved. Light undergoes multiple reflections within the recesses, forming a "light trap", extending the optical path and reducing transmission losses, especially enhancing the utilization rate of long-wavelength light.

[0035] Optionally, the maximum diagonal length of the recessed structure is 0.2 - 3 μm.

[0036] When the size of the recessed structure is within this range, the size of the recessed structure matches the wavelength of visible light to near-infrared light. By multiple scattering and diffraction, the optical path is extended, and the light absorption efficiency is improved, especially significant for obliquely incident light.

[0037] Optionally, the recessed depth of the recessed structure on the surface of the back-contact battery body in the thickness direction of the back-contact battery is 0.1 - 2 μm.

[0038] When the height of the recessed structure in the thickness direction of the back-contact battery is within this range, it can cover a wider spectral range, disrupt periodic interference reflection, and achieve low reflection in the full wavelength band. And within this depth range, it is beneficial for the passivation layer to be deposited by atomic layer deposition, achieving high coverage, reducing the surface state density, and suppressing interface recombination.

[0039] Optionally, the first region is set to a polished surface structure.

[0040] The polished surface structure has an extremely low roughness, enabling the passivation layer to achieve an atomically dense coverage, reducing the surface state density, significantly suppressing carrier interface recombination, decreasing the surface recombination velocity, and increasing the open-circuit voltage.

[0041] Optionally, the second region is set to a polished surface structure.

[0042] The polished surface structure has an extremely low roughness, enabling the passivation layer to achieve an atomically dense coverage, reducing the surface state density, significantly suppressing carrier interface recombination, decreasing the surface recombination velocity, and increasing the open-circuit voltage.

[0043] Optionally, the first spacer region is formed at the corner of the substrate and / or on the side edge of the substrate near the corner.

[0044] The corner of the substrate and the side edge near the corner are prone to wear and scratches, which are weak areas of the substrate. Setting the spacer region at the corner of the substrate and / or on the side edge near the corner is conducive to targeted strengthening to achieve the effect of enhancing PN isolation and reducing the leakage effect.

[0045] Optionally, the second spacer region is formed at the corner of the substrate and / or on the side edge of the substrate near the corner.

[0046] The corner of the substrate and the side edge near the corner are prone to wear and scratches, which are weak areas of the substrate. Setting the spacer region at the corner of the substrate and / or on the side edge near the corner is conducive to targeted strengthening to achieve the effect of enhancing PN isolation and reducing the leakage effect.

[0047] Optionally, the maximum distance of the first texture region in the direction perpendicular to the first edge and pointing to the center of the back-contact battery is 5 μm to 500 μm.

[0048] Setting the width of the first texture region within the above range can meet the functional requirements of the first texture region and reduce the production process difficulty and precision requirements.

[0049] Optionally, the maximum distance of the second texture region in the direction perpendicular to the first edge and pointing to the center of the back-contact battery is 5 μm to 500 μm.

[0050] Setting the width of the second texture region within the above range can meet the functional requirements of the second texture region and reduce the production process difficulty and precision requirements.

[0051] Optionally, the sum of the maximum distances of the first texture region and the second texture region in the direction perpendicular to the first edge and pointing to the center of the back contact battery is 10 μm to 1000 μm.

[0052] The sum of the widths of the first texture region and the second texture region is set within the above range, which can meet the functional roles of the first texture region and the second texture region, and reduce the production process difficulty and precision requirements.

[0053] Optionally, the second spacer region includes a third texture region and a fourth texture region. The third texture region has a third texture structure, and the fourth texture region has a fourth texture structure. The third texture structure and the fourth texture structure have different morphologies.

[0054] The cooperation of the two texture structures with different morphologies can, on the one hand, improve the light trapping effect in the spacer region and increase the light absorption rate. In addition, the texture structures with different morphologies can disperse the electric field concentration at the edge of the PN junction, avoid local breakdown, reduce leakage current, change the geometric shape at the edge of the PN junction, optimize the local electric field distribution, so as to achieve the effect of strengthening the PN isolation, ultimately improving the photoelectric conversion efficiency of the battery and the reliability of the module.

[0055] Optionally, the third texture structure includes a convex structure.

[0056] The above convex structure can extend the optical path through multiple reflections, significantly reduce the surface reflectivity, and especially enhance the short-wave absorption.

[0057] Optionally, the fourth texture structure includes a concave structure.

[0058] The concave structure can achieve the light trapping effect, and the light is reflected multiple times in the concave structure, further improving the light trapping ability.

[0059] Optionally, when the first region is a P-type doped region and the second region is an N-type doped region, the area of the second texture region is smaller than the area of the fourth texture region.

[0060] The second texture region and the fourth texture region can be processed under the same etching process conditions to realize the differential setting of the areas of the second texture region and the fourth texture region, and reduce the production process requirements of the solar cell.

[0061] Optionally, the surface of the first texture region is covered with a passivation layer.

[0062] The setting of the passivation layer neutralizes the dangling bonds on the surface of the texture region, passivates the defects in the texture region well, and reduces the recombination centers.

[0063] Optionally, the passivation layer is composed of one or more of an oxide layer, a nitride layer, a nitrogen oxide layer, a carbide layer, and an amorphous silicon layer.

[0064] Optionally, a doping layer is further included in the second texture region, and the doping layer includes at least one of a first doping layer and a second doping layer, and doping sources in the first doping layer and the second doping layer are different.

[0065] The doping layer in the second texture region can play a role in partial optical conversion, ultimately improving the photoelectric conversion efficiency of the battery and enhancing the reliability of the component.

[0066] Optionally, one of the first doping layer and the second doping layer contains a first doping source, and the other contains a second doping source. The first doping source is an N-type doped polysilicon layer or an N-type doped microcrystalline silicon layer or an N-type doped amorphous silicon layer, and the second doping source is a P-type doped polysilicon layer or a P-type doped microcrystalline silicon layer or a P-type doped amorphous silicon layer.

[0067] Setting the first doping source as an N-type doped polysilicon layer or an N-type doped microcrystalline silicon layer or an N-type doped amorphous silicon layer can significantly improve the performance and efficiency of the battery by forming a barrier effect, providing field passivation, improving metal electrode contact, achieving carrier transport selectivity, and prolonging the minority carrier lifetime.

[0068] Optionally, a part of the surface of the second texture region is further covered with a passivation layer.

[0069] The setting of the passivation layer neutralizes the dangling bonds on the surface of the texture region, passivates the defects in the texture region well, and reduces recombination centers.

[0070] Optionally, the passivation layer is composed of one or more of an oxide layer, a nitride layer, a nitrogen oxide layer, a carbide layer, and an amorphous silicon layer.

[0071] In a second aspect, the present invention provides a battery module, including the back contact battery described in the first aspect above. The technical effects of this application are the same as those of the above back contact battery and will not be elaborated here.

[0072] In a third aspect, the present invention provides a photovoltaic system, including the battery module described in the second aspect above. The technical effects of this application are the same as those of the above battery module and will not be elaborated here. BRIEF DESCRIPTION OF THE DRAWINGS

[0073] Figure 1 is a schematic structural diagram of the back contact battery provided by the present invention;

[0074] Figure 2 is a partial structural schematic diagram of the first back contact battery provided by the present invention;

[0075] Figure 3 It is a schematic diagram of a partial structure of the second back-contact battery provided by the present invention;

[0076] Figure 4 It is a schematic diagram of a partial structure of the third back-contact battery provided by the present invention;

[0077] Figure 5 It is a schematic diagram of a partial structure of the fourth back-contact battery provided by the present invention;

[0078] Figure 6 It is a schematic diagram of a partial structure of the fifth back-contact battery provided by the present invention;

[0079] Figure 7 It is a schematic diagram of a partial structure of the sixth back-contact battery provided by the present invention;

[0080] Figure 8 It is a schematic diagram of a partial structure of the seventh back-contact battery provided by the present invention;

[0081] Figure 9 It is a schematic diagram of a partial structure of the eighth back-contact battery provided by the present invention;

[0082] Figure 10 It is a schematic diagram of the structure of the first texture region of the first back-contact battery provided by the present invention;

[0083] Figure 11 It is a schematic diagram of the structure of the first texture region of the second back-contact battery provided by the present invention;

[0084] Figure 12 It is a schematic diagram of the structure of the first texture region of the third back-contact battery provided by the present invention.

[0085] Explanation of reference numerals:

[0086] 100, substrate; 200, first region; 300, first edge; 400, first spacer; 401, first texture region; 402, second texture region; 403, first texture structure; 404, second texture structure; 500, second region; 600, second edge; 700, second spacer; 701, third texture region; 702, fourth texture region; 703, third texture structure; 704, fourth texture structure. Detailed implementation manners

[0087] In order to make the objectives, technical solutions and advantages of the present invention more clearly understood, the present invention will be further described in detail below with reference to the accompanying drawings and embodiments. The examples of the embodiments are shown in the accompanying drawings, wherein the same or similar reference numerals denote the same or similar elements or elements having the same or similar functions throughout. The embodiments described below by referring to the accompanying drawings are exemplary only for explaining the present invention and should not be construed as limiting the present invention. In addition, it should be understood that the specific embodiments described herein are only used to explain the present invention and are not used to limit the present invention.

[0088] In the description of the present invention, it should be understood that the orientation or positional relationship indicated by the terms "length", "width", "upper", "lower", "left", "right", "horizontal", "top", "bottom", etc. is based on the orientation or positional relationship shown in the accompanying drawings. It is only for the convenience of describing the present invention and simplifying the description, rather than indicating or implying that the device or element referred to must have a specific orientation, be constructed and operated in a specific orientation, and therefore should not be construed as limiting the present invention.

[0089] In addition, the terms "first" and "second" are only used for descriptive purposes and should not be construed as indicating or implying relative importance or implicitly specifying the quantity of the indicated technical features. Thus, the features defined with "first" and "second" may explicitly or implicitly include one or more of the described features. In the description of the present invention, "a plurality of" means two or more unless otherwise specifically defined.

[0090] In the description of the present invention, it should be noted that unless otherwise clearly defined and limited, the terms "mounted", "connected" and "coupled" shall be construed in a broad sense. For example, it may be a fixed connection, a detachable connection or an integral connection; it may be a mechanical connection, an electrical connection or a connection capable of mutual communication; it may be directly connected or indirectly connected through an intermediate medium, and it may be the internal communication of two elements or the interaction relationship between two elements. For those of ordinary skill in the art, the specific meanings of the above terms in the present invention can be understood according to specific circumstances.

[0091] In the present invention, unless otherwise clearly defined and limited, the fact that the first feature is "above" or "below" the second feature may include the direct contact between the first and second features, or may include the situation where the first and second features are not in direct contact but in contact through additional features therebetween. Moreover, the fact that the first feature is "above", "over" and "on" the second feature includes that the first feature is directly above and obliquely above the second feature, or merely means that the horizontal height of the first feature is higher than that of the second feature. The fact that the first feature is "below", "under" and "beneath" the second feature includes that the first feature is directly below and obliquely below the second feature, or merely means that the horizontal height of the first feature is lower than that of the second feature.

[0092] The following disclosure provides many different embodiments or examples for implementing different structures of the present invention. To simplify the disclosure of the present invention, the components and settings of specific examples are described below. Of course, they are merely examples and are not intended to limit the present invention. In addition, the present invention may repeat reference numerals and / or reference letters in different examples. This repetition is for the purpose of simplification and clarity and does not itself indicate the relationship between the various embodiments and / or settings discussed. In addition, the present invention provides examples of various specific processes and materials, but those of ordinary skill in the art can be aware of the application of other processes and / or the use of other materials.

[0093] As Figure 1 shown, in an embodiment of the present invention, a back-contact battery includes a substrate 100. In an embodiment of the present invention, the substrate 100 has a front face facing the sun and a back face opposite to the front face during normal operation, and the front face is the light-receiving surface; the back face is provided on the other side of the substrate 100 relative to the front face, that is to say, the above-mentioned front face and back face are located on different sides and opposite sides of the substrate 100. In this embodiment, the substrate 100 is an N-type single-crystalline silicon wafer. It can be understood that in other embodiments, the substrate 100 can also be other types of silicon wafers such as polycrystalline silicon wafers or quasi-single-crystalline silicon wafers, and the type of the substrate 100 can also be set to P-type, which is set according to actual usage needs and is not specifically limited herein.

[0094] Further, in an embodiment of the present invention, the solar cell is a back-contact solar cell. The substrate 100 has a first surface and a second surface. The first surface is the light-receiving surface, and the second surface is provided on the other side of the substrate 100 relative to the first surface, and the second surface is the backlight surface. The second surface includes a plurality of first regions 200 and a plurality of second regions 500, and the first regions 200 and the second regions 500 are arranged at intervals and alternately, but are not limited thereto. In other embodiments, the first regions 200 and the second regions 500 may also occupy the left and right halves of the second surface of the substrate 100 or have other suitable arrangement manners.

[0095] As Figure 1As shown, in some embodiments, one of the first region 200 and the second region 500 is a first doped region, and the other is a second doped region. The first doped region and the second doped region have opposite doping types, and the first doped region and the second doped region are located on the second surface of the substrate 100. In some embodiments, the first region 200 is the first doped region and the second region 500 is the second doped region. For example, the first region 200 is an N-doped region and the second region 500 is a P-doped region. Alternatively, the first region 200 can be set as a P-doped region and the second region 500 can be set as an N-doped region. The present invention does not limit this. The P-doped region and the N-doped region are arranged alternately in an interdigitated pattern. Among them, the first edge 300 can be the side edge on the right side of the substrate 100 or the chamfered edge at the right corner of the substrate 100. The second edge 600 can be the side edge on the left side of the substrate 100 or the chamfered edge at the left corner of the substrate 100. The first spacer region 400 is located between the first edge 300 and the first region 200, and the second spacer region 700 is located between the second edge 600 and the second region 500.

[0096] Exemplarily, the first doped region has the same polarity doping type as the substrate 100, and the second doped region and the substrate 100 have different polarity doping types. Among them, the doping concentration of the first doped region is preferably higher than that of the substrate 100. For example, the substrate 100 is lightly doped, while the second doped region is heavily doped, but it is not limited thereto.

[0097] In some embodiments, the material of the first doped region is preferably set to be the same as that of the substrate 100. That is, when the substrate 100 is a single crystal silicon wafer, its first doped region is also preferably set to be a single crystal silicon wafer, and its first doped region is a doped single crystal silicon layer doped with group III or V elements. At this time, when the second doped region is an N-type doped layer, its second doped region is a doped single crystal silicon layer doped with group V elements such as nitrogen, phosphorus, and arsenic; when the second doped region is a P-type doped layer, its first doped region is a doped single crystal silicon layer doped with group III elements such as boron, aluminum, and gallium. It can be understood that when the substrate 100 is set to other types of silicon wafers, its first doped region can also be correspondingly set to other types of doped silicon wafers doped with group III or V elements.

[0098] In some embodiments, the second doped region can also include a doped polysilicon layer, a doped silicon carbide layer, or a doped amorphous silicon layer. Among them, the doped silicon carbide layer in the second doped region is composed of at least one doped silicon carbide film with different refractive indexes, and the refractive indexes of each doped silicon carbide film decrease sequentially from the substrate 100 outwards.

[0099] Among them, it should be noted that the materials of the first doping region and the second doping region can be the same or different. For example, both the first doping region and the second doping region are doped polysilicon; or the first doping region is doped single crystal silicon and the second doping region is doped silicon carbide, etc. It is set according to actual usage needs and is not specifically limited here.

[0100] Exemplarily, the first doping region is disposed in the first region 200 on the second surface of the substrate 100, while the second doping region is disposed in the second region 500 on the second surface of the substrate 100. The doping regions are generally located in the substrate 100 below the second surface of the substrate 100. In addition, the first doping region and the second doping region are isolated from each other. Exemplarily, an isolation region is provided between the first doping region and the second doping region. In a general implementation manner in the prior art, the isolation region is the exposed substrate 100 without metal gate lines covering it, and a passivation layer is generally covered on the isolation region. The isolation region can be realized by etching or masking processes. Through the setting of the isolation region, the first doping region and the second doping region can be isolated from each other to avoid causing P / N region short circuit. A first electrode is provided in the first doping region, and a second electrode is provided in the second doping region. One of the first electrode and the second electrode is used as the positive electrode of the solar cell, and the other is used as the negative electrode of the solar cell. Therefore, the positive and negative electrodes of the solar cell are both located on the back side of the cell, that is, on the second surface opposite to the light-receiving side first surface.

[0101] Generally speaking, the battery edge is prone to microcracks and defects due to factors such as cutting, becoming a recombination center for minority carriers (such as holes or electrons). By providing an isolation region (such as formed by laser etching or wet etching) between the battery edge and the doping region, the transmission of carriers from the working region to the battery edge can be blocked, reducing recombination losses. And during the battery manufacturing process, the battery edge is prone to metal material overplating due to process problems (such as sputtering, electroplating), forming a conductive path, thus causing a short circuit. Or, the battery edge is prone to overplating. If not isolated, an unexpected PN junction region may be formed, resulting in leakage current. Therefore, the structural design of the isolation region at the battery edge can block these conductive paths. As Figure 2 、 Figure 3 shown, in some embodiments, the first region 200 and the first edge 300 of the substrate 100 are spaced apart to form a first spacer region 400. In the direction away from the first edge 300 of the substrate 100, the first spacer region 400 has a textured structure with different morphologies.

[0102] It should be noted that the first edge 300 in the embodiments of the present invention can be the side edge of the substrate 100 or the chamfered edge at the corner of the substrate 100. As described above, the first spacer 400 in the embodiments of the present invention is different from the isolation region in the general implementation manner in the prior art. There are at least two texture structures with different morphologies in the first spacer 400, and the different morphologies of the texture structures affect the carrier transmission path, the electric field distribution, or the defect density, thereby affecting the leakage current. In the embodiments of the present invention, by optimizing the morphology of the texture structure in the first spacer 400 to make it show distinguishable differences, different texture structures are more suitable for the coverage of the surface passivation layer, reducing the surface state density, thereby reducing surface recombination and leakage. The change in the morphology of the texture structure will expand the effective width of the spacer or change the carrier path, thereby enhancing the isolation effect. Exemplarily, rougher textures can increase carrier scattering, reduce the lateral conductivity, and reduce the leakage current; while smoother textures can change the local electric field distribution and optimize the carrier collection efficiency. For another example, the part of the first spacer 400 close to the edge of the substrate 100 is a larger pyramid-like structure, and the part far from the edge is a smaller inverted pyramid or random texture. The larger structure can provide better mechanical support and passivation at the edge, while the smaller structure optimizes light absorption and carrier collection in the internal region, and at the same time reduces the leakage path as a whole.

[0103] Furthermore, as Figure 3 shown, the first spacer 400 includes a first texture region 401 and a second texture region 402. The first texture region 401 has a first texture structure 403, and the second texture region 402 has a second texture structure 404. The first texture structure 403 and the second texture structure 404 have different morphologies. In the embodiments of the present invention, the first spacer 400 has at least two texture structures with different morphologies. The cooperation of the two texture structures with different morphologies can, on the one hand, improve the light trapping effect in the spacer and increase the light absorption rate. In addition, the texture structures with different morphologies can disperse the electric field concentration at the edge of the PN junction, avoid local breakdown, reduce the leakage current, and can change the geometric shape at the edge of the PN junction, optimize the local electric field distribution, so as to achieve the effect of strengthening the PN isolation, ultimately improving the photovoltaic conversion efficiency of the battery and the reliability of the component.

[0104] It should be noted that the different morphologies of the texture structures mentioned in the embodiments of the present invention refer to the different appearance shapes of the texture structures. Exemplarily, the first spacer 400 has a pyramid-like texture structure and an inverted pyramid texture structure. The pyramid-like and inverted pyramid are two texture structures with different morphologies. In some embodiments, the first spacer 300 can also have a texture structure between the pyramid-like and inverted pyramid structures.

[0105] Preferably, the first texture structure 403 includes a convex structure. Specifically, the shape of the convex structure includes a quasi-pyramid type and / or a truncated pyramid type. In the embodiments of the present invention, the quasi-pyramid type can extend the optical path through multiple reflections, significantly reducing the surface reflectivity, especially enhancing the short-wave absorption. The directional edges of the truncated pyramid type can guide the light to propagate obliquely, improving the absorption efficiency of long-wavelength light and reducing the transmission loss. The first texture structure 403 can be a single quasi-pyramid type or truncated pyramid type, or a combination of the quasi-pyramid type and the truncated pyramid type, or other irregularly shaped convex structures, and the present invention does not limit this.

[0106] As Figure 8 shown, in some embodiments, the convex structure array is a plurality of sequentially arranged quasi-pyramids and / or truncated pyramids, that is, the convex structure array is a plurality of sequentially arranged quasi-pyramids or a plurality of sequentially arranged truncated pyramids, or a combination of a plurality of quasi-pyramids and a plurality of truncated pyramids. The above-mentioned various types of convex structures are arranged in the first texture region 401 to form the first texture structure 403. Specifically, the longitudinal cross-sectional shape of the convex structure is at least one of a triangle and an irregular quadrilateral.

[0107] Further, the interval between the vertices of adjacent convex structures is 0.5 - 3 μm. In such an embodiment, the interval between the vertices of adjacent convex structures can be 0.5 μm, 0.8 μm, 1 μm, 1.5 μm, 1.8 μm, 2 μm, 2.5 μm, 2.8 μm, 3 μm, or any value between 0.5 - 3 μm, and specifically, this is not limited here. When the interval between the vertices of adjacent convex structures is within this range, the light undergoes multiple reflections between the convex structures, reducing the surface reflectivity to less than 5%, especially enhancing the absorption of near-infrared light. And the interval between the vertices of adjacent convex structures within this range ensures that the sidewall spacing of the convex structures is large enough, enabling the passivation material (such as Al2O3, SiN x ) to form a continuous and defect-free coverage through atomic layer deposition (ALD) or plasma-enhanced chemical vapor deposition (PECVD), reducing the surface state density and reducing the interface recombination.

[0108] Further, the height of the convex structure along the thickness direction of the back-contact battery is 0.2 - 2 μm. In such an embodiment, the height of the convex structure along the thickness direction of the back-contact battery can be 0.2 μm, 0.8 μm, 1 μm, 1.5 μm, 1.8 μm, 2 μm, or any value between 0.2 - 2 μm, and specifically, this is not limited here. When the height of the convex structure along the thickness direction of the back-contact battery is within this range, it can cover a wider spectral range, disrupt the periodic interference reflection, and achieve low reflection in the full band. And within this height range, it is beneficial for the passivation layer to be deposited by atomic layer deposition, achieving high coverage, reducing the surface state density, and suppressing the interface recombination.

[0109] The second texture structure 404 includes a concave structure. Specifically, the shape of the concave structure includes a pit, and an inverted pyramid-like structure and / or a hole structure provided in the pit. In an embodiment of the present invention, the inverted pyramid structure in the pit can form "secondary light trapping", and the light is reflected multiple times in the pit, further improving the light trapping ability. The nano-scale holes trigger the light localization effect and enhance the absorption of a specific wavelength band (such as near-infrared light). Similarly, the second texture structure 404 can be a single pit, an inverted pyramid-like structure provided in the pit, a hole structure, or a combination of the above different types of concave structures. The present invention does not limit this.

[0110] As Figure 4 shown, on the one hand, the above-mentioned various types of convex structures and various types of concave structures are combined to form a multi-level light trapping structure. On the other hand, the convex structure focuses on the efficient separation and transport of carriers, and the concave structure focuses on interface passivation. The combination of the two realizes the "transport-passivation" partition optimization and improves the overall carrier lifetime. Moreover, the pyramid-like or frustum-like convexities form a "microscopic barrier" in the spacer region, increasing the lateral distance between the p-region and the n-region, blocking the leakage path, reducing the edge leakage current. The inverted pyramid structure in the pit can disperse the concentration of the edge electric field and avoid local breakdown. The convex structure blocks the lateral leakage, and the concave structure optimizes the longitudinal electric field distribution. The combination of the two realizes the leakage suppression. In addition, the passivation layer (such as Al2O3) deposited in the concave structure is more likely to form a uniform coverage, reducing the surface state density and suppressing the interface recombination.

[0111] As Figure 5 and Figure 6 shown, in some embodiments, the second region 500 and the second edge 600 of the substrate 100 are spaced apart to form a second spacer region 700. In the direction away from the second edge 600 of the substrate 100, the second spacer region 700 has texture structures with different morphologies. It should be noted that the second edge 600 in the embodiment of the present invention can be the side edge of the substrate or the chamfered edge at the corner of the substrate. The second region 500 and the first region 200 are two doping regions of different doping types. The first edge 300 and the second edge 600 are oppositely arranged on the back contact battery. That is to say, in the direction where the first region 200 and the second region 500 are arranged at intervals, the spacer regions at both side edges of the substrate 100 have texture structures with different morphologies to achieve the effect of strengthening the PN isolation and reducing the leakage. As for the specific setting of the different texture structures in the second spacer region 700, it is the same as the situation of the different texture structures with different morphologies in the first spacer region 400 described above and will not be elaborated here.

[0112] In some embodiments, the first spacer 400 has a textured surface. The textured surface within the first spacer 400 is generally formed by texturing, including but not limited to an alkaline polished surface, a mechanical polished surface, a random pyramid shape, an inverted pyramid shape, a spherical crown shape, a V-groove shape, and morphologies between the above-mentioned morphologies. It can generally form irregular hemispherical textures during acid texturing, form pyramid textures during alkaline texturing, or first form pyramid textures during alkaline texturing and then smooth the pyramid tips through acid texturing. The specific morphology of the textured surface can be set according to the actual production process requirements, and the present invention does not limit this.

[0113] In some embodiments, the second spacer 700 has a textured surface. The textured surface within the second spacer 700 is generally formed by texturing, including but not limited to an alkaline polished surface, a mechanical polished surface, a random pyramid shape, an inverted pyramid shape, a spherical crown shape, a V-groove shape, and morphologies between the above-mentioned morphologies. It can generally form irregular hemispherical textures during acid texturing, form pyramid textures during alkaline texturing, or first form pyramid textures during alkaline texturing and then smooth the pyramid tips through acid texturing. The specific morphology of the textured surface can be set according to the actual production process requirements, and the present invention does not limit this.

[0114] The above-mentioned textured surface is generally used in solar cells to reduce light reflection and increase light absorption, that is, the so-called light trapping effect. For example, surface texturing within the spacer can cause incident light to be reflected multiple times on the surface, increasing the optical path and improving the absorption efficiency.

[0115] Such as Figure 4As shown, in some embodiments, within a unit area, the number of first texture structures 403 in the first texture region 401 is greater than the number of second texture structures 404 in the second texture region 402. In the embodiments of the present invention, the unit area can be a region of any size, preferably one that facilitates counting the number of texture structures within the texture region. Exemplarily, the unit area can be selected as 10×10 μm, 20×20 μm, or 30×30 μm, etc. The present invention places no limitation on this. The large number of first texture structures 403 enhances light absorption, provides more carrier transport paths, can shorten the lateral diffusion distance of carriers, and reduces the probability of bulk recombination. The second texture structures 404 preferentially deposit high-quality passivation layers to suppress interface recombination. The second texture structures 404 are distributed at the edges of the battery, dispersing the edge electric field intensity and reducing the leakage current density. The large number of first texture structures 403 mainly enhances light absorption and carrier collection, while the smaller number of second textures optimizes passivation and electric field distribution, thereby improving the overall battery efficiency. At the same time, the smaller number of second texture structures 404 can retain part of the PN junction and passivation layer within the second texture region 402, enabling this region to play a role in partial optical conversion, ultimately improving the photoelectric conversion efficiency of the battery and enhancing the reliability of the component.

[0116] As Figure 9 shown, in some embodiments, a plurality of concave structures are distributed in the second texture region 402 in an island-like manner. In an alternative manner, the plurality of concave structures are distributed in a dispersed manner within the second texture region 402. It can be understood that, in an alternative manner, the maximum diagonal lengths of the concave structures are widely distributed, with both smaller concave structures and larger-sized concave structures existing. The maximum diagonal length of a single concave structure is preferably less than 3 microns, and the maximum diagonal length of a single concave structure is preferably greater than 0.2 microns. The maximum diagonal length of the concave structures in the second texture region 402 is preferably greater than or equal to 0.2 microns and less than or equal to 3 microns. For example, the maximum diagonal lengths are 0.2 microns, 0.3 microns, 0.8 microns, 1.2 microns, 1.6 microns, or 3 microns, etc. The maximum diagonal of the above-mentioned concave structure is the maximum line segment length passing through the concave structure. In the embodiments of the present invention, as isolated scattering units, when the size of the concave structures matches the wavelength of the incident light, Mie resonance is excited, enhancing the local light field intensity, especially improving the absorption efficiency in the near-infrared band. The light undergoes multiple reflections within the concave structures, forming an "optical trap", extending the optical path and reducing transmission loss, especially enhancing the utilization rate of long-wavelength light. The concave structures are dispersedly distributed in high electric field regions (such as the edges of the PN junction), and the electric field concentration is dispersed through morphological perturbation, reducing the risk of local breakdown and decreasing the leakage current density. Preferably, the concave structures are in the shape of irregular pits and are randomly distributed in the second texture region 402.

[0117] Further, the depression depth of the depression structure on the surface of the back-contact battery body in the thickness direction of the back-contact battery is 0.1-2 μm. In such an embodiment, the height of the depression structure in the thickness direction of the back-contact battery can be 0.1 μm, 0.8 μm, 1 μm, 1.5 μm, 1.8 μm, 2 μm or any value between 0.1 and 2 μm, and specific values are not limited herein. When the height of the depression structure in the thickness direction of the back-contact battery is within this range, a wider spectral range can be covered, periodic interference reflection can be destroyed, and low reflection in the full wavelength range can be achieved. And within this depth range, it is beneficial for the passivation layer to achieve high coverage through atomic layer deposition, reduce the surface state density, and suppress interface recombination.

[0118] In some embodiments, the first region 200 is set as a polished surface structure. The polished surface structure has extremely low roughness, enabling the passivation layer to achieve atomic-level dense coverage, reducing the surface state density, significantly suppressing carrier interface recombination, decreasing the surface recombination velocity, and increasing the open-circuit voltage. Moreover, the polished surface structure provides a flat substrate 100 for electrode metallization (such as screen printing silver paste, copper plating), reduces voids or defects at the contact interface, decreases the contact resistance, and increases the fill factor. In addition, the polished surface can reflect the unabsorbed light to the front active layer, extend the optical path, and improve the photoelectric conversion efficiency of the battery.

[0119] In some embodiments, the second region 500 is set as a polished surface structure. The polished surface structure has extremely low roughness, enabling the passivation layer to achieve atomic-level dense coverage, reducing the surface state density, significantly suppressing carrier interface recombination, decreasing the surface recombination velocity, and increasing the open-circuit voltage. Moreover, the polished surface structure provides a flat substrate 100 for electrode metallization (such as screen printing silver paste, copper plating), reduces voids or defects at the contact interface, decreases the contact resistance, and increases the fill factor. In addition, the polished surface can reflect the unabsorbed light to the front active layer, extend the optical path, and improve the photoelectric conversion efficiency of the battery.

[0120] In some embodiments, as Figure 1 shown, the first spacer region 400 is formed at the corner of the substrate 100 and / or on the side edge of the substrate 100 close to the corner, and the second spacer region 700 is formed at the corner of the substrate 100 and / or on the side edge of the substrate 100 close to the corner. The corners and the side edges of the substrate 100 close to the corners are prone to wear and scratches, which are weak areas of the substrate 100. Setting the spacer regions at the corners and / or the side edges of the substrate 100 close to the corners is beneficial for targeted strengthening to achieve the effect of enhancing PN isolation and reducing the leakage effect.

[0121] In some embodiments, the maximum distance d of the first texture region 401 in the direction perpendicular to the first edge 300 and pointing towards the center of the back-contact battery is 5 μm to 500 μm. That is to say, the width of the first texture region 401 (in the direction perpendicular to the first edge 300 and pointing towards the center of the back-contact battery) can be adjusted within a relatively large range, and the functional role of the first texture region 401 can be satisfied, reducing the difficulty and precision requirements of the production process. Exemplarily, the maximum distance of the first texture region 401 in the direction perpendicular to the first edge 300 and pointing towards the center of the back-contact battery can be 5 μm, 10 μm, 15 μm, 50 μm, 100 μm, 200 μm, 500 μm, etc., and the present invention is not limited thereto.

[0122] In some embodiments, such as Figure 10 , Figure 11 and Figure 12 shown, since the first edge 300 can be the side edge of the substrate 100 or the chamfered edge at the corner of the substrate 100, the maximum distance d of the first texture region 401 in the direction perpendicular to the first edge 300 and pointing towards the center of the back-contact battery being 5 μm to 500 μm can refer to the maximum distance of the first texture region 401 in the direction perpendicular to the chamfered edge at the corner of the substrate 100 and pointing towards the center of the back-contact battery being 5 μm to 500 μm, or can refer to the maximum distance d of the first texture region 401 in the direction perpendicular to the side edge of the substrate 100 and pointing towards the center of the back-contact battery being 5 μm to 500 μm. In addition, it can also refer to the maximum distance d of the first texture region 401 in the direction perpendicular to the connection position or adjacent position of the chamfered edge and the side edge of the substrate 100 and pointing towards the center of the back-contact battery being 5 μm to 500 μm, and the present invention is not limited thereto.

[0123] In some embodiments, the maximum distance of the second texture region 402 in the direction perpendicular to the first edge 300 and pointing towards the center of the back-contact battery is 5 μm to 500 μm. That is to say, the width of the second texture region 402 (in the direction perpendicular to the first edge 300 and pointing towards the center of the back-contact battery) can be adjusted within a relatively large range, and the functional role of the second texture region 402 can be satisfied, reducing the difficulty and precision requirements of the production process. Exemplarily, the maximum distance of the second texture region 402 in the direction perpendicular to the first edge 300 and pointing towards the center of the back-contact battery can be 5 μm, 10 μm, 15 μm, 50 μm, 100 μm, 200 μm, 500 μm, etc., and the present invention is not limited thereto.

[0124] The specific setting method of the maximum distance of the second texture region 402 in the direction perpendicular to the first edge 300 and pointing towards the center of the back-contact battery being 5 μm to 500 μm can refer to the first texture region 401 and will not be elaborated herein.

[0125] In some embodiments, the sum of the maximum distances of the first texture region 401 and the second texture region 402 along the direction perpendicular to the first edge 300 and pointing to the center of the back-contact battery is 10 μm to 1000 μm. That is, the maximum distance of the first spacer region 400 along the direction perpendicular to the first edge 300 and pointing to the center of the back-contact battery is 10 μm to 1000 μm. That is to say, the sum of the widths of the first texture region 401 and the second texture region 402 (in the direction perpendicular to the first edge 300 and pointing to the center of the back-contact battery) can be adjusted within a relatively large range, and all can meet the functional requirements of the spacer region, reducing the production process difficulty and precision requirements. Exemplarily, the sum of the maximum distances of the first texture region 401 and the second texture region 402 along the direction perpendicular to the first edge 300 and pointing to the center of the back-contact battery can be 10 μm, 20 μm, 50 μm, 100 μm, 200 μm, 500 μm, 1000 μm, etc., and the present invention is not limited thereto.

[0126] For the specific setting method of the sum of the maximum distances of the first texture region 401 and the second texture region 402 along the direction perpendicular to the first edge 300 and pointing to the center of the back-contact battery, reference can be made to the first texture region 401, and details are not described herein again.

[0127] Based on the widths of the above-mentioned first texture region 401, second texture region 402, and the sum of the widths of the first texture region and the second texture region (the width of the first spacer region 401) and the electrical performance data of the corresponding battery are shown in the following table:

[0128]

[0129] As can be seen from the above table, comparing group 2 with group 1, when the values of the above-mentioned regions are set within the scope of the embodiments of the present application, all the performance parameters of the battery are greatly improved. After the first isolation region 400 becomes larger, the parallel resistance of the battery is significantly increased, and the leakage recombination is greatly reduced, so that the conversion efficiency of the final component is significantly improved;

[0130] Comparing group 3 with group 2, as the first isolation region 400 continues to become larger, the electrical performance parameters of the battery continue to improve, but the improvement amplitude becomes smaller; the widths of the first spacer regions 400 of group 3 and group 4 are the same, and the widths of the first texture region 401 and the second texture region 402 are different. From the comparison of the electrical performance, when the width of the second texture region 402 is greater than the width of the first texture region 401, the parallel resistance of the battery is significantly increased, and other parameters are improved to varying degrees;

[0131] In addition, on the premise of the same width of the first spacer 400, the overall conversion efficiency is higher when the width of the second texture region 402 is larger, and the shunt resistance is higher, resulting in a significant increase in the fill factor. This is because the second texture region 402 has both a passivation film and a partial inverted pyramid structure, taking into account both surface passivation and light absorption, thereby increasing both the open-circuit voltage and the current. Comparing Group 5 and Group 6, as the width of the first spacer 400 continues to increase, the shunt resistance does not increase significantly, the current remains basically unchanged, while the open-circuit voltage Voc and the fill factor FF decrease significantly. This is because the area of the polysilicon passivation film decreases, reducing the passivation effect, and at the same time, the first spacer 400 extends under the metal gate, increasing the metal contact recombination.

[0132] From the experimental results, the wider the width of the first spacer 400, the higher the shunt resistance and the better the isolation effect, which helps to improve the conversion efficiency. However, this effect no longer increases after the width of the first spacer 400 reaches a certain level; under the condition of the same width of the first spacer 400, the battery has a higher conversion efficiency when the width of the second texture region 402 is larger. Preferably, the width of the first spacer 400 is 150 - 300 um, and it is best that the width of the first texture region 401 is less than the width of the second texture region 402.

[0133] In some embodiments, the second spacer 700 includes a third texture region 701 and a fourth texture region 702. The third texture region 701 has a third texture structure 703, and the fourth texture region 702 has a fourth texture structure 704. The morphologies of the third texture structure 703 and the fourth texture structure 704 are different. In the embodiments of the present invention, the second spacer 700 has at least two texture structures with different morphologies. The cooperation of the two texture structures with different morphologies can, on the one hand, improve the light trapping effect in the spacer and increase the light absorption rate. In addition, the texture structures with different morphologies can disperse the electric field concentration at the edge of the PN junction, avoid local breakdown, reduce the leakage current, and can change the geometric shape at the edge of the PN junction to optimize the local electric field distribution, so as to achieve the effect of strengthening the PN isolation, ultimately improving the photovoltaic conversion efficiency of the battery and enhancing the reliability of the module. In some embodiments, there can also be a texture structure between the quasi-pyramid and inverted pyramid structures in the second spacer 700.

[0134] In some embodiments, the third texture structure 703 includes a convex structure. The specific situation regarding the setting of the third texture structure 703 is the same as the description of the first texture structure 403, and will not be elaborated here.

[0135] In some embodiments, the fourth texture structure 704 includes a concave structure. The specific situation regarding the setting of the fourth texture structure 704 is the same as the description of the second texture structure 404, and will not be elaborated here.

[0136] In some embodiments, when the first region 200 is a P-type doped region and the second region 500 is an N-type doped region, the area of the second texture region 402 is smaller than the area of the fourth texture region 702. The second texture region 402 and the fourth texture region 702 can be regarded as formed by secondary etching, which are new morphological features formed by etching the original doped region. Therefore, the isolation region is enlarged and the isolation performance is enhanced. Since there is a doped layer containing a first doping source in the N-type doped region, the first doping source is N-type doped polysilicon or N-type doped microcrystalline silicon or N-type doped amorphous silicon, such as N-type doped polysilicon (N-poly), and there are also a doped layer containing a first doping source and a doped layer containing a second doping source in the P-type doped region. The second doping source is a P-type doped polysilicon layer or a P-type doped microcrystalline silicon layer or a P-type doped amorphous silicon layer, such as a P-type doped polysilicon layer (P-poly). Under the same etching process conditions, the area of the region formed in the second texture region 402 near the P-type doped region is smaller than the area of the region in the fourth texture region 702 near the N-type doped region. Of course, under the control of the etching process conditions, it is also possible to make the areas of the second texture region 402 and the fourth texture region 702 equal or the area of the second texture region 402 larger than the area of the fourth texture region 702. The present invention does not make any restrictions. In addition, the first region 200 can be set as an N-type doped region and the second region 500 can be set as a P-type doped region. At this time, the area of the second texture region 402 is larger than the area of the fourth texture region 702. Of course, under the control of the etching process conditions, it is also possible to make the areas of the second texture region 402 and the fourth texture region 702 equal or the area of the second texture region 402 smaller than the area of the fourth texture region 702. The present invention does not make any restrictions.

[0137] In some embodiments, the surface of the first texture region 401 is covered with a passivation layer. Preferably, the passivation layer is composed of one or more of an oxide layer, a nitride layer, a nitroxide layer, a carbide layer, and an amorphous silicon layer. As some examples of the present invention, for example, its passivation layer can be made of a single material, or a combination of multiple materials, or a combination of multiple layers of different refractive index film layers of a single material. It can be understood that the specific structural arrangement of its passivation layer includes but is not limited to the several ways listed above, and it is set accordingly according to actual use needs, and no specific limitation is made here. The setting of the passivation layer neutralizes the dangling bonds on the surface of the texture region, passivates the defects of the texture region well, and reduces the recombination centers.

[0138] For example, the passivation layer can be composed of one or more of a titanium dioxide layer, a zinc oxide layer, a silicon oxide layer, an aluminum oxide layer, silicon nitride, and silicon oxynitride. Further, the advantages of using one or more of a titanium dioxide layer, a zinc oxide layer, a silicon oxide layer, an aluminum oxide layer, silicon nitride, and silicon oxynitride to form the passivation layer are as follows: The titanium dioxide (TiO2) layer has a relatively high refractive index (about 2.4%), and can be used as an antireflection layer to improve the light absorption rate. The zinc oxide (ZnO) layer is a transparent conductive material that can simultaneously improve the light transmittance and the conductivity. At the same time, zinc oxide has a relatively low refractive index (about 2.0%), which can reduce the light reflection. The silicon dioxide (SiO2) layer has stable insulating properties, can prevent charge leakage, and has a mature preparation process, and is easily prepared by mature processes such as thermal oxidation. The aluminum oxide (Al2O3) layer has a relatively high breakdown voltage and can operate stably under high voltage. At the same time, aluminum oxide has excellent insulating properties, which can further improve the reliability of the device.

[0139] Specifically, the passivation layer can be a titanium dioxide layer, can be a zinc oxide layer, can be a silicon oxide layer, can be an aluminum oxide layer, or can be composed of a titanium dioxide layer and a zinc oxide layer together, or can be composed of a zinc oxide layer, a silicon oxide layer, and an aluminum oxide layer together, or can also be other combination methods of at least any two of a titanium dioxide layer, a zinc oxide layer, a silicon oxide layer, an aluminum oxide layer, a silicon nitride layer, and a silicon oxynitride layer, which are not limited herein.

[0140] Further, the second texture region 402 further includes a doping layer, and the doping layer includes at least one of a first doping layer and a second doping layer, and the doping sources in the first doping layer and the second doping layer are different. Specifically, one of the first doping layer and the second doping layer contains a first doping source, and the other contains a second doping source. The first doping source is N-type doped polysilicon or N-type doped microcrystalline silicon or N-type doped amorphous silicon. Specifically, the first doping source can be phosphorus, and the first doping source is a phosphorus-doped polysilicon layer or a phosphorus-doped microcrystalline silicon layer or a phosphorus-doped amorphous silicon layer. The first doping source can also be any one of group V elements such as nitrogen, phosphorus, and arsenic, and the present invention does not limit this. Setting the first doping source as an N-type doped polysilicon layer or an N-type doped microcrystalline silicon layer or an N-type doped amorphous silicon layer can form a barrier effect, provide field passivation, improve the metal electrode contact, achieve carrier transport selectivity, and extend the minority carrier lifetime, which can significantly improve the performance and efficiency of the battery.

[0141] The second doping source is a P-type doped polysilicon layer, or a P-type doped microcrystalline silicon layer, or a P-type doped amorphous silicon layer. Specifically, the second doping source may be boron, and the second doping source is a boron-doped polysilicon layer, or a boron-doped microcrystalline silicon layer, or a boron-doped amorphous silicon layer. Setting the second doping source as a P-type doped polysilicon layer, or a P-type doped microcrystalline silicon layer, or a P-type doped amorphous silicon layer can form a barrier effect, provide field passivation, improve metal electrode contact, achieve carrier transport selectivity, and extend the minority carrier lifetime, thus significantly improving the performance and efficiency of the battery. The present invention does not limit this.

[0142] When the edge region of the battery is easily scratched and worn, resulting in a poor PN isolation effect in the edge region, micro-leakage problems are caused, and the possibility of short circuit is increased. It is necessary to set a texture structure with different morphologies between the doped region and the edge of the substrate 100. That is, for example, the first spacer region 400 includes a first texture region 401 and a second texture region 402, and the second spacer region 700 includes a third texture region 701 and a fourth texture region 702 to enhance the isolation effect of the PN region and achieve the purpose of improving the photoelectric conversion efficiency of the battery. In the prior art, there is generally only one texture structure in the edge region of the battery, that is, the first texture structure 403 or the third texture structure 703.

[0143] In order to improve the problems caused by only setting one texture structure in the edge region of the battery in the prior art, the present invention performs secondary etching on the edge region to enhance the isolation effect of the PN region and achieve the purpose of improving the photoelectric conversion efficiency of the battery. The method of secondary etching is wet etching and texturing of the silicon wafer. For example, when wet etching the first surface of the silicon wafer to remove the first doping layer (such as N-poly) and the second doping layer (such as P-poly) on the first surface (light-receiving surface) to expose the surface of the silicon wafer for subsequent texturing, the etching solution can be an alkaline solution or an acidic solution, such as an alkaline solution such as potassium hydroxide (KOH), sodium hydroxide (NaOH), a mixed solution of various alkaline solutions, or an acidic solution such as hydrofluoric acid (HF), nitric acid (HNO), a mixed solution of various acidic solutions. When performing wet etching, the concentration of the alkaline solution or acidic solution, the reaction time, and the reaction temperature can be controlled to meet the actual requirements.

[0144] When wet etching the first surface of the silicon wafer, some alkaline or acidic solutions may flow to the four corners of the silicon wafer near the P-doped region and the N-doped region. Some regions of the P-doped region and the N-doped region will further react to form textured structures with different morphologies, thereby widening the spacer region formed by the edge spacing between the doped region near the edge region and the substrate 100. In order to form textured structures with different morphologies, this effect can be achieved by controlling the immersion depth, reaction rate, etc. of the first surface of the silicon wafer in the alkaline or acidic solution. Then, texturing is performed on the first surface of the silicon wafer. During the texturing process, an alkaline solution, an acidic solution, or a combination of both can be used to form a textured surface on the first surface of the silicon wafer, reducing light reflection and enhancing light trapping ability, thereby improving the photoelectric conversion efficiency of the battery.

[0145] In some embodiments, a thick mask can also be directly formed on the second surface (backlight surface) of the silicon wafer where secondary etching is not required. The mask can be a phosphorus-doped silicon oxide layer, which is a phosphosilicate glass layer (PSG layer), or a boron-doped silicon oxide layer, which is a borosilicate glass layer (BSG layer). No mask is formed at the positions where etching is required, that is, at the four corners of the silicon wafer near the P-doped region and the N-doped region. An etching solution is directly used to etch it to form an isolation region with widened textured structures of different morphologies. The present invention does not limit this.

[0146] Due to possible differences in the solution volume, reaction rate, reaction temperature, reaction time, etc. at different positions during the secondary etching process, and there are originally some masks (such as PSG layer or BSG layer) at the positions of the four corners of the silicon wafer near the P-doped region and the N-doped region. Therefore, at the positions where the mask of the doped region near the corners is thin, it is more likely to be etched to form convex structures, such as pyramid-like and / or frustum-like shapes. At the positions where the mask is thick, it is less likely to be etched to form concave structures, such as pits and inverted pyramid-like structures and / or hole structures provided in the pits.

[0147] Part of the surface of the second texture region 402 is also covered with a passivation layer. Preferably, the passivation layer is composed of one or more of an oxide layer, a nitride layer, a nitroxide layer, a carbide layer, and an amorphous silicon layer. As some examples of the present invention, for example, the passivation layer can be made of a single material, or a combination of multiple materials, or a combination of multiple layers of different refractive index film layers of a single material. It can be understood that the specific structural arrangement of the passivation layer includes but is not limited to the several ways listed above, and it is set accordingly according to actual usage needs, and no specific limitation is made here. The setting of the passivation layer neutralizes the dangling bonds on the surface of the texture region, passivates the defects in the texture region well, and reduces the recombination centers. It can be understood that the surfaces of the third texture region 701 and the fourth texture region 702 are also covered with a passivation layer to achieve surface passivation of the above texture regions. The specific composition method refers to the above examples and will not be elaborated here.

[0148] Since there are still part of the passivation layer, part of the PN junction and the passivation layer in the second texture region 402 and the fourth texture region 702, this region can play an optical conversion role, ultimately improving the photoelectric conversion efficiency of the battery and the reliability of the component.

[0149] In some embodiments, a battery module includes the above-mentioned back-contact battery. Based on the above-mentioned solar cell, those skilled in the art know that by using multiple such solar cells and / or other corresponding existing accessories, the corresponding battery module can be obtained.

[0150] In this embodiment, multiple solar cells in the battery module can be connected in series in sequence to form a battery string, so as to achieve the series connection and current output of the current. For example, the connection of the battery chips can be achieved by setting solder tapes (bus bars, interconnection bars), conductive backplanes, etc. It can be understood that in such an embodiment, the battery module may further include a metal frame, a backplane, a photovoltaic glass, and a glue film. The glue film can be filled between the front and back of the back-contact battery, the photovoltaic glass, adjacent battery chips, etc. As a filler, it can be a transparent colloid with good light transmission performance and aging resistance. For example, the glue film can use an EVA glue film or a POE glue film, and the specific selection can be made according to the actual situation and is not limited here.

[0151] In some embodiments, a photovoltaic system includes the above-described battery components. In this embodiment, the photovoltaic system can be applied in a photovoltaic power station, such as a ground power station, a rooftop power station, a water surface power station, etc., or can also be applied to devices or apparatuses that use solar energy for power generation, such as a user solar power supply, a solar street lamp, a solar vehicle, a solar building, and so on. Of course, it can be understood that the application scenarios of the photovoltaic system are not limited to this, that is to say, the photovoltaic system can be applied in all fields that require solar power generation. Taking the photovoltaic power generation system network as an example, the photovoltaic system can include a photovoltaic array, a busbar box, and an inverter. The photovoltaic array can be an array combination of multiple battery components. For example, multiple battery components can form multiple photovoltaic arrays. The photovoltaic arrays are connected to the busbar box, and the busbar box can collect the current generated by the photovoltaic arrays. After the collected current flows through the inverter and is converted into alternating current required by the mains power grid, it is connected to the mains network to achieve solar power supply.

[0152] In the description of this specification, the description with reference to terms such as "some embodiments", "schematic embodiments", "examples", "specific examples", or "some examples", etc. means that the specific features, structures, materials, or characteristics described in connection with the embodiments or examples are included in at least one embodiment or example of the present invention. In this specification, the schematic representations of the above terms do not necessarily refer to the same embodiments or examples. Moreover, the specific features, structures, materials, or characteristics described can be combined in a suitable manner in any one or more embodiments or examples.

[0153] The foregoing is only a preferred embodiment of the present invention and is not intended to limit the present invention. Any modifications, equivalent replacements, and improvements made within the spirit and principle of the present invention shall be included within the protection scope of the present invention.

Claims

1. A back-contact battery, characterized in that, It includes a substrate, the back surface of the substrate includes a plurality of first regions, the first regions are the first doping regions or the second doping regions, the first regions and the first edge of the substrate are spaced apart to form a first spacing region, and in the direction away from the first edge of the substrate, there are texture structures with different morphologies in the first spacing region.

2. The back-contact battery according to claim 1, characterized in that, The back surface of the substrate further includes a plurality of second regions, the first regions and the second regions are alternately spaced, one of the first regions and the second regions is the first doping region, and the other is the second doping region, and the doping types of the first doping region and the second doping region are opposite.

3. The back-contact battery according to claim 2, characterized in that, The second regions and the second edge of the substrate are spaced apart to form a second spacing region, and in the direction away from the second edge of the substrate, there are texture structures with different morphologies in the second spacing region.

4. The back-contact battery according to claim 3, characterized in that, The first edge and the second edge are oppositely arranged on the back contact battery.

5. The back-contact battery according to claim 1, characterized in that, The first spacing region is a matte surface structure.

6. The back-contact battery according to claim 3, characterized in that, The second spacing region is a matte surface structure.

7. The back-contact battery according to claim 1, wherein The first spacing region includes a first texture region and a second texture region, the first texture region has a first texture structure, the second texture region has a second texture structure, and the first texture structure and the second texture structure have different morphologies.

8. The back-contact battery according to claim 7, wherein Within a unit area, the number of the first texture structures in the first texture region is greater than the number of the second texture structures in the second texture region.

9. The back-contact battery according to claim 7, characterized in that, The first texture structure includes a convex structure.

10. The back contact battery according to claim 9, wherein, The shape of the convex structure includes a quasi-pyramid type and / or a frustum type.

11. The back-contact battery according to claim 10, wherein, The convex structure array is a plurality of quasi-pyramids and / or frustums arranged in sequence, and the longitudinal cross-sectional shape of the convex structure is at least one of a triangle and an irregular quadrilateral.

12. The back-contact battery according to claim 11, characterized in that, The interval between the vertices of adjacent convex structures is 0.5 - 3 μm.

13. The back-contact battery according to claim 11, wherein The height of the convex structure along the thickness direction of the back contact battery is 0.2 - 2 μm.

14. The back-contact battery according to claim 7, characterized in that, The second texture structure includes a concave structure.

15. The back-contact battery according to claim 14, wherein, The shape of the concave structure includes a pit and a quasi-inverted pyramid structure and / or a hole structure provided in the pit.

16. The back-contact battery according to claim 15, characterized in that, A plurality of the concave structures are distributed in an island shape in the second texture region.

17. The back-contact battery according to claim 14, wherein The maximum diagonal length of the concave structure is 0.2 - 3 μm.

18. The back-contact battery according to claim 14, characterized in that, The depth of the concave structure along the thickness direction of the back contact battery on the surface of the back contact battery body is 0.1 - 2 μm.

19. The back-contact battery according to claim 1, characterized in that, The first region is set as a polished surface structure.

20. The back-contact battery according to claim 2, wherein The second region is set as a polished surface structure.

21. The back-contact battery according to claim 1, wherein The first spacing region is formed at the corner of the substrate and / or the side edge of the substrate near the corner.

22. The back-contact battery according to claim 3, wherein, The second spacing region is formed at the corner of the substrate and / or the side edge of the substrate near the corner.

23. The back-contact battery according to claim 7, wherein, The maximum distance of the first texture region along the direction perpendicular to the first edge and pointing to the center of the back contact battery is 5 μm to 500 μm.

24. The back contact battery according to claim 7, wherein The maximum distance of the second texture region along the direction perpendicular to the first edge and pointing to the center of the back contact battery is 5 μm to 500 μm.

25. The back-contact battery according to claim 7, wherein The sum of the maximum distances of the first texture region and the second texture region in a direction perpendicular to the first edge and pointing to the center of the back contact battery is 10 μm to 1000 μm.

26. The back-contact battery according to claim 3, characterized in that, The second spacer includes a third texture region and a fourth texture region. The third texture region has a third texture structure, and the fourth texture region has a fourth texture structure. The third texture structure and the fourth texture structure have different topographies.

27. The back-contact battery according to claim 26, characterized in that, The third texture structure includes a protrusion structure.

28. The back-contact battery according to claim 26, wherein, The fourth texture structure includes a depression structure.

29. The back-contact battery according to claim 26, wherein, When the first region is a P-type doped region and the second region is an N-type doped region, the area of the second texture region is smaller than the area of the fourth texture region.

30. The back-contact battery according to claim 7, characterized in that, The surface of the first texture region is covered with a passivation layer.

31. The back-contact battery according to claim 30, wherein, The passivation layer is composed of one or more of an oxide layer, a nitride layer, a nitroxide layer, a carbide layer, and an amorphous silicon layer.

32. The back contact battery according to claim 7, wherein The second texture region further includes a doping layer, and the doping layer includes at least one of a first doping layer and a second doping layer. The doping sources in the first doping layer and the second doping layer are different.

33. The back-contact battery according to claim 32, wherein, One of the first doping layer and the second doping layer contains a first doping source, and the other contains a second doping source. The first doping source is an N-type doped polysilicon layer or an N-type doped microcrystalline silicon layer or an N-type doped amorphous silicon layer, and the second doping source is a P-type doped polysilicon layer or a P-type doped microcrystalline silicon layer or a P-type doped amorphous silicon layer.

34. The back-contact battery according to claim 32, characterized in that, Part of the surface of the second texture region is also covered with a passivation layer.

35. The back-contact battery according to claim 34, characterized in that, The passivation layer is composed of one or more of an oxide layer, a nitride layer, a nitroxide layer, a carbide layer, and an amorphous silicon layer.

36. A battery assembly, characterized in that, Including the back contact battery according to any one of claims 1 to 35.

37. A photovoltaic system, characterized in that, Including the battery assembly according to claim 36.

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