Display device

Abstract

A display device is provided. The display device includes a display module, the display module including: a base layer in which a module hole is defined; a light-emitting element including a pixel electrode, a counter electrode, and a functional layer disposed on the base layer; a protrusion pattern disposed between the base layer and the pixel electrode and defining a pattern hole; a first insulating layer disposed between the base layer and the protrusion pattern, and defining a first opening overlapping the pattern hole; a second insulating layer disposed between the protrusion pattern and the pixel electrode, and defining a second opening overlapping the pattern hole; and an anti-deposition pattern disposed directly on a bottom surface of the protrusion pattern. The counter electrode is broken by the deposition prevention pattern, and includes a first portion disposed in the first opening and a second portion disposed in the second opening, exhibiting excellent reliability characteristics.

Description

[0001] This patent application claims the priority and benefit of Korean Patent Application No. 10-2024-0007836, filed with the Korean Intellectual Property Office on January 18, 2024, the entire contents of which are incorporated herein by reference. Technical Field

[0002] The disclosure relates to a display device and a method of manufacturing a display device, and more particularly, to a display device having improved reliability and a method of manufacturing a display device. Background Art

[0003] Display devices such as televisions, mobile phones, tablet computers, computers, navigation systems, game consoles, etc. may include a display panel for generating and displaying an image. In addition to the display panel, the display device may include various electronic components including an input sensor for detecting an external input and electronic modules such as a camera, an infrared sensor, or a proximity sensor.

[0004] Recently, in order to provide a larger display area, the electronic module of the display device may be disposed under the display panel, and the display panel is characterized by holes included in the electronic module. In order to enhance the reliability of such a display device, it is necessary to implement a technology for protecting the layer exposed around the holes of the display panel. Summary of the Invention

[0005] The disclosure provides a display device that prevents moisture and other contaminants from penetrating and passing through the electrodes, thereby achieving excellent display quality and improved product reliability.

[0006] The disclosure also provides a method of manufacturing a display device including a disconnected electrode, the disconnected electrode preventing the electrode from serving as a moisture penetration path in the hole region.

[0007] An embodiment provides a display device including: an electronic module; and a display module including a hole region stacked with the electronic module, wherein the display module includes: a substrate layer having a module hole corresponding to the hole region; a light-emitting element including a pixel electrode disposed on the substrate layer, a counter electrode facing the pixel electrode, and a functional layer disposed between the pixel electrode and the counter electrode; a protrusion pattern disposed between the substrate layer and the pixel electrode, forming a pattern hole spaced apart from and surrounding the module hole; a first insulating layer disposed between the substrate layer and the protrusion pattern, having a first opening overlapping with the pattern hole; a second insulating layer disposed between the protrusion pattern and the pixel electrode, having a second opening overlapping with the pattern hole; and an anti-deposition pattern directly disposed on the bottom surface of the protrusion pattern, wherein the counter electrode is disconnected by the anti-deposition pattern and includes a first portion disposed in the first opening and a second portion disposed in the second opening.

[0008] In an embodiment, the bottom surface of the anti-deposition pattern may not be covered by the counter electrode in the first opening.

[0009] In an embodiment, the anti-deposition pattern may include an aromatic hydrocarbon compound. The aromatic hydrocarbon compound may include a core portion containing at least one substituted or unsubstituted aromatic ring and at least one of a fluorine atom and a fluorine substituent bonded to the core portion.

[0010] In an embodiment, the core portion may have a molecular weight less than or equal to about 300 Da and include 1 to 5 substituted or unsubstituted aromatic rings or substituted or unsubstituted heteroaromatic rings, and the fluorine substituent may be represented by where n is an integer greater than or equal to 1 and less than or equal to 9.

[0011] In an embodiment, the aromatic hydrocarbon compound may have a molecular weight greater than or equal to about 500 Da and less than or equal to about 2000 Da.

[0012] In an embodiment, the counter electrode may include an Ag-containing alloy material with a content of greater than or equal to about 98 vol% and no Mg.

[0013] In an embodiment, the pixel electrode may be a reflective electrode, and the counter electrode may be a transmissive electrode or a transflective electrode.

[0014] In an embodiment, the protrusion pattern may include a protruding tip portion that does not overlap with the first insulating layer and the second insulating layer, and the anti-deposition pattern may overlap with the tip portion of the protrusion pattern.

[0015] In an embodiment, the anti-deposition pattern may overlap with the entire protrusion pattern.

[0016] In an embodiment, the display module may further include a packaging layer disposed on the counter electrode, where the packaging layer may include a packaging inorganic layer directly disposed on the counter electrode and the anti-deposition pattern.

[0017] In an embodiment, in a cross-section, the width of the first opening in one direction and the width of the second opening in the same direction may both be greater than the width of the pattern hole in the same direction.

[0018] In an embodiment, a display device includes: an electronic module; and a display module including a hole region stacked with the electronic module and a display region different from the hole region. In the hole region, the display module includes: a substrate layer in which a module hole is defined; a circuit layer disposed on the substrate layer, including a plurality of dam members surrounding the module hole and a groove defined between the dam members; a display element layer disposed on the circuit layer, including an electrode containing Ag; and a packaging layer disposed on the display element layer. The groove includes: a pattern hole defined by a protrusion pattern including a tip portion protruding inward and an anti-deposition pattern directly disposed under the protrusion pattern; a lower opening defined under the pattern hole and stacked with the pattern hole; and an upper opening stacked with the lower opening in the thickness direction, and the electrode can be disposed on the dam members and the groove, and the bottom surface of the anti-deposition pattern can be exposed.

[0019] In an embodiment, the anti-deposition pattern may include an aromatic hydrocarbon compound. The aromatic hydrocarbon compound may include a core portion including at least one substituted or unsubstituted aromatic ring and at least one of a fluorine atom and a fluorine substituent bonded to the core portion. The core portion may have a molecular weight less than or equal to about 300 Da and include 1 to 5 substituted or unsubstituted aromatic rings or substituted or unsubstituted heteroaromatic rings, and the fluorine substituent may be represented by where n is an integer greater than or equal to 1 and less than or equal to 9.

[0020] In an embodiment, the grooves may be provided in plurality, and the packaging layer may include: a first packaging layer covering the plurality of grooves; a second packaging layer disposed on the first packaging layer, stacked with some of the plurality of grooves and not stacked with other grooves; and a third packaging layer disposed on the second packaging layer to cover the plurality of grooves.

[0021] In an embodiment, the first packaging layer may be directly disposed on the bottom surface of the anti-deposition pattern and cover the dam members and the groove.

[0022] In an embodiment, each of the dam members may include a first dam layer defining the lower opening and a second dam layer defining the upper opening and disposed on the first dam layer, and the protrusion pattern may be disposed between the first dam layer and the second dam layer.

[0023] In an embodiment, a method for manufacturing a display device includes the following steps: providing a target substrate including a substrate layer and a preliminary first insulating layer disposed on the substrate layer; forming an anti-deposition pattern on the target substrate using an aromatic hydrocarbon compound including at least one of a fluorine atom and a fluorine substituent; forming a protrusion pattern by stacking the anti-deposition pattern; disposing a preliminary second insulating layer on the protrusion pattern; patterning the preliminary first insulating layer and the preliminary second insulating layer to form a first insulating layer having a first opening defined therein and a second insulating layer having a second opening defined therein; and forming a counter electrode disposed in the first opening and the second opening and disconnected by the anti-deposition pattern.

[0024] In an embodiment, in the step of forming the counter electrode, the counter electrode may not be disposed on the bottom surface of the anti-deposition pattern exposed to the first opening.

[0025] In an embodiment, the step of forming the counter electrode may include disposing an alloy including greater than or equal to about 98 vol% of Ag using a sputtering method.

[0026] In an embodiment, the step of forming the anti-deposition pattern may include coating the aromatic hydrocarbon compound on the target substrate using a vacuum thermal evaporation method. BRIEF DESCRIPTION OF THE DRAWINGS

[0027] The above and other aspects, features, and advantages of the disclosed embodiments will become more apparent from the following description taken in conjunction with the accompanying drawings, in which: Figure 1 is a schematic perspective view of a display device according to the disclosed embodiment; Figure 2 is a schematic exploded perspective view of a display device according to the disclosed embodiment; Figure 3 is a schematic cross-sectional view of a display module according to the disclosed embodiment; Figure 4 is a schematic plan view showing a part of a display module according to the disclosed embodiment; Figure 5 is a schematic cross-sectional view showing a part of a display module according to the disclosed embodiment; Figure 6 is a schematic cross-sectional view showing a part of a display module according to the disclosed embodiment; Figure 7 is Figure 6 a schematic cross-sectional view of the region YY' of Figure 8 is a schematic cross-sectional view showing a part of a display module according to the disclosed embodiment; Figure 9 is Figure 8 a schematic cross-sectional view of the region YY'-1 of Figure 10A is a schematic diagram showing the movement path of moisture or gas in a display module according to the prior art; Figure 10B is a schematic diagram showing the movement path of moisture or gas in a display module according to the disclosed embodiments; Figure 11 is a schematic flowchart showing a method for manufacturing a display device according to the disclosed embodiments; and Figures 12A to 12H is a schematic diagram showing a process in a method for manufacturing a display device according to the disclosed embodiments. DETAILED DESCRIPTION

[0028] The disclosure will now be described more fully hereinafter with reference to the accompanying drawings, in which embodiments are shown. However, the disclosure may be embodied in different forms and should not be construed as limited to the embodiments set forth herein. Rather, these embodiments are provided so that this disclosure will be thorough and complete, and will fully convey the scope of the disclosure to those skilled in the art. The various embodiments need not be exclusive, nor do they limit the disclosure. For example, the specific shapes, configurations, and characteristics of an embodiment may be used or implemented in another embodiment.

[0029] In the drawings, for ease of description and clarity, the sizes, thicknesses, ratios, and dimensions of elements may be exaggerated. The same reference numerals and / or reference signs always refer to the same elements.

[0030] The phrase "in a plan view" means viewing an object from the top, and the phrase "in a schematic cross-sectional view" means viewing a cross-section of an object that is vertically cut from the side. Thus, the expression "in a plan view" used herein may mean a plane defined by a first direction DR1 and a second direction DR2 for viewing an object from the top. A third direction DR3 may be referred to as the "thickness direction".

[0031] It will be understood that when an element (or layer, region, part, etc.) is referred to in the specification as being "formed on", "on", "disposed on", "connected to", or "bonded to" another element, the element (or layer, region, part, etc.) may be directly formed on, directly disposed on, directly connected, or directly bonded to the above-mentioned another element, or an intervening element may be provided therebetween. It will be understood that the terms "connected to" or "bonded to" may include physical (or electrical) connection (or bonding).

[0032] In the specification and claims, for purposes of their meaning and interpretation, the term "and / or" is intended to include any combination of the terms "and" and "or". For example, "A and / or B" can be understood to mean "A, B, or A and B". The terms "and" and "or" may be used in a conjunctive or disjunctive sense and may be understood to be equivalent to "and / or".

[0033] In the specification and claims, for purposes of their meaning and interpretation, the phrase "at least one of..." is intended to include the meaning of "at least one of the group consisting of...". For example, "at least one of A and B" can be understood to mean "A, B, or A and B".

[0034] It will be understood that although the terms "first", "second", etc. may be used herein to describe various elements, these elements should not be limited by these terms. These terms are only used to distinguish one element from another. For example, without departing from the scope of the disclosure, a first element may be referred to as a second element and, similarly, a second element may be referred to as a first element.

[0035] As used herein, unless the context clearly indicates otherwise, the singular forms "a", "an", and "the" are intended to include the plural forms as well.

[0036] For ease of description, spatial relative terms such as "below", "beneath", "under", "above", "on", etc. may be used herein to describe the relationship between one element or component and another element or component as shown in the figures. It will be understood that, in addition to the orientation depicted in the figures, spatial relative terms are intended to encompass different orientations of the device during use or operation. For example, in the case where the device shown in the figures is flipped, a device that is "below" or "beneath" another device may be positioned "above" the other device. Thus, the illustrative term "below" can include both lower and upper positions. The device may also be oriented in other directions and, accordingly, the spatial relative terms may be interpreted differently depending on the orientation.

[0037] When used in this specification, the terms "comprise", "comprising", and / or "include" and variations thereof specify the presence of the stated features, integers, steps, operations, elements, components, and / or groups thereof, but do not preclude the presence or addition of one or more other features, integers, steps, operations, elements, components, and / or groups thereof.

[0038] In the disclosure, when an element is "directly on", "directly connected to", or "directly coupled to" another element, no intervening element exists. For example, "directly on" can mean that two layers or two elements are disposed without additional elements (such as adhesive elements) therebetween.

[0039] As used herein, "about" or "approximate" includes the stated value and means within an acceptable deviation of the particular value as determined by one of ordinary skill in the art in view of the measurements discussed and the error associated with the measurement of a particular quantity (i.e., the limitations of the measurement system). For example, "about" can mean within one or more standard deviations, or within ±30%, ±20%, ±10%, ±5% of the stated value.

[0040] Embodiments may be described and illustrated in terms of functional blocks, units, and / or modules in the figures.

[0041] Those skilled in the art will understand that these blocks, units, and / or modules are physically implemented by electronic (or optical) circuits (such as logic circuits, discrete components, microprocessors, hardwired circuits, memory elements, wiring connections, etc.) that may be formed using semiconductor-based manufacturing techniques or other manufacturing techniques.

[0042] In cases where the blocks, units, and / or modules are implemented by a microprocessor or other similar hardware, they may be programmed and controlled using software (e.g., microcode) to perform the various functions discussed herein, and may optionally be driven by firmware and / or software.

[0043] It is also contemplated that each block, unit, and / or module may be implemented by dedicated hardware, or as a combination of dedicated hardware for performing some functions and a processor (e.g., one or more programmed microprocessors and associated circuitry) for performing other functions.

[0044] Without departing from the scope of the disclosure, each block, unit, and / or module of an embodiment may be physically divided into two or more interacting and discrete blocks, units, and / or modules.

[0045] In addition, without departing from the scope of the disclosure, the blocks, units, and / or modules of an embodiment may be physically combined into more complex blocks, units, and / or modules.

[0046] Unless otherwise defined or implied herein, all terms used herein (including technical and scientific terms) have the same meaning as commonly understood by one of ordinary skill in the art to which the disclosure pertains. It will also be understood that terms such as those defined in commonly used dictionaries should be interpreted as having a meaning consistent with their meaning in the context of the relevant art and will not be interpreted in an idealized or overly formal sense unless expressly so defined herein.

[0047] Hereinafter, a display device and a method of manufacturing the display device according to embodiments of the disclosure will be described with reference to the accompanying drawings.

[0048] Figure 1 is a schematic perspective view of a display device according to embodiments of the disclosure. Figure 2 is a schematic exploded perspective view of a display device according to embodiments of the disclosure.

[0049] The display device ED may be a device that operates according to an electrical signal to display an image. The display device ED may include various embodiments that provide an image to a user. For example, the display device ED may include large devices such as televisions, outdoor billboards, etc., and medium and small devices such as monitors, mobile phones, computers, tablets, navigation systems, game consoles, etc. Embodiments of the display device ED are merely examples and are not limited thereto unless departing from the concept of the disclosure. In this specification, a mobile phone is shown as an example of the display device ED.

[0050] Referring to Figure 1 , the display device ED may have a rectangular shape having a short side extending in a first direction DR1 and a long side extending in a second direction DR2. However, the disclosure is not limited thereto, and the display device ED may have various shapes such as a circular shape or a polygonal shape.

[0051] The display device ED may display an image IM in a third direction DR3 on a display surface IS parallel to the surface defined by the first direction DR1 and the second direction DR2. The third direction DR3 may be substantially parallel to the normal direction of the display surface IS. The display surface IS of the display device ED may correspond to the front surface of the display device ED.

[0052] The image IM displayed on the display device ED may include both a still image and a moving image. Figure 1 A watch window and a plurality of icons are shown as examples of the image IM.

[0053] In an embodiment, the front surface (or top surface) or the rear surface (or bottom surface) of each of the components or units may be defined based on the orientation of the display image IM. The front surface and the rear surface may face each other in the third direction DR3. The normal direction of each of the front surface and the rear surface may be substantially parallel to the third direction DR3. The distance between the front surface and the rear surface defined along the third direction DR3 may correspond to the thickness of the component (or unit).

[0054] In this specification, the term "in a plan view" may refer to a state when viewed in the third direction DR3. The term "in a cross-section" may refer to a state when viewed from the first direction DR1 or the second direction DR2. The directions indicated as the first direction DR1, the second direction DR2, and the third direction DR3 may be relative concepts and may vary according to the orientation.

[0055] The display device ED may be flexible. "Flexible" refers to the property of being bendable and may include a structure that can be fully folded down to a few nanometers. For example, the flexible display device ED may include a bending device or a foldable device. However, the disclosed embodiments are not limited to flexible devices, and the display device ED may also be a rigid display device.

[0056] Figure 1 An example of the display device ED having a planar display surface IS is schematically shown. However, the shape of the display surface IS of the display device ED is not limited to a planar form and may be curved or have a three-dimensional shape.

[0057] The display surface IS of the display device ED may include a display portion AA-DD and a non-display portion NAA-DD. The display portion AA-DD may be a portion that displays the image IM on the front surface of the display device ED so that a user can visually recognize the image IM through the display portion AA-DD. Although the display portion AA-DD is shown as a square shape in this embodiment, the display portion AA-DD may have various shapes according to the design of the display device ED.

[0058] The non-display portion NAA-DD may be a portion that does not display the image IM on the front surface of the display device ED. The non-display portion NAA-DD may have a selected color and may be a portion that blocks light. The non-display portion NAA-DD may be adjacent to the display portion AA-DD. For example, the non-display portion NAA-DD may be provided outside the display portion AA-DD to surround the display portion AA-DD. However, this is merely an example, and the non-display portion NAA-DD may be adjacent to only one side surface of the display portion AA-DD, or may also be provided on the side surface of the display device ED instead of the front surface. The disclosed embodiments are not limited thereto. In an embodiment, the non-display portion NAA-DD may be omitted.

[0059] The display portion AA-DD of the display device ED according to an embodiment may include a sensing area SA-DD. The sensing area SA-DD may correspond to the area Figure 2 overlaid with the electronic module EM. The electronic module EM may receive an external input through the sensing area SA-DD, or provide an output through the sensing area SA-DD. Figure 1 An example of the sensing area SA-DD provided in the display portion AA-DD is shown, but is not limited thereto. For example, a plurality of sensing areas SA-DD may also be provided in the display portion AA-DD.

[0060] The display device ED according to an embodiment may sense various forms of external inputs such as pressure, temperature, and light provided from the outside. The external input may include direct contact with the display device ED (e.g., from a user's hand or pen) and proximity-based input to the display device ED (e.g., hovering near the display device ED).

[0061] Referring to Figure 1 and Figure 2 , the display device ED may include a window WP and a housing HU. The window WP and the housing HU may be combined to form the appearance of the display device ED and provide an internal space for accommodating components of the display device ED. Components such as a display module EDM, a light control member ARP, and an electronic module EM may be provided between the window WP and the housing HU.

[0062] The electronic module EM may be provided under the display module EDM and may be overlaid with the display module EDM. The electronic module EM may be an electronic component that outputs or receives an optical signal. For example, the electronic module EM may be a camera module for capturing an external image. However, this is not restrictive, as the electronic module EM may also be a sensor module such as a proximity sensor or an infrared light emitting sensor.

[0063] The display module EDM may be provided above the electronic module EM. The display module EDM may include a display panel DP (see Figure 3 ) to be described later. The display panel DP may generate an image based on an electrical signal. The display panel DP ( Figure 3 ) may be an emissive display panel, but is not limited to this type.

[0064] The display module EDM may include an active area D-AA and a peripheral area D-NAA adjacent to the active area D-AA. The active area D-AA may be an area activated by an electrical signal. A plurality of pixels PX may be provided in the active area D-AA.

[0065] The peripheral region D-NAA can surround the active region D-AA. The peripheral region D-NAA can include a driving circuit or driving lines for operating pixels PX in the active region D-AA and various signal lines or pads (also known as "bonding pads" or "pads") that provide electrical signals to other components.

[0066] The display module EDM can include a hole region HA provided in the active region D-AA. The hole region HA can correspond to the sensing region SA-DD of the display device ED. In this specification, in the case of stating that "one region / part corresponds to another region / part", this means that they are superimposed and they do not necessarily have the same area and / or the same shape. The hole region HA can also be referred to as the first region HA.

[0067] The hole region HA can be a region that is superimposed on the electronic module EM. A module hole HH can be defined in the hole region HA. In an embodiment, the module hole HH can be a through hole that passes through (or extends through) the display module EDM and is superimposed on the electronic module EM. In an embodiment, a part of the electronic module EM can be inserted into the module hole HH.

[0068] Figure 2 As an example, a module hole HH having a circular shape is schematically shown, but it is not limited to this configuration. The number of module holes HH can correspond to the number of electronic modules EM provided under the display module EDM. The shape of the module hole HH in the plan view can be polygonal or elliptical or other forms according to the shape or arrangement of the electronic module EM.

[0069] The display device ED can receive an external signal required by the electronic module EM or send a signal output from the electronic module EM through the sensing region SA-DD. According to the disclosed embodiment, the hole region HA can be provided in the active region D-AA, thereby reducing the surface area of the non-display part NAA-DD for positioning the electronic module EM.

[0070] At least a part of the hole region HA can be surrounded by the display region AA, and the display region AA can also be referred to as the second region. The active region D-AA of the display module EDM according to an embodiment can include both the hole region HA and the display region AA. In an embodiment, the hole region HA can be completely surrounded by the display region AA, but it is not limited to this arrangement because a part of the hole region HA can be surrounded by the display region AA and the remaining part is in contact with the peripheral region D-NAA.

[0071] The display device ED may include a light control member ARP disposed between the display module EDM and the window WP. The light control member ARP may be a reflection reduction layer that reduces the external light reflectance caused by light incident from outside the display device ED. However, this embodiment is not limited thereto, and the light control member ARP may include various light control layers to enhance the display quality of the display device ED. For example, the light control member ARP according to an embodiment may include a polarization layer, a phase retarder, a destructive interference structure, or a plurality of color filters. In an embodiment, the light control member ARP may be omitted in the display device ED.

[0072] The portion of the light control member ARP that overlaps with the hole region HA may have a relatively high light transmittance. For example, the light control member ARP may include a transmissive portion that overlaps with the hole region HA, but is not limited thereto, and the light control member ARP may also include a hole that overlaps with the hole region HA to allow light to pass through the light control member ARP.

[0073] The window WP may be disposed on the light control member ARP. The window WP may protect the display module EDM and the light control member ARP disposed below the window WP.

[0074] The window WP may include an optically transparent insulating material. For example, the window WP may include glass, sapphire, or plastic. The window WP may have a single-layer or multi-layer structure. The window WP may also include functional layers (such as an anti-fingerprint layer, a phase control layer, and a hard coat) on the optically transparent substrate.

[0075] The front surface FS of the window WP may correspond to the display surface IS of the above-mentioned display device ED. The front surface FS of the window WP may include a transmissive region TA and a border region BZA.

[0076] The transmissive region TA of the window WP may be an optically transparent region. The transmissive region TA may correspond to the display portion AA-DD of the display device ED. For the user's visual recognition, the transmissive region TA may overlap at least a part of the effective region D-AA of the display module EDM, so that the window WP transmits the image provided by the display module EDM through the transmissive region TA.

[0077] The transmissive region TA of the window WP may include a sensing region SA. The sensing region SA of the window WP may correspond to the sensing region SA-DD of the display device ED. The sensing region SA of the window WP may overlap with the hole region HA and the electronic module EM. The sensing region SA of the window WP may have a relatively high light transmittance, enabling the electronic module EM to effectively receive external inputs or send signals through the sensing region SA.

[0078] The border area BZA of the window WP can be formed by depositing, coating, or printing a material with a selected color on a transparent substrate. The border area BZA can correspond to the non-display part NAA-DD of the display device ED. The border area BZA can overlap at least a part of the peripheral area D-NAA of the display module EDM. The border area BZA of the window WP can cover the peripheral area D-NAA of the display module EDM, thereby hiding the structures in the peripheral area D-NAA of the display module EDM from an external view.

[0079] The housing HU can be disposed under the display module EDM. The housing HU can protect the components accommodated in the housing HU. The housing HU can prevent foreign substances or moisture from penetrating from the outside into the display module EDM and the light control member ARP. The housing HU can include a material having relatively high rigidity, and the housing HU can absorb external shocks from the outside. In an embodiment, the housing HU can include a structure in which a plurality of accommodation members are joined together.

[0080] Figure 3 is a schematic cross-sectional view of a display module taken along Figure 2 the line I-I' according to the disclosed embodiment.

[0081] Referring to Figure 3 , the display module EDM according to an embodiment can include a display panel DP and an input sensor ISL. The display panel DP can include a base layer BS, a circuit layer D-CL, a display element layer D-OL, and a packaging layer ECL.

[0082] The base layer BS can be a member that provides a base surface on which the circuit layer D-CL is disposed. The base layer BS can be a rigid substrate or a flexible substrate capable of being bent, folded, or curled. The base layer BS can include a material such as glass, metal, silicon, or polymer. However, the embodiment is not limited to these materials. For example, the base layer BS can also be an inorganic layer, an organic layer, or a composite layer.

[0083] The base layer BS can have a multi-layer structure. For example, the base layer BS can include a first polymer resin layer, a silicon oxide (SiO x 2) layer disposed on the first polymer resin layer, an amorphous silicon (a-Si) layer disposed on the silicon oxide layer, and a second polymer resin layer disposed on the amorphous silicon layer. The silicon oxide layer and the amorphous silicon layer can be collectively referred to as a base barrier layer.

[0084] Each of the first polymer resin layer and the second polymer resin layer may include a polyimide resin. The polymer resin layer may include at least one of an acrylate resin, a methacrylate resin, a polyisoprene resin, a vinyl resin, an epoxy resin, a urethane resin, a cellulose resin, a silicone resin, a polyamide resin, and a perylene resin. In this specification, the term "~~-type" resin refers to a resin including a "~~" functional group.

[0085] The circuit layer D-CL may be disposed on the substrate layer BS. The circuit layer D-CL may include an insulating layer, a semiconductor pattern, a conductive pattern, and a signal transmission region. The insulating layer, the semiconductor layer, and the conductive layer may be formed on the substrate layer BS by methods such as coating or vapor deposition, and then selectively patterned by multiple photolithography processes. Thus, the circuit layer D-CL may be formed to include a semiconductor pattern, a conductive pattern, and signal lines.

[0086] The display element layer D-OL may be disposed on the circuit layer D-CL. The display element layer D-OL may include a light-emitting element. For example, the display element layer D-OL may include an organic light-emitting material, an inorganic light-emitting material, an organic-inorganic light-emitting material, a quantum dot, a quantum rod, a micro LED, or a nano LED.

[0087] The encapsulation layer ECL may be disposed on the display element layer D-OL. The encapsulation layer ECL may protect the display element layer D-OL from foreign substances such as moisture, oxygen, and dust particles. The encapsulation layer ECL may be directly disposed on the display element layer D-OL, or may be combined with the display element layer D-OL through a separate member.

[0088] In the display module EDM according to an embodiment, the input sensor ISL may be disposed on the encapsulation layer ECL. The input sensor ISL may be disposed on the encapsulation layer ECL by a continuous process. The input sensor ISL may be described as being disposed (e.g., directly disposed) on the encapsulation layer ECL, meaning that no third component is disposed between the input sensor ISL and the encapsulation layer ECL. For example, a separate adhesive member may not be disposed between the input sensor ISL and the encapsulation layer ECL. In another embodiment, the input sensor ISL and the encapsulation layer ECL may be bonded together using an adhesive member. The adhesive member may include a common adhesive or a pressure-sensitive adhesive.

[0089] Figure 4 is a schematic plan view showing a part of a display module according to the disclosed embodiment. Figure 4 Shows Figure 2 The region XX' corresponding to the portion of the effective region D-AA including the module hole HH.

[0090] Refer to Figure 4, a plurality of pixels PX can be disposed in the active area D-AA of the display module EDM. In an embodiment, most of the plurality of pixels PX can be disposed in the display area (or second area) AA spaced apart from the hole area HA, and some of the pixels PX can be disposed in the display area AA along the boundary between the hole area (or first area) HA and the display area AA. The pixels PX adjacent to the boundary of the hole area HA can be disposed to be spaced apart from the module hole HH.

[0091] The module hole HH can be defined in the hole area HA. The module hole HH can be defined in the active area D-AA. Thus, at least some of the pixels PX can be disposed adjacent to the module hole HH, and the pixels PX can be disposed spaced apart from each other with the module hole HH therebetween. The electronic module EM can be superimposed on the module hole HH.

[0092] The dam pattern DMP can be disposed in the hole area HA. According to an embodiment, the display device ED (see Figure 2 ) can block the path through which moisture and / or oxygen may be introduced into the pixels PX from the module hole HH by the dam pattern DMP. The dam pattern DMP can be disposed in the hole area HA and includes at least one dam member DM1, DM2, DM3, and DM4. Each of the dam members DM1, DM2, DM3, and DM4 can surround at least a portion of the module hole HH. According to an embodiment, each of the dam members DM1, DM2, DM3, and DM4 can have a closed line shape surrounding the module hole HH in a plan view.

[0093] In an embodiment, at least one protrusion pattern MTP can be disposed in the hole area HA. The protrusion pattern MTP can surround at least a portion of the module hole HH. In a plan view, the protrusion pattern MTP of the display device according to an embodiment can have a closed line shape surrounding the module hole HH. However, the disclosed embodiment is not limited to this configuration.

[0094] At least a portion of the protrusion pattern MTP can be superimposed on the dam pattern DMP. In an embodiment, the protrusion pattern MTP can be disposed to be superimposed on each of the dam members DM1, DM2, DM3, and DM4. The protrusion pattern MTP can be superimposed on at least a portion of the dam members DM1, DM2, DM3, and DM4 and can protrude in a direction toward or away from the module hole HH in a plan view.

[0095] At least one of the grooves GV1, GV2, GV3, and GV4 can be defined in the hole region HA. The grooves GV1, GV2, GV3, and GV4 can be defined to surround the module hole HH. The grooves GV1, GV2, GV3, and GV4 can be defined between the dam members DM1, DM2, DM3, and DM4 or between the first dam member DM1 and the display area AA. In an embodiment, the grooves GV1, GV2, GV3, and GV4 can be defined by the dam members DM1, DM2, DM3, and DM4 or the protrusion pattern MTP.

[0096] In an embodiment, a filling material can also be disposed inside the module hole HH. The filling material can include a polymer resin to provide a flat surface for the components disposed on the module hole HH. A material that is transparent and does not have optical anisotropy can be used as the filling material. The filling material can be used without limitation as long as it does not impair the sensing ability of the electronic module EM (see Figure 2 ). The filling material can also be omitted.

[0097] A part of each of the plurality of signal lines SGL1 and SGL2 connected to the pixel PX can be disposed in the hole region HA. The signal lines SGL1 and SGL2 can be connected to each other via the hole region HA to the pixels PX that are spaced apart from each other and the module hole HH is therebetween. For illustrative purposes, Figure 4 two signal lines SGL1 and SGL2 among the plurality of signal lines connected to the pixel PX are shown.

[0098] The first signal line SGL1 can extend in the first direction DR1. The first signal line SGL1 can connect the pixels arranged in the same row in the first direction DR1 of the pixel PX. The first signal line SGL1 can correspond to any one of the scan lines connected to the pixel PX.

[0099] Some of the pixels PX connected to the first signal line SGL1 can be disposed on the left side of the module hole HH, while other pixels can be disposed on the right side of the module hole HH. Therefore, even if some of the pixels PX relative to the module hole HH are omitted, the pixels in the same row connected to the first signal line SGL1 can be turned on or off by substantially the same gate signal.

[0100] The second signal line SGL2 can extend in the second direction DR2. The second signal line SGL2 can connect the pixels PX arranged in the same column in the second direction DR2. The second signal line SGL2 can correspond to any one of the data lines connected to the pixel PX.

[0101] Some of the pixels PX connected to the second signal line SGL2 may be disposed above the module hole HH, while other pixels may be disposed below the module hole HH. Accordingly, even if some of the pixels with respect to the module hole HH in the pixels PX are omitted, the pixels in the same column connected to the second signal line SGL2 may receive data signals through the same line.

[0102] At least one of the first signal line SGL1 and the second signal line SGL2 may be disconnected at a crossing point (e.g., a crossing point where the first signal line SGL1 and the second signal line SGL2 cross each other) in the hole area HA, and a connection pattern disposed on a different layer from the disconnected signal line may reconnect the separated portions. However, the connection relationship between the pixels PX spaced apart with the module hole HH therebetween is not limited to this configuration.

[0103] Figure 5 and Figure 6 is a schematic cross-sectional view showing a part of a display module according to an embodiment. Figure 7 is a schematic enlarged view showing a part of a display module according to an embodiment. Figure 5 shows the corresponding part to Figure 4 the line II-II'. Figure 6 is the corresponding part to Figure 4 the line III-III', Figure 7 is Figure 6 a schematic enlarged view of the area YY'. Figure 5 shows a part of the display area AA (see Figure 4 ), Figure 6 and Figure 7 shows a part of the hole area HA (see Figure 4 ).

[0104] Figure 5 shows a part corresponding to the pixel PX (see Figure 4 ) as an example. In Figure 5 , a transistor TR and a light emitting element LD included in the pixel PX (see Figure 4 ) are shown as examples.

[0105] Referring to Figure 5 and Figure 6 , the display module EDM may include a display panel DP and an input sensor ISL. The display panel DP may include a substrate layer BS, a circuit layer D-CL, a display element layer D-OL, and a packaging layer ECL stacked in sequence. The display module EDM according to an embodiment may further include a protrusion pattern MTP and an anti-deposition pattern WAL.

[0106] The circuit layer D-CL may include a buffer layer BFL, a shielding electrode BML, a transistor TR, a signal transmission region SCL, a plurality of insulating layers 10, 20, 30, 40, 50, and 60, and connection electrodes CNE1 and CNE2.

[0107] Although not shown, the circuit layer D-CL may also include various conductive patterns such as additional transistors, capacitors, or other conductive elements that constitute connection electrodes beyond the transistor TR. Figure 5 The configuration of the circuit layer D-CL shown is illustrative, and the types, numbers, and arrangements of the conductive patterns and insulating layers may vary.

[0108] In an embodiment, a protrusion pattern MTP and an anti-deposition pattern WAL may be provided in the hole region HA. In an embodiment, the protrusion pattern MTP may be provided on the same layer as one of the conductive patterns of the circuit layer D-CL, one of the insulating layers 10, 20, 30, 40, 50, and 60, or one of the connection electrodes CNE1 and CNE2. In an embodiment, the protrusion pattern MTP may also be formed in the same process as one of the conductive patterns of the circuit layer D-CL, one of the insulating layers 10, 20, 30, 40, 50, and 60, or one of the connection electrodes CNE1 and CNE2. In an embodiment, in the case where the substrate layer BS has a multilayer structure, the protrusion pattern MTP may be provided between the stacked polymer resin layers. For example, the protrusion pattern MTP may be provided on the same layer as the substrate barrier layer, or may be formed during the same process as the substrate barrier layer.

[0109] The anti-deposition pattern WAL may be provided below the protrusion pattern MTP. In the case where the protrusion pattern MTP is formed during the same process as the substrate barrier layer, the anti-deposition pattern WAL may be included in the substrate layer BS. In the case where the protrusion pattern MTP is formed during the same process as one of the conductive patterns of the circuit layer D-CL, one of the insulating layers 10, 20, 30, 40, 50, and 60, or one of the connection electrodes CNE1 and CNE2, the anti-deposition pattern WAL may be included in the circuit layer D-CL.

[0110] In an embodiment, a module hole HH may be defined in the substrate layer BS. The module hole HH may be defined by passing through the substrate layer BS in the hole region HA. Each of the protrusion pattern MTP and the anti-deposition pattern WAL may be provided to surround the module hole HH.

[0111] The buffer layer BFL may be provided on the substrate layer BS. The buffer layer BFL may improve the bonding force between the substrate layer BS and the semiconductor pattern or conductive pattern deposited on the buffer layer BFL. The buffer layer BFL may prevent metal atoms or impurities from diffusing from the substrate layer BS into the semiconductor pattern or conductive pattern.

[0112] The buffer layer BFL may be an inorganic layer. The buffer layer BFL may include at least one of silicon oxide, silicon nitride, and silicon oxynitride. For example, the buffer layer BFL may have a stacked structure of alternating silicon oxide and silicon nitride layers. In an embodiment, the buffer layer BFL may be omitted.

[0113] The shielding electrode BML may be disposed on the buffer layer BFL. The shielding electrode BML may be stacked with the transistor TR. In an embodiment, the shielding electrode BML may also be disposed under the signal transmission region SCL. The shielding electrode BML may block light incident from the lower side of the display panel DP from entering the transistor TR or the signal transmission region SCL, thereby protecting semiconductor patterns or conductive patterns such as the transistor TR and the signal transmission region SCL. The shielding electrode BML may include a conductive material. When a voltage is applied to the shielding electrode BML, the shielding electrode BML may maintain the threshold voltage of the transistor TR. Not limited thereto, the shielding electrode BML may be a floating electrode. In an embodiment, the shielding electrode BML may be omitted.

[0114] The circuit layer D-CL may include insulating layers 10, 20, 30, 40, 50, and 60 stacked in sequence. The insulating layers 10, 20, 30, 40, 50, and 60 may be disposed on the buffer layer BFL. Each of the insulating layers 10, 20, 30, 40, 50, and 60 may be an inorganic layer or an organic layer. For example, in an embodiment, each of the first lower insulating layer 10, the second lower insulating layer 20, the third lower insulating layer 30, and the fourth lower insulating layer 40 may include an inorganic layer, and each of the first insulating layer 50 and the second insulating layer 60 may include an organic layer. However, the disclosed embodiments are not limited to these configurations. The circuit layer D-CL may include insulating layers 10, 20, 30, 40, 50, and 60 from which at least one is omitted, or may further include additional insulating layers.

[0115] The first lower insulating layer 10 may be disposed on the buffer layer BFL. The first lower insulating layer 10 may include an inorganic material such as aluminum oxide, titanium oxide, silicon oxide, silicon nitride, silicon oxynitride, zirconium oxide, hafnium oxide, or a combination thereof. The first lower insulating layer 10 may be referred to as the first inorganic layer. The first lower insulating layer 10 may have a single-layer or multi-layer structure. The first lower insulating layer 10 may have a structure including a plurality of stacked inorganic layers.

[0116] In an embodiment, the first lower insulating layer 10 may further include an organic layer together with the inorganic layer. When the first lower insulating layer 10 includes stacked inorganic and organic layers, a buffer inorganic layer may be disposed between the inorganic layer and the organic layer.

[0117] The description of the first lower insulating layer 10 can be applied to the second lower insulating layer 20, the third lower insulating layer 30, and the fourth lower insulating layer 40. The second lower insulating layer 20, the third lower insulating layer 30, and the fourth lower insulating layer 40 may be respectively referred to as the second to fourth inorganic layers. Each of the second lower insulating layer 20, the third lower insulating layer 30, and the fourth lower insulating layer 40 may have a single-layer or multi-layer structure. For example, each of the second lower insulating layer 20, the third lower insulating layer 30, and the fourth lower insulating layer 40 may independently include at least one of silicon oxide, silicon nitride, and silicon oxynitride.

[0118] The semiconductor pattern may be disposed in the circuit layer D-CL. The semiconductor pattern may include polysilicon. However, the disclosed embodiments are not limited thereto. For example, the semiconductor pattern may include amorphous silicon or metal oxide, and may have varying electrical characteristics depending on doping. The semiconductor pattern may include a first region having a high doping concentration and a second region having a low doping concentration. The first region may be doped with an N-type dopant or a P-type dopant. The P-type transistor may include a first region doped with a P-type dopant.

[0119] The first region may have higher conductivity than the second region and may substantially serve as an electrode or a signal line. The second region may substantially correspond to the active region (or channel) of the transistor. Accordingly, a part of the semiconductor pattern may serve as the active region of the transistor, another part may serve as the source or drain of the transistor, and still another part may form a conductive region.

[0120] Referring to Figure 5 , in an embodiment, the transistor TR may be disposed on the first lower insulating layer 10. Although not shown, the transistor TR may be electrically connected to the light-emitting element LD. The transistor TR may include a source S-D, an active region A-D, and a drain D-D formed of the semiconductor pattern. Figure 5 A part of the signal transmission region SCL formed of the semiconductor pattern is shown. The signal transmission region SCL may be disposed on the first lower insulating layer 10. Although not explicitly shown, the signal transmission region SCL may contact the drain D-D of the transistor TR in a plan view.

[0121] The second lower insulating layer 20 may cover the signal transmission region SCL disposed on the first lower insulating layer 10, as well as the source S-D, the active region A-D, and the drain D-D of the transistor TR. The gate G-D of the transistor TR may be disposed on the second lower insulating layer 20. The third lower insulating layer 30 may be disposed on the second lower insulating layer 20 to cover the gate G-D. The upper electrode pattern EE may be disposed on the third lower insulating layer 30. The fourth lower insulating layer 40 may be disposed on the third lower insulating layer 30 to cover the upper electrode pattern EE.

[0122] The first connection electrode CNE1 may be disposed on the fourth lower insulating layer 40. The first connection electrode CNE1 may be connected to the signal transmission region SCL through a contact hole CH1 passing through the second lower insulating layer 20 to the fourth lower insulating layer 40. The first insulating layer 50 may be disposed on the fourth lower insulating layer 40 to cover the first connection electrode CNE1. The first insulating layer 50 may be an organic layer. The first insulating layer 50 may be referred to as the first organic layer.

[0123] The second connection electrode CNE2 may be disposed on the first insulating layer 50. The second connection electrode CNE2 may be connected to the first connection electrode CNE1 through a contact hole CH2 passing through the first insulating layer 50. The second insulating layer 60 may be disposed on the first insulating layer 50 to cover the second connection electrode CNE2. The second insulating layer 60 may be an organic layer. The second insulating layer 60 may be referred to as the second organic layer.

[0124] Both the first insulating layer 50 and the second insulating layer 60 may include at least one of an acrylate resin, a methacrylate resin, a polyisoprene resin, a vinyl resin, an epoxy resin, a urethane resin, a cellulose resin, a silicone resin, a polyamide resin, and a perylene resin.

[0125] The display element layer D-OL may be disposed on the circuit layer D-CL. The display element layer D-OL may include a light-emitting element LD and a pixel defining layer PDL. The light-emitting element LD may include a first electrode AE, a second electrode CE facing the first electrode AE, and a functional layer EL disposed between the first electrode AE and the second electrode CE.

[0126] A light-emitting opening OH exposing a part of the top surface of the first electrode AE may be defined in the pixel defining layer PDL. The emission region EA may correspond to the light-emitting opening OH.

[0127] The first electrode AE may be disposed on the circuit layer D-CL. In an embodiment, the first electrode AE may be disposed on the second insulating layer 60 of the circuit layer D-CL. The first electrode AE may be connected to the second connection electrode CNE2 through a contact hole CH3 passing through the second insulating layer 60. Accordingly, the first electrode AE may be electrically connected to the signal transmission region SCL through the first connection electrode CNE1 and the second connection electrode CNE2, and then electrically connected to the corresponding circuit element. The first electrode AE may include a single-layer or multi-layer structure.

[0128] The first electrode AE can be used as an anode or a cathode. The first electrode AE can be referred to as a pixel electrode. The second electrode CE can be used as a cathode or an anode. The second electrode CE can be referred to as a common electrode. For example, when the first electrode AE is an anode, the second electrode CE can be a cathode, and when the first electrode AE is a cathode, the second electrode CE can be an anode. In an embodiment, the first electrode AE can be referred to as a pixel electrode, and the second electrode CE can be referred to as a counter electrode.

[0129] The first electrode AE can be exposed through a light-emitting opening OH defined in the pixel defining layer PDL. The first electrode AE can have conductivity. The first electrode AE can include a metal, a metal alloy, or a conductive compound.

[0130] In an embodiment, the first electrode AE can be a reflective electrode. The first electrode AE can include at least one selected from Ag, Mg, Cu, Al, Pt, Pd, Au, Ni, Nd, Ir, Cr, Li, Ca, LiF, Mo, Ti, W, In, Sn, and Zn, a compound of two or more selected from the above materials, a mixture of two or more of the above materials, or an oxide thereof.

[0131] The first electrode AE can include a transparent metal oxide such as indium tin oxide (ITO), indium zinc oxide (IZO), zinc oxide (ZnO), or indium tin zinc oxide (ITZO). The first electrode AE can include Ag, Mg, Cu, Al, Pt, Pd, Au, Ni, Nd, Ir, Cr, Li, Ca, Mo, Ti, W, or a compound or mixture thereof (e.g., a mixture of Ag and Mg), and a material having a multilayer structure such as LiF / Ca (a laminated structure of LiF and Ca) or LiF / Al (a laminated structure of LiF and Al). In another embodiment, the first electrode AE can have a multilayer structure including a reflective layer or a transmissive reflective layer, and the reflective layer or the transmissive reflective layer includes the above materials, indium tin oxide (ITO), indium zinc oxide (IZO), zinc oxide (ZnO), or indium tin zinc oxide (ITZO). For example, the first electrode AE can have a three-layer structure of ITO / Ag / ITO, but is not limited to this configuration. For example, the first electrode AE can include the above metal materials, a combination of two or more metal materials selected from the above metal materials, or an oxide of the above metal materials, but is not limited thereto.

[0132] The light-emitting element LD may include a second electrode CE facing the first electrode AE. In an embodiment, the second electrode CE may be a transmissive electrode or a transmissive-reflective electrode. The second electrode CE may include silver (Ag). The second electrode CE may include Ag as a main metal material and may further include a dopant material. The second electrode CE may include at least one of Al, Au, Cu, Ti, In, Ni, C, Pd, F, Na, Si, Ca, Mn, Fe, Co, Zn, Ga, Ge, Mo, Sn, In, Pt, Pb, Fe, Yb, Lu, and Pa as a dopant material. In an embodiment, the second electrode CE may not include Mg. For example, the second electrode CE may include an alloy material including Ag, Pd, and Cu. However, the disclosed embodiments are not limited thereto.

[0133] The content of Ag in the second electrode CE may be greater than or equal to about 98 vol% of the entire second electrode CE. Since the second electrode CE may include a metal material having a high content of Ag, it may exhibit low-resistance characteristics. The display module EDM including the second electrode CE having a high content of Ag may exhibit low sheet resistance characteristics. In an embodiment, the second electrode CE may exhibit sheet resistance characteristics of less than or equal to about 10 Ω / □ (ohms per square).

[0134] The second electrode CE may be manufactured using a sputtering method, which tends to produce a higher Ag content compared to a thermal evaporation method. This may result in a lower resistance and a higher transmittance of the second electrode CE.

[0135] The second electrode CE manufactured by the sputtering method may exhibit excellent step coverage characteristics, enabling it to be continuously formed without interruption even on inclined side surfaces and on the lower portions of patterns having an undercut shape.

[0136] Touch noise can be reduced in the display module EDM including the second electrode CE made of a high-content Ag material. The low-resistance characteristics of the second electrode CE contribute to reducing interference between the display element layer D-OL and the input sensor ISL, thereby minimizing sensing noise in the input sensor ISL. The improved electrical characteristics of the second electrode CE can enhance the light efficiency of the light-emitting element LD.

[0137] The second electrode CE may be provided as a common layer shared by a plurality of pixels PX (see Figure 4 ), or may be shared between a plurality of pixels PX. The second electrode CE may also extend to the hole region HA. In an embodiment, the second electrode CE may be disconnected at a part of the hole region HA. The second electrode CE may be disconnected at a position where the protrusion pattern MTP exists. The arrangement of the second electrode CE and the protrusion pattern MTP will be described in more detail later.

[0138] The light-emitting element LD may include a functional layer EL disposed between a first electrode AE and a second electrode CE. The functional layer EL may include at least one emission layer.

[0139] The emission layer may include a light-emitting material such as an organic material or a quantum dot. The functional layer EL including the emission layer may emit light of at least one of blue, red, and green in a separate pixel PX. In an embodiment, the functional layer EL may provide blue light throughout the active area D-AA (see Figure 4 ), and the display module EDM may further include a color conversion member disposed on the display element layer D-OL.

[0140] The functional layer EL may further include a hole control layer and an electron control layer in addition to the emission layer. The hole control layer may be disposed between the first electrode AE and the emission layer, and the electron control layer may be disposed between the emission layer and the second electrode CE.

[0141] The emission layer of the functional layer EL may be patterned to correspond to the emission region EA. The hole control layer and the electron control layer of the functional layer EL may be provided as common layers throughout a plurality of pixels PX (see Figure 4 ). However, the disclosed embodiments are not limited to this arrangement. The hole control layer and the electron control layer may be patterned to correspond to the emission region EA, or they may be stacked (e.g., partially stacked) with the pixel defining layer PDL and short-circuited. Each of the hole control layer and the electron control layer may independently include an organic material or an inorganic material.

[0142] In an embodiment, at least a part of the functional layer EL may extend into the hole region HA. In the case where the functional layer EL extends into the hole region HA, a part of the functional layer EL may be provided in a short-circuited form. The extended functional layer EL in the hole region HA may include at least one of the hole control layer and the electron control layer.

[0143] In an embodiment, the pixel defining layer PDL may have a single-layer or multi-layer structure. The pixel defining layer PDL may include a polymer resin. For example, the pixel defining layer PDL may include at least one of an acrylate resin and a polyimide resin. The pixel defining layer PDL may further include an inorganic material in addition to the polymer resin. The pixel defining layer PDL may include a light absorption material, or may include a black pigment or a black dye. The pixel defining layer PDL including the black pigment or the black dye may implement a black pixel defining layer. In the case of forming the pixel defining layer PDL, carbon black may be used as the black pigment or the black dye, but the disclosed embodiments are not limited to this material.

[0144] The pixel defining layer PDL may further include, such as silicon nitride (SiN x ), silicon oxide (SiO x), silicon oxynitride (SiO x N y ), and other inorganic materials.

[0145] The encapsulation layer ECL can be disposed on the display element layer D-OL. The encapsulation layer ECL can be disposed on the second electrode CE of the light-emitting element LD. The encapsulation layer ECL can cover the light-emitting element LD. In an embodiment, the encapsulation layer ECL can be disposed on the dam pattern DMP and the grooves GV1, GV2, GV3, and GV4 in the hole region HA of the display module EDM.

[0146] The encapsulation layer ECL can include a plurality of encapsulation layers. The encapsulation layer ECL can include at least one inorganic layer. The encapsulation layer ECL can further include at least one organic layer. In an embodiment, the encapsulation layer ECL can include a first encapsulation layer IL1, a second encapsulation layer OL, and a third encapsulation layer IL2 that are sequentially stacked in the third direction DR3. However, the disclosed embodiments are not limited thereto, and the number of stacked encapsulation layers can vary. The first encapsulation layer IL1 and the third encapsulation layer IL2 can protect the display element layer D-OL from moisture and oxygen, and the second encapsulation layer OL can protect the display element layer D-OL from foreign substances such as dust particles. For example, the first encapsulation layer IL1 and the third encapsulation layer IL2 can be inorganic encapsulation layers, and the second encapsulation layer OL can be an organic encapsulation layer.

[0147] The input sensor ISL can be disposed on the display panel DP. The input sensor ISL can be directly disposed on the encapsulation layer ECL. The input sensor ISL can include a sensor substrate layer 210, a first sensor conductive layer 220, a sensor insulating layer 230, a second sensor conductive layer 240, and a sensor cover layer 250.

[0148] The sensor substrate layer 210 can be directly disposed on the display panel DP. The sensor substrate layer 210 can be an inorganic layer including at least one of silicon nitride, silicon oxynitride, and silicon oxide. In another embodiment, the sensor substrate layer 210 can be an organic layer including an epoxy resin, an acrylic resin, or an imide resin. The sensor substrate layer 210 can have a single-layer structure or a multi-layer structure in which multiple layers are stacked in the third direction DR3.

[0149] Each of the first sensor conductive layer 220 and the second sensor conductive layer 240 can have a single-layer structure or a multi-layer structure in which multiple layers are stacked in the third direction DR3.

[0150] The conductive layer having a single-layer structure may include a metal layer or a transparent conductive layer. The metal layer may include molybdenum, silver, titanium, copper, aluminum, or an alloy thereof. The transparent conductive layer may include a transparent conductive oxide such as indium tin oxide, indium zinc oxide, zinc oxide, or indium zinc tin oxide. The transparent conductive layer may include a conductive polymer such as PEDOT, metal nanowires, graphene, and the like.

[0151] The conductive layer having a multi-layer structure may include a metal layer. The metal layer may have a three-layer structure of titanium / aluminum / titanium. The conductive layer having a multi-layer structure may combine at least one metal layer with at least one transparent conductive layer.

[0152] The sensor insulating layer 230 may be disposed between the first sensor conductive layer 220 and the second sensor conductive layer 240. The sensor cover layer 250 may be disposed on the sensor insulating layer 230 and may cover the second sensor conductive layer 240. The second sensor conductive layer 240 may include a conductive pattern. The sensor cover layer 250 may cover the conductive pattern and may reduce or eliminate the possibility of damaging the conductive pattern in subsequent processes.

[0153] Each of the sensor insulating layer 230 and the sensor cover layer 250 may include an inorganic layer. The inorganic layer may include at least one of aluminum oxide, titanium oxide, silicon oxide, silicon nitride, silicon oxynitride, zirconium oxide, and hafnium oxide.

[0154] The sensor insulating layer 230 and the sensor cover layer 250 may both include an organic layer. The organic layer may include at least one of acrylate resins, methacrylate resins, polyisoprene resins, vinyl resins, epoxy resins, urethane resins, cellulose resins, silicone resins, polyimide resins, polyamide resins, and perylene resins.

[0155] Refer to Figure 4 and Figure 6 ,a module hole HH may be defined in the display module EDM. The display module EDM may include a hole region HA including the module hole HH defined to penetrate the display module EDM. The module hole HH may be defined to pass through the display module EDM and may be bounded by the exposed sidewall DM-HS of the display module EDM.

[0156] The display module EDM may include a plurality of dam components DM1, DM2, DM3, and DM4 disposed in the hole region HA. These dam components DM1, DM2, DM3, and DM4 may protect the display element layer D-OL in the process of forming the module hole HH. For example, the dam components DM1, DM2, DM3, and DM4 may prevent physical impacts such as cracks that may occur when forming the module hole HH from affecting the display area AA. The dam components DM1, DM2, DM3, and DM4 may prevent chemical materials used in the process of the display module EDM (such as the step of forming the module hole HH) from penetrating into the display area AA. The dam components DM1, DM2, DM3, and DM4 may be used to prevent the resin composition from flowing when an excessive amount of the resin composition is applied during the formation of the encapsulation layer ECL.

[0157] In Figure 4 and Figure 6 four dam components DM1, DM2, DM3, and DM4 are shown as examples, but the present embodiment is not limited thereto. The number of dam components may vary and may be 3 or less, or 5 or more.

[0158] The dam components DM1, DM2, DM3, and DM4 may be disposed on the substrate layer BS. In an embodiment, the dam components DM1, DM2, DM3, and DM4 may be disposed on the lower insulating layer LIL. The lower insulating layer LIL may include Figure 5 the first lower insulating layer 10, the second lower insulating layer 20, the third lower insulating layer 30, and the fourth lower insulating layer 40 described in

[0159] Referring to Figure 4 and Figure 6 According to an embodiment, the display module EDM may include a first dam component DM1, a second dam component DM2, a third dam component DM3, and a fourth dam component DM4 that surround the module hole HH and are disposed in the hole region HA. The first dam component DM1 may be disposed adjacent to the display area AA. The first dam component DM1 may be disposed to surround the second dam component DM2. The second dam component DM2 may be disposed to surround the third dam component DM3, and the third dam component DM3 may be disposed to surround the fourth dam component DM4. The display module EDM may include a third dam component DM3 disposed to surround the fourth dam component DM4. In an embodiment, the display module EDM may further include a first dam component DM1 that surrounds the second dam component DM2 and is adjacent to the display area AA.

[0160] In the hole region HA, the first groove GV1 may be defined between the display region AA and the first dam member DM1. The first groove GV1 may be defined to be adjacent to the first dam member DM1. In the display module EDM according to an embodiment, the first groove GV1 may be defined between a portion of the display panel DP disposed at the boundary between the display region AA and the hole region HA and the first dam member DM1.

[0161] The second groove GV2 may be defined between the first dam member DM1 and the second dam member DM2, the third groove GV3 may be defined between the second dam member DM2 and the third dam member DM3, and the fourth groove GV4 may be defined between the third dam member DM3 and the fourth dam member DM4.

[0162] Each of the dam members DM1, DM2, DM3, and DM4 may include a plurality of dam layers stacked in a third direction DR3 corresponding to the thickness direction. The first dam member DM1 and the second dam member DM2 may include a first dam layer DM1-B and DM2-B, a second dam layer DM1-T and DM2-T, and a third dam layer DM1-A and DM2-A, respectively. The third dam member DM3 and the fourth dam member DM4 may include a first dam layer DM3-B and DM4-B and a second dam layer DM3-T and DM4-T, respectively. The second dam layers DM1-T, DM2-T, DM3-T, and DM4-T may be disposed on the first dam layers DM1-B, DM2-B, DM3-B, and DM4-B, respectively. The third dam layers DM1-A and DM2-A may be disposed on the second dam layers DM1-T and DM2-T, respectively.

[0163] In an embodiment, the first dam layers DM1-B, DM2-B, DM3-B, and DM4-B may be disposed on the same layer as the first insulating layer 50, and the second dam layers DM1-T, DM2-T, DM3-T, and DM4-T may be disposed on the same layer as the second insulating layer 60. For example, the first dam layers DM1-B, DM2-B, DM3-B, and DM4-B may be formed in the same process as the first insulating layer 50, and the second dam layers DM1-T, DM2-T, DM3-T, and DM4-T may be formed in the same process as the second insulating layer 60. In an embodiment, each of the first dam layers DM1-B, DM2-B, DM3-B, and DM4-B may be an organic layer made of the same material as the first insulating layer 50, and each of the second dam layers DM1-T, DM2-T, DM3-T, and DM4-T may be an organic layer made of the same material as the second insulating layer 60. The third dam layers DM1-A and DM2-A may be formed in the same process as the pixel defining layer PDL. However, the disclosed embodiments are not limited to these configurations.

[0164] In Figure 6Among them, each of the first dam component DM1 and the second dam component DM2 may include three dam layers, and each of the third dam component DM3 and the fourth dam component DM4 may include two dam layers, but is not limited thereto. At least one of the first dam component DM1 and the second dam component DM2 may include two dam layers or may include only one dam layer, and at least one of the third dam component DM3 and the fourth dam component DM2 may include three or more dam layers or only one dam layer.

[0165] In an embodiment, each of the first dam layers DM1-B, DM2-B, DM3-B, and DM4-B, the second dam layers DM1-T, DM2-T, DM3-T, and DM4-T, and the third dam layers DM1-A and DM2-A may have inclined side surfaces. However, the disclosed embodiments are not limited to the shown structures; each of the dam layers may independently have at least partially curved surfaces.

[0166] The display module EDM may further include an inorganic dam IOP disposed in the hole region HA. In Figure 6 two inorganic dams IOP may be shown adjacent to the module hole HH, but this embodiment is not limited to such an arrangement; some inorganic dams IOP may be omitted, or additional inorganic dams may be included.

[0167] In an embodiment, each of the inorganic dams IOP may include a first layer IOL1 and a second layer IOL2. The first layer IOL1 may include the same material as the first lower insulating layer 10 and may be formed with the first lower insulating layer 10 by the same process. The second layer IOL2 may include the same material as the second lower insulating layer 20 and may be formed with the second lower insulating layer 20 by the same process. However, this is merely an example, and the structure of the layers constituting each of the inorganic dams IOP may be modified in various ways. For example, the first layer IOL1 may include the same material as the buffer layer BFL, and the second layer IOL2 may include the same material as the first lower insulating layer 10. The width of the first layer IOL1 may be greater than the width of the second layer IOL2, resulting in a stepped shape for each inorganic dam IOP.

[0168] Referring to Figure 5 and Figure 6 , the encapsulation layer ECL may cover the display element layer D-OL and the exposed circuit layer D-CL. In the display area AA, the encapsulation layer ECL may cover the light-emitting element LD and the pixel defining layer PDL. In the hole region HA, the encapsulation layer ECL may cover the exposed portions of the display element layer D-OL, the exposed portions of the circuit layer D-CL, the dam components DM1, DM2, DM3, and DM4, and the inorganic dam IOP.

[0169] The first encapsulation layer IL1 of the encapsulation layer ECL can be disposed on the second electrode CE. In an embodiment, the first encapsulation layer IL1 can be directly disposed on the second electrode CE. In an embodiment of the display device ED, when the light-emitting element LD further includes a cover layer (not shown) disposed on the second electrode CE, the first encapsulation layer IL1 can be directly disposed on the cover layer.

[0170] The first encapsulation layer IL1 can be disposed on the dam members DM1, DM2, DM3, and DM4 and the grooves GV1, GV2, GV3, and GV4. The first encapsulation layer IL1 can protect the components of the display panel DP from moisture and oxygen outside the display panel DP.

[0171] The first encapsulation layer IL1 can cover all of the first groove GV1, the second groove GV2, the third groove GV3, and the fourth groove GV4. The second encapsulation layer OL can be disposed on the first encapsulation layer IL1 and overlap at least some of the first groove GV1, the second groove GV2, the third groove GV3, and the fourth groove GV4. For example, the second encapsulation layer OL can overlap the first groove GV1 and the second groove GV2. The third encapsulation layer IL2 can be disposed on the second encapsulation layer OL and cover all of the first groove GV1, the second groove GV2, the third groove GV3, and the fourth groove GV4. In a part of the hole region HA, the third encapsulation layer IL2 can be directly disposed on the first encapsulation layer IL1.

[0172] The display module EDM according to an embodiment can include a protrusion pattern MTP and an anti-deposition pattern WAL that overlaps the protrusion pattern MTP. The anti-deposition pattern WAL can overlap at least a part of the protrusion pattern MTP.

[0173] The protrusion pattern MTP can be disposed between the dam layers in each of the dam members DM1, DM2, DM3, and DM4. In an embodiment, the protrusion pattern MTP can be disposed between the first dam layers DM1-B, DM2-B, DM3-B, DM4-B and the second dam layers DM1-T, DM2-T, DM3-T, and DM4-T. However, this is merely an example, and the protrusion pattern MTP can be disposed on one of the lower insulating layers LIL, or can be included in the substrate layer BS when the substrate layer BS has a structure in which a plurality of layers are stacked.

[0174] The width of the protruding pattern MTP in one direction can be greater than the width of each of the first dam layers DM1-B, DM2-B, DM3-B, and DM4-B in the same direction. Therefore, at least a part of the protruding pattern MTP can extend outward from the dam layer toward the grooves GV1, GV2, GV3, and GV4. At least a part of the protruding pattern MTP can include tip portions TP extending into each of the grooves GV1, GV2, GV3, and GV4. In an embodiment, the tip portions TP may not overlap with the first dam layers DM1-B, DM2-B, DM3-B, and DM4-B or the second dam layers DM1-T, DM2-T, DM3-T, and DM4-T. For example, in an embodiment, the tip portions TP may not overlap with the first insulating layer 50 serving as each of the first dam layers DM1-B, DM2-B, DM3-B, and DM4-B or the second insulating layer 60 serving as each of the second dam layers DM1-T, DM2-T, DM3-T, and DM4-T. Hereinafter, each of the first dam layers DM1-B, DM2-B, DM3-B, and DM4-B may be referred to as the first insulating layer, and each of the second dam layers DM1-T, DM2-T, DM3-T, and DM4-T may be referred to as the second insulating layer.

[0175] In an embodiment, the protruding pattern MTP may be formed in the same process as one of the conductive patterns provided in the display area AA of the circuit layer D-CL. For example, the protruding pattern MTP may be formed in the same process as the second connection electrode CNE2. Specifically, the protruding pattern MTP may be formed of the same material as the second connection electrode CNE2. However, the disclosed embodiments are not limited thereto.

[0176] In an embodiment, the protruding pattern MTP may be disposed between the substrate layer BS and the first electrode AE serving as a pixel electrode. The protruding pattern MTP may define a pattern hole PTH. The pattern hole PTH may be defined by the tip portions TP of the protruding pattern MTP. In an embodiment, the pattern hole PTH may surround the module hole HH.

[0177] Referring to Figure 6 and Figure 7 , the first opening OP-B may overlap with the pattern hole PTH and be defined in the first insulating layer 50 or the first dam layers DM1-B, DM2-B, DM3-B, and DM4-B. The first dam layers DM1-B, DM2-B, DM3-B, and DM4-B or the first insulating layer 50 may be disposed between the substrate layer BS and the protruding pattern MTP. The first opening OP-B may also be referred to as a lower opening.

[0178] The second opening OP-T can be superimposed on the pattern hole PTH and is defined in the second insulating layer 60 or the second dam layers DM1-T, DM2-T, DM3-T, and DM4-T. The second dam layers DM1-T, DM2-T, DM3-T, and DM4-T or the second insulating layer 60 can be disposed between the protruding pattern MTP and the first electrode AE. The second opening OP-T can also be referred to as the upper opening.

[0179] The first opening (lower opening) OP-B, the pattern hole PTH, and the second opening (upper opening) OP-T can be superimposed on each other in a third direction DR3 corresponding to the thickness direction. In an embodiment, the width W of the first opening OP-B measured in one direction BOP and the width W of the second opening OP-T TOP each can be greater than the width W of the pattern hole PTH in the same direction PTH . The width W of the first opening OP-B BOP , the width W of the second opening OP-T TOP and the width W of the pattern hole PTH PTH can be defined as the average widths of the first opening OP-B, the second opening OP-T, and the pattern hole PTH, respectively.

[0180] In an embodiment, the first groove GV1 can include the pattern hole PTH, the first opening OP-B superimposed on the pattern hole PTH and defined below the pattern hole PTH, and the second opening OP-T superimposed on the pattern hole PTH and defined above the pattern hole PTH. The first groove GV1 can further include a third opening OP-A. The third opening OP-A can be superimposed on the pattern hole PTH and is defined above the second opening OP-T. The third opening OP-A can be defined in the pixel defining layer PDL or the third dam layers DM1-A and DM2-A. Figure 7 A schematic enlarged view of a portion YY' as a portion defining the first groove GV1 is shown. However, as Figure 7 shown in the stacked structure of the protruding pattern MTP and the anti-deposition pattern WAL together with the structures of the first opening OP-B, the pattern hole PTH, and the second opening OP-T can also be applied to the second groove GV2, the third groove GV3, and the fourth groove GV4 and their adjacent portions.

[0181] In an embodiment, the anti-deposition pattern WAL can be directly disposed on the bottom surface BS_MT of the protruding pattern MTP. Referring to Figure 6 and Figure 7 , in the display module EDM according to the embodiment, the anti-deposition pattern WAL can be superimposed on the protruding pattern MTP integrally.

[0182] The anti-deposition pattern WAL can be formed of a material having a low surface energy. The anti-deposition pattern WAL can include a material having a low surface energy and can have a water contact angle greater than or equal to about 110°. The anti-deposition pattern WAL can include a fluorine (F)-based compound.

[0183] In an embodiment, the anti-deposition pattern WAL can include an aromatic hydrocarbon compound. The aromatic hydrocarbon compound can include at least one fluorine substituent. The aromatic hydrocarbon compound can include a core portion containing at least one substituted or unsubstituted aromatic ring and at least one of a fluorine atom and a fluorine substituent bonded to the core portion.

[0184] The core portion of the aromatic hydrocarbon compound can include about 1 to 5 aromatic rings, and the aromatic rings can be aromatic-based rings or heteroaryl rings. The aromatic rings can be benzene rings or heterocycles containing O, N, or S as ring-forming atoms. In the case where the core portion includes a plurality of aromatic rings, the aromatic rings can be connected to each other by single bonds, or at least one aromatic ring can be fused to another aromatic ring. In an embodiment, the molecular weight of the core portion can be less than or equal to about 300 Da. At least one hydrogen atom in the aromatic rings of the core portion can be substituted by a fluorine atom.

[0185] The aromatic hydrocarbon compound can include at least one of a fluorine atom and a fluorine substituent, and the fluorine atom can be directly substituted on the aromatic ring. The fluorine substituent can be bonded to the aromatic ring. The fluorine substituent can be represented by where n can be an integer greater than or equal to 1 and less than or equal to 9. The molecular weight of the aromatic hydrocarbon compound can be greater than or equal to about 500 Da and less than or equal to about 2000 Da. Since the aromatic hydrocarbon compound has a molecular weight greater than or equal to about 500 Da and less than or equal to about 2000 Da, the anti-deposition pattern WAL can be easily fabricated to have a specific pattern.

[0186] The anti-deposition pattern WAL can be fabricated by thermally depositing the aromatic hydrocarbon compound. A vacuum thermal evaporation method can be used to deposit the aromatic hydrocarbon compound to form the anti-deposition pattern WAL.

[0187] The material of the anti-deposition pattern WAL is not limited to the above aromatic hydrocarbon compound, and any material exhibiting low surface energy characteristics suitable for preventing the deposition of the second electrode CE can be used without limitation.

[0188] For example, in an embodiment, the anti-deposition pattern WAL can be formed as a self-assembled monolayer. The self-assembled monolayer can include a head portion, a tail portion, and a functional end portion. In the case of a self-assembled monolayer material that can be used as the anti-deposition pattern WAL, the head portion can include a functional group having an excellent binding ability to the protrusion pattern MTP, and the functional end portion can include a fluorine-based functional group.

[0189] The anti-deposition pattern WAL can be directly disposed below the protrusion pattern MTP, and the pattern hole PTH can be defined by the protrusion pattern MTP and the anti-deposition pattern WAL. The anti-deposition pattern WAL can be superimposed on the tip portion TP.

[0190] In an embodiment, the second electrode CE can be physically disconnected by the anti-deposition pattern WAL. The second electrode CE may not be deposited on the anti-deposition pattern WAL. Due to the low surface energy of the anti-deposition pattern WAL, the second electrode CE may not be disposed on the anti-deposition pattern WAL. As a result, the second electrode CE can be cut off and separated by the anti-deposition pattern WAL.

[0191] The second electrode CE can include a first portion CE-a and a second portion CE-b that are disconnected and separated by the anti-deposition pattern WAL. The first portion CE-a can be disposed in the first opening OP-B, and the second portion CE-b can be disposed in the second opening OP-T. The second portion CE-b, which is part of the second electrode CE, can be disposed above the tip portion TP, and the first portion CE-a, which is part of the second electrode CE, can be disposed below the tip portion TP.

[0192] The second electrode CE may not cover the anti-deposition pattern WAL exposed in the first groove GV1. The bottom surface BS_WA of the anti-deposition pattern WAL may not be covered by the second electrode CE. The side surface of the anti-deposition pattern WAL adjacent to the side surface of the protrusion pattern MTP that defines the pattern hole PTH may also not be covered by the second electrode CE. Due to the low surface energy of the anti-deposition pattern WAL, the second electrode CE may not be disposed at the portion where the anti-deposition pattern WAL is exposed, and the second electrode CE can be disconnected by the exposed anti-deposition pattern WAL therebetween.

[0193] In an embodiment, the functional layer EL under the second electrode CE can also be disconnected by the anti-deposition pattern WAL. The functional layer EL can include a third portion EL-a and a fourth portion EL-b that are disconnected and separated by the anti-deposition pattern WAL. The third portion EL-a can be disposed in the first opening OP-B, and the fourth portion EL-b can be disposed in the second opening OP-T. The fourth portion EL-b, which is part of the functional layer EL, can be disposed above the tip portion TP, and the third portion EL-a, which is part of the functional layer EL, can be disposed below the tip portion TP. In an embodiment, the functional layer EL may not cover the anti-deposition pattern WAL exposed in the first groove GV1, and the functional layer EL can be disconnected by the exposed anti-deposition pattern WAL therebetween.

[0194] In an embodiment, the encapsulation layer ECL can be disposed on the second electrode CE. As Figure 6 and Figure 7As described in [[ID=]], in the embodiment, the encapsulation layer ECL may cover at least a part of the exposed anti-deposition pattern WAL that is not covered by the second electrode CE. The encapsulation layer ECL may contact the anti-deposition pattern WAL at a portion where the second electrode CE is absent. In the embodiment, the first encapsulation layer IL1 may cover the pattern hole PTH and the anti-deposition pattern WAL exposed in the first opening OP-B. The first encapsulation layer IL1 may be directly disposed on the bottom surface BS_WA of the anti-deposition pattern WAL.

[0195] According to an embodiment, the display device ED may include an anti-deposition pattern WAL directly disposed under a protrusion pattern MTP extending into grooves GV1, GV2, GV3, and GV4 in a hole region HA adjacent to a portion where a module hole HH is defined. Thus, at least a part of the second electrode (cathode) CE may be disconnected in the hole region HA. Accordingly, the second electrode CE may be discontinuously disposed in the hole region HA and may not continuously extend from the hole region HA into the display region AA, thereby preventing the second electrode CE from serving as a channel through which moisture or gas moves. Thus, the display device ED according to the embodiment including the anti-deposition pattern WAL in the hole region HA where the grooves GV1, GV2, GV3, and GV4 are defined may exhibit excellent reliability characteristics.

[0196] According to an embodiment, the display device ED may exhibit excellent reliability characteristics by preventing moisture or gas from migrating through the second electrode CE, and the second electrode CE may be formed to have a high Ag content, thereby providing excellent electrical characteristics and display quality.

[0197] Figure 8 is a schematic cross-sectional view showing a part of a display module according to an embodiment disclosed. Figure 9 is a schematic enlarged view showing a part of a display module according to an embodiment disclosed. Figure 8 is related to Figure 4 the corresponding part of line III-III', Figure 9 is Figure 8 a schematic enlarged view of region YY'-1 of Figure 8 and Figure 9 show a part of the hole region HA (see Figure 4 ).

[0198] In Figure 8 and Figure 9 the descriptions, content that is repetitive with the description provided with reference to Figures 1 to 7 will not be repeated, and the differences will be mainly described. According to Figure 8 and Figure 9 the display module EDM-1 according to the embodiment shown in Figure 6 and Figure 7The display module EDM of the described embodiment differs in the arrangement of the anti-deposition pattern WAL.

[0199] When compared with the anti-deposition pattern WAL of the embodiment described with reference to Figure 6 and Figure 7 the display module EDM-1 of the embodiment shown in Figure 8 and Figure 9 may include an anti-deposition pattern WAL-1 that can be superimposed only on a partial region of the protrusion pattern MTP. In an embodiment, at least a part of the protrusion pattern MTP may not be superimposed on the anti-deposition pattern WAL-1.

[0200] The anti-deposition pattern WAL-1 may be superimposed on the tip portion TP of the protrusion pattern MTP. The anti-deposition pattern WAL-1 may be placed to define a pattern hole PTH and cover the bottom surface BS-MT of the tip portion TP protruding into the first groove GV1, ensuring that the second electrode CE remains disconnected and discontinuous.

[0201] The bottom surface BS_WA of the anti-deposition pattern WAL-1 may not be covered by the second electrode CE. The encapsulation layer ECL may contact the anti-deposition pattern WAL-1 at a portion where the second electrode CE is absent. In an embodiment, the first encapsulation layer IL1 may cover the pattern hole PTH and the anti-deposition pattern WAL-1 exposed in the first opening OP-B. The first encapsulation layer IL1 may be directly disposed on the bottom surface BS_WA of the anti-deposition pattern WAL-1.

[0202] Even in a display device ED including the display module EDM-1 of the embodiment shown in Figure 8 and Figure 9 at least a part of the second electrode (cathode) CE may also be disconnected in the hole region HA through the anti-deposition pattern WAL-1. Therefore, the display device ED according to the embodiment including the anti-deposition pattern WAL-1 in the hole region HA defined with grooves GV1, GV2, GV3, and GV4 may exhibit excellent reliability characteristics by preventing the second electrode CE from serving as a channel for moisture or gas. The display device ED according to the embodiment may exhibit excellent reliability characteristics by blocking the movement of moisture or gas through the second electrode CE, and the second electrode CE formed with a high Ag content may provide excellent electrical characteristics and display quality.

[0203] Figure 10A is a schematic diagram showing the movement path of moisture or gas in a display module according to the prior art, Figure 10B is a schematic diagram showing the movement path of moisture or gas in a display module according to the disclosed embodiment.

[0204] Refer to Figure 10A, in the case of the display module EDM' according to the prior art, the second electrode CE can be continuous even around the protruding pattern MTP that defines the pattern hole PTH, but is integrally provided throughout the first opening OP-B and the second opening OP-T. The second electrode CE serves as a movement path W-PH for moisture or gas. When moisture or gas moves along the second electrode CE, the moisture or gas transfers into the display area AA. As a result, the reliability of the light-emitting elements in the display area AA is reduced, leading to deterioration of light efficiency and display quality.

[0205] In contrast, according to Figure 10B the display module EDM of the embodiment shown in can include an anti-deposition pattern WAL disposed to overlap with the protruding pattern MTP, wherein the second electrode CE can be disconnected and separated into a first part CE-a and a second part CE-b due to the exposed portion of the anti-deposition pattern WAL that is not covered by the protruding pattern MTP or the first insulating layer 50 and the second insulating layer 60. The functional layer EL can also be separated into a third part EL-a and a fourth part EL-b by the anti-deposition pattern WAL. Therefore, moisture or gas entering through the first insulating layer 50 or the first dam layer DM1-B can encounter the disconnected second electrode CE. This disconnection interrupts the movement path W-PH for moisture or gas, preventing moisture or gas from transferring along the second electrode CE into the display area AA. Therefore, the embodiment including the anti-deposition pattern WAL can exhibit excellent reliability characteristics not only at room temperature but also under extreme conditions such as high temperature and high humidity. In the embodiment, the display device ED includes an anti-deposition pattern WAL in which the second electrode CE is disconnected around the anti-deposition pattern WAL. Even under high temperature and high humidity conditions, this configuration prevents moisture or gas from penetrating, thereby enhancing the reliability of the pixels PX in the display area AA and preventing accelerated deformation or shrinkage of the emission area EA ( Figure 5 ).

[0206] Figure 10B shows the structure of the display module EDM according to the embodiment described with reference to Figure 6 and Figure 7 to explain how the movement path W-PH for moisture or gas is disconnected. However, in the structure of the display module EDM according to the embodiment described with reference to Figure 8 and Figure 9 and other structures in which the second electrode CE is not continuous but includes a disconnected portion due to the presence of the anti-deposition pattern WAL, this effect can be observed similarly.

[0207] Since the second electrode (counter electrode) CE is made of a high-content Ag metal material, the display device ED according to the embodiment can exhibit excellent device efficiency and low touch noise characteristics. Table 1 below shows a comparison of the luminous efficiency and touch noise characteristics between the comparative example and the embodiment. The luminous efficiency is evaluated based on the CIE y color coordinate, and the touch noise is measured as the peak-to-peak noise value for the signal. In Table 1, the comparative example corresponds to a display device including a second electrode containing AgMg and manufactured by thermal evaporation. The embodiment corresponds to a display device including a second electrode containing a high content of Ag, not including Mg, and manufactured by a sputtering method. In the comparative example, the second electrode was manufactured to a thickness of about 95 Å, while in the embodiment, the second electrode was manufactured to a thickness of about 97 Å.

[0208] [Table 1]

[0209] Referring to the results in Table 1, compared with the comparative example, the embodiment exhibits excellent luminous efficiency characteristics, and the touch noise is reduced by about 20%, indicating excellent touch performance. It is confirmed that the embodiment including the second electrode CE made of a high content of Ag exhibits outstanding efficiency and touch performance.

[0210] Hereinafter, reference will be made to Figures 11 to 12H Describe a method for manufacturing the display device ED according to the embodiment. Figure 11 is a schematic flowchart showing a method for manufacturing a display device according to the disclosed embodiment. Figures 12A to 12H is a schematic diagram sequentially showing the processes in the method for manufacturing a display device according to the disclosed embodiment. Figures 12A to 12H shows a part of the hole area HA (see Figure 4 ). In the following description of the method for manufacturing the display device ED according to the embodiment with reference to Figures 11 to 12H , the same description can be applied to the components identical to those of the display device ED described with reference to Figures 1 to 9 .

[0211] The method for manufacturing the display device ED according to the embodiment may include the following steps: a process of setting a target substrate including a preliminary first insulating layer (S110); a process of forming an anti-deposition pattern on the target substrate (S120); a process of forming a protrusion pattern by overlapping with the anti-deposition pattern (S130); a process of setting a preliminary second insulating layer (S140); a process of forming a first insulating layer having a first opening defined therein and a second insulating layer having a second opening defined therein (S150); and a process of forming a counter electrode disconnected by the anti-deposition pattern (S160).

[0212] Figure 12AAn example of a process (S120) of forming an anti-deposition pattern WAL after a process (S110) of setting a target substrate is shown.

[0213] The target substrate SUB may include a substrate layer BS and a preliminary first insulating layer P-50. The target substrate SUB may refer to a part that serves as a support member for the anti-deposition pattern WAL. In Figure 12A the embodiments shown in etc., the anti-deposition pattern WAL may be formed on the preliminary first insulating layer P-50. When the anti-deposition pattern WAL is formed on the preliminary first insulating layer P-50, the target substrate SUB may include a substrate layer BS, a preliminary first insulating layer P-50 provided on the substrate layer BS, and a buffer layer BFL and a lower insulating layer LIL provided between the substrate layer BS and the preliminary first insulating layer P-50. According to the arrangement of the anti-deposition pattern WAL that may be provided on one of the lower insulating layers LIL, on the buffer layer BFL, or below the buffer layer BFL, the structure of the target substrate SUB may vary.

[0214] The position where the anti-deposition pattern WAL is formed may vary according to the arrangement of the protrusion pattern MTP, which will be described later. When the protrusion pattern MTP is fabricated to have a structure provided on the first insulating layer 50, the target substrate SUB on which the anti-deposition pattern WAL is formed may be a sub-structure including the preliminary first insulating layer P-50. When the protrusion pattern MTP is fabricated to have a structure provided on a layer other than the first insulating layer 50, the structure of the target substrate SUB on which the anti-deposition pattern WAL is formed may also vary correspondingly.

[0215] In an embodiment, the preliminary first insulating layer P-50 may form the first insulating layer 50 (see Figure 6 ), as well as the first dam layers DM1-B, DM2-B, DM3-B, and DM4-B.

[0216] The anti-deposition pattern WAL may be patterned using a mask MSK. The anti-deposition pattern WAL may be formed by depositing an aromatic hydrocarbon compound FHC via an opening region MS-OP in the mask MSK. In another embodiment, the aromatic hydrocarbon compound FHC may be deposited integrally on the target substrate SUB, and then the aromatic hydrocarbon compound FHC may be patterned using the mask MSK.

[0217] The aromatic hydrocarbon compound FHC may be deposited by thermal evaporation. For example, the aromatic hydrocarbon compound FHC may be applied to the target substrate SUB using a vacuum thermal evaporation method. As described above, the aromatic hydrocarbon compound FHC may include a core portion containing at least one substituted or unsubstituted aromatic ring and at least one of a fluorine atom and a fluorine substituent bonded to the core portion. The aromatic hydrocarbon compound FHC may have a molecular weight greater than or equal to about 500 Da and less than or equal to about 2000 Da, such that they are suitable for thermal evaporation.

[0218] Figure 12B An example of a process (S130) for forming a protrusion pattern MTP is shown. The protrusion pattern MTP may be formed to overlap with an anti-deposition pattern WAL. In an embodiment, the protrusion pattern MTP and the anti-deposition pattern WAL may be integrally overlapped with each other. However, this embodiment is not limited to this configuration, and the protrusion pattern MTP may also be formed to have a larger surface area than the surface area of the anti-deposition pattern WAL to cover the anti-deposition pattern WAL.

[0219] In an embodiment, the protrusion pattern MTP may be formed in the same process as one of the components of the circuit layer D-CL (see Figure 5 ). For example, in an embodiment, the protrusion pattern MTP may be formed in the same process as the second connection electrode CNE2. However, this embodiment is not limited thereto, and the protrusion pattern MTP may also be formed in a process separate from the process of forming the second connection electrode CNE2.

[0220] Figure 12C An example of a process (S140) for setting a preliminary second insulating layer P-60 is shown. The preliminary second insulating layer P-60 may be applied to cover both the protrusion pattern MTP and the anti-deposition pattern WAL. In an embodiment, the preliminary second insulating layer P-60 may later become the second insulating layer 60 (see Figure 6 ) and form second dam layers DM1-T, DM2-T, DM3-T, and DM4-T.

[0221] A preliminary pixel defining layer P-PDL may be applied over the preliminary second insulating layer P-60. In an embodiment, the preliminary pixel defining layer P-PDL may be formed as a pixel defining layer PDL (see Figure 6 ) and third dam layers DM1-A and DM2-A.

[0222] Figure 12D An example of a process for forming a third dam layer DM-A that defines a third opening OP-A is shown. A pixel defining layer PDL that defines a light emitting opening OH may also be formed together with the third dam layer DM-A. The third dam layer DM-A may be formed by performing a process such as etching after setting the preliminary pixel defining layer P-PDL.

[0223] Figure 12EFIG. is a schematic view showing a process (S150) of forming a first insulating layer 50 defining a first opening OP-B and a second insulating layer 60 defining a second opening OP-T. The preliminary first insulating layer P-50 may be patterned to form the first insulating layer 50 in which the first opening OP-B is defined, and the preliminary second insulating layer P-60 may be patterned to form the second insulating layer 60 in which the second opening OP-T is defined. The first insulating layer 50 formed by patterning may also be referred to as a first dam layer DM-B. Similarly, the second insulating layer 60 formed by patterning may be referred to as a second dam layer DM-T.

[0224] During the process (S150) of forming the first insulating layer 50 having the first opening OP-B and the second insulating layer 60 having the second opening OP-T, grooves GV1 and GV2 may be defined in the hole region HA. Each of the grooves GV1 and GV2 may include the first opening OP-B, the pattern hole PTH, and the second opening OP-T all defined therein to be stacked on each other in a third direction DR3 as a thickness direction. Edge portions of the pattern hole PTH of the protrusion pattern MTP may protrude into the grooves GV1 and GV2. The anti-deposition pattern WAL may be directly disposed under the protrusion pattern MTP protruding into the grooves GV1 and GV2.

[0225] Figure 12F FIG. is a schematic view showing a process (S160) of forming a counter electrode disconnected by the anti-deposition pattern WAL. A second electrode CE serving as a counter electrode may be disposed in the first opening OP-B and the second opening OP-T. The second electrode CE may also be disposed on the dam members DM1 and DM2 and the grooves GV1 and GV2. In an embodiment, the second electrode CE may be formed to be disconnected by the anti-deposition pattern WAL. The second electrode CE may not be disposed on the bottom surface BS_WA of the anti-deposition pattern WAL. As a result, the second electrode CE may be disconnected and separated into a first portion CE-a disposed under the anti-deposition pattern WAL and a second portion CE-b disposed above the anti-deposition pattern WAL. The second portion CE-b may be disposed on the dam members DM1 and DM2.

[0226] Referring to Figure 12F , a functional layer EL may be disposed under the second electrode CE. The functional layer EL may also be disconnected by the anti-deposition pattern WAL. The functional layer EL may be disconnected and separated into a third portion EL-a disposed under the anti-deposition pattern WAL and a fourth portion EL-b disposed above the anti-deposition pattern WAL. In the display region AA (see Figure 6 ), the functional layer EL and the second electrode CE may be disposed on the first electrode AE to form a light-emitting element LD.

[0227] In Figure 12FIn [description], the first part CE-a of the second electrode CE is shown as being spaced apart from the bottom surface BS_WA of the anti-deposition pattern WAL, but the embodiments are not limited to this configuration. In an embodiment, when the first part CE-a is formed to be separated from the second part CE-b by exposing a part of the bottom surface BS_WA of the anti-deposition pattern WAL, the edge of the first part CE-a may be formed adjacent to the bottom surface BS_WA of the anti-deposition pattern WAL. In Figure 12F In [description], the edge of the second part CE-b of the second electrode CE is shown as being superimposed on the edge of the protrusion pattern MTP, but the embodiments are not limited to this arrangement. In an embodiment, when the second part CE-b is formed separately from the first part CE-a by exposing a part of the bottom surface BS_WA of the anti-deposition pattern WAL, the second part CE-b may be formed to cover the edge of the protrusion pattern MTP.

[0228] Figure 12G is a schematic diagram showing the process of forming the first encapsulation layer IL1 on the second electrode CE. In the method for manufacturing the display device ED according to an embodiment, the process of forming the encapsulation layer ECL on the counter electrode may be performed after the process (S160) of forming the counter electrode disconnected by the anti-deposition pattern WAL. The first encapsulation layer IL1 may be applied to cover the second electrode CE. The first encapsulation layer IL1 may cover the bottom surface BS_WA of the anti-deposition pattern WAL that is exposed in the grooves GV1 and GV2 due to the absence of the second electrode CE. The first encapsulation layer IL1 may be directly disposed on the bottom surface BS_WA of the anti-deposition pattern WAL. By covering the disconnected second electrode CE and the anti-deposition pattern WAL, the first encapsulation layer IL1 seals and protects the second electrode CE, other insulating layers, and conductive patterns from moisture and gas.

[0229] Figure 12H Shows an example of the process of forming the second encapsulation layer OL and the third encapsulation layer IL2. The second encapsulation layer OL may be applied over the first encapsulation layer IL1, and the third encapsulation layer IL2 may be disposed on the second encapsulation layer OL. In the hole region HA, the second encapsulation layer OL may be provided to fill the grooves GV1 and GV2 provided between at least some of the dam members DM1 and DM2. In the portion of the hole region HA where the second encapsulation layer OL is not applied, the third encapsulation layer IL2 may be directly disposed on the first encapsulation layer IL1.

[0230] Although not shown, the process of forming the input sensor ISL may be performed after forming the encapsulation layer ECL. After the display module EDM has been completely laminated, the process for forming the module hole HH (see Figure 4 ) may be performed. The module hole HH (see Figure 4 ) may be formed in the hole region HA by processing the components of the display module EDM.

[0231] Even when the module hole HH is formed (see Figure 4 ), and a surface of the module EDM is exposed, the display device ED according to an embodiment may also include a second electrode CE disconnected by an anti-deposition pattern WAL. This helps prevent moisture or gas introduced through the module hole or the underlying layer or generated in the underlying layer from being transferred to the display area AA via the second electrode CE, thereby enhancing the excellent reliability of the display device ED.

[0232] The display device ED according to an embodiment may include an anti-deposition pattern WAL disposed below a protrusion pattern MTP protruding into grooves GV1, GV2, GV3, and GV4. This disconnects a part of the second electrode CE by the anti-deposition pattern WAL, thereby preventing the second electrode CE from becoming a passage for moisture or the like. The display device ED according to an embodiment may easily form the second electrode CE including a high content of Ag using a sputtering method. Thus, the display device ED according to an embodiment may include a second electrode CE containing a high content of Ag, resulting in high luminous efficiency, reduced touch noise characteristics, and excellent reliability characteristics.

[0233] The method for manufacturing a display device ED according to an embodiment may include a process of forming an anti-deposition pattern WAL including fluorine or an aromatic hydrocarbon compound containing a fluorine substituent on the lower side of the protrusion pattern MTP. As a result, even when the second electrode CE is later provided by a sputtering method, the second electrode CE may be formed in a disconnected configuration by the anti-deposition pattern WAL. In the method for manufacturing a display device ED according to an embodiment, a part of the second electrode CE may be formed to be disconnected instead of continuous, which prevents the movement of moisture or gas through the second electrode CE, thereby enabling the display device ED to have excellent reliability.

[0234] The display device ED according to the disclosed embodiment may include an anti-deposition pattern WAL disposed below a protrusion pattern MTP defining a pattern hole PTH. This configuration prevents the second electrode CE from being continuously formed in the hole region HA, thereby exhibiting excellent reliability characteristics of the device.

[0235] The display device ED according to the disclosed embodiment may include a counter electrode containing a high content of Ag. The counter electrode may have a disconnected structure in at least a part of the hole region HA, resulting in excellent luminous efficiency and improved electrical characteristics, further enhancing the reliability of the device.

[0236] The method for manufacturing a display device ED according to the disclosed embodiments may include a process of forming an anti-deposition pattern WAL made of an aromatic hydrocarbon compound containing a fluorine-based substituent. This prevents the second electrode CE from being formed at a portion of the anti-deposition pattern WAL, thereby ensuring that the second electrode CE does not serve as a moisture-permeable path. As a result, the method provides a display device ED having excellent reliability.

[0237] The above description is an example of the disclosed technical features, and those skilled in the art to which the disclosure pertains will be able to make various modifications and changes. Therefore, the disclosed embodiments described above can be implemented individually or in combination with each other.

[0238] Accordingly, the embodiments disclosed in the disclosure are not intended to limit the technical spirit of the disclosure, but to describe the technical spirit of the disclosure, and the scope of the technical spirit of the disclosure is not limited by these embodiments. The scope of protection of the disclosure should be construed by the claims and should be construed to include all technical spirits within the equivalent scope in the scope of the disclosure.

Claims

1. A display device, the display device comprising: An electronic module; And A display module, including a hole region stacked with the electronic module, the display module comprising: A substrate layer having a module hole corresponding to the hole region; A light-emitting element including a pixel electrode disposed on the substrate layer, a counter electrode facing the pixel electrode, and a functional layer disposed between the pixel electrode and the counter electrode; A protrusion pattern disposed between the substrate layer and the pixel electrode, forming a pattern hole spaced apart from the module hole and surrounding the module hole; A first insulating layer disposed between the substrate layer and the protrusion pattern, having a first opening overlapping with the pattern hole; A second insulating layer disposed between the protrusion pattern and the pixel electrode, having a second opening overlapping with the pattern hole; and An anti-deposition pattern directly disposed on the bottom surface of the protrusion pattern, wherein, The counter electrode is disconnected by the anti-deposition pattern and includes a first portion disposed in the first opening and a second portion disposed in the second opening.

2. The display device according to claim 1, wherein, The bottom surface of the anti-deposition pattern is not covered by the counter electrode in the first opening.

3. The display device according to claim 1, wherein, The anti-deposition pattern includes an aromatic hydrocarbon compound, the aromatic hydrocarbon compound comprising: A core portion including at least one substituted or unsubstituted aromatic ring; and At least one of a fluorine atom and a fluorine substituent bonded to the core portion.

4. The display device according to claim 3, wherein, The core portion has a molecular weight less than or equal to 300 Da and includes 1 to 5 substituted or unsubstituted aromatic rings or substituted or unsubstituted heteroaromatic rings, and The fluorine substituent is represented by wherein n is an integer greater than or equal to 1 and less than or equal to 9.

5. The display device according to claim 4, wherein, The aromatic hydrocarbon compound has a molecular weight greater than or equal to 500 Da and less than or equal to 2000 Da.

6. The display device according to claim 1, wherein The counter electrode includes an alloy material containing greater than or equal to 98 vol% of Ag and no Mg.

7. The display device according to claim 1, wherein The pixel electrode is a reflective electrode, and the counter electrode is a transmissive electrode or a transflective electrode.

8. The display device according to claim 1, wherein, The protrusion pattern includes a protruding tip portion that does not overlap with the first insulating layer and the second insulating layer, and The anti-deposition pattern overlaps with the tip portion of the protrusion pattern.

9. The display device according to claim 1, wherein The anti-deposition pattern overlaps with the entire protrusion pattern.

10. The display device according to claim 1, wherein, The display module further includes a packaging layer disposed on the counter electrode, and The packaging layer includes a packaging inorganic layer directly disposed on the counter electrode and the anti-deposition pattern.

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