A converter valve fault detection method and system based on fault tree analysis and multi-frequency impedance testing

Abstract

The application discloses a kind of based on fault tree analysis and multi-frequency impedance test's thyristor valve fault detection method, system, the method includes being applied to the both ends of thyristor valve thyristor multi-frequency voltage signal, gathers the current, voltage data under each frequency;Multi-frequency voltage signal includes direct current signal and different frequency alternating current signal;According to current, voltage data obtains the comprehensive impedance of the damping loop, voltage-sharing loop and energy extraction loop of thyristor valve;Establish the fault tree analysis model related to the fault detection of thyristor valve, the comprehensive impedance is input into the model, carries out fault diagnosis to the damping loop, voltage-sharing loop and energy extraction loop of thyristor valve, completes the fault detection of thyristor valve.The application improves the efficiency of thyristor valve fault detection, effectively reduces the possibility of misjudgment and omission.

Description

Technical Field

[0001] This invention relates to the field of power system maintenance technology, specifically to a method and system for detecting converter valve faults based on fault tree analysis and multi-frequency impedance testing. Background Technology

[0002] High-voltage direct current (HVDC) transmission technology, with its advantages of long distance and large capacity, as well as significant technical and economic benefits in asynchronous grid interconnection, has been widely used and recognized globally. As a core component of HVDC transmission systems, the converter valve undertakes the critical task of converting alternating current (AC) to direct current (DC) and ensuring the stability and safety of power transmission. However, the converter valve's internal structure is complex, particularly the thyristor stage and its associated damping circuit, voltage equalization circuit, and energy extraction circuit, which are prone to failure during long-term system operation. These failures not only affect the reliability of the power system but may also pose a serious threat to equipment safety. Therefore, fault detection and fault location of the converter valve are of paramount importance.

[0003] Currently, traditional methods for detecting converter valve faults largely rely on manual inspection or monitoring of current and voltage during operation. These methods have limitations when dealing with complex faults. For example, single-frequency testing can only detect the impedance characteristics of a specific circuit, making it difficult to comprehensively analyze fault conditions in complex electromagnetic environments. Furthermore, some methods require equipment shutdown for testing, resulting in complex operations and long testing cycles, which is not conducive to real-time maintenance and repair of power systems. Summary of the Invention

[0004] The technical problem to be solved by the present invention is to provide a method and system for detecting converter valve faults based on fault tree analysis and multi-frequency impedance testing, which can more comprehensively and accurately identify the fault conditions of the internal damping circuit, voltage equalization circuit and energy extraction circuit of the converter valve, thereby meeting the needs of power system operation.

[0005] To solve the above technical problems, the present invention adopts the following technical solution:

[0006] A fault detection method for converter valves based on fault tree analysis and multi-frequency impedance testing includes the following steps:

[0007] S1. Apply multi-frequency voltage signals across the thyristor stage of the converter valve and collect current and voltage data at each frequency; the multi-frequency voltage signals include DC signals and AC signals of different frequencies.

[0008] S2. Based on the current and voltage data in step S1, obtain the combined impedance of the damping circuit, equalization circuit, and energy extraction circuit of the converter valve.

[0009] S3. Establish a fault tree analysis model related to converter valve fault detection. Input the comprehensive impedance obtained in step S2 into the model to perform fault diagnosis on the damping circuit, pressure equalization circuit and energy harvesting circuit of the converter valve, and complete the fault detection of the converter valve.

[0010] Furthermore, in step S2, the combined impedance Z of the damping circuit, pressure equalization circuit, and energy extraction circuit of the converter valve is... DC The calculation formula is:

[0011]

[0012] Among them, V DC I represents the applied DC voltage. DC This represents direct current.

[0013] The peak current and voltage corresponding to AC signals of different frequencies are detected, and the comprehensive impedance value at the corresponding frequency is calculated using the following formula:

[0014]

[0015] Where Z(f1) represents the composite impedance at frequency f1; Z(f2) represents the composite impedance at frequency f2; U peak (f1), U peak (f2) represents the peak voltage corresponding to frequencies f1 and f2, respectively; I peak (f1), I peak (f2) represents the peak current corresponding to frequencies f1 and f2, respectively.

[0016] Furthermore, in step S3, the fault tree analysis model includes top events, intermediate events, and bottom events.

[0017] Among them, the top events are the failures of the damping circuit, pressure equalization circuit, and energy extraction circuit of the converter valve.

[0018] Intermediate events include resistor and capacitor faults in the converter valve's damping circuit and energy extraction circuit, as well as voltage equalization circuit faults.

[0019] The bottom event is a specific component failure in the converter valve thyristor stage.

[0020] The top event, middle event, and bottom event are all logical OR gates.

[0021] When the input composite impedance is outside the standard threshold range of the converter valve thyristor-level impedance, it indicates a fault in the converter valve. When the composite impedance at frequency f1 is outside the standard threshold range of the converter valve thyristor-level impedance, but the composite impedance at frequency f2 is within the standard threshold range of the converter valve thyristor-level impedance, it indicates a capacitor fault in the damping circuit and energy extraction circuit of the converter valve. When the composite impedance at frequency f2 is outside the standard threshold range of the converter valve thyristor-level impedance, but the composite impedance at frequency f1 is within the standard threshold range of the converter valve thyristor-level impedance, it indicates a resistance fault in the damping circuit and energy extraction circuit of the converter valve. When both the composite impedance at frequency f1 and the composite impedance at frequency f2 are outside the standard threshold range of the converter valve thyristor-level impedance, if the resistance value is on the order of tens of thousands of ohms, it indicates a resistance fault; if the capacitive reactance value is on the order of tens of thousands of ohms, it indicates a capacitor fault.

[0022] Furthermore, by applying AC signals of different frequencies to both ends of the thyristor stage of the converter valve, the active and reactive power equations are obtained, thereby verifying the fault judgment of the damping circuit and energy harvesting circuit of the converter valve.

[0023] The damping circuit includes a first resistor R1, a second resistor R2, a first capacitor C1, and a second capacitor C2; the energy extraction circuit includes a third resistor R3 and a third capacitor C3; the voltage equalization circuit includes a fourth resistor R dc1 and the fifth resistor R dc2 .

[0024] The impedance Z1 of the series branch formed by the first resistor R1 and the first capacitor C1 is:

[0025]

[0026] Where j represents the imaginary part, ω represents the angular frequency, ω = 2πf, f represents the applied frequency, and f = f1, f2.

[0027] The impedance Z2 corresponding to the series branch formed by the second resistor R2 and the second capacitor C2 is:

[0028]

[0029] The impedance Z3 corresponding to the series branch formed by the third resistor R3 and the third capacitor C3 is:

[0030]

[0031] The impedance Z corresponding to the parallel branch formed by Z2 and Z3 is Z. 23 for:

[0032]

[0033] definition

[0034] but

[0035] definition

[0036] but

[0037] Z1 and Z 23 The impedance Z of the series branch is formed 123 for:

[0038]

[0039] The active power P1 of the damping circuit and energy extraction circuit of the converter valve is:

[0040]

[0041] Where U represents the applied AC voltage.

[0042] The reactive power Q1 of the damping circuit and energy extraction circuit of the converter valve is:

[0043]

[0044] The active power P2 and reactive power Q2 of the corresponding branch in the pressure equalization circuit of the converter valve are as follows:

[0045]

[0046] Q2 = 0.

[0047] The total active power P and total reactive power Q under AC signals of different frequencies are as follows:

[0048] P = P1 + P2

[0049] Q = Q1 + Q2.

[0050] Based on the known total active power P and total reactive power Q, the resistance and capacitive reactance values ​​are obtained using the active and reactive power equations. When the resistance value is within ±5% of the rated value, it indicates a resistor fault; when the capacitance value is within ±10% of the rated value, it indicates a capacitor fault.

[0051] Furthermore, this invention also proposes a converter valve fault detection system based on fault tree analysis and multi-frequency impedance testing, comprising:

[0052] The data acquisition module is used to apply multi-frequency voltage signals across the thyristor stage of the converter valve and acquire current and voltage data at each frequency.

[0053] The integrated impedance calculation module is used to obtain the integrated impedance of the damping circuit, equalizing circuit, and energy extraction circuit of the converter valve based on the current and voltage data in the data acquisition module.

[0054] The fault detection module is used to establish a fault tree analysis model related to the fault detection of the converter valve. The comprehensive impedance obtained from the comprehensive impedance calculation module is input into this model to diagnose the fault conditions of the damping circuit, pressure equalization circuit and energy harvesting circuit of the converter valve, and complete the fault detection of the converter valve.

[0055] Furthermore, the present invention also proposes an electronic device, including a memory, a processor, and a computer program stored in the memory and executable on the processor, wherein the processor executes the computer program to implement the steps of the converter valve fault detection method based on fault tree analysis and multi-frequency impedance testing.

[0056] Furthermore, the present invention also proposes a computer-readable storage medium storing a computer program, which, when executed by a processor, performs the converter valve fault detection method based on fault tree analysis and multi-frequency impedance testing.

[0057] Compared with the prior art, the present invention, employing the above technical solution, has the following technical effects:

[0058] The method proposed in this invention improves the efficiency of converter valve fault detection, effectively reduces the possibility of false positives and false negatives, and can more accurately locate the fault point by investigating the cause of converter valve faults layer by layer, thereby improving the reliability of the system. Attached Figure Description

[0059] Figure 1 This is a structural diagram of the fault tree analysis model of the present invention.

[0060] Figure 2 This is a schematic diagram of the thyristor-level electrical system of the present invention.

[0061] Figure 3 This is the equivalent circuit diagram of the thyristor stage of this invention.

[0062] Figure 4 This is a graph showing the DC impedance test results of the converter valve under normal conditions in an embodiment of the present invention.

[0063] Figure 5 This is a graph showing the 100Hz impedance test results of the converter valve under normal conditions in an embodiment of the present invention.

[0064] Figure 6 This is a graph showing the impedance test results of the converter valve under normal conditions at 100kHz in an embodiment of the present invention.

[0065] Figure 7 This is a graph showing the 100Hz impedance test results of the converter valve under capacitor short-circuit conditions in an embodiment of the present invention.

[0066] Figure 8 This is a graph showing the impedance test results of the converter valve at 100kHz under capacitor short circuit conditions in an embodiment of the present invention.

[0067] Figure 9 This is a graph showing the 100Hz impedance test results of the converter valve under short-circuit conditions in an embodiment of the present invention.

[0068] Figure 10 This is a graph showing the impedance test results of the converter valve at 100kHz under short-circuit conditions in an embodiment of the present invention.

[0069] Figure 11 This is a graph showing the 100Hz impedance test results of the converter valve under the condition of resistance surge in an embodiment of the present invention.

[0070] Figure 12 This is a graph showing the impedance test results of the converter valve at 100kHz under the condition of resistance surge in an embodiment of the present invention. Detailed Implementation

[0071] The present invention will be further described below with reference to the accompanying drawings. The following embodiments are only used to more clearly illustrate the technical solution of the present invention, and should not be used to limit the scope of protection of the present invention.

[0072] To achieve the above objectives, this invention proposes a fault detection method for converter valves based on fault tree analysis and multi-frequency impedance testing, the specific steps of which are as follows:

[0073] S1. Apply multi-frequency voltage signals across the thyristor stage of the converter valve to capture current and voltage data at different frequencies. By applying multi-frequency signals, the electrical response characteristics of different circuits can be comprehensively evaluated, and current and voltage data at each frequency can be collected. The multi-frequency voltage signals include DC signals and 100Hz and 100kHz sine signals.

[0074] S2. Based on the current and voltage data in step S1, obtain the combined impedance of the damping circuit, equalization circuit, and energy extraction circuit of the converter valve.

[0075] The combined impedance Z of the damping circuit, pressure equalization circuit, and energy extraction circuit of the converter valve DC The calculation formula is:

[0076]

[0077] Among them, V DC I represents the applied DC voltage. DC This represents direct current.

[0078] Since the damping circuit and the energy extraction circuit contain inductive and capacitive elements, they do not function when a DC voltage is applied. Therefore, the calculated impedance value reflects the resistance characteristics of the equalization circuit of the converter valve.

[0079] The peak current and voltage corresponding to sinusoidal signals at 100Hz and 100kHz are detected, and the comprehensive impedance value at the corresponding frequencies is calculated using the following formula:

[0080]

[0081] Where Z(f1) represents the composite impedance at a frequency of 100Hz, f1 = 100Hz; Z(f2) represents the composite impedance at a frequency of 100kHz, f2 = 100kHz; U peak (f1), U peak (f2) represents the peak voltage corresponding to frequencies of 100Hz and 100kHz, respectively; I peak (f1), I peak (f2) represents the peak current corresponding to frequencies of 100Hz and 100kHz, respectively.

[0082] The impedance value calculated at this time reflects the resistance characteristics of the damping circuit and the energy extraction circuit of the converter valve.

[0083] S3. Establish a fault tree analysis model related to converter valve fault detection. Input the comprehensive impedance obtained in step S2 into the model to perform fault diagnosis on the damping circuit, pressure equalization circuit and energy harvesting circuit of the converter valve, and complete the fault detection of the converter valve.

[0084] like Figure 1 As shown, the fault tree analysis model includes top events, intermediate events, and bottom events.

[0085] Among them, the top event represents the major failure that occurs in the entire system. The top event is a failure in the damping circuit, pressure equalization circuit, and energy harvesting circuit of the converter valve.

[0086] The faults are further categorized into faults in the equalization circuit of the converter valve, as well as resistance and capacitor faults in the energy extraction and damping circuits of the converter valve. DC impedance testing, as the first step in troubleshooting, can quickly identify the health status of the equalization circuit resistance and provide direction for subsequent testing.

[0087] The intermediate events are the pressure equalization circuit failure of the converter valve, as well as the resistance and capacitor failures of the damping circuit and energy extraction circuit of the converter valve.

[0088] The bottom event is a specific component failure in the converter valve thyristor stage.

[0089] The top event, middle event, and bottom event are all logical OR gates.

[0090] Based on the converter valve's technical specifications, determine the normal impedance range at various frequencies. Referencing existing engineering data and empirical values, establish an impedance reference table to check whether the overall impedance obtained from the impedance test is within the standard threshold range for the converter valve's thyristor-level impedance provided by the converter valve manufacturer.

[0091] When the input composite impedance is outside the standard threshold range of the converter valve's thyristor-level impedance, it indicates a fault in the converter valve. When the composite impedance at 100Hz is outside the standard threshold range of the converter valve's thyristor-level impedance, but the composite impedance at 100kHz is within the standard threshold range, it indicates a capacitor fault in the converter valve's damping and energy extraction circuits. In this case, the abnormal capacitor does not manifest as a significant increase in capacitive reactance. When the composite impedance at 100kHz is outside the standard threshold range of the converter valve's thyristor-level impedance... When the overall impedance at 100Hz is within the standard threshold range of the converter valve thyristor stage impedance, it indicates a resistance fault in the damping circuit and energy extraction circuit of the converter valve. In this case, the abnormal resistance does not manifest as a significant increase in resistance value. When both the overall impedance at 100Hz and the overall impedance at 100kHz are outside the standard threshold range of the converter valve thyristor stage impedance, if the resistance value increases significantly to tens of thousands of ohms, it indicates a resistance fault. If the capacitive reactance increases significantly to tens of thousands of ohms, it indicates a capacitor fault.

[0092] Based on such Figure 2 The schematic diagram of the thyristor stage electrical system shown demonstrates how, by applying AC signals of different frequencies to both ends of the thyristor stage of the converter valve, active and reactive power equations are obtained, thereby verifying the fault diagnosis of the damping circuit and energy extraction circuit of the converter valve.

[0093] like Figure 3 The equivalent circuit diagram of the thyristor stage shown includes a damping circuit consisting of a first resistor R1, a second resistor R2, a first capacitor C1, and a second capacitor C2; an energy extraction circuit consisting of a third resistor R3 and a third capacitor C3; and a voltage equalization circuit consisting of a fourth resistor R... dc1 and the fifth resistor R dc2 .

[0094] The impedance Z1 of the series branch formed by the first resistor R1 and the first capacitor C1 is:

[0095]

[0096] Where j represents the imaginary part, ω represents the angular frequency, ω = 2πf, f represents the applied frequency, f = 100Hz, 100kHz.

[0097] The impedance Z2 corresponding to the series branch formed by the second resistor R2 and the second capacitor C2 is:

[0098]

[0099] The impedance Z3 corresponding to the series branch formed by the third resistor R3 and the third capacitor C3 is:

[0100]

[0101] The impedance Z corresponding to the parallel branch formed by Z2 and Z3 is Z. 23 for:

[0102]

[0103] definition but definition but Z1 and Z 23 The impedance Z of the series branch is formed 123 for:

[0104]

[0105] The active power P1 of the damping circuit and energy extraction circuit of the converter valve is:

[0106]

[0107] Where U represents the applied AC voltage.

[0108] The reactive power Q1 of the damping circuit and energy extraction circuit of the converter valve is:

[0109]

[0110] The active power P2 and reactive power Q2 of the corresponding branch in the pressure equalization circuit of the converter valve are as follows:

[0111]

[0112] Q2 = 0.

[0113] The total active power P and total reactive power Q under AC signals of different frequencies are as follows:

[0114] P = P1 + P2

[0115] Q = Q1 + Q2.

[0116] Based on the known total active power P and total reactive power Q, the resistance and capacitive reactance values ​​are obtained using the active and reactive power equations. When the resistance value is within ±5% of the rated value, it indicates a resistor fault; when the capacitance value is within ±10% of the rated value, it indicates a capacitor fault.

[0117] Analysis of the components in the equivalent circuit diagram of the converter valve thyristor reveals that R1 and R2 are in the tens of ohms range; C1, C2, and C3 are in the microfarad range; R3 is in the hundreds of ohms range; R dc1 and R dc2 It is in the tens of thousands of ohms range.

[0118] Regarding the internal resistance and capacitance of the converter valve, it is known that the resistance is not affected by the frequency. According to the capacitive reactance formula, the capacitive reactance is inversely proportional to the frequency. Therefore, the capacitive reactance is relatively large at low frequencies, and the resistance effect is not obvious. Thus, the overall impedance of the 100Hz impedance test circuit is mainly capacitive reactance. However, as the frequency increases, the capacitive reactance is very small at high frequencies. Therefore, the overall impedance of the 100kHz impedance test circuit is mainly resistive.

[0119] To verify the effectiveness of the method proposed in this invention, the thyristor stage of the Xuji HVTV2000-800 / 5000E converter valve in the high and low end valve halls of the Yibin UHV converter station was selected for study. R1 = 50 / 3Ω, R2 = 50 / 3Ω, R3 = 440Ω, C1 = 4.4μF, C2 = 4.4μF, C3 = 1.23μF, R... dc1 =44kΩ, R dc2 =44kΩ.

[0120] In the MATLAB simulation platform, a DC voltage of 100V, a voltage signal of 100Hz, and a voltage signal of 100kHz were applied to the thyristor stage circuit of the converter valve. The damping circuit, energy extraction circuit, and voltage equalization circuit of the converter valve were set to function normally. The waveform obtained from the thyristor stage impedance test is shown below. Figure 4 , 5 As shown in Figure 6.

[0121] according to Figure 4 (a) shows that the peak voltage of the voltage equalization circuit under the applied DC voltage signal is 100V. Figure 4 (b) shows that the peak current of the equalization circuit under the applied DC voltage signal is 0.00136A, and thus the comprehensive impedance of the equalization circuit of the converter valve can be calculated to be about 88kΩ, which is within the normal range, indicating that the equalization circuit is normal at this time.

[0122] The standard threshold values ​​for the thyristor-level impedance of the converter valve used in this invention are: 600-700Ω (frequency 100Hz) and 25-35Ω (frequency 100kHz).

[0123] according to Figure 5 (a) shows that the peak voltage of the circuit is 100V when a 100Hz voltage signal is applied. Figure 5 (b) shows that the peak current of the circuit under a 100Hz voltage signal is 0.154A, and the overall impedance of the circuit at this time can be calculated to be 649Ω.

[0124] according to Figure 6 (a) shows that the peak voltage of the circuit is 100V when a 100kHz voltage signal is applied. Figure 6 (b) shows that the peak current of the circuit under a 100kHz voltage signal is 3.05A, and the overall impedance of the circuit at this time can be calculated to be 33Ω.

[0125] Assuming a short circuit occurs in capacitors C1 and C2 in the damping circuit and energy extraction circuit of the converter valve, an impedance test is performed based on the established fault tree model. The test results are as follows: Figure 7 , 8 As shown.

[0126] according to Figure 7 (a) shows that the peak voltage of the circuit is 100V when a 100Hz voltage signal is applied. Figure 7 (b) shows that the peak current of the circuit under a 100Hz voltage signal is 0.275A, and the overall impedance of the circuit at this time can be calculated to be 364Ω.

[0127] according to Figure 8 (a) shows that the peak voltage of the circuit is 100V when a 100kHz voltage signal is applied. Figure 8 (b) shows that the peak current of the circuit under a 100kHz voltage signal is 3.05A, and the overall impedance of the circuit at this time can be calculated to be 33Ω.

[0128] It can be seen that the 100Hz impedance test is abnormal, while the 100kHz impedance test is normal. This indicates that the capacitor components in the damping circuit and energy extraction circuit of the converter valve have failed, which is consistent with the set conditions.

[0129] Assuming a short circuit occurs in resistors R2 and R3 in the damping circuit and energy extraction circuit of the converter valve, an impedance test is performed based on the established fault tree model. The test results are as follows: Figure 9 , 10 As shown.

[0130] according to Figure 9 (a) shows that the peak voltage of the circuit is 100V when a 100Hz voltage signal is applied. Figure 9(b) shows that the peak current of the circuit under a 100Hz voltage signal is 0.154A, and the overall impedance of the circuit at this time can be calculated to be 649Ω.

[0131] according to Figure 10 (a) shows that the peak voltage of the circuit is 100V when a 100kHz voltage signal is applied. Figure 10 (b) shows that the peak current of the circuit under a 100kHz voltage signal is 6A, and the overall impedance of the circuit at this time can be calculated to be 17Ω.

[0132] It can be seen that the 100kHz impedance test is abnormal, while the 100Hz impedance test is normal. This indicates that the resistors in the damping circuit and energy extraction circuit of the converter valve have failed, which is consistent with the set conditions.

[0133] Assuming a fault occurs in the resistors of the converter valve's damping circuit and energy extraction circuit, causing a surge in resistance, an impedance test is performed based on the established fault tree model. The test results are as follows: Figure 11 , 12 As shown.

[0134] according to Figure 11 (a) shows that the peak voltage of the circuit is 100V when a 100Hz voltage signal is applied. Figure 11 (b) shows that the peak current of the circuit under a 100Hz voltage signal is 0.125A, and the overall impedance of the circuit at this time can be calculated to be 800Ω.

[0135] according to Figure 12 (a) shows that the peak voltage of the circuit is 100V when a 100kHz voltage signal is applied. Figure 12 (b) shows that the peak current of the circuit under a 100kHz voltage signal is 0.26A, and the overall impedance of the circuit at this time can be calculated to be 384Ω.

[0136] It can be seen that the 100Hz impedance test is abnormal and the 100kHz impedance test is abnormal. At this time, the damping circuit and the resistance in the energy extraction circuit of the converter valve are faulty, which is consistent with the set situation.

[0137] In summary, this invention utilizes multi-frequency (DC, 100Hz, 100kHz) impedance testing, combined with the frequency-dependent characteristics of resistance and capacitance, to deeply analyze the comprehensive impedance characteristics of the damping circuit, voltage equalization circuit, and energy extraction circuit of the converter valve. Through frequency-specific detection, abnormal resistance and capacitance behavior can be distinguished, achieving more accurate fault location. Furthermore, this invention combines fault tree analysis with multi-frequency impedance testing, systematically linking impedance test results to specific component faults within the converter valve through logical analysis of top, intermediate, and bottom events. This method can quickly locate specific fault points without disconnecting electrical connections, improving detection efficiency and reducing the possibility of false positives and false negatives.

[0138] This invention also proposes a converter valve fault detection system based on fault tree analysis and multi-frequency impedance testing, including a data acquisition module, a comprehensive impedance calculation module, a fault detection module, and a computer program that can run on a processor. It should be noted that each module in the above system corresponds to a specific step of the method provided in this invention embodiment, possessing the corresponding functional modules and beneficial effects for executing the method. Technical details not described in detail in this embodiment can be found in the method provided in this invention embodiment.

[0139] This invention also proposes an electronic device, including a memory, a processor, and a computer program stored in the memory and executable on the processor. It should be noted that when the processor executes the computer program, it corresponds to the specific steps of the method provided in this invention, possessing the corresponding functional modules and beneficial effects for executing the method. Technical details not described in detail in this embodiment can be found in the method provided in this invention.

[0140] This invention also proposes a computer-readable storage medium storing a computer program. It should be noted that when the computer program is executed by a processor, it corresponds to the specific steps of the method provided in this invention, possessing the corresponding functional modules and beneficial effects for executing the method. Technical details not described in detail in this embodiment can be found in the method provided in this invention.

[0141] The above description is only a preferred embodiment of the present invention. It should be noted that for those skilled in the art, several improvements and modifications can be made without departing from the technical principles of the present invention, and these improvements and modifications should also be considered within the scope of protection of the present invention.

Claims

1. A method for detecting faults in a converter valve based on fault tree analysis and multi-frequency impedance testing, characterized in that, include: S1. Apply multi-frequency voltage signals across the thyristor stage of the converter valve and collect current and voltage data at each frequency; the multi-frequency voltage signals include DC signals and AC signals of different frequencies. S2. Based on the current and voltage data in step S1, obtain the combined impedance of the damping circuit, equalizing circuit, and energy extraction circuit of the converter valve. S3. Establish a fault tree analysis model related to converter valve fault detection. Input the comprehensive impedance obtained in step S2 into this model to perform fault diagnosis on the damping circuit, pressure equalization circuit, and energy harvesting circuit of the converter valve. Verify the obtained fault diagnosis using the active and reactive power equations to complete the fault detection of the converter valve; specifically: Fault tree analysis models include top events, intermediate events, and bottom events; Among them, the top events are the failures of the damping circuit, pressure equalization circuit and energy extraction circuit of the converter valve; Intermediate events include resistor and capacitor failures in the converter valve's damping circuit and energy extraction circuit, as well as voltage equalization circuit failures. The underlying event is a specific component failure in the thyristor stage of the converter valve; The top event, middle event, and bottom event are all logical OR gates; When the input composite impedance is outside the standard threshold range of the converter valve thyristor-level impedance, it indicates a fault in the converter valve. When the composite impedance at frequency f1 is outside the standard threshold range of the converter valve thyristor-level impedance, but the composite impedance at frequency f2 is within the standard threshold range of the converter valve thyristor-level impedance, it indicates a capacitor fault in the damping circuit and energy extraction circuit of the converter valve. When the composite impedance at frequency f2 is outside the standard threshold range of the converter valve thyristor-level impedance, but the composite impedance at frequency f1 is within the standard threshold range of the converter valve thyristor-level impedance, it indicates a resistance fault in the damping circuit and energy extraction circuit of the converter valve. When both the composite impedance at frequency f1 and the composite impedance at frequency f2 are outside the standard threshold range of the converter valve thyristor-level impedance, if the resistance value is on the order of tens of thousands of ohms, it indicates a resistance fault; if the capacitive reactance value is on the order of tens of thousands of ohms, it indicates a capacitor fault.

2. The converter valve fault detection method based on fault tree analysis and multi-frequency impedance testing according to claim 1, characterized in that, In step S2, the combined impedance of the damping circuit, pressure equalization circuit, and energy extraction circuit of the converter valve is... The calculation formula is: ； in, Indicates the applied DC voltage. Indicates direct current; The peak current and voltage corresponding to AC signals of different frequencies are detected, and the comprehensive impedance value at the corresponding frequency is calculated using the following formula: ； ； in, This represents the combined impedance at frequency f1; This represents the combined impedance at frequency f2; , These represent the peak voltages corresponding to frequencies f1 and f2, respectively. , These represent the peak currents corresponding to frequencies f1 and f2, respectively.

3. The converter valve fault detection method based on fault tree analysis and multi-frequency impedance testing according to claim 1, characterized in that, By applying AC signals of different frequencies to both ends of the thyristor stage of the converter valve, the active and reactive power equations are obtained, and the fault judgment of the damping circuit and energy harvesting circuit of the converter valve is verified. The damping circuit includes a first resistor R1, a second resistor R2, a first capacitor C1, and a second capacitor C2; the energy extraction circuit includes a third resistor R3 and a third capacitor C3; the voltage equalization circuit includes a fourth resistor R dc1 and the fifth resistor R dc2 ; The impedance Z1 of the series branch formed by the first resistor R1 and the first capacitor C1 is: Z1= ； Where j represents the imaginary part, Represents angular frequency. f represents the applied frequency, f = f1, f2; The impedance Z2 corresponding to the series branch formed by the second resistor R2 and the second capacitor C2 is: Z2= ； The impedance Z3 corresponding to the series branch formed by the third resistor R3 and the third capacitor C3 is: Z3= ； The impedance Z corresponding to the parallel branch formed by Z2 and Z3 is Z. 23 for: ； definition , ; but ; definition , ; but ; Z1 and Z 23 The impedance Z of the series branch is formed 123 for: ； The active power P1 of the damping circuit and energy extraction circuit of the converter valve is: ； Where U represents the applied AC voltage; The reactive power Q1 of the damping circuit and energy extraction circuit of the converter valve is: ； The active power P2 and reactive power Q2 of the corresponding branch in the pressure equalization circuit of the converter valve are as follows: ； ； The total active power P and total reactive power Q under AC signals of different frequencies are as follows: ； ； Based on the known total active power P and total reactive power Q, the resistance and capacitive reactance values ​​are obtained using the active and reactive power equations. When the resistance value is within ±5% of the rated value, it indicates a resistor fault; when the capacitance value is within ±10% of the rated value, it indicates a capacitor fault.

4. A system applied to the converter valve fault detection method based on fault tree analysis and multi-frequency impedance testing as described in claim 1, characterized in that, include: The data acquisition module is used to apply multi-frequency voltage signals across the thyristor stage of the converter valve and acquire current and voltage data at each frequency. The integrated impedance calculation module is used to obtain the integrated impedance of the damping circuit, equalizing circuit and energy extraction circuit of the converter valve based on the current and voltage data in the data acquisition module. The fault detection module is used to establish a fault tree analysis model related to the fault detection of the converter valve. The comprehensive impedance obtained from the comprehensive impedance calculation module is input into this model to diagnose the fault conditions of the damping circuit, pressure equalization circuit and energy harvesting circuit of the converter valve. The obtained fault diagnosis is verified by the active and reactive power equations, thus completing the fault detection of the converter valve.

5. An electronic device comprising a memory, a processor, and a computer program stored in the memory and executable on the processor, characterized in that, When the processor executes the computer program, it implements the steps of the converter valve fault detection method based on fault tree analysis and multi-frequency impedance testing as described in any one of claims 1 to 3.

6. A computer-readable storage medium storing a computer program, characterized in that, The computer program, when run by the processor, executes the converter valve fault detection method based on fault tree analysis and multi-frequency impedance testing as described in any one of claims 1 to 3.

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