Heterogeneous computing system and cache consistency maintenance method, device, equipment, and medium

Abstract

The present invention discloses a heterogeneous computing system and a cache consistency maintenance method, device, equipment, and medium, which relate to the field of heterogeneous computing technology. The method includes determining the hot data access path at the current moment based on the access order and dependency strength of each data block of the heterogeneous computing system at the current moment; generating current operating status information based on the hot data access path, the workload information, cache validity information, and cross-device communication information of the heterogeneous computing system at the current moment; and determining the cache consistency protocol that best matches the current operating status of the heterogeneous computing system based on the current operating status information based on the relationship between the operating status of the heterogeneous computing system and the cache consistency protocol type. The present invention can solve the problem that related technologies cannot effectively and dynamically optimize cache consistency protocols, and can dynamically capture cross-device data dependencies, accurately perceive dynamic changes, and ensure system high performance and data consistency.

Description

Technical Field

[0001] The present invention relates to the field of heterogeneous computing, and in particular to a heterogeneous computing system and a cache consistency maintenance method, device, electronic device, non-volatile storage medium, and computer program product thereof. Background Art

[0002] Heterogeneous computing systems integrate computing units with different architectures. When multiple computing units simultaneously hold data copies through private caches, modifications to the data by any computing unit will lead to cache inconsistency.

[0003] Related technologies maintain cache coherence by dynamically adjusting the cache coherence protocol by setting simple read-write ratio thresholds to adapt to load changes in heterogeneous computing systems in real time. However, this approach cannot accurately capture complex cross-device data dependencies, accurately perceive dynamic system changes, or effectively optimize the cache coherence protocol dynamically. Summary of the Invention

[0004] The present invention provides a heterogeneous computing system and its cache consistency maintenance method, device, electronic device, non-volatile storage medium, and computer program product, which can dynamically capture complex cross-device data flows and dependencies, accurately perceive dynamic changes in the system, and effectively dynamically adjust the cache consistency protocol to ensure the high performance and cache data consistency of the heterogeneous computing system.

[0005] In order to solve the above technical problems, the present invention provides the following technical solutions:

[0006] In one aspect, the present invention provides a cache consistency maintenance method, comprising:

[0007] According to the access sequence and dependency strength of each data block of the heterogeneous computing system at the current moment, a hot data access path of the heterogeneous computing system at the current moment is determined.

[0008] Based on the hot data access path, the workload information, cache validity information and cross-device communication information of the heterogeneous computing system at the current moment, the current operation status information is generated.

[0009] Based on the relationship between the operating state of the heterogeneous computing system and the cache coherence protocol type, a cache coherence protocol that best matches the current operating state of the heterogeneous computing system is determined according to the current operating state information.

[0010] Another aspect of the present invention provides a cache consistency maintenance device, comprising:

[0011] The critical path identification module is used to determine the hot data access path of the heterogeneous computing system at the current moment according to the access sequence and dependency strength of each data block of the heterogeneous computing system at the current moment.

[0012] The state perception module is used to generate the current operation state information based on the hot data access path, the workload information of the heterogeneous computing system at the current moment, the cache validity information and the cross-device communication information.

[0013] The protocol dynamic selection module is used to determine the cache consistency protocol that best matches the current operating state of the heterogeneous computing system based on the relationship between the operating state of the heterogeneous computing system and the cache consistency protocol type according to the current operating state information.

[0014] The present invention also provides an electronic device comprising a memory and a processor, wherein the processor is configured to implement the steps of any of the above-mentioned cache consistency maintenance methods when executing a computer program stored in the memory.

[0015] The present invention also provides a non-volatile storage medium having a computer program stored thereon, which implements the steps of any of the above-mentioned cache consistency maintenance methods when executed by a processor.

[0016] The present invention also provides a computer program product, comprising a computer program / instruction, which implements the steps of any of the above cache consistency maintenance methods when executed by a processor.

[0017] Finally, the present invention also provides a heterogeneous computing system, which includes at least a first computing node, a second computing node and a cache consistency controller, wherein the cache consistency controller is connected to the first computing node and the second computing node, and the first computing node and the second computing node include at least two computing units; wherein the cache consistency controller is used to implement the steps of any of the above cache consistency maintenance methods when executing a computer program.

[0018] The technical solution provided by the present invention has the advantage of dynamically capturing cross-device data flows and dependencies based on access information between data blocks at different times in a heterogeneous computing system, thereby accurately determining hot data access paths that reflect the key links of data access in the heterogeneous computing system. Through the hot data access paths, the parts that have the greatest impact on the performance of the heterogeneous computing system can be determined, providing accurate data support for the optimization of cache consistency protocols. The dynamic changes of the heterogeneous computing system can be accurately and efficiently perceived by the current workload information, cache validity information, and cross-device communication information of the heterogeneous computing system. Based on the relationship between the operating state of the heterogeneous computing system and the cache consistency protocol type, the cache consistency protocol that best matches the current state of the heterogeneous computing system can be dynamically adjusted based on the current state, thereby achieving effective dynamic adjustment of the cache consistency protocol, minimizing communication overhead and delay, improving system throughput, and ensuring high performance and cache data consistency of the heterogeneous computing system. In addition, the present invention also provides a corresponding implementation device, electronic device, non-volatile storage medium, computer program product, and heterogeneous computing system for the cache consistency maintenance method, further making the method more practical. The device, electronic device, non-volatile storage medium, computer program product, and heterogeneous computing system have corresponding advantages. BRIEF DESCRIPTION OF THE DRAWINGS

[0019] In order to more clearly illustrate the technical solutions of the present invention or related technologies, the following briefly introduces the drawings required for use in the embodiments or related technical descriptions. Obviously, the drawings described below are only some embodiments of the present invention. For ordinary technicians in this field, other drawings can be obtained based on these drawings without paying any creative work.

[0020] Figure 1 A schematic diagram of a hardware composition framework applicable to the cache consistency maintenance method provided by the present invention;

[0021] Figure 2 A schematic diagram of a process flow of a cache consistency maintenance method provided by the present invention;

[0022] Figure 3 A flowchart of a method for learning the relationship between an operating state and a cache consistency protocol type provided by the present invention;

[0023] Figure 4 A structural framework diagram of an exemplary embodiment of the cache consistency maintenance device provided by the present invention;

[0024] Figure 5 A structural diagram of an exemplary embodiment of an electronic device provided by the present invention;

[0025] Figure 6A structural diagram of an exemplary embodiment of a heterogeneous computing system provided by the present invention;

[0026] Figure 7 This is a structural diagram of an exemplary embodiment of the cache coherence controller provided by the present invention. DETAILED DESCRIPTION

[0027] In order to enable those skilled in the art to better understand the technical solutions of the present invention, the present invention will be further described in detail below in conjunction with the accompanying drawings and specific embodiments. The terms "first," "second," "third," "fourth," etc. in the specification and the accompanying drawings are used to distinguish different objects rather than to describe a specific order. Furthermore, the terms "including" and "having," as well as any variations thereof, are intended to cover non-exclusive inclusions. The term "exemplary" means "serving as an example, embodiment, or illustration." Any embodiment described herein as "exemplary" is not necessarily to be construed as superior or better than other embodiments.

[0028] Heterogeneous computing is a technology that uses multiple processors with different architectures to work together in the same computing system to improve computing efficiency and performance. Heterogeneous computing systems combine different types of processors such as CPU (Central Processing Unit), GPU (Graphics Processing Unit), TPU (Tensor Processing Unit), FPGA (Field Programmable Gate Array), etc., giving full play to their respective advantages to achieve parallel computing. Compared with homogeneous systems, they can provide more computing power (that is, data processing capacity or computing power) resources and are widely used in AI (Artificial Intelligence). In the field of artificial intelligence (AI), it can not only meet the needs of AI model training and reasoning for efficient processing of massive data, but also solve the low energy efficiency of homogeneous computing systems. When processing AI tasks, due to architectural limitations, a large amount of energy is consumed to maintain operations, resulting in high heat dissipation and energy consumption. It can dynamically allocate resources according to task characteristics. Different processors consume less energy when processing suitable tasks, effectively reducing the energy consumption and heat dissipation costs of AI applications. It also supports flexible selection and combination of different types of processors and architectures according to different AI application scenarios and resource requirements, facilitating expansion and upgrades to adapt to the ever-changing AI technology and business needs.

[0029] Heterogeneous computing systems integrate a variety of heterogeneous processors, accelerators, and memory components. These systems are typically composed of multiple computing units (CPUs, GPUs, FPGAs, and Neural Network Processing Units (NPUs)) with significant differences in performance, power consumption, programming models, and memory consistency models. However, as the computing power gap between accelerators like GPUs and NPUs and CPUs has widened by orders of magnitude, the data throughput demands of computing cores have far outstripped the memory bandwidth available, leading to a "memory wall effect." This has led to significant performance imbalances in heterogeneous computing systems, including cross-device data contention, protocol rigidity, and insufficient hardware support. Cross-device data contention refers to the difficulty in coordinating read and write operations across devices due to differing memory consistency models (e.g., strong consistency for CPUs and weak consistency for GPUs). This can easily lead to data contention, impacting overall system performance and data consistency. Protocol rigidity refers to the inability of traditional cache coherence protocols to dynamically adapt to load fluctuations, resulting in reduced system performance. For example, directory protocols can easily cause directory bloat in scenarios with high write traffic, while broadcast protocols can be prohibitively expensive in scenarios with high read traffic. Insufficient hardware support means that the current cache consistency solutions cannot fully support non-multi-copy atomicity (non-MCA) hardware, resulting in the inability of these hardware to fully utilize their performance advantages and limiting the overall computing power of the system.

[0030] To ensure the stable operation of heterogeneous computing systems, related technologies achieve cache coherence through protocol stack innovation and hardware co-design. At the software protocol layer, these technologies maintain cache coherence in heterogeneous computing systems in read-intensive, write-infrequent workloads using a bus snooping protocol, and in scenarios with frequent data updates using a directory protocol. In this bus snooping protocol, the private cache of each processing unit in the heterogeneous computing system continuously monitors bus transactions. Upon detecting a coherence request broadcast from the bus, predefined response logic is triggered based on the local cache line state. This leverages the physical properties of the bus medium to ensure transaction atomicity and ordering, simplifying the state transition logic into a deterministic finite state machine. Cache state synchronization can be achieved with minimal effort through a global broadcast communication model. However, as multi-core processors scale, bus loads increase. The fact that only one CPU is allowed to occupy the bus at a time leads to frequent blocking of memory access requests, significantly increasing memory access latency and potentially wasting resources. Furthermore, the bus snooping protocol has poor scalability, making it difficult to adapt to the needs of large-scale processor systems. In other words, the bus snooping protocol can effectively maintain cache coherence in small-scale heterogeneous computing systems with minimal effort. The target protocol achieves cache coherence through a global public directory that records the state information of global cache lines. This global public directory includes the coherence state and a list of replica owners. In the directory protocol, all coherence messages are forwarded through the directory structure. By querying the replica owner list, efficient point-to-point message transmission is achieved, reducing network communication overhead. Furthermore, the directory protocol effectively manages replicas of shared data. By establishing a directory to track the storage location and status of data, multiple processors can conveniently access shared data, improving data availability and access efficiency. Large-scale multi-core processor systems can effectively coordinate cache interactions in a multi-core environment through centralized directory management, achieving efficient and reliable cache coherence maintenance. However, storing and updating the directory consumes resources, which may affect overall system performance. Furthermore, the directory protocol may introduce additional communication latency, slowing data access, making it unsuitable for large-scale heterogeneous computing systems with high real-time requirements and limited resources.

[0031] Regarding the collaborative implementation of cache consistency maintenance by the software protocol layer and the hardware layer, a related technology maintains cache consistency across heterogeneous computing systems based on a snooping update strategy. This technology uses a translator module to convert the internal memory consistency model of a cluster into a unified consistency protocol based on the C11 memory consistency model. The consistency controller module acts as a consistency protocol manager, receiving messages from each translator and uniformly reordering and routing them. This utilizes the loose ordering behavior of heterogeneous clusters to achieve effective compatibility between multiple heterogeneous memory consistency models. Another related technology, based on a heterogeneous consistency protocol with a directory strategy, designs a composite consistency protocol fusion method for heterogeneous clusters. This method adheres to a global composite consistency model while retaining the consistency model of the original cluster. It uses a proxy cache to fuse the consistency models of different clusters to ensure consistency across the entire system. These two methods incur additional translation and fusion overheads to maintain consistency, which may affect system performance.

[0032] Although the above methods can alleviate the obstacles in memory access to a certain extent, some problems still exist: updating the protocol requires a fixed global directory, it is impossible to dynamically optimize the protocol strategy, it has poor flexibility, and poor performance in complex load scenarios. In addition, protocol synthesis relies on static cluster configuration, lacks runtime adaptability, and cannot dynamically adjust the protocol according to the system status, resulting in less than ideal performance in different load scenarios and an inability to effectively adapt to diverse heterogeneous architectures. In order to adapt to the dynamic characteristics of task loads and achieve flexible switching of consistency maintenance protocols, protocols are usually selected through simple read-write ratio thresholds. This method cannot accurately capture complex cross-device data dependencies and is difficult to achieve efficient protocol optimization.

[0033] In order to solve the problem in the related art that the cache consistency protocol cannot respond to the dynamic changes of the heterogeneous computing system in real time during the cache consistency maintenance of the heterogeneous computing system, resulting in the degradation of the performance of the heterogeneous computing system, the present invention can dynamically capture the data flow and dependency relationship across devices by obtaining the access information between data blocks at different times according to the heterogeneous computing system, and then determine the critical path of data access. The dynamic changes of the heterogeneous computing system are perceived in real time, and the cache consistency protocol of the heterogeneous computing system is dynamically adjusted according to the relationship between the operating status and the cache consistency protocol type. In combination with the specific application environment architecture or the specific hardware architecture on which the execution of the cache consistency maintenance method depends, the specific application environment architecture or the specific hardware architecture is described here. The following is combined with Figure 1 Some possible application scenarios involved in the technical solution of the present invention are introduced by way of example, which may include the following:

[0034] In this embodiment, a heterogeneous computing system includes multiple servers 1, each server 1 serving as a computing node of the heterogeneous computing system. Each server includes at least two computing units 10. In addition to its own CPU, it also includes at least one built-in computing unit of a different type from the CPU architecture, such as a GPU, FPGA, or ASIC. The communication structure of the heterogeneous computing system is as follows: all computing units of all computing nodes are divided according to computing unit type, and computing units of the same computing unit type are divided into clusters. The computing units in the same cluster can be connected via a tree topology, and one computing unit is selected as the master computing unit. Different clusters interact through the master computing unit, and the clusters are connected via the master computing unit using a ring topology.

[0035] In order to overcome the problems in related technologies such as difficulty in maintaining consistency of heterogeneous computing systems, high protocol complexity, scalability, and poor hardware support, this embodiment proposes a consistency maintenance method based on graph-driven, dynamic perception of the operating status of heterogeneous computing systems and dynamic adjustment of system cache consistency protocols. A cache consistency controller that implements the computer program code for the following method steps can be built into any of the above-mentioned servers or cloud servers, and a running status data collection component and a data block access sequence collection component can be built into each server. The running status data, such as CPU load rate, GPU cache hit rate, and network delay data, are determined in real time by the cache consistency controller based on the access order and dependency strength of each data block of the heterogeneous computing system. The hot data access path of the heterogeneous computing system at each moment or the focus moment is determined; based on the hot data access path, the workload information, cache validity information, and cross-device communication information of the heterogeneous computing system at the current moment, the running status information of the corresponding moment is generated; based on the pre-learned or pre-built relationship between the running status of the heterogeneous computing system and the cache consistency protocol type, the cache consistency protocol that best matches the current running status of the heterogeneous computing system is determined according to the running status information at that moment. If the current heterogeneous computing system adopts this cache consistency protocol, there is no need to switch. If the current heterogeneous computing system does not adopt this cache consistency protocol, it switches to this cache consistency protocol, thereby achieving effective dynamic adjustment of the cache consistency protocol and ensuring the high performance and cache data consistency of the heterogeneous computing system. It should be noted that this application scenario is merely provided to facilitate understanding of the concepts and principles of the present invention, and the embodiments of the present invention are not limited in this respect. Rather, the embodiments of the present invention can be applied to any applicable scenario. Having introduced the technical solution of the present invention, various non-limiting embodiments of the present invention will be described in detail below with reference to the accompanying drawings and specific embodiments.

[0036] First see Figure 2 , Figure 2This is a flow chart of a cache consistency maintenance method provided in this embodiment. Heterogeneous computing systems are more complex than homogeneous computing systems. First, there are differences in memory consistency models between computing units, that is, differences in the contract issues between software and memory. For example, the CPU adopts a strong consistency model, while acceleration devices such as GPUs and FPGAs mostly adopt a weak consistency model. This difference makes it difficult to coordinate read and write operations across devices, which easily leads to data competition problems, thereby affecting the performance and data consistency of the system. Secondly, there are differences in communication delay and bandwidth between devices. There are significant differences in communication delay and bandwidth between different devices. This difference requires protocol optimization to consider the communication characteristics between devices. For example, the communication delay between the CPU and GPU may be low, while the communication delay between the CPU and FPGA or NPU may be high. In addition, the load in a heterogeneous computing system is usually dynamic, and different devices may undertake different computing tasks at different times. The cache consistency protocol needs to be able to adapt to these changes in real time and dynamically adjust the protocol strategy to ensure the high performance and data consistency of the system. These situations lead to a high complexity in cache consistency maintenance in heterogeneous computing systems. The present invention provides the following embodiments to achieve effective maintenance of cache consistency in heterogeneous computing systems:

[0037] S201: Determine a hot data access path of the heterogeneous computing system at the current moment according to the access sequence and dependency strength of each data block of the heterogeneous computing system at the current moment.

[0038] A heterogeneous computing system can be a multi-heterogeneous computing system, a non-multi-heterogeneous computing system, or any type of heterogeneous computing system, as long as it meets the definition of a heterogeneous computing system. The present invention does not impose any restrictions on this. Access order refers to the order of reading and writing data between different data blocks. The strength of the dependency includes whether there is a read-write dependency between different data blocks. If there is a read operation dependency or a write operation dependency, the strength of this dependency can be measured, for example, by the proportion of the number of cross-accesses to the number of respective read and write operations. Hot data access paths refer to access paths between data blocks. The access between these data blocks is the key link of the heterogeneous computing system, or the read-write situation that has the greatest impact on the performance of the current heterogeneous computing system.

[0039] S202: Generate current operation status information based on hot data access paths, workload information, cache validity information, and cross-device communication information of the heterogeneous computing system at the current moment.

[0040] It is understandable that the load in a heterogeneous computing system is usually dynamically changing, and different devices may undertake different computing tasks at different times. The cache consistency protocol can only ensure the performance of the heterogeneous computing system if it adapts to these changes in real time. This step uses the hot data access path determined in the previous step. The workload information, cache validity information and cross-device communication information of the heterogeneous computing system are used together as data reflecting the dynamic changes of the heterogeneous computing system at different times. That is, the current operating status information refers to the hot data access path determined by S201 at the current moment, and the workload information, cache validity information and cross-device communication information data set obtained by the monitoring tool at the current moment. Among them, the workload information can be the load of the CPU of the computing node, the cache validity information refers to the effectiveness of the cache mechanism in satisfying memory requests, the cache can be the cache of the acceleration device built into the computing node, such as the GPU or FPGA, and the cross-device communication information is the network communication status between different computing units or the network communication status between different computing nodes.

[0041] S203: Based on the relationship between the operating state of the heterogeneous computing system and the cache coherence protocol type, determine the cache coherence protocol that best matches the current operating state of the heterogeneous computing system according to the current operating state information.

[0042] It's understandable that the choice of cache coherence protocol impacts the overall performance of heterogeneous computing systems. To ensure high system performance, this step dynamically selects the optimal cache coherence protocol based on the system's current state. This addresses the problem that traditional protocol selection methods, such as those based on manually set thresholds or fixed protocol modes, cannot dynamically adjust to the system's real-time state and load changes, resulting in protocol rigidity and suboptimal performance. In this step, the relationship between the operating status of the heterogeneous computing system and the cache coherence protocol type can be pre-learned using an artificial intelligence model or a deep learning algorithm. When pre-learning the relationship between the two, the method for determining the operating status data in the training sample or the sample in the fine-tuning stage is the same as the method in S201 and S202 above. With the help of the artificial intelligence model and the deep learning algorithm, a precise relationship between the operating status and the cache coherence protocol type can be obtained. After the operating status information of the heterogeneous computing system is determined in S202, the most suitable protocol can be automatically selected under different load scenarios. If the cache coherence protocol currently used by the heterogeneous computing system is the same as the best-matched cache coherence protocol selected, no protocol adjustment is required. If the cache coherence protocol currently used by the heterogeneous computing system is different from the best-matched cache coherence protocol selected, the best-matched cache coherence protocol selected in this step is switched to. This achieves effective dynamic adjustment of the cache coherence protocol mode and real-time optimization of protocol selection, thereby minimizing communication overhead and latency, improving system throughput, significantly improving system adaptability and flexibility, overcoming the drawbacks of the rigidity of traditional protocols, and enhancing the overall performance of the heterogeneous computing system.

[0043] In the technical solution provided in this embodiment, based on the access information between data blocks at different times in the heterogeneous computing system, cross-device data flows and dependencies can be dynamically captured, thereby accurately determining the hot data access paths that reflect the key links of data access in the heterogeneous computing system. Through the hot data access paths, the parts that have the greatest impact on the performance of the heterogeneous computing system can be determined, providing accurate data support for the optimization of the cache consistency protocol. The dynamic changes of the heterogeneous computing system can be accurately and efficiently perceived by the current workload information, cache validity information, and cross-device communication information of the heterogeneous computing system. Based on the relationship between the operating state of the heterogeneous computing system and the cache consistency protocol type, the cache consistency protocol that best matches the current state of the heterogeneous computing system can be dynamically adjusted based on the current state, thereby achieving effective dynamic adjustment of the cache consistency protocol, minimizing communication overhead and latency, improving system throughput, and ensuring high performance and cache data consistency of the heterogeneous computing system.

[0044] The data access patterns between different computing units in a heterogeneous computing system are complex and diverse, and change dynamically with changes in application load. Considering that load modeling methods described in related technologies, such as those based on fixed feature vectors or static configurations, are difficult to accurately capture these dynamic changes, resulting in a lack of accurate data support when performing protocol selection in S203. In view of this, this embodiment proposes graph-driven load modeling, which dynamically captures cross-device data flows and dependencies by constructing a data access dependency graph. The graph-driven load modeling process may include the following:

[0045] Obtain access information between data blocks in a heterogeneous computing system, determine the access order and dependency relationships between data blocks based on the access information, and construct a data access dependency graph using data blocks as graph nodes and the dependencies between data blocks as the connecting edges between graph nodes; determine the corresponding edge weights based on the read and write operation time information and the number of read and write operations of data blocks with dependencies; and determine the hot data access paths of the heterogeneous computing system at the current moment by analyzing the edge weights of the connecting edges between different graph nodes.

[0046] In this embodiment, access information includes at least read and write operation time information and operation type. A lightweight probe can be pre-implanted in each computing unit. This probe records the access sequence of data blocks in real time, including read and write operation timestamps, operation types, and other information. Offline analysis tools (such as Apache Spark) are used to analyze the access information collected by the lightweight probe. A directed data access dependency graph is constructed, with data blocks as graph nodes and dependencies between data blocks as edges between graph nodes. Based on this, for each edge in the data access dependency graph, the access information of the data blocks corresponding to the graph nodes on both sides of the edge is calculated to determine the strength of the dependency relationship between the two, and this dependency strength is used as the edge weight of the edge. Each node in this directed graph represents a data block, and edges represent dependencies between data blocks. The edge weight reflects the strength of the dependency. This data access dependency graph allows for intuitive identification of critical paths and synchronization hotspots for data access. The critical path is the hotspot access path, and the synchronization hotspot is the data block on the hotspot access path. This allows for dynamic capture of cross-device data flows and dependencies, providing accurate data support for subsequent protocol optimization.

[0047] Exemplarily, an exemplary implementation method of determining edge weights based on access information of data blocks is as follows: for a first data block and a second data block having a read-write dependency relationship, the first data block and the second data block are data blocks corresponding to any two graph nodes having a connecting edge in the data access dependency graph, and for ease of description, are defined as the first data block and the second data block, respectively. Based on the maximum value between the number of reads and the number of writes of the first data block, the maximum value between the number of reads and the number of writes of the second data block, and the number of cross-accesses between the first data block and the second data block, the dependency strength between the first data block and the second data block is determined as the weight of the connecting edge between the first data block and the second data block in the data access dependency graph. In order to further improve the overall efficiency, the dependency strength calculation formula can be pre-stored, and the dependency strength calculation formula can be expressed as:

[0048] ;

[0049] Among them, the first data block is the data block , its access information can be expressed as follows: number of reads , Write times , the second data block is data block , its access information can be expressed as follows: number of reads , Write times , the dependency relationship between the two is the edge weight For example, the data access dependency graph has two data blocks connected by an edge and data blocks ,in, Number of reads , write times , data block Number of reads , write times .if The write operation depends on The read result of , and the number of cross accesses is 6, then the edge weight between the two is obtained by calling the above dependency strength calculation formula:

[0050] .

[0051] Exemplarily, the process of determining the hot data access path is as follows: calculate the associated connection edges through which data is accessed between each two graph nodes of the data access dependency graph; take the sum of the edge weights of each associated connection edge as the weight of the corresponding data access path, and take the data access path with the largest weight value as the current hot data access path.

[0052] In this embodiment, when determining the hot data access path of a heterogeneous computing system, the maximum weight sum can reflect the key link of data access in the system. The hot data access path can select the path with the largest weight sum in the graph. By calculating the weight sum of all paths in the data access dependency graph, the path with the largest weight sum is found, which is the hot data access path. The longest path algorithm can be used to identify the hot data access path. The path weight sum can be defined as: in, represents an edge on the access path P between data blocks i and j, and W(P) is the sum of the weights of this path. For example, a graph algorithm library (such as NetworkX (algorithm library name)) can be used to regularly extract hot data access paths from the data access dependency graph using the longest path algorithm. Identifying these critical paths can help the system focus on optimizing those areas that have the greatest impact on performance, effectively perceiving heterogeneous computing systems and providing accurate data support for effectively optimizing cache consistency protocols.

[0053] In order to further optimize system performance, the data access dependency graph can also be optimized. For example, when pre-set graph update conditions are met, such as at regular intervals or upon receiving instructions, new access information for each data block of the heterogeneous computing system is obtained; based on the new access information, the connection edges and edge weights of the data access dependency graph are updated, and the connection edges between graph nodes with edge weights less than a preset edge weight threshold are deleted from the data access dependency graph. For example, during system operation, the data access dependency graph is incrementally updated at regular intervals (such as 10 seconds), and node attributes and edge weights are adjusted based on the latest data access information. Edges with weights lower than a preset edge weight threshold (such as 0.1) are pruned to prevent the data access dependency graph from occupying a large amount of memory resources and affecting system performance. The accuracy and timeliness of the data access dependency graph are maintained, thereby optimizing system performance.

[0054] In order to further improve the effective optimization of the cache consistency protocol, based on the above embodiment, priority synchronization areas can also be extracted, which may include the following contents: counting the weight sums corresponding to access paths between different graph nodes in the statistical access dependency graph, and determining target access paths whose weight sums exceed a preset path weight threshold; generating hotspot data subgraphs based on the target graph nodes corresponding to the target access paths and their corresponding connecting edges as high-priority synchronization areas.

[0055] In this embodiment, after determining that the data access dependency graph has the weights of each edge connecting the edges, the weights and the weights exceeding the preset path weight threshold can be extracted. , marking it as a high priority synchronization region. For example, there is a path in the data access dependency graph , , , then the sum of the path weights is ,when , then the path is marked as a path in the high-priority synchronization area. This embodiment can effectively improve the overall performance of the heterogeneous computing system by identifying the hot data subgraphs that are system performance bottlenecks, focusing on and optimizing them, and prioritizing data access and synchronization operations on each path in the hot data subgraphs.

[0056] From the above, it can be seen that this embodiment can construct and maintain a data access dependency graph through graph-driven load modeling, accurately identify synchronization hotspots and critical paths in the system through the access sequence and dependency strength between data blocks that it intuitively represents, accurately and dynamically capture data flows and dependencies across devices, reflect the system status in real time, and provide an accurate data basis for subsequent protocol optimization, effectively solving the problem of inaccurate load modeling of related technologies, and improving the overall performance and adaptability of the system.

[0057] It is understandable that the real-time status perception of the heterogeneous computing system affects the entire protocol optimization. This embodiment also provides real-time perception of the CPU load rate, the cache hit rate of the specified computing unit, and the network delay performance indicators to ensure the accuracy and timeliness of the operating status of the heterogeneous computing system. It may include the following: obtaining the main processor load rate of the heterogeneous computing system at the current moment, the cache hit rate of the target processor of a different type from the main processor, and the network delay information; generating the current operating status information based on the edge weight of the hot data access path, the main processor load rate, the cache hit rate and the network delay information.

[0058] In this embodiment, a state space model for describing a statistical model of time series data can be constructed to reflect the operating state of a heterogeneous computing system. The state space model can be represented by a vector, which contains multiple performance indicators that can fully reflect the current operating status of the system. For example, the state space model of the system is It can be expressed as: The CPU load rate reflects the current CPU workload; the GPU cache hit rate indicates the effectiveness of the GPU cache; and the network latency reflects the communication delay between devices. These three indicator variables can be observed and their corresponding values ​​obtained through system tools. For example, these performance indicators can be collected in real time through system monitoring tools to ensure the accuracy and timeliness of the state-space model.

[0059] For example, at time t, the edge weight of the hot data access path in the data access dependency graph is 0.4. The CPU load rate, GPU cache hit rate, and network delay obtained by the monitoring tool are 70%, 85%, and 10ms, respectively. The state space model at this time can be .

[0060] From the above, it can be seen that this embodiment, by comprehensively considering these factors, can fully reflect the current operating status of the system, provide accurate input information for artificial intelligence models or deep learning algorithms, and thus achieve accurate protocol decisions.

[0061] The above embodiment does not impose any restrictions on the machine learning method used to learn the relationship between the operating state of the heterogeneous computing system and the cache consistency protocol type. Among them, the reinforcement learning algorithm learns the optimal behavior through the interaction between the intelligent agent and the environment. However, the reinforcement learning algorithm converges slowly. In a complex heterogeneous computing system, the state space and action space may be very large, which further makes the reinforcement learning algorithm converge too slowly, resulting in an inability to respond to dynamic changes in the system in a timely manner. The present invention is based on the reinforcement learning algorithm and, on the basis of overcoming its slow convergence speed, realizes the learning of the corresponding relationship between the system operating state and the cache consistency protocol type. Figure 3 As shown, it may include the following:

[0062] S301: Generate a state-protocol relationship recognition model based on multiple sets of running state sample information and action spaces, using the running state sample information and one of the cache consistency protocols of the action space as a state-action sample pair, and each state-action sample pair has an expected reward value.

[0063] S302: Initialize the expected reward value of each state-action sample pair of the state-protocol relationship recognition model to an initial value, and construct multiple training sequences based on each state-action sample pair.

[0064] S303: Select one training sequence from multiple training sequences as the current training sequence.

[0065] The training process of the current training sequence includes the following S304 to S307.

[0066] S304: Starting from the initial state, for each time step, a corresponding cache consistency protocol is randomly selected from the action space for the current running state sample information using a first preset probability to generate a new state-action sample pair.

[0067] S305: Selecting the optimal cache consistency protocol with the maximum expected reward value corresponding to the current running state sample information using the second preset probability.

[0068] S306: Execute the optimal cache consistency protocol, determine the reward value of the heterogeneous computing system executing the optimal cache consistency protocol based on the computing performance data and network performance data of the heterogeneous computing system, and obtain the next running status sample information of the current running status sample information.

[0069] S307: Based on the current state-action sample pair formed by the current running state sample information and the optimal cache consistency protocol, the current expected reward value, reward value, and future expected reward value corresponding to the next running state sample information in the state protocol relationship identification model are updated. The expected reward value of the current state-action sample pair in the state protocol relationship identification model is updated.

[0070] S308: When the maximum time step or the environment termination condition is reached, the training of the current training sequence is terminated, and the process jumps to S304 to continue the corresponding training of the next training sequence until the preset number of training rounds is reached or the state-protocol relationship recognition model converges, thereby obtaining a trained state-protocol relationship recognition model.

[0071] Among them, the reinforcement learning method learns the optimal behavior strategy through the interaction between the intelligent agent and the environment. The intelligent agent of this embodiment is a functional module of the computer program code that implements the optimal cache consistency protocol decision of this embodiment, that is, the functional module can dynamically select the optimal cache consistency protocol according to the current state of the system, and the environment is the entire heterogeneous computing system. In order to utilize the reinforcement learning algorithm to learn the relationship between the operating state of the system and the protocol selection, this embodiment also defines an action space that describes the set of actions that can be adopted. The action of this embodiment refers to the cache consistency protocol to be selected. Accordingly, the action space may include multiple different types of cache consistency protocols. These multiple cache consistency protocols can be either existing cache consistency protocols or cache consistency protocols flexibly defined and combined by those skilled in the art according to actual scenarios. This does not affect the implementation of the present invention.

[0072] Among them, the training sequence is a complete trajectory of the state-protocol relationship recognition model performing actions, obtaining rewards, and transferring states in the environment. A training sequence is a sequence starting from the initial state and ending at the terminal state. For example, it can be expressed as: , is the state at time step t, T is the total number of time steps, Is in state Next, select the action. Is to perform an action After receiving the instant reward, is the new state after the transfer. Each training sequence provides multiple state-action samples, that is, tuples, thereby updating the expected reward value of each state-action example in the state-agreement relationship recognition model. Each state-action example pair in the state-agreement relationship recognition model can be stored in a table, such as a Q-table, with rows representing all possible states and columns representing all possible actions. Each cell stores a Q-value (expected reward value), namely Q(s, a). A state-action example pair represents the expected reward value of selecting an action in a specific state. Training the state-agreement relationship recognition model is to repeatedly update these Q-values ​​until they converge to the optimal value, that is, to maximize the cumulative reward.

[0073] Among them, the training process of the state-protocol relationship recognition model includes an inner loop and an outer loop. A single training sequence is limited by the length of the sequence and the exploration strategy of the agent, such as ε-greedy, which may only cover a part of the state-action pairs in the Q-table. The outer loop ensures that different states and actions can be explored by constructing multiple training sequences, thereby covering more or all state-action pairs in the Q-table. The number of outer loops, that is, the number of training sequences, affects the convergence of the model. The more sequences, the more complete the state-action pairs covered, and the closer the Q-table is to the optimal. The outer loop selects each training sequence in turn. Each training sequence starts from the beginning (initial state) until the termination state, that is, the training sequence is looped in memory. When the inner loop ends, that is, the termination state is reached, all the transitions of the training sequence are used to update the corresponding state-action pairs. In other words, the state-action transition in each training sequence (that is, pairs) are used to update the corresponding state-action pairs in the Q table. At each time step of the inner loop, the algorithm uses a transition in the sequence To calculate the error and update the Q table Value. Each training sequence will update multiple state-action pairs. The number of pairs updated is the same as the number of time steps in the training sequence, but each update is only for the state-action pairs that actually appear in the sequence. Among them, the current expected reward value refers to the expected reward value of the state-action sample pair at the current moment. The reward value is used to evaluate the immediate reward of selecting a cache consistency protocol under a certain running state information. The future expected reward value corresponding to the next running state sample information can exemplarily select the maximum expected reward value: from the next running state sample information with a first preset probability, randomly select the expected reward values ​​corresponding to each cache consistency protocol from the action space, and select the maximum value as the future expected reward value.

[0074] In order to further improve the effectiveness of protocol optimization, based on the above embodiment, the present invention can also redefine the cache consistency protocol of heterogeneous computing systems according to different read-write ratios into three protocol modes: metadata indexing protocol, multicast synchronization protocol and hybrid response protocol. Including optional cache consistency protocol mode, which can be expressed as: Among them, the metadata indexing protocol, multicast synchronization protocol and hybrid response protocol can correspond to high-write scenarios, high-read scenarios and dynamic balance scenarios respectively.

[0075] The metadata indexing protocol is implemented in a directory manner. It is based on a directory protocol and features a lightweight directory tree with a hierarchical directory structure (not a global directory). Each computing unit maintains its own metadata, such as cache status and version number. Specifically, each computing unit stores its own metadata directory information in its own directory. This directory information can be in the form of a directory table, which records the status of each cache line in the computing unit's local private cache, whether read and write data hits the cache, and version numbers. Central directory information can be deployed in one of the computing units, the highest-performing computing unit, or a user-specified computing unit, such as the computing unit where a data block with a high write frequency resides. Specifically, target data blocks with a write frequency greater than a preset frequency threshold have central directory information. The central directory information records at least the correspondence between different directory information and corresponding computing units, as well as the data storage address. This information reflects the global cache status. The directory information of each computing unit and the central directory information constitute the lightweight directory tree of the metadata indexing protocol. The metadata indexing protocol uses a lightweight directory tree to query directories only when necessary, avoiding broadcast storms. It also reduces global lock contention through hierarchical directories, reducing write latency by 15% to 20%. Compared to traditional broadcast protocols, this protocol eliminates broadcast traffic and provides more stable network loads. To further optimize the protocol, dynamic directory compression is also available: directory entries for infrequently accessed cold data are compressed and stored to reduce memory usage. Compared to traditional directory protocol hierarchical directory compression, this reduces metadata overhead by 30% and write latency by 15% to 20%.

[0076] The multicast synchronization protocol is suitable for high-read load scenarios. By maximizing cache hit rates, the local cache directly responds to read requests, reducing metadata queries and metadata verification latency, thereby effectively reducing read latency. The multicast synchronization protocol requires each computing unit to perform corresponding operations based on the information monitored on the multicast channel, and the multicast range is dynamically adjusted based on the cache hit rate. In other words, the multicast synchronization protocol uses probabilistic multicasting, with the probability of dynamically adjusting the multicast range based on the computing unit's cache hit rate. Secondly, it employs listener-based cache verification, meaning that computing units within the multicast range monitor the multicast channel and perform corresponding operations upon receiving update notifications. For example, if the local cache is in the "not dirty" state, meaning the data in the cache line has not been modified, it is directly marked as expired and asynchronously refreshed. If the local cache is in the "dirty" state, meaning the data in the cache line has been modified but not yet written back to main memory, conflict detection mechanisms, such as version number comparison, are triggered to prioritize the latest version. Compared to traditional directory protocols, this multicast synchronization protocol eliminates directory lookups for read operations, resulting in lower latency, reducing read latency by 25% to 30%. Compared to traditional full-broadcast protocols, probabilistic multicast reduces redundant traffic, lowering network load by 10% to 15%, optimizing bandwidth, and improving bandwidth utilization by 20%.

[0077] The hybrid response protocol is a fusion of the directory protocol and the broadcast protocol. It decouples read and write strategies: write operations utilize the metadata indexing protocol's directory lock mechanism to ensure consistency. For read operations, a policy is dynamically selected based on real-time load. If the current load is low, the local cache of the multicast synchronization protocol is used to directly respond. If the load is high, metadata verification is triggered to avoid multicast congestion. Load levels can be measured using pre-set thresholds. A state migration engine maintains a protocol state machine for data blocks, which records the cache status of all data blocks, including modified, exclusive, dirty, invalid, and shared. This cache state ensures data validity and, in turn, data consistency, ensuring consistent copies of the same data across different local private caches in heterogeneous computing systems. This protocol dynamically balances mixed read and write loads, adapting to rapid load changes. The state migration engine prevents cache invalidation during protocol switching, ensuring smooth transitions and avoiding performance fluctuations. Compared to traditional directory protocols, this dynamic fusion of directory and broadcast mechanisms avoids the limitations of a single protocol. Compared to traditional broadcast protocols, it supports on-demand switching and offers greater compatibility.

[0078] In order to further improve the model convergence speed, enhance the model training performance, and ensure that the relationship between the learned protocol and the operating status of the heterogeneous computing system is more accurate, this embodiment also provides a method for calculating the reward value of the heterogeneous computing system executing the optimal cache consistency protocol, which may include: obtaining the throughput, network overhead, synchronization delay and respective weight coefficients of the heterogeneous computing system; taking the difference between the product of the throughput and the throughput weight coefficient, the product of the network overhead and the network overhead weight coefficient, and the product of the synchronization delay and the synchronization delay weight coefficient as the reward value of the heterogeneous computing system at the current moment.

[0079] In this embodiment, system throughput is the number of transactions that a heterogeneous computing system can process per unit time, and is used to measure system performance. Network overhead and synchronization delay reflect network performance, which may include, for example, latency, bandwidth, throughput, and response time. To further improve overall efficiency, a reward function relationship may be pre-stored. The reward function relationship can be expressed as: ,in, represents the reward value of the heterogeneous computing system at time t, The weight coefficients of system throughput, network overhead and synchronization delay are used to balance the importance of different performance indicators. The default value can be set to 1 / 3, and can also be flexibly set according to the actual scenario. The present invention does not impose any limitation on this.

[0080] In order to further improve the model convergence speed, enhance the model training performance, and ensure that the relationship between the learned protocol and the operating state of the heterogeneous computing system is more accurate, this embodiment also provides an exemplary expected reward update method, which may include: selecting the maximum value of each expected reward value of each cache consistency protocol and the future reward weight value under the next operating state sample information of the heterogeneous computing system, determining the future reward information, and calculating the sum of the reward value and the future reward information as the reward reward information; taking the difference between the reward reward information and the current expected reward value of the current state-action sample pair in the state protocol relationship recognition model, and calculating the product of the difference and the update speed adjustment factor as the reward reward update information; taking the sum of the current expected reward value and the reward reward update information as the update value of the expected reward value of the current state-action sample pair in the state protocol relationship recognition model.

[0081] This embodiment learns state-action sample pairs value to select the optimal strategy, The value represents the expected reward of adopting a cache consistency protocol under a certain operating state information. In order to further improve the overall efficiency, the expected reward update relation can be pre-expected. The Q value is updated by calling the expected reward update relation. The expected reward update relation can be expressed as: .

[0082] in, Update speed adjustment factor, used to control The update speed of the value, The future return weight value is used to control the weight of future returns. Both are set to 0.5 by default, and the value can be flexibly adjusted according to actual conditions. is the running status information corresponding to time t Take the following Select the cache coherence protocol Value, that is, the current expected return value of the current state-action sample pair in the state agreement relationship recognition model, It is the running status sample information at the next moment The maximum of all possible moves value.

[0083] In order to make the technical solution of the present invention more clear to those skilled in the art, the present invention also provides an implementation process for determining the relationship between the operating state of a heterogeneous computing system and the cache consistency protocol type through reinforcement learning:

[0084] A11: Initialization phase: Set the Q value of all state-action sample pairs in the Q table to 0 and set the update speed adjustment factor , future return weight value , system throughput, network overhead and synchronization delay, their respective weight coefficients .

[0085] A12: State perception phase: System monitoring tools are used to collect the CPU load rate, GPU cache hit rate, and network latency of the heterogeneous computing system at time t, and the edge weights of the hot data access paths in the data access dependency graph are calculated to generate operating status information. .

[0086] A13: Cache consistency protocol selection phase: An ε-greedy strategy is used to select a cache consistency protocol: an action is randomly selected with probability ε to explore new state-action pairs, and the cache consistency protocol with the highest Q value in the current state is selected with probability 1-ε to utilize the known optimal strategy. ε can be set to a large value, such as 0.9, in the initial stage. As training progresses, the value of ε is gradually reduced to reduce the frequency of exploration and increase the frequency of utilization. The value of ε can also be gradually reduced by setting a decay rate. For example, after each iteration, the ε value is multiplied by a decay factor (such as 0.9). This ensures that the ε value decreases gradually.

[0087] A14: Execution of the agreement phase: according to the selected action , execute the corresponding cache consistency protocol and obtain the immediate reward after executing the action and the next state .

[0088] A15: Call the expected return update relation to update the Q table.

[0089] A16: Iterative optimization: Repeat the above steps until the Q-table converges, that is, the change in the Q value is less than a specified threshold, such as 0.01. If necessary, the Q-table can be fine-tuned regularly to adapt to the dynamic changes of heterogeneous computing systems. Among them, based on the pre-trained model, that is, the Q-table, small-scale training is performed for specific task objectives (downstream tasks) and task data (downstream data), to achieve slight adjustments to the pre-trained model parameters, and finally obtain a model adapted to the specific task and data.

[0090] In order to avoid the relationship between the learned operating state of the heterogeneous computing system and the cache consistency protocol type from becoming inaccurate as the environment of the heterogeneous computing system changes, and to avoid large fluctuations in system performance due to policy adjustments, the present invention also provides a heterogeneous computing system for online fine-tuning of the pre-trained model based on real-time data: pre-building an experience replay cache, and storing multiple sets of state-action history pairs during the operation of the heterogeneous computing system in the experience replay cache; utilizing each state-action history pair, and on the basis of dynamically adjusting the first preset probability, fine-tuning the state protocol relationship recognition model. Among them, the state-action history pair includes at least the operating state history information and its corresponding cache consistency protocol, the next operating state history information, and the historical reward value. After actual deployment, the heterogeneous computing system will store the historical state-action pairs. Stored in the experience replay cache, the Q table is sampled and updated regularly to ensure the adaptability and stability of the strategy. In addition, when selecting actions using the ε-greedy strategy, the exploration probability ε can be dynamically adjusted. For example, the adjustment method can use linear attenuation: set the initial ε (such as 1.0) and the minimum ε (such as 0.01), and reduce it linearly during training. You can also use an exponential function to decay the ε value, such as through the relationship , dr represents a preset decay rate parameter, and step can be the number of training steps or training sequences. Of course, it can also be adjusted dynamically based on training performance (such as average reward). For example, if the average reward does not improve over multiple consecutive episodes (training cycles), ε can be increased to encourage exploration.

[0091] For example, the running status information at time t is , the currently selected protocol is the metadata indexing protocol, , , According to the ε-greedy greedy strategy, select the action with the highest Q value in the current state , execute metadata indexing protocol and get instant rewards and the next state : , the maximum expected return corresponding to the next state is: Get ,calculate , update the 0.5 in the Q table to 0.611.

[0092] As can be seen from the above, this embodiment, based on a reinforcement learning algorithm, analyzes the operating status of a heterogeneous computing system in real time and selects the protocol most suitable for the current state from a variety of protocol modes. This solves the problem of the reinforcement learning algorithm's slow convergence speed, which results in its inability to respond promptly to dynamic system changes, by optimizing its action selection, reward value determination, and immediate reward value update determination methods. By continuously optimizing the protocol selection strategy, it dynamically selects the optimal cache consistency protocol based on the current state of the heterogeneous computing system, thereby minimizing communication overhead and latency and improving system throughput. Experience replay can improve learning efficiency, reduce sample correlation, adjust probability values, and ensure the accuracy of selecting the optimal cache consistency protocol. This significantly improves the adaptability and flexibility of heterogeneous computing systems and optimizes their overall performance.

[0093] Considering that non-MAC (non multi-copy atomicity) devices are increasingly used in heterogeneous computing systems, the cache consistency solutions of related technologies do not provide sufficient support for these devices, resulting in the inability of non-MAC to fully exert its performance advantages, thereby limiting the overall computing power of the system. Based on the above embodiments, the present invention also provides a method for implementing cache state synchronization of non-multi-copy atomicity devices. The non-MCA compatible implementation process may include the following: if there is at least one first target computing unit in the heterogeneous computing system that belongs to a non-multi-copy atomicity device, for a write request to the first target computing unit, the target write data corresponding to the write request is stored in the target private cache of the first target computing unit; when the write operation commit process is triggered, the target write data is written to the target write address corresponding to the write request.

[0094] The first target computing unit is a computing unit in a heterogeneous computing system that is non-MAC, such as an NPU. For ease of description, this is defined as the first target computing unit. The write operation submission process can use any triggering strategy. That is, in this embodiment, non-MCA write operations are delayed submission. Through delayed submission, non-MCA write operations can be temporarily stored in a local buffer until certain conditions are met and then submitted. When these conditions are met, the write operation submission process is triggered, reducing the number of global submissions and lowering system overhead.

[0095] Exemplarily, this embodiment also provides multiple delayed submission methods: an exemplary scenario is: there are multiple write requests, and when the remaining space capacity of the target private cache reaches a preset capacity threshold, the write operation submission process is triggered, and each target write data in the target private cache is written in batches to the corresponding target write address. Another parallel exemplary scenario is: the target write address corresponding to the target write data is located in the target data block. When it is detected that the second target computing unit initiates a read request for the target data block, the target write data is first written to the target data block, and then the corresponding read operation is performed; wherein the second target computing unit is other computing units in the heterogeneous computing system that are not the first target computing unit. In other words, non-MCA write operations are temporarily stored in the local buffer and are not submitted until one of the following conditions is met: The first condition: Buffer full (batch submission): When the local buffer reaches a certain capacity, the cached write operations are submitted in batches. This method can reduce the number of global submissions and reduce system overhead. The second condition: Cross-device read request hit (on-demand submission): When other devices initiate a read request and hit the data in the local buffer, the relevant write operations are submitted on demand to ensure data consistency.

[0096] Furthermore, in order to fully optimize the synchronization operation of non-MCA devices, in the process of implementing non-MCA compatible design, in addition to supporting delayed submission and partial atomic operations, in order to distinguish different levels of atomic operations, partial atomic tags can also be introduced. For example, each write operation can be tagged. Global synchronization is triggered only when necessary, meaning only FULL-level operations trigger global synchronization, further improving the operational efficiency of heterogeneous computing systems. This compatible design not only effectively supports non-MCA devices but also improves overall system performance and reliability, enabling heterogeneous computing systems to better adapt to diverse hardware environments.

[0097] For example, FPGA is a non-MCA device, which performs multiple write operations on a data block. These write operations are temporarily stored in the local buffer. When the buffer is full, these write operations are submitted in batches and marked as PARTIAL atomicity. If other computing units When a read request is initiated, the related write operation will be submitted as needed to ensure data consistency. Only when global synchronization is required will the write operation be marked as full atomicity, triggering global synchronization.

[0098] Furthermore, in order to ensure the consistency and correctness of the data, conflict detection and rollback operations can also be performed when submitting a write operation: a full atomicity tag and a partial atomicity tag are set for the write operation in advance, and the full atomicity tag triggers a global synchronization operation; in the process of writing the target write data to the target write address corresponding to the write request, a partial atomicity tag is assigned to the write request, and the global version number and the local version number of the target data block where the target write address is located are detected to see if there is a version conflict; when the global version number of the target data block is smaller than the local version number, there is a version conflict, and the latest version data is loaded from the global cache of the heterogeneous computing system; when the global version number of the target data block is greater than or equal to the local version number, the target write data is written to the target write address.

[0099] In this embodiment, each data block in the heterogeneous computing system can maintain a global version number. With the local version number , the conflict conditions can be: , for the i-th data block , a version conflict is detected during the submission process, which satisfies , it will automatically roll back local modifications and load the latest version of data from the global cache to ensure stable operation of the system.

[0100] As can be seen from the above, this embodiment, by supporting delayed commit and some atomic operations, is compatible with non-MCA devices, enabling efficient synchronization of non-MCA devices, fully leveraging the performance of non-MCA, and improving the overall computing power of heterogeneous computing systems. By distinguishing between different levels of atomic operations, global synchronization is triggered only when necessary, effectively reducing the number of global synchronizations, improving the operational efficiency of heterogeneous computing systems, and simultaneously ensuring the atomicity of data. Version conflict detection during the submission of non-MAC write operations ensures data consistency and correctness.

[0101] It should be noted that there is no strict order in which the steps in the present invention are performed. As long as they conform to a logical order, the steps can be performed simultaneously or in a predetermined order. Figure 2-Figure 3 This is just a schematic and does not mean that this is the only execution order.

[0102] Through the description of the above implementation methods, those skilled in the art can clearly understand that the method according to the above embodiment can be implemented by means of software plus the necessary general hardware platform. Of course, it can also be implemented by hardware, but in many cases the former is a better implementation method. The present invention also provides a corresponding device for the cache consistency maintenance method, which further makes the method more practical. Among them, the device can be described from the perspective of functional modules and hardware. The cache consistency maintenance device provided by the present invention is introduced below. The following description will introduce the functions of each program module of this embodiment. The cache consistency maintenance device described below and the cache consistency maintenance method described above can be referenced to each other.

[0103] From the perspective of functional modules, see Figure 4 , Figure 4 This is a structural diagram of a cache consistency maintenance device provided in this embodiment in a specific implementation manner. The device may include:

[0104] The critical path identification module 401 is used to determine the hot data access path of the heterogeneous computing system at the current moment according to the access sequence and dependency strength of each data block of the heterogeneous computing system at the current moment.

[0105] The state perception module 402 is used to generate current operation state information based on hot data access paths, workload information of the heterogeneous computing system at the current moment, cache validity information and cross-device communication information.

[0106] The protocol dynamic selection module 403 is configured to determine the cache coherence protocol that best matches the current operating state of the heterogeneous computing system based on the relationship between the operating state of the heterogeneous computing system and the cache coherence protocol type and according to the current operating state information.

[0107] Illustratively, in some implementations of this embodiment, the above-mentioned critical path identification module 401 can also be used to: obtain access information between each data block of the heterogeneous computing system, the access information at least including read and write operation time information and operation type; determine the access order and dependency relationship between each data block based on the access information, and construct a data access dependency graph with the data blocks as graph nodes and the dependency relationship between data blocks as the connecting edges between graph nodes; determine the corresponding edge weight based on the read and write operation time information and the number of read and write operations of the data blocks with dependencies; and determine the hot data access path of the heterogeneous computing system at the current moment by analyzing the edge weights of the connecting edges between different graph nodes.

[0108] As an illustrative implementation of the above embodiment, the above critical path identification module 401 can also be further used to: for a first data block and a second data block having a read-write dependency relationship, determine the dependency strength between the first data block and the second data block based on the maximum value between the number of reads and the number of writes of the first data block, the maximum value between the number of reads and the number of writes of the second data block, and the number of cross-accesses between the first data block and the second data block, so as to serve as the weight of the connecting edge between the first data block and the second data block in the data access dependency graph.

[0109] As an illustrative implementation method of the above embodiment, the above critical path identification module 401 can be further used to: obtain new access information of each data block of the heterogeneous computing system when the graph update condition is met; update the connection edges and edge weights of the data access dependency graph based on the new access information, and delete the connection edges between graph nodes whose edge weights are less than the preset edge weight threshold from the data access dependency graph.

[0110] As an illustrative implementation method of the above embodiment, the above-mentioned critical path identification module 401 can be further used to: count the weights corresponding to the access paths between different graph nodes in the statistical access dependency graph, and determine the target access path whose weight sum exceeds the preset path weight threshold; generate a hotspot data subgraph according to the target graph nodes corresponding to the target access path and their corresponding connecting edges as a high-priority synchronization area.

[0111] As an illustrative implementation method of the above embodiment, the above-mentioned critical path identification module 401 can also be further used to: respectively calculate the associated connection edges through which data is accessed between each two graph nodes of the data access dependency graph; use the sum of the edge weights of each associated connection edge as the weight of the corresponding data access path, and use the data access path with the largest weight value as the current hot data access path.

[0112] Illustratively, in some other implementations of this embodiment, the above-mentioned state perception module 402 can also be used to: obtain the main processor load rate of the heterogeneous computing system at the current moment, the cache hit rate of the target processor that is different from the main processor, and network delay information; generate current operating status information based on the edge weight of the hot data access path, the main processor load rate, the cache hit rate and the network delay information.

[0113] Exemplarily, in some other implementations of this embodiment, the above-mentioned protocol dynamic selection module 403 can also be used to: generate a state-protocol relationship recognition model based on multiple groups of running state sample information and action space, using the running state sample information and one of the cache consistency protocols of the action space as a state-action sample pair, and each state-action sample pair has an expected reward value; the action space includes multiple different types of cache consistency protocols; the expected reward value of each state-action sample pair of the state-protocol relationship recognition model is initialized to an initial value; multiple training sequences are constructed according to each state-action sample pair, and the training process of the current training sequence includes: starting from the initial state, for each time step, using a first preset probability to randomly select the corresponding cache consistency protocol for the current running state sample information from the action space to generate a new state-action sample pair; using a second preset probability to select the current running state sample information The optimal cache consistency protocol with the largest corresponding expected reward value; executing the optimal cache consistency protocol, determining the reward value of the heterogeneous computing system executing the optimal cache consistency protocol based on the computing performance data and network performance data of the heterogeneous computing system, and obtaining the next running state sample information of the current running state sample information; based on the current state-action sample pair formed by the current running state sample information and the optimal cache consistency protocol, the current expected reward value, reward value, and future expected reward value corresponding to the next running state sample information in the state protocol relationship recognition model are updated, and the expected reward value of the current state-action sample pair in the state protocol relationship recognition model is updated; when the maximum time step or the environment termination condition is reached, the training of the current training sequence is terminated, and the next training sequence is trained accordingly until the preset number of training rounds is reached or the state protocol relationship recognition model converges, and a trained state protocol relationship recognition model is obtained.

[0114] As an illustrative implementation method of the above embodiment, the above protocol dynamic selection module 403 can also be further used to: obtain the throughput, network overhead, synchronization delay and respective weight coefficients of the heterogeneous computing system; and use the difference between the product of the throughput and the throughput weight coefficient, the product of the network overhead and the network overhead weight coefficient, and the product of the synchronization delay and the synchronization delay weight coefficient as the reward value of the heterogeneous computing system at the current moment.

[0115] As another illustrative implementation method of the above embodiment, the above protocol dynamic selection module 403 can also be further used to: randomly select the expected reward values ​​corresponding to each cache consistency protocol from the action space with a first preset probability from the next running state sample information, and select the maximum value as the future expected reward value.

[0116] As another illustrative implementation method of the above embodiment, the above-mentioned protocol dynamic selection module 403 can also be further used to: select the maximum value of each expected reward value and the future reward weight value of each cache consistency protocol under the next running state sample information of the heterogeneous computing system, determine the future reward information, and calculate the sum of the reward value and the future reward information as the reward reward information; take the difference between the reward reward information and the current expected reward value of the current state-action sample pair in the state protocol relationship recognition model, and calculate the product of the difference and the update speed adjustment factor as the reward reward update information; take the sum of the current expected reward value and the reward reward update information as the updated value of the expected reward value of the current state-action sample pair in the state protocol relationship recognition model.

[0117] As another illustrative implementation of the above embodiment, the above-mentioned protocol dynamic selection module 403 can also be further used to: pre-build an experience replay cache, and store multiple sets of state-action history pairs during the operation of the heterogeneous computing system into the experience replay cache; wherein the state-action history pairs at least include the operating state history information and its corresponding cache consistency protocol, the next operating state history information, and the historical reward value; and utilize each state-action history pair, and on the basis of dynamically adjusting the first preset probability, fine-tune the state-protocol relationship recognition model.

[0118] As another illustrative implementation of the above embodiment, the above-mentioned protocol dynamic selection module 403 can also be further used to: redefine the cache consistency protocol of the heterogeneous computing system into a metadata indexing protocol, a multicast synchronization protocol and a hybrid response protocol according to different read-write ratios; wherein, the metadata indexing protocol is a protocol in which each computing unit includes directory information for storing its own metadata, and the target data block that meets the condition that the write frequency is greater than the preset frequency threshold has central directory information; the multicast synchronization protocol is a protocol in which each computing unit performs corresponding operations according to the monitoring information of the multicast channel, and the multicast range is dynamically adjusted according to the cache hit rate; the hybrid response protocol is a fusion protocol of the directory protocol and the broadcast protocol.

[0119] Exemplarily, in some other implementations of this embodiment, the above-mentioned device may also include a non-MCA compatible module, which can be used for: if there is at least one first target computing unit in the heterogeneous computing system that is a non-multi-copy atomic device, for a write request to the first target computing unit, the target write data corresponding to the write request is stored in the target private cache of the first target computing unit; when the write operation submission process is triggered, the target write data is written to the target write address corresponding to the write request.

[0120] As an illustrative implementation method of the above embodiment, the above non-MCA compatible module can be further used for: when there are multiple write requests, when the remaining space capacity of the target private cache reaches the preset capacity threshold, the write operation submission process is triggered to write the target write data in the target private cache to the corresponding target write address in batches.

[0121] As another illustrative implementation method of the above embodiment, the above non-MCA compatible module can be further used for: the target write address corresponding to the target write data is located in the target data block, and when it is detected that the second target computing unit initiates a read request for the target data block, the target write data is first written to the target data block, and then the corresponding read operation is performed.

[0122] As another illustrative implementation method of the above embodiment, the above non-MCA compatible module can be further used to: pre-set a full atomicity tag and a partial atomicity tag for the write operation, and the full atomicity tag triggers a global synchronization operation; in the process of writing the target write data to the target write address corresponding to the write request, assign a partial atomicity tag to the write request, and detect whether the global version number and the local version number of the target data block where the target write address is located have a version conflict; when the global version number of the target data block is smaller than the local version number, there is a version conflict, and the latest version data is loaded from the global cache of the heterogeneous computing system; when the global version number of the target data block is greater than or equal to the local version number, the target write data is written to the target write address.

[0123] The cache consistency maintenance device mentioned above is described from the perspective of functional modules. Furthermore, the present invention also provides an electronic device, which is described from the perspective of hardware. Figure 5 A schematic diagram of the structure of an electronic device provided in an embodiment of the present invention in one implementation manner. The electronic device includes a memory 501 and a processor 502. The memory 501 stores a computer program, and the processor 502 is configured to run the computer program to perform the steps of any of the above cache consistency maintenance method embodiments.

[0124] An embodiment of the present application further provides a non-volatile storage medium, in which a computer program is stored, wherein the computer program is configured to execute the steps of any of the above cache consistency maintenance method embodiments when running.

[0125] In an exemplary embodiment, the computer-readable storage medium may include, but is not limited to, various media that can store computer programs, such as a USB flash drive, a read-only memory (ROM), a random access memory (RAM), a mobile hard disk, a magnetic disk, or an optical disk.

[0126] An embodiment of the present application further provides a computer program product, which includes a computer program. When the computer program is executed by a processor, the steps of any of the above cache consistency maintenance method embodiments are implemented.

[0127] An embodiment of the present application also provides another computer program product, including a non-volatile computer-readable storage medium, wherein the non-volatile computer-readable storage medium stores a computer program, and when the computer program is executed by a processor, the steps in any of the above-mentioned cache consistency maintenance method embodiments are implemented.

[0128] Finally, the present invention also provides a heterogeneous computing system, see Figure 6 , may include the following contents: the heterogeneous computing system includes at least a first computing node 601, a second computing node 602 and a cache consistency controller 603, the cache consistency controller 603 is connected to the first computing node 601 and the second computing node 602, the first computing node 601 and the second computing node 602 include at least two computing units; the cache consistency controller 603 is used to implement the cache consistency maintenance method described in any one of the above-mentioned cache consistency maintenance method embodiments when executing a computer program.

[0129] For example, Figure 7 As shown, the cache consistency controller 603 may include a graph-driven load modeling component, a policy decision component, and an atomicity control component to build and maintain a data access dependency graph for dynamically capturing data flows and dependencies across devices, and intuitively identify the critical paths and synchronization hotspots of data access through the data access dependency graph, that is, to determine the hot data access path. The policy decision component analyzes the operating status of the system in real time based on the reinforcement learning algorithm, and selects the protocol that best suits the current status from a variety of protocol modes. The atomicity control component manages the cache state synchronization of non-MCA. Through the collaborative work of the three components, it can dynamically optimize the cache consistency protocol, significantly improve the performance and reliability of heterogeneous computing systems, and provide efficient technical support for intelligent driving, cloud computing, edge computing and other fields. Various heterogeneous computing units of the heterogeneous computing system, such as CPU, GPU, etc., are used as inputs of the cache consistency controller 603, which can output a heterogeneous computing system that can maintain data consistency.

[0130] As can be seen from the above, this embodiment can dynamically optimize the cache consistency protocol through graph analysis and reinforcement learning technology. Among them, the graph-driven load modeling component dynamically captures the data flow and dependency relationships across devices through the data access dependency graph, accurately identifies synchronization hotspots and critical paths, and provides accurate data support for protocol optimization. The policy decision component optimizes protocol selection in real time based on the reinforcement learning algorithm, and dynamically adjusts the protocol strategy according to the current state of the system to minimize communication overhead and latency, thereby improving the system throughput. The atomicity control component supports delayed submission and partial atomic operations, reduces the number of global submissions, improves the operating efficiency of the system, and ensures the atomicity and consistency of data, thereby solving many problems faced by cache consistency in heterogeneous computing systems in related technologies, and significantly improves the performance and reliability of heterogeneous computing systems.

[0131] The above is a detailed introduction to a heterogeneous computing system and its cache consistency maintenance method, device, electronic device, non-volatile storage medium, and computer program product provided by the present invention. The various embodiments in this specification are described in a progressive manner, and each embodiment focuses on the differences from other embodiments. The same or similar parts between the various embodiments can be referenced to each other. Whether the units and algorithm steps of each example described in each disclosed embodiment are executed in electronic hardware or computer software depends on the specific application and design constraints of the technical solution. Professional and technical personnel can use different methods to implement the described functions for each specific application, and such implementation should not be considered to exceed the scope of the present invention. Without departing from the principles of the present invention, the present invention can also be improved and modified in a number of ways, and these improvements and modifications also fall within the scope of protection of the present invention.

Claims

1. A cache consistency maintenance method, characterized in that: include: Determining a hot data access path of the heterogeneous computing system at the current moment according to the access order and dependency strength of each data block of the heterogeneous computing system at the current moment; Generate current operation status information based on the hot data access path, workload information, cache validity information, and cross-device communication information of the heterogeneous computing system at the current moment; According to multiple sets of running state sample information and action space, a state-protocol relationship recognition model is generated in a manner that the running state sample information and one of the cache consistency protocols of the action space are used as state-action sample pairs, and each state-action sample pair has an expected reward value; the expected reward value of each state-action sample pair of the state-protocol relationship recognition model is initialized to an initial value, and multiple training sequences are constructed according to each state-action sample pair, and a training sequence is selected from them as the current training sequence for training. When the maximum time step or the environment termination condition is reached, the training of the current training sequence is terminated, and the next training sequence is trained accordingly until a preset number of training rounds is reached or the state-protocol relationship recognition model converges, thereby obtaining a trained state-protocol relationship recognition model; Determining, based on the trained state-protocol relationship recognition model, a cache coherence protocol that best matches the current operating state of the heterogeneous computing system according to the current operating state information; The action space includes various types of cache consistency protocols. The training process of the current training sequence includes: Starting from the initial state, for each time step, a first preset probability is used to randomly select a corresponding cache consistency protocol for the current running state sample information from the action space to generate a new state-action sample pair; a second preset probability is used to select the optimal cache consistency protocol with the largest expected reward value corresponding to the current running state sample information; the optimal cache consistency protocol is executed, and the reward value of the heterogeneous computing system executing the optimal cache consistency protocol is determined based on the computing performance data and network performance data of the heterogeneous computing system, and the next running state sample information of the current running state sample information is obtained; based on the current state-action sample pair formed by the current running state sample information and the optimal cache consistency protocol, the expected reward value of the current state-action sample pair in the state protocol relationship recognition model is updated based on the current expected reward value, reward value, and future expected reward value corresponding to the next running state sample information.

2. The cache consistency maintenance method according to claim 1, wherein: Determining a hot data access path of the heterogeneous computing system at the current moment according to the access sequence and dependency strength of each data block of the heterogeneous computing system at the current moment includes: Acquire access information between data blocks of a heterogeneous computing system, wherein the access information includes at least read and write operation time information and operation type; Determine the access order and dependency relationship between each data block according to the access information, and construct a data access dependency graph with the data blocks as graph nodes and the dependency relationships between the data blocks as the connecting edges between the graph nodes; Determine the corresponding edge weight based on the read and write operation time information and the number of read and write operations of the data blocks with dependencies; By analyzing the edge weights of the connecting edges between different graph nodes, the hot data access path of the heterogeneous computing system at the current moment is determined.

3. The cache consistency maintenance method according to claim 2, wherein: According to the read and write operation time information and the number of read and write operations of the data blocks with dependencies, the corresponding edge weights are determined, including: For a first data block and a second data block having a read-write dependency, the dependency strength between the first data block and the second data block is determined based on the maximum value between the number of reads and the number of writes of the first data block, the maximum value between the number of reads and the number of writes of the second data block, and the number of cross-accesses between the first data block and the second data block, as the weight of the connecting edge between the first data block and the second data block in the data access dependency graph.

4. The cache consistency maintenance method according to claim 2, wherein: After building the data access dependency graph, it also includes: When a graph update condition is met, new access information of each data block of the heterogeneous computing system is obtained; According to the new access information, the connection edges and edge weights of the data access dependency graph are updated, and the connection edges between graph nodes whose edge weights are less than a preset edge weight threshold are deleted from the data access dependency graph.

5. The cache consistency maintenance method according to claim 2, wherein: After determining the hot data access path of the heterogeneous computing system at the current moment by analyzing the edge weights of the connecting edges between different graph nodes, the method further includes: Counting the sum of weights corresponding to access paths between different graph nodes in the data access dependency graph, and determining a target access path whose sum exceeds a preset path weight threshold; According to the target graph nodes corresponding to the target access path and their corresponding connection edges, a hotspot data subgraph is generated as a high-priority synchronization area.

6. The cache consistency maintenance method according to claim 2, wherein: Determining the hot data access path of the heterogeneous computing system at the current moment by analyzing the edge weights of the connecting edges between different graph nodes includes: Calculating the associated connection edges between each two graph nodes of the data access dependency graph through which data is accessed; The sum of the edge weights of each associated connection edge is used as the weight of the corresponding data access path, and the data access path with the largest weight value is used as the current hot data access path.

7. The cache consistency maintenance method according to claim 1, wherein: According to the hot data access path, the workload information, cache validity information and cross-device communication information of the heterogeneous computing system at the current moment, current operation status information is generated, including: Obtaining a current load rate of a main processor of the heterogeneous computing system, a cache hit rate of a target processor of a different type from the main processor, and network delay information; Current operation status information is generated according to the edge weight of the hot data access path, the main processor load rate, the cache hit rate and the network delay information.

8. The cache consistency maintenance method according to claim 1, wherein: Determining, based on the computing performance data and the network performance data of the heterogeneous computing system, a reward value for the heterogeneous computing system executing the optimal cache consistency protocol, including: Obtaining throughput, network overhead, synchronization delay, and respective weight coefficients of the heterogeneous computing system; The difference between the throughput and the throughput weight coefficient product, the network overhead and the network overhead weight coefficient product, and the synchronization delay and the synchronization delay weight coefficient product is used as the reward value of the heterogeneous computing system at the current moment.

9. The cache consistency maintenance method according to claim 1, wherein: After obtaining the next running status sample information of the current running status sample information, the method further includes: From the next running state sample information, randomly select the expected reward values ​​corresponding to each cache consistency protocol from the action space with the first preset probability, and select the maximum value as the future expected reward value.

10. The cache consistency maintenance method according to claim 1, wherein: Updating the expected reward value of the current state-action sample pair in the state-protocol relationship recognition model includes: Selecting, according to the heterogeneous computing system under the next running state sample information, a maximum value of each expected reward value of each cache consistency protocol and a future reward weight value, determining future reward information, and calculating a sum of the reward value and the future reward information as reward reward information; Calculating the difference between the reward information and the current expected reward value of the current state-action sample pair in the state agreement relationship recognition model, and calculating the product of the difference and the update speed adjustment factor as the reward update information; The sum of the current expected reward value and the reward update information is used as the updated value of the expected reward value of the current state-action sample pair in the state agreement relationship recognition model.

11. The cache consistency maintenance method according to claim 1, wherein: After obtaining the trained state-protocol relationship recognition model, it also includes: Pre-building an experience replay cache to store multiple sets of state-action history pairs during the operation of the heterogeneous computing system in the experience replay cache; wherein the state-action history pairs include at least operation state history information and its corresponding cache consistency protocol, next operation state history information, and historical reward values; By utilizing each state-action history pair and on the basis of dynamically adjusting the first preset probability, the state-protocol relationship recognition model is fine-tuned.

12. The cache consistency maintenance method according to claim 1, wherein: Before generating the state protocol relationship identification model, it also includes: The cache consistency protocol of the heterogeneous computing system is redefined as a metadata indexing protocol, a multicast synchronization protocol and a hybrid response protocol according to different read-write ratios, so as to construct an action space according to the metadata indexing protocol, the multicast synchronization protocol and the hybrid response protocol; Among them, the metadata indexing protocol is a protocol in which each computing unit includes directory information for storing its own metadata, and the target data blocks that meet the condition that the write frequency is greater than the preset frequency threshold have central directory information; the multicast synchronization protocol is a protocol in which each computing unit performs corresponding operations based on the monitoring information of the multicast channel, and the multicast range is dynamically adjusted according to the cache hit rate; the hybrid response protocol is a fusion protocol of the directory protocol and the broadcast protocol.

13. The cache consistency maintenance method according to any one of claims 1 to 12, characterized in that: After determining the cache coherence protocol that best matches the current operating state of the heterogeneous computing system according to the current operating state information, the method further includes: If the heterogeneous computing system has at least one first target computing unit that is a non-multi-copy atomic device, upon receiving a write request from the first target computing unit, storing the target write data corresponding to the write request in a target private cache of the first target computing unit; When the write operation submission process is triggered, the target write data is written to the target write address corresponding to the write request.

14. The cache consistency maintenance method according to claim 13, wherein: There are multiple write requests, and when a write operation submission process is triggered, the target write data is written to the target write address corresponding to the write request, including: When the remaining space capacity of the target private cache reaches a preset capacity threshold, a write operation commit process is triggered to write each target write data in the target private cache to the corresponding target write address in batches.

15. The cache consistency maintenance method according to claim 13, wherein: The target write address corresponding to the target write data is located in the target data block, and when the write operation submission process is triggered, the target write data is written to the target write address corresponding to the write request, including: When it is detected that the second target computing unit initiates a read request for the target data block, the target write data is first written to the target data block, and then the corresponding read operation is performed.

16. The cache consistency maintenance method according to claim 13, wherein: Writing the target write data to the target write address corresponding to the write request includes: Pre-setting a full atomicity tag and a partial atomicity tag for a write operation, wherein the full atomicity tag triggers a global synchronization operation; In the process of writing the target write data to the target write address corresponding to the write request, assigning the partial atomicity tag to the write request, and detecting whether the global version number and the local version number of the target data block where the target write address is located conflict with each other; When the global version number of the target data block is smaller than the local version number, there is a version conflict, and the latest version of the data is loaded from the global cache of the heterogeneous computing system; When the global version number of the target data block is greater than or equal to the local version number, the target write data is written to the target write address.

17. A cache consistency maintenance device, characterized in that: include: A critical path identification module is used to determine the hot data access path of the heterogeneous computing system at the current moment according to the access order and dependency strength of each data block of the heterogeneous computing system at the current moment; A state perception module, configured to generate current operation state information based on the hot data access path, workload information, cache validity information, and cross-device communication information of the heterogeneous computing system at the current moment; A protocol dynamic selection module is used to generate a state protocol relationship recognition model based on multiple groups of running state sample information and action space, using the running state sample information and one of the cache consistency protocols of the action space as a state-action sample pair, and each state-action sample pair has an expected reward value; initialize the expected reward value of each state-action sample pair of the state protocol relationship recognition model to an initial value, construct multiple training sequences based on each state-action sample pair, select one training sequence from them as the current training sequence to train it, and when the maximum time step or the environment termination condition is reached, end the training of the current training sequence and perform corresponding training on the next training sequence until a preset number of training rounds is reached or the state protocol relationship recognition model converges, thereby obtaining a trained state protocol relationship recognition model; determine the cache consistency protocol that best matches the current running state of the heterogeneous computing system based on the current running state information; The action space includes various types of cache consistency protocols. The training process of the current training sequence includes: Starting from the initial state, for each time step, a first preset probability is used to randomly select a corresponding cache consistency protocol for the current running state sample information from the action space to generate a new state-action sample pair; a second preset probability is used to select the optimal cache consistency protocol with the largest expected reward value corresponding to the current running state sample information; the optimal cache consistency protocol is executed, and the reward value of the heterogeneous computing system executing the optimal cache consistency protocol is determined based on the computing performance data and network performance data of the heterogeneous computing system, and the next running state sample information of the current running state sample information is obtained; based on the current state-action sample pair formed by the current running state sample information and the optimal cache consistency protocol, the expected reward value of the current state-action sample pair in the state protocol relationship recognition model is updated based on the current expected reward value, reward value, and future expected reward value corresponding to the next running state sample information.

18. An electronic device, characterized in that: include: memory for storing computer programs; A processor, configured to implement the steps of the cache consistency maintenance method according to any one of claims 1 to 16 when executing the computer program.

19. A non-volatile storage medium, characterized in that: The non-volatile storage medium stores a computer program, and when the computer program is executed by a processor, the steps of the cache consistency maintenance method according to any one of claims 1 to 16 are implemented.

20. A computer program product comprising a computer program / instructions, characterized in that When the computer program / instruction is executed by a processor, the steps of the cache consistency maintenance method according to any one of claims 1 to 16 are implemented.

21. A heterogeneous computing system, characterized in that: At least comprising a first computing node, a second computing node and a cache consistency controller, wherein the cache consistency controller is connected to the first computing node and the second computing node, and the first computing node and the second computing node comprise at least two computing units; The cache consistency controller is configured to implement the steps of the cache consistency maintenance method according to any one of claims 1 to 16 when executing a computer program.

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