VSG asymmetric low voltage ride through control method

Abstract

The invention belongs to the technical field of VSG control, and particularly discloses a VSG asymmetric low voltage ride through control method which comprises an active frequency control link and a reactive voltage control link. Wherein a phase compensation link is added in the active frequency control link, and is used for setting a negative sequence current reference value of a power grid to be 0 when the power grid breaks down, and performing phase compensation on a positive sequence ring of the power grid; primary voltage regulation switching PI control is added in the reactive voltage control link and is used for switching a power grid voltage reference value in the reactive voltage control link into a reactive power reference value Qa during a fault and switching an inverter reactive power reference value into a reactive ring reference voltage Eerror in the active frequency control link during the fault when the power grid breaks down; amplitude compensation is carried out on a reference voltage amplitude output by the reactive loop, and meanwhile, a proportional link in a reactive voltage control link is changed into PI control. According to the invention, the low-voltage ride-through capability of the distributed power generation system can be effectively improved.

Description

Technical Field

[0001] This application belongs to the technical field of VSG control, and more specifically, relates to a VSG asymmetric low-voltage ride-through control method. Background Art

[0002] With the continuous maturity of distributed renewable new energy power generation technologies led by wind and solar energy, a large number of power electronic devices are connected to the power grid, severely reducing the inertia and damping of the power grid. At the same time, the intermittency and volatility of new energy also affect the stable operation of the power grid. To address the above problems, some scholars have proposed the virtual synchronous generator (VSG) control technology. The VSG control technology adds damping and inertia links to the system by simulating the reactive excitation link of the synchronous generator and the rotor motion equation. In addition, the grid-forming VSG control can actively support the frequency and voltage of the power grid.

[0003] Nowadays, the VSG control technology is widely used in distributed generation, but most of them operate under the condition of normal voltage in a large power grid. In reality, because distributed generation is often at the end of the distribution network and is more vulnerable compared to the distribution network, there may be fault problems such as voltage dips in the power grid. Once a voltage dip occurs, the voltage vector of the power grid mutates, while the output voltage of the inverter side does not mutate in a short time because the VSG algorithm is adopted, resulting in a voltage vector difference between the two and thus causing an overcurrent phenomenon. Considering the actual scenario, asymmetric voltage dips are the most common in faults. Currently, the asymmetric low-voltage ride-through control methods mainly focus on suppressing overcurrent, supporting the power grid voltage, and suppressing the multi-objective optimization problem among active power, reactive power, and achieving current balance to improve the low-ride-through ability of the system. However, there are still certain problems regarding whether the active power can respond quickly during the occurrence and recovery of faults, the stability of the power angle, and the selection of the internal potential reference value of the VSG, which in turn affects the low-voltage ride-through ability of the distributed generation system.

[0004] Therefore, how to improve the low-voltage ride-through ability of the distributed generation system is a difficult problem in current research. Summary of the Invention

[0005] Aiming at the defects of the existing technology, the purpose of this application is to provide a VSG asymmetric low-voltage ride-through control method, which can accelerate the recovery and maintain the stability of the power angle during grid faults, enable the active power to respond quickly, and at the same time achieve the goal of suppressing overcurrent.

[0006] To achieve the above purpose, in the first aspect, this application provides a VSG asymmetric low-voltage ride-through control method, which is applied to the inverter side in a distributed generation system and includes an active frequency control link and a reactive voltage control link;

[0007] Among them, a phase compensation link is added to the active power frequency control link. The phase compensation link is used to set the negative sequence current reference value of the power grid to 0 when a power grid fault occurs, and perform phase compensation on the positive sequence loop of the power grid;

[0008] A primary voltage regulation switching PI control is added to the reactive power voltage control link. The primary voltage regulation switching PI control is used to switch the power grid voltage reference value in the reactive power voltage control link to the reactive power reference value Q during the fault when a power grid fault occurs a , and switch the reactive power reference value of the inverter to the reactive loop reference voltage E in the active power frequency control link during the fault error , and perform amplitude compensation on the reference voltage amplitude output by the reactive loop. At the same time, change the proportional link in the reactive power voltage control link to PI control.

[0009] Advantages of this application: The VSG asymmetric low-voltage ride-through control method provided by this application, when a power grid fault occurs, first separates the positive and negative sequence of the collected power grid voltage and current. For the negative sequence loop, set the negative sequence current reference value to 0 to suppress the negative sequence component. For the positive sequence loop, use phase and amplitude compensation to reduce the voltage vector difference to suppress overcurrent and quickly restore the power angle; change the voltage reference signal, and at the same time change the proportional link of the primary voltage regulation to PI control, which can maintain the subsequent stability of the power angle and accelerate the response speed of the active power, thereby improving the low-voltage ride-through ability of the distributed generation system.

[0010] As a further preference, the phase compensation link includes the following steps:

[0011] When it is detected that a power grid fault occurs, switch the active power reference value in the active power frequency control link to the active power reference value P during the fault a , and subtract the reference value E of the d-axis positive sequence component E q and E q of the output voltage of the inverter, and then perform PI adjustment to generate a phase compensation value Δθ, which is compensated to the angular frequency generation link in the active power frequency control link; qmin Among them, E qmin is the minimum value of the d-axis positive sequence component of the output voltage of the inverter during the fault to meet the frequency fluctuation range between ±0.2 Hz. qmin

[0013]

[0014] As a further preference, the calculation formula of E qmin is:

[0015]

[0016] The calculation formula of the phase compensation value Δθ is:

[0017]

[0017] where f is the actual frequency of the power grid; K pδ and K iδ are the proportional-integral coefficients for obtaining the q-axis reference value of the inverter output voltage during a fault; K p-θ and K i-θ are the proportional-integral coefficients for phase compensation; E error is the reactive power loop reference voltage in the active power frequency control link during a fault; δ min is the power angle set value during a fault.

[0018] As a further preference, the reactive power loop reference voltage E error is calculated by the formula:

[0019]

[0020] where E is the voltage amplitude output by the power grid before a fault; λ is the ratio of the voltage amplitude output during a power grid fault to the voltage amplitude output before the fault; μ is the ratio of the active power set during a power grid fault to the rated active power set before the fault; pi is the circumference ratio; f is the actual frequency of the power grid; K pδ and K iδ are the proportional-integral coefficients for obtaining the q-axis reference value of the inverter output voltage during a fault; δ0 is the power angle before a fault.

[0021] As a further preference, in the primary voltage regulation switching PI control, the compensation amount ΔU for amplitude compensation of the reference voltage amplitude output by the reactive power loop is calculated by the formula:

[0022]

[0023] where U pcc is the inverter output voltage amplitude; K p-u is the proportional parameter for amplitude compensation; K i-u is the integral parameter for amplitude compensation; U0 is the rated voltage of the power grid.

[0024] As a further preference, the active power control link includes the following steps:

[0025] Compare the actual active power P e output by the power grid with the set active power P ref to obtain a power deviation signal;

[0026] Divide the power deviation signal by the rated frequency ω N of the power grid to convert the power deviation signal into a frequency deviation signal, and then integrate the frequency deviation;

[0027] Add the obtained frequency deviation integral to the rated frequency value ω NObtain the angular frequency ω of the inverter, and subtract the angular frequency ω from the rated angular frequency ω N to obtain a deviation signal. The deviation signal is subjected to K f conversion to form a negative feedback by adding the power signal and the previous power deviation signal. The angular frequency ω is integrated and then the remainder of 2π is obtained to get the reference phase signal θ ref .

[0028] As a further preference, the reactive voltage control link includes the following steps:

[0029] Subtract the collected reactive power Q output by the inverter e from the reactive power set value Q ref to obtain a reactive power deviation signal;

[0030] Convert the reactive power deviation signal into a voltage deviation signal through the droop coefficient Kq. At the same time, subtract the grid voltage amplitude V ref from the rated grid voltage amplitude U0 to obtain an initial voltage deviation signal. Finally, add the voltage deviation signal, the initial voltage deviation signal and the rated grid voltage amplitude to obtain the reference value U of the inverter output voltage amplitude ref .

[0031] As a further preference, whether the grid fails is determined by comparing the grid voltage amplitude with the rated grid voltage amplitude.

[0032] As a further preference, the grid voltage amplitude is detected by a voltage sensor. Description of the Drawings

[0033] Figure 1 is the grid-connected operation model diagram under the traditional VSG control provided by this application;

[0034] Figure 2 is the control strategy diagram of the traditional active frequency control loop and reactive voltage control loop provided by this application;

[0035] Figure 3 is the control strategy diagram of the active frequency loop with a phase compensation link added provided by the embodiment of this application;

[0036] Figure 4 is the control strategy diagram of the reactive voltage loop with an amplitude compensation link added provided by the embodiment of this application;

[0037] Figure 5 is the control strategy diagram of the reactive voltage loop with a primary voltage regulation switching PI control added provided by the embodiment of this application;

[0038] Figure 6 is the power angle diagram under a fault provided by the embodiment of this application;

[0039] Figure 7 is the active power diagram under Fault 1 provided by the embodiments of the present application;

[0040] Figure 8 is the internal potential diagram under Fault 1 provided by the embodiments of the present application;

[0041] Figure 9 is the current diagram under Fault 1 provided by the embodiments of the present application;

[0042] Figure 10 is the power angle diagram under Fault 2 provided by the embodiments of the present application;

[0043] Figure 11 is the active power diagram under Fault 2 provided by the embodiments of the present application;

[0044] Figure 12 is the internal potential diagram under Fault 2 provided by the embodiments of the present application;

[0045] Figure 13 is the current diagram under Fault 2 provided by the embodiments of the present application. Detailed implementation manners

[0046] In order to make the purpose, technical solutions and advantages of the present application clearer, the present application will be further described in detail below with reference to the accompanying drawings and embodiments. It should be understood that the specific embodiments described herein are only used to explain the present application and are not used to limit the present application.

[0047] It should be understood that in the description of the present application, the meaning of the term "several" is at least one, for example, one, two, etc., unless otherwise clearly and specifically defined; the meaning of the term "multiple" is two or more, unless otherwise clearly and specifically defined; the terms "first" and "second" etc. are used to distinguish different objects, rather than to describe a specific order of the objects; the term "and / or" includes any and all combinations of one or more of the related listed items.

[0048] In addition, the reference to "one embodiment" throughout this specification; the language such as "one embodiment", "one example" or the like means that the specific features, structures or characteristics described in connection with that embodiment are included in at least one embodiment of the present application. Therefore, the appearances of the phrase "in one embodiment;" throughout this specification and similar language may or may not all refer to the same embodiment.

[0049] To improve the low voltage ride-through ability of the distributed generation system, the present application provides a VSG asymmetric low voltage ride-through control method based on phase amplitude compensation and primary voltage regulation switching PI control. This control method includes an active power frequency control link and a reactive power voltage control link.

[0050] It should be noted that the active frequency control link and the reactive voltage control link provided in this embodiment are common control links in the VSG control technology in this field, and their control methods can be referred to the detailed descriptions in the following implementation steps.

[0051] In this application, a phase compensation link is added to the traditional active frequency control link. This phase compensation link is used to set the negative sequence current reference value of the power grid to 0 when a power grid fault occurs, and perform phase compensation on the positive sequence loop of the power grid to reduce the voltage vector difference to suppress overcurrent and quickly restore the power angle.

[0052] Specifically, the phase compensation link provided in this embodiment may include the following steps:

[0053] When it is detected that a power grid fault occurs, that is, when it is detected that the power grid voltage amplitude is lower than its rated value, the active power reference value in the active frequency control link is switched to the active power reference value P during the fault period a , and the d-axis positive sequence component E of the inverter output voltage q and E q of the reference value E qmin are subtracted and then adjusted by PI to generate a phase compensation value Δθ, which is compensated to the angular frequency generation link in the active frequency control link. Among them, E qmin is the minimum value of the d-axis positive sequence component of the inverter output voltage during the fault period to meet the frequency fluctuation range within ±0.2 Hz.

[0054] In addition, this application also adds a primary voltage regulation switching PI control to the traditional reactive voltage control link. This primary voltage regulation switching PI control is used to switch the power grid voltage reference value in the reactive voltage control link to the reactive power reference value Q during the fault period a , switch the inverter reactive power reference value to the reactive loop reference voltage E in the active frequency control link during the fault error , and perform amplitude compensation on the reference voltage amplitude output by the reactive loop. At the same time, the proportional link in the reactive voltage control link is changed to PI control to maintain the subsequent stability of the power angle and accelerate the active power response speed.

[0055] For the VSG asymmetric low-voltage ride-through control method provided in this embodiment, when a power grid fault occurs, first, the collected power grid voltage and current are separated into positive and negative sequences. For the negative sequence loop, the negative sequence current reference value is set to 0 to suppress the negative sequence component. For the positive sequence loop, phase and amplitude compensation are used to reduce the voltage vector difference to suppress overcurrent and quickly restore the power angle. For the voltage reference signal, it is changed, and at the same time, the proportional link of the primary voltage regulation is changed to PI control, which can maintain the subsequent stability of the power angle and accelerate the active power response speed, thereby improving the low-voltage ride-through ability of the distributed generation system.

[0056] Combined with the implementation steps of this application, the VSG asymmetric low-voltage ride-through control method provided by this application will be described accordingly.

[0057] The implementation of this application includes the following steps:

[0058] Step 1: Establish a grid-connected operation model under VSG control.

[0059] Figure 1 It is a grid-connected operation model using VSG control, where L g and C are the filter inductor and capacitor; L u and R u are the line inductor and line resistance respectively; i Labc is the output current on the inverter side; i Ldq is the value in the dq coordinate system after the coordinate transformation of i Labc ; U dq and i dq are the values in the dq coordinate system after the coordinate transformation of the three-phase coordinate system of the load-side voltage and current respectively; P ref and Q ref are the given active reference value and reactive reference value respectively; P e and Q e are the actually output active and reactive powers respectively; θ ref and U ref are the phase reference value and voltage amplitude reference value obtained through the VSG algorithm respectively; u d * and u q * are the control signals in the dq coordinate system obtained through the voltage-current double closed-loop; U dc is the DC bus voltage. S 1-6 are the six insulated gate bipolar transistors of the inverter. Among them, the VSG control includes an active frequency control loop and a reactive voltage control loop as Figure 2 shown, and the control principle is shown in Equation (1).

[0060]

[0061] In Equation (1), Δω is the difference between the angular frequency ω of the VSG and the rated angular frequency ω N ; J is the virtual inertia; D is the damping coefficient; K is the reactive voltage loop coefficient; E ref is the amplitude reference value of the reactive voltage link; U0 is the rated amplitude of the grid voltage; V ref is the collected grid voltage amplitude; θ ref is the phase reference value obtained from the active frequency loop. The above has established the grid-connected model of the VSG control method.

[0062] The basic strategy of the VSG control for the active power frequency loop is as follows: First, compare the actual output active power P e with the set active power P ref to obtain the power deviation signal. Then divide the power deviation signal by the rated frequency ω N of the power grid to convert the power deviation signal into a frequency deviation signal, and then integrate the frequency deviation. This integration link is a first-order inertia link, which includes the virtual inertia J and damping D and can effectively cope with disturbances. Add the obtained integrated frequency deviation to the rated frequency value ω N to obtain the angular frequency ω calculated by the VSG. Subtract the angular frequency calculated by the VSG from the rated angular frequency to obtain the deviation signal. The deviation signal is converted into a power signal by K f and added to the previous power deviation signal to form negative feedback. The angular frequency ω calculated by the VSG is integrated, and then the remainder of the integration result divided by 2π is taken to obtain the reference phase signal θ ref .

[0063] The control strategy of the reactive power voltage loop is as follows: First, subtract the collected reactive power Q e output by the inverter from the reactive power set value Q ref to obtain the reactive power deviation signal, which is converted into a voltage deviation signal through the droop coefficient. At the same time, subtract the grid voltage amplitude V ref from the rated amplitude U0 to obtain the initial voltage deviation signal. Finally, add the voltage deviation signal, the initial voltage deviation signal, and the rated amplitude of the grid voltage together to obtain the reference value of the inverter output voltage amplitude.

[0064] The active power frequency loop obtains the phase reference value, and the reactive power voltage loop obtains the voltage amplitude reference value. The two are synthesized to obtain the standard three-phase power supply voltage signal. Since low voltage ride-through control is required, the time of fault occurrence and recovery needs to be accurately detected. This detection can be achieved by detecting the grid voltage amplitude. When the detected grid voltage amplitude is lower than the rated value, it indicates that a fault has occurred; otherwise, no fault has occurred. The detection can be carried out through a voltage sensor.

[0065] Step 2: Establish a phase and amplitude compensation VSG control model.

[0066] Step 2.1: Phase compensation.

[0067] Figure 3 is the control strategy diagram of the active power frequency loop with phase compensation. Among them, pi is the positive sequence component of the d-axis of the inverter output voltage; P a is the active power reference value during the fault; E qmin is the minimum value of the positive sequence component of the d-axis of the inverter output voltage to meet the frequency fluctuation range within ±0.2 Hz during the fault. Its specific value can be obtained from Equation (2).

[0068] When the voltage sensor detects a decrease in the grid voltage amplitude, the overall control strategy of the active frequency loop remains unchanged. A phase compensation link is added to the link where the angular frequency is calculated by the VSG, and some reference signals are switched. When a fault occurs, switch S1 selects 1 and the active power reference value becomes P a ; switch S2 selects 1 to activate the phase compensation link; switch S3 selects 0 when it judges that it is the fault occurrence stage, and the reference value of E q selects E qmin ; in the fault recovery stage, it selects 1, and the reference value of E q selects 0.

[0069]

[0070] In Equation (2), f is the actual grid frequency of 50; pi is the pi; K pδ and K iδ are the proportional-integral coefficients for obtaining the q-axis reference value of the inverter output voltage during the fault; δ min is the power angle set value during the fault; E error is the reference voltage of the inverter reactive power loop during the fault, which will be explained later. From this, the value of E qmin is calculated, which is the reference value of E q , and the two adopt PI control, and the control formula is shown in Equation (3).

[0071]

[0072] In Equation (3), K p-θ and K i-θ are the proportional-integral parameters for phase compensation; Δθ is the obtained phase compensation value.

[0073] Step 3.2: Amplitude compensation.

[0074] Amplitude compensation can be divided into two parts. During the fault, the virtual impedance method can be used for voltage amplitude compensation. When the grid fault is restored, the idea of the secondary regulation of the VSG amplitude in the islanding mode can be used for amplitude compensation. When the fault is restored, the inverter needs to re-track the grid voltage amplitude, so the secondary regulation of the amplitude can be added to achieve a faster and error-free response. The compensation amount ΔU is obtained from Equation (4)

[0075]

[0076] In Equation (4), U0 is the grid voltage reference amplitude, that is, the grid rated voltage; U ref is the amplitude of the reference voltage output by the reactive power loop; U pcc is the amplitude of the inverter output voltage; U nref is the amplitude secondary compensation value; K p-u 、K i-u and K nis the primary voltage regulation proportional-integral parameter. The amplitude secondary regulation takes effect during the fault recovery stage, enabling the inverter output voltage amplitude to quickly track the grid voltage. The virtual impedance control is shown in Equation (5).

[0077]

[0078] In Equation (5), Z V is the virtual impedance which includes the virtual resistance R V and the virtual inductor L V ; U Vd is the d-axis voltage reference value after the virtual impedance link; U dref is the d-axis reference voltage output by the reactive power loop; I d and I q are the dq-axis components of the inverter output current; ω is the grid frequency.

[0079] Figure 4 When the voltage sensor detects a decrease in the grid voltage amplitude, some reference signals are switched. Switch S4 selects channel 1, and the reactive power voltage reference value becomes Q a . When the voltage sensor detects the recovery of the grid voltage amplitude, switch S4 selects channel 0, switch S5 closes, and the amplitude secondary regulation starts. The Q a reference value can be obtained from Equation (6).

[0080]

[0081] In Equation (6), K is generally taken as 1.5; |U| is the equivalent amplitude after the voltage dip; U N , I N are the rated voltage and current; I Q-ref is the reactive current to be injected during the fault.

[0082] Step 3.3: Primary voltage regulation switching to PI control.

[0083] Figure 5 is the reactive power loop using the primary voltage regulation switching to PI control. When the voltage sensor detects a decrease in the grid voltage amplitude, some reference signals are switched. Switch S4 selects channel 1 and the reactive power voltage reference value becomes Q a ; Switch S6 selects 1, making the voltage reference value change to E error ; The grid fault judgment signal gives signal 1, and the proportional control switches to PI control. When the voltage sensor detects the recovery of the grid voltage amplitude, switches S4 and S6 select channel 0, and the response reference value changes; the grid fault judgment signal gives signal 0, and the PI control switches to proportional control.

[0084] The reference voltage E error output by the VSG reactive power loop at the given active power reference value after the faultAssume that the original three-phase voltage amplitude is V o , and at this time, a sudden asymmetric fault occurs, with phase A dropping by a%, phase B dropping by b%, and phase C dropping by c%. Then the grid voltage amplitude at this time can be calculated by Equation (7).

[0085]

[0086] In Equation (7), V0 is the original three-phase voltage amplitude; V eefa , V eefb , V eefc are the equivalent voltage amplitudes of phases A, B, and C after the fault; V efferror is the overall equivalent amplitude, which is |U| as mentioned above. Therefore, the ratio of the effective voltage after the fault to the original one is 1 / 3×(3 - a% - b% - c%), denoted as λ, that is, U error is λ times of U. The active power P error set after the fault is μ times of the original one, that is, μP. Let the original power angle be δ o and the power angle after the fault is δ min as mentioned above. In addition, assume that the circuit impedance remains unchanged before and after the fault, that is, X d remains unchanged. In summary, the reference internal potential E error of the inverter under the given active power after the fault can be obtained as Expression (8).

[0087]

[0088] In the formula, E is the original three-phase voltage amplitude, that is, the voltage amplitude output by the grid before the fault; λ is the ratio of the grid voltage amplitude during the fault to the original three-phase voltage amplitude; μ is the ratio of the active power set during the grid fault to the original set active power. By combining Equation (2) and Equation (8), the reference value of E error is obtained as Equation (9).

[0089]

[0090] At this time, the value of δ min can be obtained by substituting E error into Equation (2).

[0091] Step 3: Positive and negative sequence separation control.

[0092] Step 3.1: Positive and negative sequence separation.

[0093] Asymmetrical voltage dips are accompanied by the appearance of negative-sequence components. Traditional VSG control cannot suppress negative-sequence components. Therefore, a positive- and negative-sequence separation control is adopted in the double closed-loop of voltage and current to suppress negative-sequence components. To apply the positive- and negative-sequence separation control, it is first necessary to separate the positive and negative sequences of voltage and current. This can also detect whether an asymmetrical fault has occurred in the system, providing a method for detecting the occurrence and recovery of faults as described above. When negative-sequence components appear in the voltage, it indicates that an asymmetrical fault has occurred in the distribution network, and low-voltage ride-through should be immediately carried out. When the negative-sequence components disappear, the fault is recovered. The positive- and negative-sequence separation can use the double second-order generalized integrator method (DSOGI) based on the decoupled synchronous rotating coordinate system.

[0094] Step 3.2: Negative-sequence current suppression.

[0095] The reference values in the three-phase voltage coordinate system are obtained from the phase reference value and amplitude reference value mentioned above. After coordinate transformation, the positive-sequence reference values in the dq coordinate system are obtained. The collected grid voltage and current are transformed through coordinates to the dq coordinate system. After positive- and negative-sequence separation in the dq coordinate system, the positive sequence is used as the controlled quantity above. The negative-sequence components are controlled separately, and it is necessary to suppress the negative-sequence current among them. The negative-sequence current reference value in the negative-sequence current loop can be set to 0 for suppression.

[0096] Key points for the implementation of the proposed solution in this application: (1) This solution establishes a VSG asymmetrical low-voltage ride-through control based on phase-amplitude compensation and primary voltage regulation switching PI control. It is necessary to introduce phase-amplitude compensation into the asymmetrical low-voltage ride-through and complete the primary voltage regulation switching PI control; (2) Consider the suppression of overcurrent, the maintenance of power angle stability, the change of the internal potential reference value of the inverter and its response speed, and the response speed of active power.

[0097] Effect after the implementation of this application: In this application, when a fault occurs, first, the collected grid voltage and current are separated into positive and negative sequences. For the negative-sequence loop, the negative-sequence current reference value is set to 0 to suppress negative-sequence components; for the positive-sequence loop, phase-amplitude compensation is used to reduce the voltage vector difference to suppress overcurrent and quickly restore the power angle; for the voltage reference signal, it is changed according to Equation (9). At the same time, the proportional link of the primary voltage regulation is changed to proportional-integral control to maintain the subsequent stability of the power angle and accelerate the response speed of active power.

[0098] Then, simulation experiments were carried out according to this application for two fault conditions. The simulation used the MATLAB / Simulink experimental platform. First, a Figure 1The model of the virtual synchronous generator operating in parallel is as follows. The main simulation parameters are shown in Table 1. Then, three control methods are respectively built: traditional asymmetric low-voltage ride-through control, asymmetric low-voltage ride-through control based on phase and amplitude compensation, and asymmetric low-voltage ride-through control based on phase and amplitude compensation and primary voltage regulation switching PI (hereinafter referred to as improved VSG control). Simulation experiments are carried out under two fault scenarios respectively, and finally the results of the simulation experiments are analyzed and compared. Two fault scenarios are set in the simulation experiment. The first fault is that the amplitude of phase A drops by 60%, the amplitude of phase B drops by 40%, and the active power after the fault is set to 9000 W. From this, E error is about 279 V; the second fault is that the amplitude of phase A drops by 60%, the amplitude of phase B drops by 40%, the amplitude of phase C drops by 30%, and the active power setting value is 6000 W. From this, E error is about 219 V. The start time of both faults is 1.2 s, the fault recovery time is 2.2 s, the fault duration is 1 s, and the total simulation duration is 3 s.

[0099] Table 1 Main parameters of grid-connected simulation

[0100]

[0101] The result comparison diagram under the first fault scenario is as Figures 6 - 9 shown.

[0102] From the red, blue, and green images in the comparison diagram, it can be obtained that under the traditional VSG control, the power angle recovers slowly during the fault occurrence and recovery and it is difficult to reach a stable state; after adding phase and amplitude compensation, although the power angle can reach the set value within 0.15 s after the fault, it cannot maintain stability subsequently and has a certain downward trend; when the fault is restored, the power angle stabilizes slowly. Under the improved VSG control: the power angle can not only reach the set value within 0.15 s when the fault occurs, but also has no downward trend subsequently and can maintain a stable state. When the fault is restored, the power angle can reach stability within 0.15 s and maintain stability subsequently; the active power can reach the set value within 0.2 s, and when the fault is restored, it can reach the original set value within 0.2 s with a small overshoot; the internal potential of the inverter reaches the set value of around 279 V within 0.2 s and maintains stability. When the fault is restored, it can also make the internal potential of the inverter reach the original set value within 0.3 s and maintain stability; it can keep the current stable within 1.2 times the original value and will not cause current impact. In summary, the improved VSG control can suppress overcurrent, provide reactive power support, accelerate the recovery of the power angle and maintain subsequent stability, and make the active power and the internal potential of the inverter respond quickly to the set value, having good low-voltage ride-through ability.

[0103] Figure 10 、 11 、12, and 13 are the comparison diagrams under the second fault. Observing the diagrams, it is found that the control strategy proposed in this application still has good control effects.

[0104] Those skilled in the art can easily understand that the above is only a preferred embodiment of the present application, and is not intended to limit the present application. Any modifications, equivalent replacements, improvements, etc. made within the spirit and principle of the present application shall be included within the protection scope of the present application.

Claims

1. A VSG asymmetric low-voltage ride-through control method is applied to the inverter side in a distributed generation system, characterized in that, It includes an active power frequency control link and a reactive power voltage control link; Among them, a phase compensation link is added to the active power frequency control link, and the phase compensation link is used to set the negative sequence current reference value of the power grid to 0 and perform phase compensation on the positive sequence loop of the power grid when a fault occurs in the power grid; A primary voltage regulation switching PI control is added to the reactive power and voltage control link. The primary voltage regulation switching PI control is used to switch the grid voltage reference value in the reactive power and voltage control link to the reactive power reference value Q during the fault, a switch the inverter reactive power reference value to the reactive loop reference voltage E in the active power and frequency control link during the fault, error perform amplitude compensation on the reference voltage amplitude output by the reactive loop, and at the same time change the proportional link in the reactive power and voltage control link to PI control.

2. The VSG asymmetric low-voltage ride-through control method according to claim 1, characterized in that, The phase compensation link includes the following steps: When a grid fault is detected, the active power reference value in the active power - frequency control link is switched to the active power reference value P during the fault period. a And the positive - sequence component E of the d - axis of the inverter output voltage q and E q After taking the difference of the reference values E qmin and passing it through PI regulation, a phase compensation value Δθ is generated and compensated to the angular - frequency generation link in the active power - frequency control link. Among them, E qmin is the minimum value of the positive-sequence component of the d-axis of the inverter output voltage during a fault to meet the frequency fluctuation range between ±0.2 Hz.

3. The VSG asymmetric low-voltage ride-through control method according to claim 2, characterized in that, E qmin The calculation formula is as follows: The calculation formula for the phase compensation value Δθ is: where f is the actual frequency of the power grid; K pδ and K iδ are the proportional-integral coefficients for obtaining the q-axis reference value of the inverter output voltage during a fault; K p-θ and K i-θ are the proportional-integral coefficients for phase compensation; E error is the reactive power loop reference voltage in the active power frequency control link during a fault; δ min is the power angle set value during a fault.

4. The VSG asymmetric low-voltage ride-through control method according to any one of claims 1 to 3, characterized in that The reference voltage E of the reactive power loop error has the following calculation formula: In the formula, E is the voltage amplitude output by the power grid before the fault; λ is the ratio of the voltage amplitude output by the power grid during the fault to the voltage amplitude output before the fault; μ is the ratio of the active power set during the power grid fault to the set active power before the fault; pi is the pi; f is the actual grid frequency; K pδ and K iδ are the proportional-integral coefficients for obtaining the q-axis reference value of the inverter output voltage during a fault; δ0 is the power angle before the fault.

5. The VSG asymmetric low-voltage ride-through control method according to claim 1, characterized in that, In the primary voltage regulation switching PI control, the calculation formula for the compensation amount ΔU for amplitude compensation of the reference voltage amplitude output by the reactive power loop is: Where, U pcc is the amplitude of the inverter output voltage; K p-u is the proportional parameter for amplitude compensation; K i-u is the integral parameter for amplitude compensation; U0 is the rated grid voltage.

6. The VSG asymmetric low-voltage ride-through control method according to claim 1, characterized in that The active power control link includes the following steps: Compare the actual active power output P of the power grid e with the set active power P ref to obtain a power deviation signal; Divide the power deviation signal by the rated grid frequency ω N , convert the power deviation signal into a frequency deviation signal, and then integrate the frequency deviation; Add the obtained integrated frequency deviation to the rated frequency ω N to obtain the angular frequency ω of the inverter. Subtract the angular frequency ω from the rated angular frequency ω N to obtain a deviation signal. The deviation signal is converted by K f and added to the previous power deviation signal to form a negative feedback. The angular frequency ω is integrated and then the remainder of the result divided by 2π is taken to obtain the reference phase signal θ ref .

7. The VSG asymmetric low-voltage ride-through control method according to claim 1, characterized in that The reactive power voltage control link includes the following steps: The collected reactive power Q output by the inverter e and the reactive power set value Q ref are subtracted to obtain a reactive power deviation signal; Convert the reactive power deviation signal into a voltage deviation signal through the droop coefficient Kq, and at the same time subtract the grid voltage amplitude V ref from the grid voltage amplitude U0 to obtain an initial voltage deviation signal. Finally, add the voltage deviation signal, the initial voltage deviation signal, and the rated grid voltage amplitude together to obtain the reference value U ref of the inverter output voltage amplitude.

8. The VSG asymmetric low-voltage ride-through control method according to claim 1, characterized in that Whether the power grid has a fault is determined by comparing the magnitude of the power grid voltage amplitude with the rated power grid voltage amplitude.

9. The VSG asymmetric low-voltage ride-through control method according to claim 1, wherein The power grid voltage amplitude is detected by a voltage sensor.

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