Electronic device

Abstract

The invention provides an electronic device. The electronic device comprises a plurality of gate lines, a plurality of data lines, a plurality of switch elements, a plurality of photosensitive elements and a plurality of bias lines, the plurality of data lines are electrically insulated and intersect with the plurality of gate lines. The plurality of switch elements are electrically connected to at least part of the plurality of data lines and the plurality of gate lines. The plurality of photosensitive elements are electrically connected to at least part of the plurality of switch elements. Each of the plurality of bias lines includes a first portion and a second portion. The first portion overlaps and is electrically insulated from a corresponding data line. The second part is electrically connected to a corresponding photosensitive element. In a top view, the second part extends into the orthographic projection of the corresponding photosensitive element from the first part, and the overlapping area of the second part and the corresponding photosensitive element is smaller than the area of the second part. The electronic device has a circuit design capable of repairing defects, so that the yield can be improved or the production cost can be reduced.

Description

Technical Field

[0001] The present disclosure relates to an electronic device. Background Art

[0002] To meet the demand for high resolution, pixels in electronic devices are made smaller and smaller. In the design of small-sized pixels, the manufacturing process encounters a bottleneck of low yield. In view of this, a circuit design capable of repairing defects is needed to improve the yield or reduce the production cost. Summary of the Invention

[0003] The present disclosure provides an electronic device having a circuit design capable of repairing defects.

[0004] In an embodiment of the present disclosure, the electronic device includes a plurality of gate lines, a plurality of data lines, a plurality of switching elements, a plurality of photosensitive elements, and a plurality of bias lines. The plurality of data lines are electrically insulated and intersect the plurality of gate lines. The plurality of switching elements are electrically connected to at least a part of the plurality of data lines and the plurality of gate lines. The plurality of photosensitive elements are electrically connected to at least a part of the plurality of switching elements. Each of the plurality of bias lines includes a first portion and a second portion. The first portion overlaps and is electrically insulated from a corresponding one of the data lines. The second portion is electrically connected to a corresponding one of the photosensitive elements. In a top view, the second portion extends from the first portion into the orthographic projection of a corresponding one of the photosensitive elements, and the overlapping area between the second portion and the corresponding one of the photosensitive elements is smaller than the area of the second portion.

[0005] In another embodiment of the present disclosure, the electronic device includes a plurality of gate lines, a plurality of data lines, a plurality of switching elements, and a plurality of photosensitive elements. The plurality of data lines are electrically insulated and intersect the plurality of gate lines. The plurality of switching elements are electrically connected to at least a part of the plurality of data lines and the plurality of gate lines. The plurality of photosensitive elements are electrically connected to at least a part of the plurality of switching elements and overlap the plurality of gate lines. In a top view, the source electrode of each of the plurality of switching elements extends from a corresponding one of the data lines into the orthographic projection of a corresponding one of the photosensitive elements, and the overlapping area between the source electrode and the corresponding one of the photosensitive elements is smaller than the area of the source electrode.

[0006] To make the above features and advantages of the present disclosure more obvious and understandable, specific embodiments are hereinafter given and described in detail in conjunction with the accompanying drawings as follows. Brief Description of the Drawings

[0007] Figure 1 is a partial top view schematic diagram of an electronic device according to a first embodiment of the present disclosure;

[0008] Figure 2 And Figure 3 are respectively Figure 1 the cross-sectional schematic diagrams corresponding to the section lines I-I' and II-II' in

[0009] Figures 4 to 6 Partial top-down schematic views of electronic devices according to the second to fourth embodiments of the present disclosure, respectively;

[0010] Figure 7 corresponding to Figure 6 Cross-sectional schematic view taken along the cutting line III-III' in

[0011] Figures 8 to 11 Partial top-down schematic views of electronic devices according to the fifth to eighth embodiments of the present disclosure, respectively.

[0012] Description of reference numerals

[0013] 1, 1A, 1B, 1C, 1E, 1F, 1G: Electronic devices;

[0014] AL: Photosensitive structure;

[0015] B1, B2, B3: Laser beams;

[0016] BE: Lower electrode;

[0017] BL: Bias line;

[0018] C1: First conductive layer;

[0019] C2: Second conductive layer;

[0020] C3: Third conductive layer;

[0021] CH: Semiconductor pattern;

[0022] CT1, CT2, CT3: Cutting lines;

[0023] D1: First direction;

[0024] D2: Second direction;

[0025] D3: Third direction;

[0026] DE: Drain;

[0027] DL: Data line;

[0028] GE: Gate;

[0029] GL: Gate line;

[0030] IN1, IN2, IN3, IN4, IN5: Dielectric layers;

[0031] P1: First part;

[0032] P2: Second part;

[0033] PS: Photosensitive element;

[0034] SCL: Semiconductor layer;

[0035] SE: Source electrode;

[0036] SUB: Substrate;

[0037] SW: Switching element;

[0038] TE: Top electrode;

[0039] TIV: Through via;

[0040] I-I’, II-II’, III-III’: Section lines. Detailed implementation manners

[0041] Reference will now be made in detail to the exemplary embodiments of the present invention, examples of which are illustrated in the accompanying drawings. Wherever possible, the same reference numerals are used in the drawings and the description to refer to the same or like parts.

[0042] Throughout this specification and the appended claims, certain terms will be used to refer to particular elements. Those skilled in the art will understand that electronic device manufacturers may refer to the same elements by different names. This document is not intended to distinguish between elements that perform the same function but have different names. In the following specification and claims, words such as "comprising" and "including" are open-ended terms, and thus should be interpreted to mean "including but not limited to...".

[0043] Directional terms mentioned herein, such as: "up", "down", "front", "back", "left", "right", etc., are only with reference to the directions in the drawings. Therefore, the directional terms used are for illustration and not for limiting this disclosure. In the drawings, each drawing shows the general characteristics of the methods, structures, and / or materials used in a particular embodiment. However, these drawings should not be construed as defining or limiting the scope or nature covered by these embodiments. For example, for clarity, the relative dimensions, thicknesses, and positions of each film layer, region, and / or structure may be reduced or enlarged.

[0044] The structure (or layer, component, substrate) described in this disclosure being on / above another structure (or layer, component, substrate) may mean that the two structures are adjacent and directly connected, or may mean that the two structures are adjacent but not directly connected. Not being directly connected means that there is at least one intermediate structure (or intermediate layer, intermediate component, intermediate substrate, intermediate interval) between the two structures, the lower surface of one structure being adjacent or directly connected to the upper surface of the intermediate structure, and the upper surface of the other structure being adjacent or directly connected to the lower surface of the intermediate structure. And the intermediate structure can be composed of a single-layer or multi-layer solid structure or non-solid structure, without limitation. In this disclosure, when a certain structure is disposed "on" other structures, it may mean that a certain structure is "directly" on other structures, or may mean that a certain structure is "indirectly" on other structures, that is, there is at least one structure sandwiched between a certain structure and other structures.

[0045] The terms "about", "substantially" or "essentially" are generally interpreted as being within 10% of the given value or range, or as being within 5%, 3%, 2%, 1% or 0.5% of the given value or range. In addition, the expressions "ranging from a first value to a second value" and "ranging between a first value and a second value" mean that the stated range includes the first value, the second value, and other values therebetween.

[0046] The ordinal numbers used in the specification and claims, such as "first", "second", etc., are used to modify elements, and do not themselves imply or represent that the element (or elements) have any previous ordinal number, nor represent the order of one element and another element, or the order in the manufacturing method. The use of these ordinal numbers is only used to clearly distinguish an element with a certain name from another element with the same name. The same terms do not have to be used in the claims and the specification. Accordingly, the first component in the specification may be the second component in the claim.

[0047] In some embodiments of this disclosure, terms related to joining and connecting, such as "connect" and "interconnect", unless specifically defined, may mean that two structures are in direct contact, or may also mean that two structures are not in direct contact, with other structures disposed between the two structures. And these terms related to joining and connecting may also include the cases where both structures can move, or both structures are fixed. In addition, the term "couple" includes any means of direct and indirect electrical connection. In addition, the term "link" includes the means of signal communication by which two elements or devices can directly or indirectly receive and / or transmit wireless signals.

[0048] The electrical connection or coupling described in this disclosure may refer to direct connection or indirect connection. In the case of direct connection, the endpoints of the components on two circuits are directly connected or connected to each other by conductor segments. In the case of indirect connection, there are switches, diodes, capacitors, inductors, resistors, other suitable components, or combinations of the above components between the endpoints of the components on two circuits, but not limited thereto.

[0049] In this disclosure, the thickness, length, and width can be measured by using an optical microscope (OM), and the thickness or width can be measured from the cross-sectional image in an electron microscope, but not limited thereto. Additionally, there may be a certain error between any two values or directions used for comparison. Furthermore, the terms "a given range is from a first value to a second value", "a given range falls within the range from the first value to the second value", or "a given range is between the first value and the second value" mean that the given range includes the first value, the second value, and other values therebetween. If a first direction is perpendicular to a second direction, the angle between the first direction and the second direction can be between 80 degrees and 100 degrees; if a first direction is parallel to a second direction, the angle between the first direction and the second direction can be between 0 degrees and 10 degrees.

[0050] It should be noted that, without departing from the spirit of this disclosure, the features in several different embodiments can be replaced, recombined, and mixed to complete other embodiments. As long as the features between the embodiments do not violate the inventive spirit or conflict with each other, they can be arbitrarily mixed and used.

[0051] Unless otherwise defined, all terms (including technical and scientific terms) used herein have the same meaning as commonly understood by those of ordinary skill in the technical field to which this disclosure belongs. It can be understood that these terms, such as those defined in a commonly used dictionary, should be interpreted as having a meaning consistent with the relevant technology and the background or context of this disclosure, and should not be interpreted in an idealized or overly formal manner, unless specifically defined in the embodiments of this disclosure.

[0052] The types and forms of the electronic device are not limited. For example, the electronic device may include a display device, a backlight device, an antenna device, a detection device, a splicing device, or other types of devices. In addition, the electronic device may be a bendable or flexible electronic device. The display device may be a non-self-luminous display device or a self-luminous display device. The display device may include, for example, liquid crystal, light-emitting diode, fluorescence, phosphor, quantum dot (QD), other suitable display media, or a combination of the foregoing. The antenna device may be an antenna device in a liquid crystal form or an antenna device in a non-liquid crystal form. The detection device may be a detection device that senses capacitance, light (such as visible light or X-ray), heat energy, or ultrasonic waves, but is not limited thereto. In some embodiments, the electronic device may include electronic components. The electronic components may include passive components and active components, such as capacitors, resistors, inductors, diodes, transistors, etc. The diode may include a light-emitting diode or a photodiode. The light-emitting diode may include, for example, an organic light-emitting diode (OLED), a mini light-emitting diode (mini LED), a micro light-emitting diode (micro LED), or a quantum dot light-emitting diode (quantum dot LED), but is not limited thereto. The splicing device may be, for example, a display splicing device, a detection splicing device, or an antenna splicing device, but is not limited thereto.

[0053] It should be noted that the electronic device may be any permutation and combination of the foregoing, but is not limited thereto. In addition, the appearance of the electronic device may be rectangular, circular, polygonal, a shape with curved edges, or other suitable shapes. The electronic device may have peripheral systems such as a driving system, a control system, a light source system, etc. to support a display device, an antenna device, a wearable device (such as including augmented reality or virtual reality), a vehicle-mounted device (such as including an automotive windshield), or a splicing device, etc.

[0054] Figure 1 is a partial top view schematic diagram of an electronic device according to a first embodiment of the present disclosure. Figure 2 and Figure 3 are respectively corresponding Figure 1 to the cross-sectional schematic diagrams taken along the section lines I-I' and II-II' in Figures 4 to 6 are respectively partial top view schematic diagrams of electronic devices according to the second to fourth embodiments of the present disclosure. Figure 7 is corresponding to Figure 6 the cross-sectional schematic diagram taken along the section line III-III' in Figures 8 to 11 are respectively partial top view schematic diagrams of electronic devices according to the fifth to eighth embodiments of the present disclosure.

[0055] Please refer toFigure 1 , the electronic device 1 may include a plurality of gate lines GL (only one is schematically shown), a plurality of data lines DL, a plurality of switching elements SW, a plurality of photosensitive elements PS, and a plurality of bias lines BL. The plurality of data lines DL are electrically insulated and intersect the plurality of gate lines GL. The plurality of switching elements SW are electrically connected to at least a portion of the plurality of data lines DL and the plurality of gate lines GL. The plurality of photosensitive elements PS are electrically connected to at least a portion of the plurality of switching elements SW. Each of the plurality of bias lines BL includes a first portion P1 and a second portion P2. The first portion P1 overlaps and is electrically insulated from a corresponding one of the data lines DL. The second portion P2 is electrically connected to a corresponding one of the photosensitive elements PS. In a top view (e.g., referring to Figure 1 ), the second portion P2 extends from the first portion P1 into the orthographic projection (represented by a thick solid line) of a corresponding one of the photosensitive elements PS, and the overlapping area of the second portion P2 and a corresponding one of the photosensitive elements PS is smaller than the area of the second portion P2.

[0056] Specifically, the plurality of gate lines GL extend, for example, along a first direction D1 and are arranged in a second direction D2. The first direction D1 and the second direction D2 intersect each other and are both perpendicular to the thickness direction (such as a third direction D3) of the electronic device 1. In some embodiments, as shown in the figure, the first direction D1 and the second direction D2 may be perpendicular to each other.

[0057] The plurality of data lines DL extend, for example, along the second direction D2 and are arranged in the first direction D1. In some embodiments, the plurality of mutually interleaved gate lines GL and the plurality of data lines DL may belong to different conductive layers and are electrically insulated from each other through one or more insulating layers / dielectric layers.

[0058] The plurality of switching elements SW are disposed adjacent to the intersections of the plurality of gate lines GL and the plurality of data lines DL and may be arranged in an array in the first direction D1 and the second direction D2. In some embodiments, each of the plurality of switching elements SW may include a gate GE, a semiconductor pattern CH, a source SE, and a drain DE, but is not limited thereto. The gate GE may be electrically connected to a corresponding one of the gate lines GL. The semiconductor pattern CH overlaps the gate GE in the third direction D3. The source SE and the drain DE are respectively disposed at opposite ends of the semiconductor pattern CH, wherein the source SE may be electrically connected to a corresponding one of the data lines DL, and the drain DE may be electrically connected to a corresponding one of the photosensitive elements PS. For example, the drain DE may be electrically connected to a lower electrode BE (refer to Figure 2 ) of a corresponding one of the photosensitive elements PS.

[0059] The plurality of photosensitive elements PS are used to detect incident light. For example, as Figure 2As shown, each of the plurality of photosensitive elements PS may include a lower electrode BE, an upper electrode TE, and a photosensitive structure AL disposed between the lower electrode BE and the upper electrode TE. In some embodiments, the photosensitive structure AL may include a stacked layer of a P-type semiconductor layer and an N-type semiconductor layer, or the photosensitive structure AL may include a stacked layer of a P-type semiconductor layer, an intrinsic semiconductor layer, and an N-type semiconductor layer, but is not limited thereto.

[0060] In some embodiments, as Figure 1 shown, the plurality of photosensitive elements PS may respectively overlap the plurality of switching elements SW, and in a top view, the source electrode SE of each of the plurality of switching elements SW may extend from a corresponding data line DL into the orthographic projection of a corresponding photosensitive element PS, and the overlapping area of the source electrode SE and the corresponding photosensitive element PS may be smaller than the area of the source electrode SE. In other words, at least a portion of the source electrode SE protrudes outside the corresponding photosensitive element PS, that is, at least a portion of the source electrode SE does not overlap the corresponding photosensitive element PS in the third direction D3.

[0061] By overlapping the photosensitive element PS and the switching element SW, the area of the photosensitive element PS can be increased, which helps to improve the conversion efficiency. In the structure where the photosensitive element PS and the switching element SW are overlapped, if the source electrode SE is completely covered by the photosensitive element PS (i.e., the overlapping area of the source electrode SE and the photosensitive element PS is equal to the area of the source electrode SE), it will be difficult to perform repair when the source electrode SE needs to be repaired (such as laser repair). In this embodiment, by making at least a portion of the source electrode SE protrude outside the corresponding photosensitive element PS, when the source electrode SE needs to be repaired (such as laser repair), the portion of the source electrode SE that does not overlap the photosensitive element PS can be used as the repair location, so that the repair difficulty can be reduced or the repair success rate can be increased.

[0062] In some embodiments, in the structure where the photosensitive element PS and the switching element SW are overlapped, in a top view, as Figure 1 shown, each of the plurality of switching elements SW may be located at a corner of a corresponding photosensitive element PS, so that at least a portion of the source electrode SE protrudes outside the corresponding photosensitive element PS and extends to a corresponding data line DL.

[0063] A plurality of bias lines BL extend, for example, along a second direction D2 and are arranged in a first direction D1. In each of the plurality of bias lines BL, a first portion P1 overlaps and is electrically insulated from a corresponding data line DL. In some embodiments, the overlapping bias lines BL and data lines DL may belong to different conductive layers and are electrically insulated from each other by one or more insulating layers / dielectric layers. In each of the plurality of bias lines BL, a second portion P2 is electrically connected to a corresponding photosensitive element PS. For example, the second portion P2 is electrically connected to the upper electrode TE of a corresponding photosensitive element PS (refer to Figure 3 ).

[0064] The first portion P1 and the second portion P2 may be connected together for signal transmission. As Figure 1 shown, the second portion P2 may extend from the first portion P1 into the orthographic projection of a corresponding photosensitive element PS, and the overlapping area between the second portion P2 and the corresponding photosensitive element PS is, for example, smaller than the area of the second portion P2. In other words, at least a portion of the second portion P2 protrudes outside the corresponding photosensitive element PS, that is, at least a portion of the second portion P2 does not overlap with the corresponding photosensitive element PS in a third direction D3.

[0065] By making at least a portion of the bias line BL (such as at least a portion of the second portion P2) protrude outside the corresponding photosensitive element PS, when it is necessary to repair the bias line BL (such as laser repair), the portion where the second portion P2 does not overlap with the photosensitive element PS can be used as the repair location. In this way, the repair difficulty can be reduced or the repair success rate can be increased.

[0066] According to different requirements, the electronic device 1 may include other components or film layers. As Figure 2 and Figure 3 shown, the electronic device 1 may include a substrate SUB, a first conductive layer C1, a dielectric layer IN1, a semiconductor layer SCL, a second conductive layer C2, a dielectric layer IN2, a dielectric layer IN3, a dielectric layer IN4, a third conductive layer C3, and a dielectric layer IN5, but is not limited thereto.

[0067] The substrate SUB may be a rigid substrate or a flexible substrate. The material of the substrate SUB includes, for example, glass, quartz, ceramics, sapphire, or plastic, etc., but is not limited thereto. Plastic may include polycarbonate (PC), polyimide (PI), polypropylene (PP), polyethylene terephthalate (PET), other suitable flexible materials, or a combination of the foregoing materials, but is not limited thereto.

[0068] The first conductive layer C1 is disposed on the substrate SUB. The material of the first conductive layer C1 may include, for example, a transparent conductive material or an opaque conductive material. The transparent conductive material may include a metal oxide, graphene, other suitable transparent conductive materials, or a combination of the above. The metal oxide may include indium tin oxide, indium zinc oxide, aluminum tin oxide, aluminum zinc oxide, indium germanium zinc oxide, or other metal oxides. The opaque conductive material may include a metal, an alloy, or a combination of the above. The metal may be a single-layer metal or a metal stack, such as aluminum, molybdenum, or titanium / aluminum / titanium, but not limited thereto. The first conductive layer C1 may be a patterned conductive layer, and the first conductive layer C1 may include a plurality of gates GE, a plurality of gate lines GL (refer to Figure 1 ), and other lines (not shown), but not limited thereto.

[0069] The dielectric layer IN1 is disposed on the first conductive layer C1 and the substrate SUB. The dielectric layer IN1 may be a single layer or a multi-layer. The material of the dielectric layer IN1 includes, for example, an organic insulating material, an inorganic insulating material, or a combination of the above. The organic insulating material includes, for example, polymethyl methacrylate (PMMA), epoxy resin, acrylic-based resin, silicone, polyimide polymer, perfluoroalkoxy alkane resin (PFA), or a combination of the above, but not limited thereto. The inorganic insulating material includes, for example, silicon oxide, silicon nitride, or silicon oxynitride, but not limited thereto.

[0070] The semiconductor layer SCL is disposed on the dielectric layer IN1. The material of the semiconductor layer SCL includes, for example, amorphous silicon, polysilicon, or a metal oxide, such as Indium Gallium Zinc Oxide (IGZO), but not limited thereto. The semiconductor layer SCL may be a patterned semiconductor layer, and the semiconductor layer SCL may include a plurality of semiconductor patterns CH.

[0071] The second conductive layer C2 is disposed on the semiconductor layer SCL and the dielectric layer IN1. The material of the second conductive layer C2 may refer to the material of the aforementioned first conductive layer C1, which will not be repeated herein. The second conductive layer C2 may be a patterned conductive layer, and the second conductive layer C2 may include a plurality of source electrodes SE, a plurality of drain electrodes DE, a plurality of data lines DL, and other lines (not shown), but not limited thereto.

[0072] Although Figure 2It is schematically shown that the source SE, the drain DE, and / or the data line DL are single-layer conductive layers. However, in other embodiments, although not shown, the source SE, the drain DE, and / or the data line DL may include multi-layer conductive layers. For example, there may be another conductive layer (not shown) between the second conductive layer C2 and the lower electrode BE, and the conductive pattern or via structure (not shown) for electrically connecting the drain DE to the lower electrode BE in the other conductive layer may be regarded as a part of the drain DE. Similarly, the conductive pattern or via structure (not shown) electrically connected to the source SE in the other conductive layer may be regarded as a part of the source SE.

[0073] The dielectric layer IN2 is disposed on the second conductive layer C2, the semiconductor layer SCL, and the dielectric layer IN1. The dielectric layer IN2 may be a single layer or multiple layers, and the material of the dielectric layer IN2 may refer to the material of the dielectric layer IN1, which will not be repeated here.

[0074] The dielectric layer IN3 is disposed on the dielectric layer IN2. The dielectric layer IN3 can be used to provide a flat surface for carrying a plurality of photosensitive elements PS. The material of the dielectric layer IN3 includes, for example, organic insulating materials, but is not limited thereto. The detailed content of the organic insulating materials can be referred to the above, which will not be repeated here.

[0075] A plurality of photosensitive elements PS are disposed on the dielectric layer IN3, and the lower electrode BE, the photosensitive structure AL, and the upper electrode TE of each of the plurality of photosensitive elements PS are, for example, stacked on the dielectric layer IN3 in sequence. The lower electrode BE is, for example, electrically connected to a corresponding drain DE through the dielectric layer IN3 and the dielectric layer IN2. The material of the lower electrode BE may include, for example, transparent conductive materials or opaque conductive materials. The material of the upper electrode TE may include, for example, transparent conductive materials, so that the light beam incident on the photosensitive element PS can penetrate the upper electrode TE and be transmitted to the photosensitive structure AL.

[0076] The dielectric layer IN4 is disposed on the plurality of photosensitive elements PS and the dielectric layer IN3. The material of the dielectric layer IN4 may refer to the material of the dielectric layer IN1, which will not be repeated here.

[0077] The third conductive layer C3 is disposed on the dielectric layer IN4. The material of the third conductive layer C3 may refer to the material of the aforementioned first conductive layer C1, which will not be repeated here. The third conductive layer C3 may be a patterned conductive layer, and the third conductive layer C3 may include a plurality of bias lines BL and other lines (not shown), but is not limited thereto. Each of the plurality of bias lines BL can penetrate the dielectric layer IN4 and be electrically connected to a corresponding upper electrode TE.

[0078] The dielectric layer IN5 is disposed on the third conductive layer C3 and the dielectric layer IN4. The material of the dielectric layer IN5 may refer to the material of the dielectric layer IN1, which will not be repeated here.

[0079] The method of repairing the electronic device 1 may include cutting the second portion P2 with a laser beam B1 (refer to Figure 3 ) and / or cutting the source SE with a laser beam B2 (refer to Figure 2 ). In some embodiments, the method of repairing the electronic device 1 may further include cutting the drain DE with a laser beam B3 (refer to Figure 2 ), but not limited thereto. Figure 1 Three cutting lines are schematically shown, where the cutting line CT1 falls on the portion of the second portion P2 that does not overlap with the photosensitive element PS, the cutting line CT2 falls on the portion of the source SE that does not overlap with the photosensitive element PS, and the cutting line CT3 falls between the via hole TIV of the drain DE and the semiconductor pattern CH.

[0080] In some embodiments, the laser beam may cut the second portion P2 along the Figure 1 cutting line CT1 in such a way that in at least one of the plurality of bias lines BL, the second portion P2 is disconnected at a position adjacent to the first portion P1. Figure 4 The electronic device 1A after the above laser repair is shown. By repairing the portion of the second portion P2 that does not overlap with the photosensitive element PS instead of the portion of the second portion P2 that overlaps with the photosensitive element PS or the first portion P1 disposed overlapping with the data line DL, it is possible to avoid short - circuiting of the upper and lower conductive layers (such as the upper electrode TE and the lower electrode BE; the first portion P1 and the data line DL) due to high - temperature melting during laser cutting / repairing, thereby maintaining the normal operation of the components other than the repair.

[0081] In some embodiments, the laser beam may cut the source SE along the Figure 1 cutting line CT2 in such a way that in at least one of the plurality of switching elements SW, the source SE is disconnected at a position adjacent to a corresponding data line DL. Figure 8 The electronic device 1D after the above laser repair is shown. By repairing the portion of the source SE that does not overlap with the photosensitive element PS instead of the portion of the source SE that overlaps with the photosensitive element PS, it is possible to avoid short - circuiting of the upper and lower conductive layers (such as the upper electrode TE and the lower electrode BE) due to high - temperature melting during laser cutting / repairing, thereby maintaining the normal operation of the components other than the repair.

[0082] In some embodiments, the laser beam may cut along the Figure 1 cutting line CT1 and the cutting line CT2 such that in at least one of the plurality of bias lines BL, the second portion P2 is disconnected at a position adjacent to the first portion P1, and in one switching element SW corresponding to the at least one bias line BL, the source SE is disconnected at a position adjacent to a corresponding data line DL. Figure 5 The electronic device 1B after the above laser repair is shown.

[0083] In some embodiments, the laser beam may cut along the Figure 1 cutting lines CT1 and CT3 therein, such that in at least one of the plurality of bias lines BL, the second portion P2 is disconnected at a position adjacent to the first portion P1, and in a photosensitive element PS corresponding to the at least one bias line BL, the upper electrode TE and the lower electrode BE of the corresponding photosensitive element PS are short-circuited to each other. Figure 6 And Figure 7 shows the electronic device 1C after the above laser repair.

[0084] In some embodiments, the laser beam may cut along the Figure 1 cutting lines CT2 and CT3 therein, such that in at least one of the plurality of switching elements SW, the source electrode SE is disconnected at a position adjacent to a corresponding data line DL, and in a photosensitive element PS corresponding to the at least one switching element SW, the upper electrode TE and the lower electrode BE of the corresponding photosensitive element PS are short-circuited to each other. Figure 9 shows the electronic device 1E after the above laser repair.

[0085] Although the above embodiments all show that the switching element SW is located at the lower left corner of the corresponding photosensitive element PS, the present disclosure is not limited thereto. In other embodiments, the switching element SW may be located at the upper left corner, upper right corner or lower right corner of the corresponding photosensitive element PS. Figure 10 Schematically shows the electronic device 1F in which the switching element SW is located at the upper right corner of the corresponding photosensitive element PS.

[0086] Although the above embodiments all show that the data line DL and the bias line BL for controlling the same photosensitive element PS are respectively arranged on the opposite sides (such as the left and right sides) of the photosensitive element PS, the present disclosure is not limited thereto. In other embodiments, the data line DL and the bias line BL for controlling the same photosensitive element PS may be arranged on the same side of the photosensitive element PS, as shown in Figure 11 the electronic device 1G.

[0087] In summary, in the embodiments of the present disclosure, a position convenient for repair can be provided through the design that at least a part of the bias line / source electrode does not overlap with the photosensitive element, so as to improve the repair success rate.

[0088] The above embodiments are only used to illustrate the technical solutions of the present disclosure, rather than limiting them; although the present disclosure has been described in detail with reference to the foregoing embodiments, those skilled in the art should understand that they can still modify the technical solutions described in the foregoing embodiments, or perform equivalent replacements on some or all of the technical features; and these modifications or replacements do not cause the essence of the corresponding technical solutions to deviate from the scope of the technical solutions of the embodiments of the present disclosure.

Claims

1. An electronic device, characterized in that, Comprising: A plurality of gate lines; A plurality of data lines, electrically insulated and intersecting the plurality of gate lines; A plurality of switching elements, electrically connected to at least part of the plurality of data lines and the plurality of gate lines; A plurality of photosensitive elements, electrically connected to at least part of the plurality of switching elements; And A plurality of bias lines, wherein each of the plurality of bias lines comprises: A first part, overlapping and electrically insulated from a corresponding one of the data lines; and A second part, electrically connected to a corresponding one of the photosensitive elements, wherein, in a top view, the second part extends from the first part into a front projection of the corresponding one of the photosensitive elements, and an overlapping area of the second part and the corresponding one of the photosensitive elements is smaller than an area of the second part.

2. The electronic device according to claim 1, wherein In at least one of the plurality of bias lines, the second part is disconnected at a position adjacent to the first part.

3. The electronic device according to claim 1, wherein The plurality of photosensitive elements respectively overlap the plurality of switching elements, and in the top view, a source electrode of each of the plurality of switching elements extends from a corresponding one of the data lines into a front projection of a corresponding one of the photosensitive elements, and an overlapping area of the source electrode and the corresponding one of the photosensitive elements is smaller than an area of the source electrode.

4. The electronic device according to claim 3, wherein In at least one of the plurality of bias lines, the second part is disconnected at a position adjacent to the first part, and in a switching element corresponding to the at least one bias line, the source electrode is disconnected at a position adjacent to the corresponding one of the data lines.

5. The electronic device according to claim 3, wherein In at least one of the plurality of bias lines, the second part is disconnected at a position adjacent to the first part, and in a photosensitive element corresponding to the at least one bias line, an upper electrode and a lower electrode of the corresponding one of the photosensitive elements are short-circuited to each other.

6. The electronic device according to claim 1, wherein The plurality of photosensitive elements overlap the plurality of gate lines, and in the top view, each of the plurality of switching elements is located at a corner of a corresponding one of the photosensitive elements.

7. An electronic device, characterized in that, Comprising: A plurality of gate lines; A plurality of data lines, electrically insulated and intersecting the plurality of gate lines; A plurality of switching elements, electrically connected to at least part of the plurality of data lines and the plurality of gate lines; And A plurality of photosensitive elements, electrically connected to at least part of the plurality of switching elements and overlapping the plurality of gate lines, wherein, in a top view, a source electrode of each of the plurality of switching elements extends from a corresponding one of the data lines into a front projection of a corresponding one of the photosensitive elements, and an overlapping area of the source electrode and the corresponding one of the photosensitive elements is smaller than an area of the source electrode.

8. The electronic device according to claim 7, wherein In the top view, each of the plurality of switching elements is located at a corner of the corresponding one of the photosensitive elements.

9. The electronic device according to claim 7, wherein In at least one of the plurality of switching elements, the source electrode is disconnected at a position adjacent to the corresponding one of the data lines.

10. The electronic device according to claim 9, characterized in that, In a photosensitive element corresponding to the at least one switching element, an upper electrode and a lower electrode of the corresponding one of the photosensitive elements are short-circuited to each other.

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