Memory device and operating method thereof

Abstract

A method of operating a storage device includes: receiving a first performance requirement from a first host; assigning a 0-th stripe group of the non-volatile memory device to the first host based on the first performance requirement; writing first data of the first host into the 0th stripe group; receiving a second performance requirement from a second host; reallocating the non-volatile memory device based on the first performance requirement and the second performance requirement such that a first stripe group and a second stripe group of the non-volatile memory device are allocated to the first host and the second host; and executing a garbage collection operation for the first host. The second stripe group includes some of the non-volatile memory devices included in the 0th stripe group, and a first portion of the non-volatile memory devices included in the second stripe group stores the first data and is not selected for a garbage collection operation.

Description

[0001] Cross - reference to related applications

[0002] This application claims priority to Korean Patent Application No. 10 - 2024 - 0011892, filed with the Korean Intellectual Property Office on January 25, 2024, the disclosure of which is incorporated herein by reference in its entirety. Technical Field

[0003] Example embodiments of the present disclosure described herein relate to semiconductor memory devices, and more particularly, to a storage device and an operation method thereof. Background Art

[0004] Semiconductor memories are classified into volatile memories (such as static random access memories (SRAMs) or dynamic random access memories (DRAMs)) that lose the data stored therein when power is turned off, and non - volatile memories (such as flash memories, phase - change RAMs (PRAMs), magnetic RAMs (MRAMs), resistive RAMs (RRAMs), or ferroelectric RAMs (FRAMs)) that retain the data stored therein even when power is turned off.

[0005] A high - capacity storage medium based on flash memory communicates with an external device through a high - speed interface. Nowadays, a multi - host storage system in which a single storage medium supports multiple hosts or multiple tenants is being developed. Generally, when multiple hosts access a single storage medium, the physical resources of the single storage medium are limited, which results in a performance degradation of each host. Summary of the Invention

[0006] Example embodiments of the present disclosure may provide a storage device and an operation method thereof with improved performance.

[0007] According to some example embodiments, an operation method of a storage device including a plurality of non - volatile storage devices includes: receiving a first performance requirement from a first host; based on the first performance requirement, allocating a 0th stripe group of the plurality of non - volatile storage devices to the first host; in response to a first write request of the first host, writing first data of the first host to the 0th stripe group; receiving a second performance requirement from a second host; based on the first performance requirement and the second performance requirement, re - allocating the plurality of non - volatile storage devices such that a 1st stripe group of the plurality of non - volatile storage devices is allocated to the first host, and a 2nd stripe group of the plurality of non - volatile storage devices is allocated to the second host; and performing a garbage collection operation for the first host. The 2nd stripe group includes at least some of the non - volatile storage devices included in the 0th stripe group, and a first portion of the non - volatile storage devices included in the 2nd stripe group stores the first data of the first host, and the first portion of the stored first data is not selected as a target for the garbage collection operation for the first host.

[0008] According to some example embodiments, an operation method of a storage device including a plurality of non-volatile storage devices includes: receiving a first write request from a first host; in response to the first write request, writing first data of the first host into a first non-volatile storage device among the plurality of non-volatile storage devices; receiving a second write request from a second host; in response to the second write request, writing second data of the second host into a second non-volatile storage device among the plurality of non-volatile storage devices; and performing a garbage collection operation for the first host. The second non-volatile storage device includes at least some of the first non-volatile storage devices in the first non-volatile storage device. During the garbage collection operation for the first host, at least some of the non-volatile storage devices included in the second non-volatile storage device in the first non-volatile storage device are not selected as targets of the garbage collection operation.

[0009] According to some example embodiments, a storage device includes: a plurality of non-volatile storage devices; and a storage controller that controls the plurality of non-volatile storage devices. The storage controller includes: a host interface circuit that communicates with a plurality of hosts; a NAND interface circuit that communicates with the plurality of non-volatile storage devices; and a resource manager that allocates the plurality of non-volatile storage devices to the plurality of hosts. The resource manager receives a first performance requirement from a first host among the plurality of hosts, and allocates a 0th stripe group of the plurality of non-volatile storage devices to the first host based on the first performance requirement. The resource manager receives a second performance requirement from a second host among the plurality of hosts, and reallocates the plurality of non-volatile storage devices based on the first performance requirement and the second performance requirement such that a first stripe group of the plurality of non-volatile storage devices is allocated to the first host, and a second stripe group of the plurality of non-volatile storage devices is allocated to the second host. The second stripe group includes at least some of the non-volatile storage devices included in the 0th stripe group, and a first portion of the non-volatile storage devices included in the second stripe group stores first data of the first host and is not selected as a target of the garbage collection operation for the first host. BRIEF DESCRIPTION OF THE DRAWINGS

[0010] The above and other objects and features of the present disclosure will become apparent by referring to the following detailed description of some example embodiments of the present disclosure with reference to the accompanying drawings.

[0011] Figure 1 is a block diagram showing a storage system according to some example embodiments of the present disclosure.

[0012] Figure 2 is a block diagram showing Figure 1 of the storage controller.

[0013] Figure 3 is a block diagram showing Figure 1 of the non-volatile storage device.

[0014] Figure 4 is a diagram for describing Figure 1 the resource allocation of a storage device.

[0015] Figure 5 is a flowchart showing Figure 1 the operation of a storage device.

[0016] Figure 6 is for describing Figure 2 the resource manager of a storage controller.

[0017] Figure 7 is for describing Figure 1 the performance requirements received from multiple hosts.

[0018] Figures 8A to 8C is for describing Figure 5 the operation of a storage device according to a flowchart.

[0019] Figure 9 is for describing Figure 1 the performance requirements received from multiple hosts.

[0020] Figure 10A and Figure 10B is for describing Figure 9 the method of allocating resources of a storage device based on performance requirements.

[0021] Figure 11 is a flowchart showing Figure 1 the operation of a storage device.

[0022] Figure 12 is for describing Figure 11 the operation of a storage device according to a flowchart.

[0023] Figure 13 is a flowchart showing Figure 1 the operation of a storage device.

[0024] Figure 14A and Figure 14B is for describing Figure 13 the operation of a storage device according to a flowchart.

[0025] Figure 15A and Figure 15B is for describing Figure 13 the operation of a storage device according to a flowchart.

[0026] Figure 16 is a block diagram of a data center of a storage device to which some example embodiments according to the present disclosure can be applied. Detailed Description

[0027] Hereinafter, some example embodiments of the present disclosure will be described in detail and clearly so that those of ordinary skill in the art can easily implement the present disclosure.

[0028] Figure 1 is a block diagram showing a storage system according to some example embodiments of the present disclosure. Referring to Figure 1 , the storage system 10 may include a plurality of hosts H1 to Hn and a storage device 100. In some example embodiments, the storage system 10 may include at least one of various information processing devices (such as a personal computer, a laptop computer, a server, a workstation, a smart phone, a tablet PC, etc.). Alternatively, the storage system 10 may be a data center configured to store and manage various data, or a storage server or an application server included in the data center.

[0029] The plurality of hosts H1 to Hn may be configured to access the storage device 100. In some example embodiments, each of the plurality of hosts H1 to Hn may be a computing node configured to operate independently. In some example embodiments, the plurality of hosts H1 to Hn may be single-core processors or multi-core processors respectively included in different computing nodes (or computing systems). Alternatively, at least some of the plurality of hosts H1 to Hn may be different processors included in the same computing node (or computing system). As another example, the plurality of hosts H1 to Hn may be processors configured to process different applications. As another example, each of the plurality of hosts H1 to Hn may be a virtual machine driven independently or separately.

[0030] The storage device 100 may operate under the control of each of the plurality of hosts H1 to Hn. For example, the storage device 100 may include a storage controller 110 and a non-volatile storage device NVM. Under the control of each of the plurality of hosts H1 to Hn, the storage controller 110 may store data in the non-volatile storage device NVM, or may provide the data stored in the non-volatile storage device NVM to each of the plurality of hosts H1 to Hn.

[0031] In some example embodiments, the storage device 100 may be a single storage device or a single storage apparatus configured to support a plurality of hosts or a plurality of tenants. For example, each of the plurality of hosts H1 to Hn may be a tenant configured to operate independently or separately, and the plurality of hosts H1 to Hn may share the storage device 100. That is, the storage system 10 may include a multi-tenant environment.

[0032] Each of a plurality of hosts H1 to Hn configured to access the storage device 100 independently of each other may request specific performance of the storage device 100 according to its type or operation method. However, due to the limitation of the physical resources of the storage device 100, under specific conditions, the storage device 100 may not be able to support the specific performance required by each of the hosts H1 to Hn. For example, when a specific host occupies all or most of the physical resources of the storage device 100, or when various maintenance operations are performed in the storage device 100, the storage device 100 may not be able to support the performance required by some hosts.

[0033] The storage device 100 according to some example embodiments of the present disclosure may be configured to allocate physical resources to a plurality of hosts H1 to Hn. For example, the storage controller 110 may include a resource manager 111. The resource manager 111 may be configured to: based on the performance requirements of each of the plurality of hosts H1 to Hn, allocate the physical resources of the storage device 100 to each of the plurality of hosts H1 to Hn. In this case, since the physical resources used or occupied by the plurality of hosts H1 to Hn are separated from each other, the possibility of performance interference between the plurality of hosts H1 to Hn can be prevented or reduced. In some example embodiments, the resource manager 111 may dynamically reconfigure the physical resources for each of the plurality of hosts H1 to Hn. The operation of the storage device 100 according to some example embodiments of the present disclosure will be described in detail with reference to the following drawings.

[0034] Figure 2 is a diagram showing Figure 1 of the storage controller. Referring to Figure 1 and Figure 2 , the storage controller 110 may include a resource manager 111, a host interface circuit 112, a NAND interface circuit 113, a processor 114, a random access memory (RAM) 115, a flash translation layer (FTL) 116, an error correction code (ECC) engine 117, and an advanced encryption standard (AES) engine 118. The configuration of the storage controller 110 shown in Figure 2 is provided as an example, and the present disclosure is not limited thereto. The storage controller 110 may include any other components.

[0035] The resource manager 111 may be configured to allocate the physical resources of the storage device 100 to a plurality of hosts H1 to Hn sharing the storage device 100. For example, based on the performance requirements of each of the plurality of hosts H1 to Hn, the resource manager 111 may allocate the physical resources of the storage device 100 so as not to cause performance interference between the plurality of hosts H1 to Hn. The operation of the resource manager 111 will be described in detail with reference to the following drawings.

[0036] The host interface circuit 112 can communicate with multiple hosts H1 to Hn through the host interface. The host interface can include a Peripheral Component Interconnect (PCI) Express interface or a PCI Express-based Non-Volatile Memory Express (NVMe) interface. However, the present disclosure is not limited thereto. For example, the host interface can include at least one of various host interfaces (such as a Serial ATA (SATA) interface, a Serial Attached SCSI (SAS) interface, a Universal Flash Storage (UFS) interface, and a Compute Express Link (CXL) interface).

[0037] The NAND interface circuit 113 can communicate with multiple non-volatile memory devices NVM through multiple channels CH. In some example embodiments, the NAND interface circuit 113 can be implemented to conform to a standard such as Toggle or Open NAND Flash Interface (ONFI).

[0038] The processor 114 can be configured to control the overall operation of the storage controller 110. For example, the processor 114 can execute various applications on the storage controller 110. The RAM 115 can be configured to store various information required for the operation of the storage controller 110. In some example embodiments, the RAM 115 can be used as a buffer memory, a working memory, or a cache memory of the storage controller 110. In some example embodiments, the resource manager 111 or the FTL 116 can be implemented in the form of software, hardware, or a combination thereof. When the resource manager 111 or the FTL 116 is implemented in software, the information associated with the resource manager 111 or the FTL 116 can be stored in the RAM 115 for execution by the processor 114.

[0039] The FTL 116 can perform various maintenance operations to effectively manage or use the non-volatile memory device NVM. The maintenance operations can include operations such as address mapping operations, wear leveling operations, and garbage collection operations.

[0040] The address mapping operation of the FTL 116 refers to the operation of converting the logical addresses received from multiple hosts H1 to Hn into physical addresses for actually storing data in the non-volatile memory device NVM. In some example embodiments, the FTL116 can perform the address mapping operation by using the L2P mapping data.

[0041] The wear leveling operation of the FTL 116 may refer to an operation of preventing or reducing the likelihood of excessive degradation of a specific storage block among the storage blocks included in the non-volatile memory device NVM. For example, the FTL 116 may allocate the storage blocks included in the non-volatile memory device NVM for unified use, and thus, may prevent or reduce the likelihood of excessive degradation of a specific storage block. The wear leveling operation of the FTL 116 may be implemented by a firmware technique to balance the number of erase cycles of the storage blocks of the non-volatile memory device NVM.

[0042] The garbage collection operation of the FTL 116 may refer to an operation of ensuring available storage blocks or capacity in the non-volatile memory device NVM by copying valid data of a source storage block to a target storage block and erasing the source storage block or switching the source storage block to an idle block.

[0043] In addition to the above operations, the FTL 116 may also perform various management operations such as a bad block management operation. In an exemplary embodiment, some or all of the functions of the FTL 116 may be implemented by software, hardware, or a combination thereof.

[0044] The ECC engine 117 may detect and correct errors in data read from the non-volatile memory device NVM. For example, the ECC engine 117 may generate parity bits by performing ECC encoding on write data to be written to the non-volatile memory device NVM. The generated parity bits may be stored in the non-volatile memory device NVM together with the write data. In a read operation of the non-volatile memory device NVM, the ECC engine 117 may correct errors in the read data by performing ECC decoding based on the read data and the parity bits read from the non-volatile memory device NVM.

[0045] The AES engine 118 may perform at least one of an encryption operation and a decryption operation on data input to the storage controller 110 by using a symmetric key algorithm.

[0046] Figure 3 is a diagram showing Figure 1 of the non-volatile memory device. Referring to Figure 1 and Figure 3 the storage device 100 may include a plurality of non-volatile memory devices NVM11 to NVM44. Each of the plurality of non-volatile memory devices NVM11 to NVM44 may be implemented by a semiconductor chip, a semiconductor die, or a semiconductor package.

[0047] The non-volatile memory device NVM11 may include a plurality of planes PL1 and PL2, and a peripheral circuit PERI. The plane PL1 may include a plurality of memory blocks BLK11 to BLK14, and the plane PL2 may include a plurality of memory blocks BLK21 to BLK24. Each of the plurality of memory blocks BLK11 to BLK14 and BLK21 to BLK24 may include a plurality of pages. In some example embodiments, the memory blocks (e.g., BLK11 to BLK14) included in the same plane (e.g., PL1) may be configured to share the same bit lines, but the present disclosure is not limited thereto. In some example embodiments, the plurality of planes PL1 and PL2 of the non-volatile memory device NVM11 may operate independently of or in parallel with each other.

[0048] The peripheral circuit PERI of the non-volatile memory device NVM11 may be connected to a corresponding one of the plurality of channels CH1 to CH4 (e.g., CH1). In response to various signals received through the corresponding channel, the peripheral circuit PERI may store the data received through the corresponding channel in the plurality of planes PL1 and PL2, or may output the data stored in the plurality of planes PL1 and PL2 through the corresponding channel. For the above operations, the peripheral circuit PERI may include various components (such as an address decoder, a voltage generator, a page buffer circuit, an input / output circuit, and / or a control logic circuit).

[0049] For simplicity of drawing, an example is shown in which the non-volatile memory device NVM11 includes two planes PL1 and PL2 and one plane includes four memory blocks, but the present disclosure is not limited thereto. In the non-volatile memory device NVM11, various changes and modifications may be made to the number of planes, the number of memory blocks, or the number of pages. In some example embodiments, the structures of the non-volatile memory devices NVM12 to NVM44 are similar to the structure of the non-volatile memory device NVM11, and thus, additional description will be omitted to avoid redundancy.

[0050] The plurality of non-volatile memory devices NVM11 to NVM44 may communicate with the memory controller 110 through the plurality of channels CH1 to CH4. The plurality of non-volatile memory devices NVM11 to NVM44 may form a plurality of paths WAY1 to WAY4.

[0051] For example, among a plurality of non-volatile memory devices NVM11 to NVM44, a first portion of the non-volatile memory devices NVM11, NVM12, NVM13, and NVM14 can communicate with the memory controller 110 through a first channel CH1, a second portion of the non-volatile memory devices NVM21, NVM22, NVM23, and NVM24 can communicate with the memory controller 110 through a second channel CH2, a third portion of the non-volatile memory devices NVM31, NVM32, NVM33, and NVM34 can communicate with the memory controller 110 through a third channel CH3, and a fourth portion of the non-volatile memory devices NVM41, NVM42, NVM43, and NVM44 can communicate with the memory controller 110 through a fourth channel CH4. Among the plurality of non-volatile memory devices NVM11 to NVM44, a fifth portion of the non-volatile memory devices NVM11, NVM21, NVM31, and NVM41 can form a first path WAY1, a sixth portion of the non-volatile memory devices NVM12, NVM22, NVM32, and NVM42 can form a second path WAY2, a seventh portion of the non-volatile memory devices NVM13, NVM23, NVM33, and NVM43 can form a third path WAY3, and an eighth portion of the non-volatile memory devices NVM14, NVM24, NVM34, and NVM44 can form a fourth path WAY4. That is to say, the storage device 100 can have a multi-path / multi-channel structure. In some example embodiments, with reference to Figure 3 a 4-channel and 4-path structure is described, but the present disclosure is not limited thereto. For example, it can be understood that various changes and modifications can be made to the number of paths or the number of channels.

[0052] In some example embodiments, the physical resources of the storage device 100 can include various components. For example, the physical resources of the storage device 100 can indicate the non-volatile memory devices NVM11 to NVM44 included in the storage device 100. Alternatively, the physical resources of the memory controller 110 can indicate the buffer memory (e.g., DRAM) of the storage device 100. As another example, the physical resources of the storage device 100 can be associated with the operating speed of the storage device 100. As another example, the physical resources of the storage device 100 can include various hardware components included in the memory controller 110.

[0053] Hereinafter, to easily describe some example embodiments of the present disclosure, it is assumed that the physical resources of the storage device 100 are the non-volatile memory devices NVM11 to NVM44, or the storage blocks included in the non-volatile memory devices NVM11 to NVM44. However, the present disclosure is not limited thereto. For example, the physical resources of the storage device 100 can include various components associated with the performance of the storage device 100.

[0054] Figure 4 is a diagram for describing Figure 1 resource allocation of the storage device. For simplicity of drawing, the structures of channels CH1 to CH4 connected to non-volatile storage devices NVM11 to NVM44 are omitted. However, the present disclosure is not limited thereto. For example, the non-volatile storage devices NVM11 to NVM44 shown below may have the structure or connection relationship described with reference to Figure 3 description.

[0055] With reference to Figure 1 and Figure 4 , the first host H1 to the third host H3 can access the storage device 100. In this case, the storage device 100 can allocate physical resources to the first host H1 to the third host H3.

[0056] For example, as Figure 4 shown, the storage device 100 can allocate non-volatile storage devices NVM11, NVM12, NVM21, NVM22, NVM31, NVM32, NVM41, and NVM42 as physical resources for the first host H1. In this case, the data of the first host H1 can be written into the non-volatile storage devices NVM11, NVM12, NVM21, NVM22, NVM31, NVM32, NVM41, and NVM42. The storage device 100 can allocate non-volatile storage devices NVM13, NVM14, NVM23, NVM24, NVM33, NVM34, NVM43, and NVM44 as physical resources for the second host H2. In this case, the data of the second host H2 can be written into the non-volatile storage devices NVM13, NVM14, NVM23, NVM24, NVM33, NVM34, NVM43, and NVM44. The storage device 100 can allocate non-volatile storage devices NVM21, NVM22, NVM23, and NVM24 as physical resources for the third host H3. In this case, the data of the third host H3 can be written into the non-volatile storage devices NVM21, NVM22, NVM23, and NVM24.

[0057] In some example embodiments, to optimize or improve performance, the storage device 100 can operate while managing storage blocks of different non-volatile storage devices as a single logical object. For example, to store write data received from the first host H1, the storage device 100 can form a logical object by combining the storage blocks included in the non-volatile storage devices NVM11, NVM12, NVM21, NVM22, NVM31, NVM32, NVM41, and NVM42, respectively. This logical object can be referred to as a super block.

[0058] In some example embodiments, any other host may be subject to performance interference due to operations targeted at a specific host. For example, when physical resources are allocated as Figure 4 shown, due to the access of the first host H1, garbage collection operations may be caused in the non-volatile storage devices NVM11, NVM12, NVM21, NVM22, NVM31, NVM32, NVM41, and NVM42 allocated to the first host H1. In this case, since the non-volatile storage devices NVM21 and NVM22 are allocated to the third host H3, the access of the third host H3 may be restricted due to the garbage collection operations caused by the access of the first host H1. That is, the speed at which the storage device 100 provides services to the third host H3 may be reduced.

[0059] Figure 5 is a flowchart showing the Figure 1 operation of the storage device. Referring to Figure 1 and Figure 5 , in operation S110, the storage device 100 may receive information related to performance requirements from each of the plurality of hosts H1 to Hn. And hereinafter, for convenience of description, the information related to performance requirements is referred to as "performance requirements". For example, the plurality of hosts H1 to Hn may require different performances or different capacities. The performance requirements may include information related to the performance, minimum performance (e.g., minimum desired performance), maximum performance (e.g., maximum desired performance), or capacity required by each of the plurality of hosts H1 to Hn. In some example embodiments, the performance requirements may be provided to the storage device 100 from the plurality of hosts H1 to Hn during the initialization of the storage device 100. Alternatively, when it is necessary to change the performance of each of the plurality of hosts H1 to Hn, the performance requirements may be provided to the storage device 100. Alternatively, when a new host is added to the storage system 10, the performance requirements may be sent from the new host to the storage device 100.

[0060] In operation S120, the storage device 100 may allocate the physical resources of the storage device 100 to multiple hosts H1 to Hn based on performance requirements. For example, based on the performance requirements of each of the multiple hosts H1 to Hn, the resource manager 111 of the storage controller 110 may allocate physical resources to the multiple hosts H1 to Hn such that performance interference is not caused among the multiple hosts H1 to Hn. For example, assume that the physical resources indicate multiple non-volatile storage devices NVM11 to NVM44. In this case, the resource manager 111 may allocate a first portion of the multiple non-volatile storage devices NVM11 to NVM44 to the first host H1 such that a first performance requirement (e.g., a first minimum performance and a first capacity) of the first host H1 is satisfied. The resource manager 111 may allocate a second portion of the multiple non-volatile storage devices NVM11 to NVM44 to the second host H2 such that a second performance requirement (e.g., a second minimum performance and a second capacity) of the second host H2 is satisfied. In this case, the first portion and the second portion of the multiple non-volatile storage devices NVM11 to NVM44 may not overlap with each other. That is, the first host H1 and the second host H2 may not or are less likely to be subject to performance interference.

[0061] For ease of description, the physical resources (e.g., non-volatile storage devices) allocated to a specific host are referred to as a "striped group". For example, the storage device 100 may allocate a first striped group to the first host H1; in this case, the first striped group may include a first portion of the non-volatile storage devices. That is, based on the performance requirements of each of the multiple hosts H1 to Hn, the storage device 100 may generate multiple striped groups and may allocate the multiple striped groups to the multiple hosts H1 to Hn respectively.

[0062] In operation S130, the storage device 100 may determine whether the performance requirements have changed. For example, while the operation is in progress, each of the multiple hosts H1 to Hn may change its performance requirements. The changed performance requirements may be provided to the storage device 100. Alternatively, a new host may be added to the storage system 10. In this case, new performance requirements may be provided to the storage device 100 from the new host. Alternatively, some hosts may be removed from the storage system 10. In this case, the performance requirements of each of the remaining hosts may change, and the changed performance requirements of each of the remaining hosts may be provided to the storage device 100. When the performance requirements have not changed, the storage device 100 may not perform additional operations.

[0063] When the performance requirements change, in operation S140, the storage device 100 may reallocate the resources of the storage device 100 to the multiple hosts H1 to Hn based on the performance requirements. For example, the resource manager 111 of the storage controller 110 may reallocate or reconfigure the multiple strip groups allocated to the multiple hosts H1 to Hn based on the changed performance requirements. That is, the resource manager 111 of the storage controller 110 may reallocate the resources of the storage device 100 to the multiple hosts H1 to Hn. In this case, the resources allocated to the multiple hosts H1 to Hn may not overlap with each other. This may represent preventing or reducing the possibility of performance interference between the multiple hosts H1 to Hn. How to allocate or reallocate resources to the multiple hosts H1 to Hn will be described in detail with reference to the following drawings.

[0064] As described above, the storage device 100 may dynamically allocate, configure, reallocate, or reconfigure resources to the multiple hosts H1 to Hn based on the performance requirements of each of the multiple hosts H1 to Hn. In this case, the minimum performance required by each of the multiple hosts H1 to Hn can be guaranteed or provided, and the possibility of performance interference between the multiple hosts H1 to Hn can be prevented or reduced.

[0065] Figure 6 is a diagram for describing Figure 2 the resource manager of the storage controller. For ease of description, components unnecessary for describing the resource manager 111 will be omitted. Referring to Figure 1 、 Figure 2 and Figure 6 , the resource manager 111 may include a strip group manager 111a, an allocation table 111b, and a GC group manager 111c.

[0066] The strip group manager 111a may manage the physical resources of the storage device 100 by using strip groups and may allocate the strip groups to the multiple hosts H1 to Hn. In some example embodiments, the strip group may indicate the resources allocated to each of the multiple hosts H1 to Hn. For example, the first strip group SG1 may be allocated to the first host H1, and the first strip group SG1 may include resources such as non-volatile storage devices NVM11 and NVM12. The strip group manager 111a may manage the multiple strip groups SG allocated to the multiple hosts H1 to Hn based on the performance requirements received from each of the multiple hosts H1 to Hn.

[0067] The allocation table 111b may store and manage the stripe group information INF_SG. The stripe group information INF_SG may include information related to resources (or stripe groups) allocated to a plurality of hosts H1 to Hn. For example, the first stripe group SG1 to the third stripe group SG3 may be respectively allocated to the first host H1 to the third host H3. In this case, the first stripe group SG1 may include resources such as non-volatile storage devices NVM11 and NVM12, the second stripe group SG2 may include resources such as non-volatile storage devices NVM13 and NVM14, and the third stripe group SG3 may include resources such as non-volatile storage devices NVM41 and NVM42.

[0068] The GC group manager 111c may generate GC group information INF_GG based on the stripe group information INF_SG from the allocation table 111b. The GC group information INF_GG may include information indicating a target range of resources or garbage collection operations for each of the plurality of hosts H1 to Hn. For example, the stripe groups SG may be dynamically reallocated or reconfigured according to the configuration of the storage system 10. In this case, data of a specific host (e.g., H1) may be stored in resources allocated to any other host. According to the present disclosure, in the case of performing a garbage collection operation associated with a specific host (e.g., H1), the GC group manager 111c may set a garbage collection group such that resources allocated to any other host are not selected as a target (e.g., as a GC source) of the garbage collection operation. The above components included in the resource manager 111 will be described in detail with reference to the following drawings.

[0069] The host interface circuit 112 may process host I / O based on the stripe group information INF_SG from the allocation table 111b. For example, based on the stripe group information INF_SG, the host interface circuit 112 may sequentially obtain host I / O (or input / output requests or access requests) from the plurality of hosts H1 to Hn. In some example embodiments, the host interface circuit 112 may function as an I / O scheduler.

[0070] The FTL 116a can perform an address mapping operation based on the stripe group information INF_SG from the allocation table 111b. For example, a host I / O may include a logical address. The FTL 116a can convert the logical address of the host I / O received from the host interface circuit 112 into a physical address of a corresponding resource. In some example embodiments, the FTL 116a can function as an L2P mapper. An access to the non-volatile storage device NVM can be performed based on the physical address converted by the FTL 116a. The FTL 116b can perform a garbage collection operation based on the GC group information INF_GG from the GC group manager 111c. In some example embodiments, the FTL 116b can function as a garbage collection manager.

[0071] Figure 7 is a diagram for describing performance requirements received from Figure 1 multiple hosts. For ease of description, the performance requirements of the first host H1 to the third host H3 will be described. However, the present disclosure is not limited thereto.

[0072] As Figure 7 shown, the first host H1 to the third host H3 may have different performance requirements. For example, the first performance requirement of the first host H1 may include information related to the first size S1 and the first minimum performance PF_MIN1. The second performance requirement of the second host H2 may include information related to the second size S2 and the second minimum performance PF_MIN2. The third performance requirement of the third host H3 may include information related to the third size S3 and the third minimum performance PF_MIN3.

[0073] In some example embodiments, the size of the performance requirement may indicate the size of the storage space required by the relevant host. For example, when the first host H1 requests the first size S1, the storage device 100 can allocate or provide a swap space of the first size S1 or larger to the first host H1. That is, as the size of the performance requirement increases, the amount of resources (e.g., non-volatile storage device) to be allocated to the relevant host may increase.

[0074] In some example embodiments, the minimum performance of the performance requirement may indicate the minimum performance required by the associated host. For example, when the first host H1 requests the first minimum performance PF_MIN1, the storage device 100 may allocate resources to the first host H1 such that the operating performance (e.g., read latency, write latency, and input / output speed) to serve the first host H1 at least meets the first minimum performance PF_MIN1. As an example, the operating performance to serve the host may vary according to the quantity of resources to be allocated or the configuration of the resources. For example, assume that the first minimum performance PF_MIN1 of the first host H1 is "6", and a non-volatile storage device supports a performance of "1". In this case, when six non-volatile storage devices perform parallel operations, a performance of "6" can be supported. Accordingly, to meet the first minimum performance PF_MIN1 of the first host H1, the storage device 100 may set the resources such that the first stripe group SG1 allocated to the first host H1 includes at least six non-volatile storage devices.

[0075] Figures 8A to 8C is a diagram for describing the operation of a storage device according to Figure 5 the flowchart. Hereinafter, to easily describe some example embodiments of the present disclosure, it is assumed that the resources of the storage device 100 are non-volatile storage devices NVM. In addition, it is assumed that each non-volatile storage device NVM has a size of "1" and a performance of "1". That is, "n" non-volatile storage devices may have a maximum size (or storage space) of "n" and may support a maximum performance of "n".

[0076] First, referring to Figure 1 、 Figure 2 、 Figure 3 、 Figure 8A 、 Figure 8B and Figure 8C ,the storage device 100 may include a plurality of non-volatile storage devices NVM11 to NVM44. In this case, the storage device 100 may receive a first performance requirement and a second performance requirement from the first host H1 and the second host H2, respectively. The first performance requirement of the first host H1 may include information related to the first size S1 and the first minimum performance PF_MIN1. In this case, the first size S1 may be "4", and the first minimum performance PF_MIN1 may be "6". The second performance requirement of the second host H2 may include information related to the second size S2 and the second minimum performance PF_MIN2. In this case, the second size S2 may be "6", and the second minimum performance PF_MIN2 may be "4".

[0077] The storage device 100 may allocate the non-volatile memory devices NVM11 to NVM44 to the first host H1 and the second host H2 based on the first performance requirement and the second performance requirement received from the first host H1 and the second host H2, respectively. For example, based on the first performance requirement and the second performance requirement received from the first host H1 and the second host H2, respectively, the resource manager 111 of the storage controller 110 may allocate the first stripe group SG1 to the first host H1, and may allocate the second stripe group SG2 to the second host H2. The first stripe group SG1 may include the non-volatile memory devices NVM11, NVM12, NVM21, NVM22, NVM31, NVM32, NVM41, and NVM42, and the second stripe group SG2 may include the non-volatile memory devices NVM13, NVM14, NVM23, NVM24, NVM33, NVM34, NVM43, and NVM44.

[0078] As described above, the first performance requirement of the first host H1 includes a first size S1 and a first minimum performance PF_MIN1. The first size S1 is "4", and the first minimum performance PF_MIN1 is "6". In this case, since the first stripe group SG1 including eight non-volatile memory devices is allocated to the first host H1, the first performance requirement of the first host H1 can be satisfied. In addition, the second performance requirement of the second host H2 includes a second size S2 and a second minimum performance PF_MIN2. The second size S2 is "6", and the second minimum performance PF_MIN2 is "4". In this case, since the second stripe group SG2 including eight non-volatile memory devices is allocated to the second host H2, the second performance requirement of the second host H2 can be satisfied.

[0079] For example, in association with a write request of the first host H1, a superblock may be formed based on the non-volatile memory devices NVM11, NVM12, NVM21, NVM22, NVM31, NVM32, NVM41, and NVM42 of the first stripe group SG1, and the write request of the first host H1 may be processed by using the superblock. Alternatively, in association with a write request of the second host H2, a superblock may be formed based on the non-volatile memory devices NVM13, NVM14, NVM23, NVM24, NVM33, NVM34, NVM43, and NVM44 of the second stripe group SG2, and the write request of the second host H2 may be processed by using the superblock. In this case, the first performance requirement and the second performance requirement of the first host H1 and the second host H2 can be satisfied.

[0080] In some example embodiments, while the storage device 100 allocates resources to the first host H1 and the second host H2 and operates under the control of the first host H1 and the second host H2, the third host H3 can be added to the storage system 10. In this case, the storage device 100 can receive a third performance requirement from the third host H3, and can reallocate or reconfigure resources (or stripe groups) for the first host H1 to the third host H3.

[0081] As an example, as Figure 8B or Figure 8C shown, the storage device 100 can receive a third performance requirement from the third host H3. The third performance requirement includes a third size S3 and a third minimum performance PF_MIN3. The third size S3 is "2", and the third minimum performance PF_MIN3 is "2". In this case, the storage controller 110 can reallocate or reconfigure the stripe group so that the performance requirements of the first host H1 to the third host H3 are met.

[0082] Specifically, as Figure 8B shown, the resource manager 111 of the storage controller 110 can allocate the (3-1)th stripe group SG3-1 to the third host H3. The (3-1)th stripe group SG3-1 can include non-volatile storage devices NVM41 and NVM42. Since the (3-1)th stripe group SG3-1 allocated to the third host H3 includes two non-volatile storage devices NVM41 and NVM42, the third performance requirement of the third host H3 can be met. For example, in association with a write request of the third host H3, a superblock can be formed based on the non-volatile storage devices NVM41 and NVM42 included in the (3-1)th stripe group SG3-1, and the write request of the third host H3 can be processed by using the superblock.

[0083] In this case, the resource manager 111 of the storage controller 110 can reallocate or reconfigure the first stripe group SG1 allocated to the first host H1 as the (1-1)th stripe group SG1-1. The (1-1)th stripe group SG1-1 can include non-volatile storage devices NVM11, NVM12, NVM21, NVM22, NVM31, and NVM32. Since the (1-1)th stripe group SG1-1 reallocated or reconfigured to the first host H1 includes six non-volatile storage devices, the first performance requirement of the first host H1 can still be met.

[0084] That is, as Figure 8BAs shown, when the third performance requirement of the third host H3 is received, considering the previous performance requirements of the first host H1 and the second host H2 as previous hosts and the current performance requirement of the third host H3 as the current host, the storage device 100 may reallocate or reconfigure the stripe group so that the performance requirements of all hosts H1, H2, and H3 are satisfied. In this case, the stripe groups SG1-1, SG2, and SG3-1 assigned to the first host to the third host H1, H2, and H3 are isolated from each other, which can prevent or reduce the possibility of performance interference between the first host to the third host H1, H2, and H3.

[0085] In some example embodiments, the data stored by the first host H1 in the (3-1)th stripe group SG3-1 may be migrated to the non-volatile storage device of the (1-1)th stripe group SG1-1 during the idle time of the storage device 100 or through a separate operation. Alternatively, the data stored by the first host H1 in the (3-1)th stripe group SG3-1 may be retained in the (3-1)th stripe group SG3-1 unless an explicit request is received. For example, in at least one example embodiment, if an explicit request is received, the data stored by the first host H1 in the (3-1)th stripe group SG3-1 may be migrated to the non-volatile storage device of the (1-1)th stripe group SG1-1.

[0086] In some example embodiments, as Figure 8C shown, the storage device 100 may allocate the (3-2)th stripe group SG3-2 without reallocating or reconfiguring the existing stripe groups SG1 and SG2. In this case, the (3-2)th stripe group SG3-2 may include non-volatile storage devices NVM31, NVM32, NVM41, and NVM42. That is, the (3-2)th stripe group SG3-2 may at least partially overlap with the first stripe group SG1. In other words, the first host H1 and the third host H3 may share some resources (e.g., non-volatile storage devices NVM31, NVM32, NVM41, and NVM42).

[0087] In this case, the storage device 100 may guarantee or provide the minimum performance of the first host H1 and the third host H3 through traffic control of some resources shared by the first host H1 and the third host H3. For example, when performing traffic control for the (3-2)th stripe group SG3-2, it can be guaranteed or provided that the ratio of the third host H3 occupying the (3-2)th stripe group SG3-2 is up to 50%. That is, the performance requirements of all hosts can be met through traffic control of the resources shared by some hosts.

[0088] In some example embodiments, the traffic control of the non-volatile storage device can be implemented by various schemes. For example, the storage controller 110 can limit the number of times or the frequency at which the first host H1 and the third host H3 access the non-volatile storage devices NVM31, NVM32, NVM41, and NVM42 based on schemes such as a token scheme, a throughput limit scheme, or an I / O limit scheme.

[0089] Figure 9 is a graph for describing the performance requirements received from Figure 1 multiple hosts. For ease of description, the performance requirements of the first host H1 to the third host H3 will be described. However, the present disclosure is not limited thereto.

[0090] As Figure 9 shown, the first host H1 to the third host H3 may have different performance requirements. For example, the first performance requirement of the first host H1 may include information related to a first size S1 and a first minimum performance PF_MIN1. The second performance requirement of the second host H2 may include information related to a second size S2 and a second minimum performance PF_MIN2. The third performance requirement of the third host H3 may include information related to a third size S3 and a third minimum performance PF_MIN3. Information related to the sizes S1, S2, and S3 and the minimum performances PF_MIN1, PF_MIN2, and PF_MIN3 of the first host to the third host H1, H2, and H3 has been described with reference to Figure 7 and thus, additional description will be omitted to avoid redundancy.

[0091] In some example embodiments, the performance requirements of the first host H1 to the third host H3 may further include information related to an isolation level. For example, the first performance requirement of the first host H1 may further include information related to a first isolation level LV_ISO1, the second performance requirement of the second host H2 may further include information related to a second isolation level LV_ISO2, and the third performance requirement of the third host H3 may further include information related to a third isolation level LV_ISO3.

[0092] The isolation level may refer to information indicating whether the resources allocated to a relevant host should be isolated from the resources allocated to any other host. For example, the first host H1 may not want to share resources with the remaining hosts. Alternatively, the first host H1 may want to avoid performance interference from the remaining hosts. In this case, the first isolation level LV_ISO1 of the first host H1 can be set to a high level (H); in response to the high first isolation level LV_ISO1, the storage device 100 can allocate or configure a first stripe group SG1 such that the resources allocated to the first host H1 do not overlap with the resources allocated to the remaining hosts, or such that the resources allocated to the first host H1 are not shared by the remaining hosts.

[0093] Alternatively, in a case where the second host H2 is allowed to share resources with any other host, the second isolation level LV_ISO2 of the second host H2 may be set to a low level (L). In response to the low second isolation level LV_ISO2, the storage device 100 may allocate a second stripe group SG2 regardless of whether the resources allocated to the second host H2 overlap with the resources allocated to any other host or whether the resources allocated to the second host H2 are shared by any other host.

[0094] Figure 10A and Figure 10B is a diagram for describing a method of allocating resources of a storage device based on Figure 9 the performance requirements. For ease of description, it is assumed that the storage device 100 is in a state where a first stripe group SG1 and a second stripe group SG2 are allocated to a first host H1 and a second host H2. In this case, as described with reference to Figure 8A the first stripe group SG1 may include non-volatile storage devices NVM11, NVM12, NVM21, NVM22, NVM31, NVM32, NVM41, and NVM42, and the second stripe group SG2 may include non-volatile storage devices NVM13, NVM14, NVM23, NVM24, NVM33, NVM34, NVM43, and NVM44.

[0095] In some example embodiments, the storage device 100 may receive a third performance requirement from a third host H3 and may reallocate or reconfigure the resources of the storage device 100 such that the third performance requirement of the third host H3 is satisfied. For example, as shown in Figure 10A the storage device 100 may receive a third performance requirement from the third host H3. The third performance requirement may include a third size S3, a third minimum performance PF_MIN3, and a third isolation level LV_ISO3. The third size S3 is "2", the third minimum performance PF_MIN3 is "2", and the third isolation level LV_ISO3 may be a high level (H).

[0096] In this case, the storage device 100 can reallocate or reconfigure the (3-3) stripe group SG3-3 such that the resources allocated to the third host H3 do not overlap with the resources allocated to the remaining hosts H1 and H2, or such that the resources allocated to the third host H3 are not shared by the remaining hosts H1 and H2. For example, the resource manager 111 of the storage controller 110 can allocate the non-volatile storage devices NVM41 and NVM42 to the (3-3) stripe group SG3-3. The (3-3) stripe group SG3-3 can be accessed by the third host H3. In this case, since the first isolation level ISO_LV1 of the first host H1 and the third isolation level ISO_LV3 of the third host H3 are high levels, the resource manager 111 of the storage controller 110 can reconfigure the first stripe group SG1 into the (1-3) stripe group SG1-3. In this case, the (1-3) stripe group SG1-3 can include the non-volatile storage devices NVM11, NVM12, NVM21, NVM22, NVM31, and NVM32.

[0097] That is to say, as described above, when the isolation level of the performance requirements of a specific host is a high level, the storage device 100 can configure a stripe group corresponding to the specific host so as not to overlap with the resources allocated to the remaining hosts, or so as not to be shared by the remaining hosts. Therefore, the possibility of performance interference in each host can be prevented or reduced.

[0098] Alternatively, as Figure 10B shown, the storage device 100 can receive a third performance requirement from the third host H3. The third performance requirement can include a third size S3, a third minimum performance PF_MIN3, and a third isolation level LV_ISO3. The third size S3 is "2", the third minimum performance PF_MIN3 is "2", and the third isolation level LV_ISO3 can be a low level (L).

[0099] In this case, the storage device 100 can allocate the (3-4)th stripe group SG3-4 regardless of whether the resources allocated to the third host H3 overlap with the resources allocated to the remaining hosts H1 and H2, or whether the resources allocated to the third host H3 are shared by the remaining hosts H1 and H2. For example, the resource manager 111 of the storage controller 110 can allocate the (3-4)th stripe group SG3-4 including the non-volatile storage devices NVM33, NVM34, NVM43, and NVM44 to the third host H3. In this case, the non-volatile storage devices NVM33, NVM34, NVM43, and NVM44 can be included in the second stripe group SG2 allocated to the second host H2. Since the second isolation level LV_ISO2 of the second host H2 and the third isolation level LV_ISO3 of the third host H3 are low levels, the resource manager 111 of the storage controller 110 may not perform additional reconfiguration for the second stripe group SG2.

[0100] In some example embodiments, since the second stripe group SG2 allocated to the second host H2 and the (3-4)th stripe group SG3-4 allocated to the third host H3 share some resources (e.g., the non-volatile storage devices NVM33, NVM34, NVM43, and NVM44), the storage controller 110 can perform traffic control for these resources (e.g., the non-volatile storage devices NVM33, NVM34, NVM43, and NVM44). The traffic control is as described above, and thus, additional description will be omitted to avoid redundancy.

[0101] In some example embodiments, since the first isolation level LV_ISO1 of the first host H1 can be a high level, even if the third isolation level LV_ISO3 of the third host H3 is a low level, the (3-4)th stripe group SG3-4 allocated to the third host H3 may not share resources with the first stripe group SG1 allocated to the first host H1.

[0102] Figure 11 is a flowchart showing the operation of the Figure 1 storage device. The garbage collection operation for the resources allocated to the first host H1 will be described with reference to Figure 11 However, the present disclosure is not limited thereto.

[0103] Referring to Figure 1 、 Figure 2 、 Figure 6 and Figure 11 In operation S210, the storage device 100 can trigger garbage collection for the first host H1. For example, when the physical storage space of the first host H1 is insufficient, the storage device 100 can ensure the physical swap space of the first host H1 by performing garbage collection for the resources allocated to the first host H1.

[0104] In operation S220, the storage device 100 may determine a garbage collection group for the first host H1 based on the allocation table 111b. For example, the storage device 100 may determine the resources targeted by the garbage collection operation based on the information stored in the allocation table 111b. The resources targeted by the garbage collection operation may be designated as a garbage collection group.

[0105] In operation S230, the storage device 100 may perform a garbage collection operation based on the determined garbage collection group.

[0106] In some example embodiments, since the storage device 100 dynamically reconfigures resource allocation for multiple hosts H1 to Hn, data associated with the first host H1 may be stored in resources allocated to any other host. In such a case, even if the data associated with the first host H1 is stored in resources allocated to any other host, the storage device 100 may not select the resources allocated to any other host as the target of the garbage collection operation.

[0107] In the garbage collection operation for the first host H1, since the resources allocated to any other host are not selected as the target of the garbage collection operation, the possibility of performance interference to any other host due to the garbage collection operation for the first host H1 can be prevented or reduced.

[0108] Figure 12 is a diagram for describing the operation of a storage device according to Figure 11 a flowchart. For ease of description, based on the first to third performance requirements of the first to third hosts H1 to H3, the storage device 100 may allocate strip groups SG1-5 of (1-5) to the first host H1, may allocate the second strip group SG2 to the second host H2, and may allocate strip groups SG3-5 of (3-5) to the third host H3. The strip groups SG1-5 of (1-5) may include non-volatile storage devices NVM11, NVM12, NVM21, NVM22, NVM31, and NVM32, the second strip group SG2 may include non-volatile storage devices NVM13, NVM14, NVM23, NVM24, NVM33, NVM34, NVM43, and NVM44, and the strip groups SG3-5 of (3-5) may include non-volatile storage devices NVM41 and NVM42.

[0109] Since the physical storage space of the (1-5)th stripe groups SG1-5 allocated to the first host H1 may be insufficient, the storage device 100 may perform a garbage collection operation for the first host H1. In this case, the storage device 100 may select the first garbage collection group GG1 as the target of the garbage collection operation for the first host H1. The first garbage collection group GG1 may include non-volatile storage devices NVM11, NVM12, NVM21, NVM22, NVM31, and NVM32. The storage device 100 may form superblocks based on the non-volatile storage devices NVM11, NVM12, NVM21, NVM22, NVM31, and NVM32 included in the first garbage collection group GG1, and may perform a garbage collection operation for the first host H1 based on the superblocks thus formed.

[0110] In some example embodiments, due to the resource reallocation of the storage device 100, the non-volatile storage devices NVM41 and NVM42 of the (3-5)th stripe groups SG3-5 may be in a state of storing data associated with the first host H1 and the third host H3. In this case, in a conventional storage device, the non-volatile storage devices NVM41 and NVM42 are selected as the target of the garbage collection operation for the first host H1. In contrast, even though the data associated with the first host H1 is stored in the non-volatile storage devices NVM41 and NVM42, since the non-volatile storage devices NVM41 and NVM42 are included in the (3-5)th stripe groups SG3-5 allocated to any other host (e.g., H3), the storage device 100 according to some example embodiments of the present disclosure does not select the non-volatile storage devices NVM41 and NVM42 as the target of the garbage collection operation for the first host H1. That is, the non-volatile storage devices NVM41 and NVM42 may be excluded from the garbage collection operation for the first host H1. Therefore, the performance interference caused by the garbage collection operation for the first host H1 may not or is less likely to occur in the third host H3.

[0111] In some example embodiments, the data stored in the non-volatile storage devices NVM41 and NVM42 of the first host H1 may be invalidated by the operations of the first host H1 (e.g., data update or deletion operations). That is, the data stored in the non-volatile storage devices NVM41 and NVM42 of the first host H1 may not be migrated to any other non-volatile storage device or any other storage block until the data of the first host H1 is invalidated by the first host H1 (e.g., may be excluded from the target of the garbage collection operation). When all the data associated with the first host H1 is invalidated by the operations of the first host H1, the related storage blocks may return to free blocks. The storage blocks that return to free blocks may be used to store data associated with the third host H3.

[0112] As described above, the storage device 100 may select the second garbage collection group GG2 as the target for the garbage collection operation for the second host H2, and may select the third garbage collection group GG3 as the target for the garbage collection operation for the third host H3.

[0113] Figure 13 shows Figure 1 a flowchart of the operation of the storage device. Refer to Figure 1 and Figure 13 , in operation S310, the storage device 100 may determine whether a unit resource includes data associated with at least two hosts. For example, as referred to Figure 8B , Figure 8C , Figure 10A , Figure 10B or Figure 12 described, since the storage device 100 dynamically reconfigures physical resources, data corresponding to at least two hosts may be stored in a specific non-volatile storage device. As an example, as Figure 8B shown, the non-volatile storage devices NVM41 and NVM42 may store both data associated with the first host H1 and data associated with the third host H3. In this case, it may be determined that a unit resource includes data associated with at least two hosts.

[0114] When a unit resource includes data associated with at least two hosts, in operation S320, the storage device 100 may reallocate resources in response to data invalidation performed by a previous host. For example, as Figure 8B shown, the non-volatile storage devices NVM41 and NVM42 may store both data associated with the first host H1 and data associated with the third host H3, and the non-volatile storage devices NVM41 and NVM42 may be included in the (3-1)st stripe group SG3-1 assigned to the third host H3. That is, the non-volatile storage devices NVM41 and NVM42 are configured to store data associated with the third host H3. In this case, the first host H1 corresponding to the data stored in the non-volatile storage devices NVM41 and NVM42 may be the previous host. When all the data of the first host H1 becomes invalid in a specific non-volatile storage device, the storage device 100 may reconfigure the stripe group such that the specific non-volatile storage device is included in the (3-5)th stripe group SG3-5 assigned to the third host H3.

[0115] As described above, according to some example embodiments of the present disclosure, the storage device 100 may dynamically reallocate or reconfigure resources to the plurality of hosts H1 to Hn based on the performance requirements of the plurality of hosts H1 to Hn. In this case, even if the data associated with at least two hosts is stored together in a specific resource (e.g., a specific non-volatile storage device), the storage device 100 may not perform a garbage collection operation on the previous host associated with the specific non-volatile storage device, and may reallocate or reconfigure the non-volatile storage device in response to data invalidation by the previous host.

[0116] Figure 14A and Figure 14B are diagrams for describing the operation of the storage device in the flowchart according to Figure 13 Referring to Figure 14A and Figure 14B , based on the performance requirements of the first host H1 to the third host H3, the storage device 100 may allocate the stripe groups SG1-6 of (1-6) to the first host H1, may allocate the second stripe group SG2 to the second host H2, and may allocate the stripe groups SG3-6 of (3-6) to the third host H3.

[0117] The stripe groups SG1-6 of (1-6) may include non-volatile storage devices NVM11, NVM12, NVM21, NVM22, NVM31, and NVM32, the second stripe group SG2 may include non-volatile storage devices NVM13, NVM14, NVM23, NVM24, NVM33, NVM34, NVM43, and NVM44, and the stripe groups SG3-6 of (3-6) may include non-volatile storage devices NVM41 and NVM42. Due to the resource reallocation of the storage device 100, the non-volatile storage devices NVM41 and NVM42 of the stripe groups SG3-6 of (3-6) may include both data associated with the first host H1 and data associated with the third host H3.

[0118] In this case, due to the operation between the first host H1 and the storage device 100, all the data stored by the first host H1 in the non-volatile storage devices NVM41 and NVM42 of the (3-6)th stripe group SG3-6 can be invalidated. For example, as described above, in order to prevent or reduce the possibility of performance interference in the third host H3 due to the garbage collection operation for the first host H1, the storage device 100 may not perform the garbage collection operation for the first host H1 in association with the non-volatile storage devices NVM41 and NVM42. In this case, the data stored by the first host H1 in the non-volatile storage devices NVM41 and NVM42 can be maintained. After that, the data stored by the first host H1 in the non-volatile storage devices NVM41 and NVM42 can be updated or deleted through the operation of the first host H1; in this case, the data stored by the first host H1 in the non-volatile storage devices NVM41 and NVM42 can be invalidated.

[0119] In this case, as Figure 14B shown, in the non-volatile storage devices NVM41 and NVM42, the storage blocks storing the data (or invalid data) of the first host H1 return to free blocks. That is, the non-volatile storage devices NVM41 and NVM42 can be reconfigured to be assigned to the (3-7)th stripe group SG3-7 of the third host H3; in this case, the non-volatile storage devices NVM41 and NVM42 can only store the data associated with the third host H3.

[0120] Figure 15A and Figure 15B are diagrams for describing the operation of the storage device in accordance with Figure 13 the flowchart. Referring to Figure 15A and Figure 15B , based on the performance requirements of the first host H1 to the third host H3, the storage device 100 can assign the (1-8)th stripe group SG1-8 to the first host H1, can assign the second stripe group SG2 to the second host H2, and can assign the (3-8)th stripe group SG3-8 to the third host H3.

[0121] The (1-8)th stripe group SG1-8, the second stripe group SG2, and the (3-8)th stripe group SG3-8 are similar to the (1-6)th stripe group SG1-6, the second stripe group SG2, and the (3-6)th stripe group SG3-6 described with reference to Figure 14A , and therefore, additional descriptions will be omitted to avoid redundancy.

[0122] In some example embodiments, through the operations of the first host H1 and the storage device 100, all the data stored by the first host H1 in the non-volatile memory devices NVM31 included in the strip groups SG1-8 of (1-8) and the non-volatile memory devices NVM41 included in the strip groups SG3-8 of (3-8) can be invalidated. For example, as referred to Figure 14A as described, the data stored by the first host H1 in the non-volatile memory device NVM41 can be updated or deleted through the operation of the first host H1; in this case, the data stored by the first host H1 in the non-volatile memory device NVM41 can be invalidated. Alternatively, as described above, the storage device 100 can select the non-volatile memory device NVM31 as the target for the garbage collection operation for the first host H1. Therefore, all the data stored by the first host H1 in the non-volatile memory device NVM31 can be invalidated, or can be migrated to any other non-volatile memory device. In this case, all the storage blocks included in the non-volatile memory device NVM31 can be free blocks.

[0123] That is, all the data stored by the first host H1 in the non-volatile memory device NVM31 assigned to the first host H1 in the strip groups SG1-8 of (1-8) and the non-volatile memory device NVM41 assigned to the third host H3 can be invalidated by the operations of the first host H1 and the storage device 100. In this case, as Figure 15B shown, the storage device 100 can reassign or reconfigure the strip groups assigned to the first host H1 and the third host H3 as the strip groups SG1-9 of (1-9) and the strip groups SG3-9 of (3-9). The strip groups SG1-9 of (1-9) can include the non-volatile memory devices NVM11, NVM12, NVM21, NVM22, NVM32, and NVM42, and the strip groups SG3-9 of (3-9) can include the non-volatile memory devices NVM31 and NVM41.

[0124] As described above, according to some example embodiments of the present disclosure, the storage device 100 can dynamically allocate physical resources based on the performance requirements of multiple hosts H1 to Hn. In this case, the possibility of performance interference between the multiple hosts H1 to Hn can be prevented or reduced, and the performance requirements (e.g., minimum performance) can be met. Therefore, a storage device 100 with improved performance and its operation method are provided.

[0125] To easily describe some example embodiments of the present disclosure, an example embodiment of adding a third host H3 to a storage system 10 is described, but the present disclosure is not limited thereto. For example, when the storage system 10 operates, the performance requirements of each of the plurality of hosts H1 to Hn may be changed, the changed performance requirements may be provided to the storage device 100, and the storage device 100 may reconfigure resources so that the changed performance requirements are satisfied.

[0126] Figure 16 FIG. is a diagram of a data center 3000 that applies a storage device according to some example embodiments.

[0127] Referring to Figure 16 , the data center 3000 may be a facility that collects various types of data and provides services, and is referred to as a data storage center. The data center 3000 may be a system for operating a search engine and a database, and may be a computing system used by a company (such as a bank) or a government agency. The data center 3000 may include application servers 3100 to 3100n and storage servers 3200 to 3200m. According to some example embodiments, the number of application servers 3100 to 3100n and the number of storage servers 3200 to 3200m may be selected differently. The number of application servers 3100 to 3100n and the number of storage servers 3200 to 3200m may be different.

[0128] The application server 3100 or the storage server 3200 may include at least one of processors 3110 and 3210 and memories 3120 and 3220. Now, the storage server 3200 will be described as an example. The processor 3210 may control all operations of the storage server 3200, access the memory 3220, and execute instructions and / or data loaded into the memory 3220. The memory 3220 may be a double data rate synchronous DRAM (DDR SDRAM), high bandwidth memory (HBM), hybrid memory cube (HMC), dual in-line memory module (DIMM), Optane DIMM, or non-volatile DIMM (NVMDIMM). In some example embodiments, the number of processors 3210 and memories 3220 included in the storage server 3200 may be selected differently. In some example embodiments, the processor 3210 and the memory 3220 may provide a processor-memory pair. In some example embodiments, the number of processors 3210 may be different from the number of memories 3220. The processor 3210 may include a single-core processor or a multi-core processor. The above description of the storage server 3200 may be similarly applied to the application server 3100. In some example embodiments, the application server 3100 may not include the storage device 3150. The storage server 3200 may include at least one storage device 3250. According to some example embodiments, the number of storage devices 3250 included in the storage server 3200 may be selected differently.

[0129] The application servers 3100 to 3100n may communicate with the storage servers 3200 to 3200m via the network 3300. The network 3300 may be implemented by using Fibre Channel (FC) or Ethernet. In this case, the FC may be a medium for relatively high-speed data transmission and uses an optical switch with high performance and high availability. According to the access method of the network 3300, the storage servers 3200 to 3200m may be set as file storage, block storage, or object storage.

[0130] In some example embodiments, network 3300 may be a network dedicated to storage, such as a storage area network (SAN). For example, the SAN may be a FC-SAN that uses a FC network and is implemented according to the FC protocol (FCP). As another example, the SAN may be an Internet Protocol (IP)-SAN that uses a Transmission Control Protocol (TCP) / IP network and is implemented according to the SCSI over TCP / IP or Internet Small Computer System Interface (iSCSI) protocol. In another example embodiment, network 3300 may be a general network, such as a TCP / IP network. For example, network 3300 may be implemented according to protocols such as Fibre Channel over Ethernet (FCoE), Network Attached Storage (NAS), and Non-Volatile Memory Express over Fabrics (NVMe-oF).

[0131] Hereinafter, application server 3100 and storage server 3200 will be mainly described. The description of application server 3100 may be applied to another application server 3100n, and the description of storage server 3200 may be applied to another storage server 3200m.

[0132] Application server 3100 may store data requested by a user or a client in one of storage servers 3200 to 3200m via network 3300. In addition, application server 3100 may obtain data requested by a user or a client to be read from one of storage servers 3200 to 3200m via network 3300. For example, application server 3100 may be implemented as a web server or a database management system (DBMS).

[0133] Application server 3100 may access memory 3120n or storage device 3150n included in another application server 3100n via network 3300. Alternatively, application server 3100 may access memory 3220 to 3220m or storage device 3250 to 3250m included in storage servers 3200 to 3200m via network 3300. Accordingly, application server 3100 may perform various operations on data stored in application servers 3100 to 3100n and / or storage servers 3200 to 3200m. For example, application server 3100 may execute instructions for moving or copying data between application servers 3100 to 3100n and / or storage servers 3200 to 3200m. In this case, data may be moved from storage device 3250 to 3250m of storage servers 3200 to 3200m through memory 3220 to 3220m of storage servers 3200 to 3200m or directly to memory 3120 to 3120n of application servers 3100 to 3100n. Data moved via network 3300 may be data encrypted for security or privacy reasons.

[0134] A description will now be given by taking the storage server 3200 as an example. The interface 3254 can provide a physical connection between the processor 3210 and the controller 3251, and a physical connection between the network interface card (NIC) 3240 and the controller 3251. For example, a direct attached storage (DAS) scheme can be used to implement the interface 3254, where the storage device 3250 is directly connected with a dedicated cable. For example, the interface 3254 can be implemented by using various interface schemes, such as ATA, SATA, e-SATA, SCSI, SAS, PCI, PCIe, NVMe, IEEE 1394, USB interface, SD card interface, MMC interface, eMMC interface, UFS interface, eUFS interface, and / or CF card interface.

[0135] The storage server 3200 can further include a switch 3230 and a NIC (network interconnect) 3240. The switch 3230 can selectively connect the processor 3210 to the storage device 3250 under the control of the processor 3210, or selectively connect the NIC 3240 to the storage device 3250.

[0136] In some example embodiments, the NIC 3240 can include a network interface card and a network adapter. The NIC 3240 can be connected to the network 3300 through a wired interface, a wireless interface, a Bluetooth interface, or an optical interface. The NIC 3240 can include an internal memory, a digital signal processor (DSP), and a host bus interface, and is connected to the processor 3210 and / or the switch 3230 through the host bus interface. The host bus interface can be implemented as one of the above examples of the interface 3254. In one embodiment, the NIC 3240 can be integrated with at least one of the processor 3210, the switch 3230, and the storage device 3250.

[0137] In the storage servers 3200 to 3200m or the application servers 3100 to 3100n, the processor can send commands to the storage devices 3150 to 3150n and 3250 to 3250m or the memories 3120 to 3120n and 3220 to 3220m and program or read data. In this case, the data can be data whose errors have been corrected by an ECC engine. The data can be data on which a data bus inversion (DBI) operation or a data masking (DM) operation is performed, and can include cyclic redundancy coding (CRC) information. The data can be data encrypted for security or privacy.

[0138] The storage devices 3150 to 3150n and 3250 to 3250m may send control signals and command / address signals to the NAND flash memory devices 3252 to 3252m in response to read commands received from the processor. Accordingly, when reading data from the NAND flash memory devices 3252 to 3252m, a read enable (RE) signal may be input as a data output control signal, and thus, data may be output to the DQ bus. The data strobe signal DQS may be generated using the RE signal. Depending on the rising or falling edge of the write enable (WE) signal, the command and address signals may be latched in the page buffer.

[0139] The controller 3251 may control all operations of the storage device 3250. In an exemplary embodiment, the controller 3251 may include SRAM. The controller 3251 may write data to the NAND flash memory device 3252 in response to a write command, or read data from the NAND flash memory device 3252 in response to a read command. For example, the write command and / or the read command may be provided from the processor 3210 of the storage server 3200, the processor 3210m of another storage server 3200m, or the processors 3110 and 3110n of the application servers 3100 and 3100n. The DRAM 3253 may temporarily store (or buffer) the data to be written to the NAND flash memory device 3252 or the data read from the NAND flash memory device 3252. Also, the DRAM 3253 may store metadata. Here, the metadata may be user data or data generated by the controller 3251 for managing the NAND flash memory device 3252. The storage device 3250 may include a security element (SE) for security or privacy.

[0140] In some exemplary embodiments, the storage devices 3150 to 3150n and 3250 to 3250m included in the application servers 3100 to 3100n, the storage servers 3200 to 3200m, or the application servers 3100 to 3100n and the storage servers 3200 to 3200m may be the storage device 100 described with reference to Figures 1 to 15B For example, the storage devices 3150 to 3150n and 3250 to 3250m included in the application servers 3100 to 3100n, the storage servers 3200 to 3200m, or the application servers 3100 to 3100n and the storage servers 3200 to 3200m may allocate resources to multiple hosts or multiple tenants based on the operation method described with reference to Figures 1 to 15B For example, the storage devices 3150 to 3150n and 3250 to 3250m included in the application servers 3100 to 3100n, the storage servers 3200 to 3200m, or the application servers 3100 to 3100n and the storage servers 3200 to 3200m may allocate resources to multiple hosts or multiple tenants based on the operation method described with reference to

[0141] According to the present disclosure, since the storage device dynamically reallocates or reconfigures physical resources to multiple hosts based on the performance requirements of the multiple hosts, the performance requirements of the multiple hosts can be met. Accordingly, a storage device with improved performance and an operation method thereof are provided.

[0142] Any or all of the elements described with reference to the accompanying drawings can communicate with any or all of the other elements described with reference to the corresponding drawings. For example, any element can participate in one-way communication, and / or two-way communication, and / or broadcast communication with any or all of the other elements to transmit and / or exchange and / or receive information (such as but not limited to data and / or commands) in a manner such as a serial manner and / or a parallel manner via a bus (such as a wireless bus and / or a wired bus (not shown)). The information can be in various coding formats (such as an analog format and / or a digital format).

[0143] Any of the above-disclosed elements and / or functional blocks can be included or implemented in a processing circuit (such as hardware including logic circuits; a hardware / software combination (such as a processor executing software); or a combination thereof). For example, more specifically, the processing circuit can include but is not limited to a central processing unit (CPU), an arithmetic logic unit (ALU), a digital signal processor, a microcomputer, a field programmable gate array (FPGA), a system on a chip (SoC), a programmable logic unit, a microprocessor, an application specific integrated circuit (ASIC), etc. The processing circuit can include electrical components such as at least one of transistors, resistors, capacitors, etc. The processing circuit can include electrical elements such as logic gates (including at least one of AND gates, OR gates, NAND gates, NOT gates, etc.).

[0144] Although the present disclosure has been described with reference to some example embodiments of the present disclosure, and the example embodiments are not necessarily mutually exclusive of each other, it will be apparent to those of ordinary skill in the art that various changes and modifications can be made without departing from the spirit and scope of the present disclosure set forth in the claims.

Claims

1. A method for operating a storage device including a plurality of non-volatile storage devices, the method comprising: Receiving a first performance requirement from a first host; Based on the first performance requirement, allocating a 0th stripe group of the plurality of non-volatile storage devices to the first host; In response to a first write request from the first host, writing first data of the first host to the 0th stripe group; Receiving a second performance requirement from a second host; Based on the first performance requirement and the second performance requirement, reallocating the plurality of non-volatile storage devices such that a 1st stripe group of the plurality of non-volatile storage devices is allocated to the first host and a 2nd stripe group of the plurality of non-volatile storage devices is allocated to the second host; And Performing a garbage collection operation for the first host, Wherein the 2nd stripe group includes at least some of the non-volatile storage devices included in the 0th stripe group, and Wherein a first portion of the non-volatile storage devices included in the 2nd stripe group stores the first data of the first host, and the first portion storing the first data is not selected as a target for the garbage collection operation for the first host.

2. The method according to claim 1, wherein The first performance requirement includes information related to a first storage capacity and a first minimum performance required by the first host, and Wherein the second performance requirement includes information related to a second storage capacity and a second minimum performance required by the second host.

3. The method according to claim 2, wherein, The 0th stripe group and the 1st stripe group satisfy the first storage capacity and the first minimum performance, and Wherein the 2nd stripe group satisfies the second storage capacity and the second minimum performance.

4. The method according to claim 1, wherein Writing the first data of the first host to the 0th stripe group in response to the first write request from the first host includes: Generating a first superblock based on the non-volatile storage devices included in the 0th stripe group; and Writing the first data to the first superblock, and Wherein the first superblock includes storage blocks included in each non-volatile storage device included in the 0th stripe group.

5. The method according to claim 1, wherein, Triggering a garbage collection operation for the first host in response to insufficient physical storage space in the 1st stripe group.

6. The method according to claim 1, wherein, Invalidating the first data stored in a first portion of the non-volatile storage devices included in the 2nd stripe group by an operation of the first host, and In response to the first data being invalidated, returning the storage block storing the first data to a free block.

7. The method according to claim 1, further comprising: In response to the first host's data being invalidated in at least one of the non-volatile storage devices included in the 1st stripe group, reallocating a 3rd stripe group to the first host and reallocating a 4th stripe group to the second host, Wherein the at least one non-volatile storage device is included in the 4th stripe group.

8. The method according to claim 1, further comprising: Receiving a third performance requirement from a third host; And Based on the third performance requirement, allocate the third strip group of the plurality of non-volatile storage devices to the third host.

9. The method according to claim 8, wherein The third strip group shares at least one non-volatile storage device among the non-volatile storage devices included in the first strip group.

10. The method according to claim 9, further comprising: Performing traffic control on the non-volatile storage device shared by the first strip group and the third strip group.

11. The method according to claim 1, wherein, The plurality of non-volatile storage devices are connected to multiple channels, and the plurality of non-volatile storage devices form multiple paths.

12. An operation method of a storage device including a plurality of non-volatile storage devices, the method comprising: Receiving a first write request from a first host; In response to the first write request, writing first data of the first host to a first non-volatile storage device among the plurality of non-volatile storage devices; Receiving a second write request from a second host; In response to the second write request, writing second data of the second host to a second non-volatile storage device among the plurality of non-volatile storage devices; And Performing a garbage collection operation for the first host, wherein the second non-volatile storage device includes at least some of the first non-volatile storage devices among the first non-volatile storage devices, and wherein during the garbage collection operation of the first host, at least some of the first non-volatile storage devices included in the second non-volatile storage device are not selected as targets of the garbage collection operation.

13. The method according to claim 12, wherein, The first non-volatile storage device meets a first performance requirement received from the first host, and wherein the second non-volatile storage device meets a second performance requirement received from the second host.

14. The method according to claim 12, wherein, Writing the first data of the first host includes: Forming a first superblock based on the storage blocks included in each of the first non-volatile storage devices in the first non-volatile storage device; and Writing the first data to the first superblock.

15. The method according to claim 12, wherein, Performing a garbage collection operation for the first host includes: Generating a garbage collection group based on the remaining non-volatile storage devices in the first non-volatile storage device except for the first non-volatile storage devices included in the second non-volatile storage device; Forming a second superblock based on the garbage collection group; and Performing a garbage collection operation for the second superblock.

16. The method according to claim 12, wherein, The first data stored in the second non-volatile storage device is invalidated by the first host, and the storage blocks storing the invalidated first data store the second data of the second host.

17. A storage device, comprising: A plurality of non-volatile storage devices; And A storage controller configured to control the plurality of non-volatile storage devices, wherein the storage controller includes: A host interface circuit configured to communicate with a plurality of hosts, A NAND interface circuit configured to communicate with the plurality of non-volatile storage devices; and A resource manager configured to allocate the plurality of non-volatile storage devices to the plurality of hosts, wherein the resource manager is configured to: Receive a first performance requirement from a first host among the multiple hosts; and Based on the first performance requirement, allocate the 0th stripe group of the multiple non-volatile storage devices to the first host, wherein the resource manager is further configured to: Receive a second performance requirement from a second host among the multiple hosts; and Based on the first performance requirement and the second performance requirement, re-allocate the multiple non-volatile storage devices such that the first stripe group of the multiple non-volatile storage devices is allocated to the first host, and the second stripe group of the multiple non-volatile storage devices is allocated to the second host, wherein the second stripe group includes at least some of the non-volatile storage devices included in the 0th stripe group, and wherein a first portion of the non-volatile storage devices included in the second stripe group stores first data of the first host and is not selected as a target for a garbage collection operation for the first host. The first performance requirement includes information related to a first storage capacity and a first minimum performance required by the first host, and 18. The storage device according to claim 17, wherein, wherein the second performance requirement includes information related to a second storage capacity and a second minimum performance required by the second host. Trigger a garbage collection operation for the first host in response to insufficient physical storage space in the first stripe group.

19. The storage device according to claim 17, wherein, The multiple non-volatile storage devices are connected to the NAND interface circuit through multiple channels, and the multiple non-volatile storage devices form multiple paths.

20. The storage device according to claim 17, wherein, ​

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