Method for calibrating conductive pin corresponding to groove of wafer to be plated by using test control wafer

Abstract

The invention provides a method for calibrating a conductive pin corresponding to a groove of a to-be-plated wafer by using a test control wafer, and the method comprises the steps: enabling the test control wafer consistent with the to-be-plated wafer in size to sequentially pass through different sub-chambers of a Cu-plated cavity, a Ni-plated cavity and a SnAg-plated cavity of a process machine; the positions of the conductive pins corresponding to the grooves of the test control wafer in the different sub-cavities are marked, and the marked conductive pins are cut, so that the conductive pins in the different sub-cavities are matched with the grooves of the to-be-plated wafer, and the edges of the grooves of the to-be-plated wafer are not in direct contact with the conductive pins any more; and when the top cover plate is pressed down and lifted up and the wafer is taken away and conveyed by a mechanical arm, pins in the conductive pins cannot scratch the edge of a groove of the wafer to be plated, so that the risk that the wafer to be plated is broken is greatly reduced, the production cost is reduced, and further, due to the fact that the conductive pins are cut, the yield of the wafer to be plated is improved. And the formed metal bump can maintain a proper height, so that the packaging of a 2.5 D product is more facilitated.

Description

Technical Field

[0001] The present invention relates to the technical field of semiconductor packaging, and particularly to a method for calibrating conductive pins corresponding to grooves of a wafer to be plated by using a test control wafer. Background Art

[0002] With the rapid development of fields such as smart phones, artificial intelligence, big data, and 5G communication, people's requirements for the performance of semiconductor chips are also constantly increasing. Traditional packaging technologies are gradually encountering bottlenecks in improving the performance of chips, and there is an urgent need for a new packaging technology to meet requirements such as higher bandwidth, lower latency, and higher integration, and the 2.5D packaging technology is thus emerging.

[0003] The 2.5D packaging technology can integrate multiple chips into a packaging structure to achieve more efficient chip interconnection, thereby improving the overall performance of the chips. For the packaging of 2.5D products, the existing technical route is to combine a silicon wafer and a glass wafer, and use electroplating to form TSV vias to achieve interconnection between the two materials. Since the silicon wafer is thinned and then pasted on the glass, the silicon wafer is very fragile. During the electroplating process, the wafer is pressed on the conductive pins on the electroplating equipment. However, due to the presence of grooves on the wafer, some conductive pins cannot be pressed, resulting in the direct contact between the groove edges of the wafer and the pins. When the top cover plate is pressed down and lifted, and when the robotic arm picks up and transports the wafer, the pins will scratch the groove edges of the wafer, greatly increasing the risk of debris during the electroplating process and seriously increasing the production cost.

[0004] A wafer test control wafer is a wafer used to monitor the production process. During the manufacturing process of chips, since it is difficult to monitor the parameters of some products and the monitoring means may have an adverse impact on the products, generally, the wafer test control wafer is used to simulate the product process first. After all indicators meet the design requirements, the product wafer is used for production, thereby reducing the defective rate. For the electroplating process of the above-mentioned 2.5D product packaging, the positions of the conductive pins corresponding to the grooves of the wafer in different cavities of the electroplating process machine can be marked first by using the wafer test control wafer, and then the marked conductive pins are cut off. As a result, the groove edges of the wafer no longer directly contact the pins, and due to the presence of the wafer grooves, the height of the subsequent formed metal bumps will be too high, which is not conducive to the packaging of 2.5D products.

[0005] Therefore, how to use the test control wafer to mark the conductive pins corresponding to the grooves of the wafer in different cavities of the electroplating process machine to reduce the risk of debris during wafer electroplating and reduce the production cost has become an urgent problem to be solved at present. Summary of the Invention

[0006] In view of the above-mentioned disadvantages of the prior art, the purpose of the present invention is to provide a method for calibrating conductive pins corresponding to the grooves of a wafer to be plated by using a test control wafer, so as to solve the problem in the prior art that due to the existence of grooves on the wafer, the edges of the grooves of the wafer will directly contact the pins, and the pins will scratch the edges of the grooves of the wafer during the process of transporting the wafer, resulting in a significant increase in the risk of fragmentation.

[0007] To achieve the above object and other related objects, the present invention provides a method for calibrating conductive pins corresponding to the grooves of a wafer to be plated by using a test control wafer, including the following steps:

[0008] Provide a test control wafer and a process machine tool. The process machine tool at least includes a Cu plating cavity, a Ni plating cavity, a SnAg plating cavity and a top cover plate. Among them, the Cu plating cavity at least includes one sub-chamber, the Ni plating cavity at least includes one sub-chamber, the SnAg plating cavity at least includes one sub-chamber, and conductive pins are fixed in each sub-chamber;

[0009] Control the test control wafer to sequentially pass through the sub-chambers of the Cu plating cavity, the Ni plating cavity and the SnAg plating cavity to obtain the marking information of the conductive pins corresponding to the grooves of the test control wafer;

[0010] According to the marking information, determine the number of pins to be cut on the conductive pins to complete the calibration of the electroplating process parameters.

[0011] Optionally, the Cu plating cavity includes a first sub-chamber, a second sub-chamber, a third sub-chamber and a fourth sub-chamber that are interconnected. The four sub-chambers are opened in sequence and the test control wafer is controlled to sequentially pass through the first sub-chamber, the second sub-chamber, the third sub-chamber and the fourth sub-chamber to obtain the marking information corresponding to the grooves of the test control wafer.

[0012] Optionally, when the first sub-chamber is in the open state, the second sub-chamber, the third sub-chamber and the fourth sub-chamber are in the closed state; when the second sub-chamber is in the open state, the first sub-chamber is in the open state, and the third sub-chamber and the fourth sub-chamber are in the closed state; when the third sub-chamber is in the open state, the first sub-chamber and the second sub-chamber are in the open state, and the fourth sub-chamber is in the closed state; when the fourth sub-chamber is in the open state, the first sub-chamber, the second sub-chamber and the third sub-chamber are all in the open state.

[0013] Optionally, the Ni-plated cavity includes a fifth sub-chamber, a sixth sub-chamber, a seventh sub-chamber, and an eighth sub-chamber. The four sub-chambers are opened in sequence to control the test control sheet to pass through the fifth sub-chamber, the sixth sub-chamber, the seventh sub-chamber, and the eighth sub-chamber in turn, so as to obtain the marking information corresponding to the groove of the test control sheet.

[0014] Optionally, when the fifth sub-chamber is in the open state, the sixth sub-chamber, the seventh sub-chamber, and the eighth sub-chamber are in the closed state; when the sixth sub-chamber is in the open state, the fifth sub-chamber is in the open state, and the seventh sub-chamber and the eighth sub-chamber are in the closed state; when the seventh sub-chamber is in the open state, the fifth sub-chamber and the sixth sub-chamber are in the open state, and the eighth sub-chamber is in the closed state; when the eighth sub-chamber is in the open state, the fifth sub-chamber, the sixth sub-chamber, and the seventh sub-chamber are all in the open state.

[0015] Optionally, when the fifth sub-chamber is in the open state, the first sub-chamber, the second sub-chamber, the third sub-chamber, and the fourth sub-chamber are all in the open state.

[0016] Optionally, the SnAg-plated cavity includes a ninth sub-chamber, a tenth sub-chamber, an eleventh sub-chamber, and a twelfth sub-chamber. The four sub-chambers are opened in sequence to control the test control sheet to pass through the ninth sub-chamber, the tenth sub-chamber, the eleventh sub-chamber, and the twelfth sub-chamber in turn, so as to obtain the marking information corresponding to the groove of the test control sheet.

[0017] Optionally, when the ninth sub-chamber is in the open state, the tenth sub-chamber, the eleventh sub-chamber, and the twelfth sub-chamber are in the closed state; when the tenth sub-chamber is in the open state, the ninth sub-chamber is in the open state, and the eleventh sub-chamber and the twelfth sub-chamber are in the closed state; when the eleventh sub-chamber is in the open state, the ninth sub-chamber and the tenth sub-chamber are in the open state, and the twelfth sub-chamber is in the closed state; when the twelfth sub-chamber is in the open state, the ninth sub-chamber, the tenth sub-chamber, and the eleventh sub-chamber are all in the open state.

[0018] Optionally, when the ninth sub-chamber is in the open state, the first sub-chamber, the second sub-chamber, the third sub-chamber, the fourth sub-chamber, the fifth sub-chamber, the sixth sub-chamber, the seventh sub-chamber, and the eighth sub-chamber are all in the open state.

[0019] Optionally, the groove size of the test control sheet is 2 mm, and the groove size of the test control sheet is equal to that of the wafer to be plated.

[0020] As described above, the method for calibrating the conductive pins corresponding to the grooves of the wafer to be plated using the test control wafer in the present invention has the following beneficial effects: By using a test control wafer with the same size as the wafer to be plated, it is sequentially passed through different sub-chambers of the Cu plating chamber, Ni plating chamber, and SnAg plating chamber of the processing machine tool in advance to mark the positions of the conductive pins corresponding to the grooves of the test control wafer in different sub-chambers and cut the marked conductive pins, so that the conductive pins in different sub-chambers match the grooves of the wafer to be plated. As a result, when the wafer to be plated is electroplated, the edge of the groove of the wafer to be plated no longer directly contacts the conductive pins, and when the top cover plate is pressed down and lifted, and when the robotic arm picks up and transports the wafer to be plated, the pins of the conductive pins will not scratch the edge of the groove of the wafer to be plated, thereby greatly reducing the risk of the wafer to be plated being chipped, reducing the use cost of the test control wafer to a certain extent. Further, due to the cutting of the conductive pins, the metal bumps formed subsequently can maintain an appropriate height, which is more conducive to the packaging of 2.5D products. Description of the Drawings

[0021] Figure 1 It shows a schematic flow chart of the method for calibrating the conductive pins corresponding to the grooves of the wafer to be plated using the test control wafer in the present invention.

[0022] Figure 2 It shows a partial structural schematic diagram of the conductive pins in the embodiment of the present invention.

[0023] Figure 3 It shows a structural schematic diagram of the sub-chambers in the Cu plating chamber in the embodiment of the present invention.

[0024] Figure 4 It shows a structural schematic diagram of the sub-chambers in the Ni plating chamber in the embodiment of the present invention.

[0025] Figure 5 It shows a structural schematic diagram of the sub-chambers in the SnAg plating chamber in the embodiment of the present invention.

[0026] Description of Component Labels

[0027] 10. Cu plating chamber; 101. First sub-chamber; 102. Second sub-chamber; 103. Third sub-chamber; 104. Fourth sub-chamber; 11. Ni plating chamber; 111. Fifth sub-chamber; 112. Sixth sub-chamber; 113. Seventh sub-chamber; 114. Eighth sub-chamber; 12. SnAg plating chamber; 121. Ninth sub-chamber; 122. Tenth sub-chamber; 123. Eleventh sub-chamber; 124. Twelfth sub-chamber; 13. Conductive pins; S1-S3: Steps. Detailed Embodiment

[0028] The following specific examples are used to illustrate the implementation manners of the present invention. Those skilled in the art can easily understand other advantages and effects of the present invention from the content disclosed in this specification. The present invention can also be implemented or applied through other different specific implementation manners. Various details in this specification can also be modified or changed based on different viewpoints and applications without departing from the spirit of the present invention.

[0029] For convenience of description, spatial relationship terms such as "under", "below", "lower than", "beneath", "above", "on" may be used herein to describe the relationship between one element or feature shown in the drawings and other elements or features. It will be understood that these spatial relationship terms are intended to encompass other directions of the device in use or operation in addition to the directions depicted in the drawings. In addition, when a layer is referred to as being "between" two layers, it can be the only layer between the two layers, or there can be one or more intervening layers.

[0030] It should be understood that using terms such as "first", "second" to limit components is only for the convenience of distinguishing the above-mentioned components. Without otherwise stating, the above terms have no special meanings, so they cannot be understood as limiting the protection scope of the present invention.

[0031] Please refer to Figures 1 to 5 . It should be noted that the illustrations provided in this embodiment only schematically illustrate the basic concept of the present invention. Therefore, only the components related to the present invention are shown in the illustrations, rather than being drawn according to the number, shape, and size of the components in actual implementation. The types, quantities, and proportions of the components in actual implementation can be arbitrarily changed, and the component layout type may also be more complex.

[0032] As Figure 1 shown, it shows a flowchart of a method for calibrating conductive pins corresponding to the grooves of a wafer to be plated by using a test control chip according to an embodiment of the present application. The method includes the following steps:

[0033] S1: Provide a test control chip and a process machine. The process machine at least includes a Cu plating cavity 10, a Ni plating cavity 11, a SnAg plating cavity 12, and a top cover plate. Among them, the Cu plating cavity 10 at least includes one sub-chamber, the Ni plating cavity 11 at least includes one sub-chamber, the SnAg plating cavity 12 at least includes one sub-chamber, and a conductive pin 13 is fixed in each sub-chamber;

[0034] S2: Control the test control chip to sequentially pass through the sub-chambers of the Cu plating cavity 10, the Ni plating cavity 11, and the SnAg plating cavity 12 to obtain the marking information of the conductive pin 13 corresponding to the groove of the test control chip;

[0035] S3: Determine the number of pins to be trimmed on the conductive pin 13 based on the marking information, and complete the calibration of the electroplating process parameters.

[0036] The method for marking the conductive pin 13 using a test control chip is further introduced below in conjunction with the accompanying drawings, specifically as follows:

[0037] In step S1, please refer to Figure 1 and Figure 2 , provide a test control chip and a process machine. The process machine at least includes a Cu plating cavity 10, a Ni plating cavity 11, a SnAg plating cavity 12, and a top cover plate. Among them, the Cu plating cavity 10 at least includes one sub-chamber, the Ni plating cavity 11 at least includes one sub-chamber, the SnAg plating cavity 12 at least includes one sub-chamber, and a conductive pin 13 is fixed in each sub-chamber.

[0038] The test control chip refers to: during the production process of semiconductor devices, after the debugging of each parameter in each process step is completed, in order to monitor whether the parameters of each process step meet the requirements of production quality, a "bare wafer" for monitoring the process steps. Specifically, in this embodiment, the test control chip is used to determine the range of the conductive pins 13 that need to be trimmed in each deposition cavity during the electroplating process of the 2.5D product, so as to match the groove area on the wafer to be plated, so that the groove edge of the wafer to be plated no longer directly contacts the conductive pin 13. The specific method is to use a test control chip with the same specifications as the wafer to be plated to perform cyclic tests between different cavities of the electroplating machine, so as to mark the conductive pins 13 that need to be trimmed in the cavity, and then remove the marked conductive pins 13 through the trimming process, so that the process machine will no longer cause fragmentation to the wafer to be plated during electroplating.

[0039] The process machine at least includes a Cu plating cavity 10, a Ni plating cavity 11, a SnAg plating cavity 12, and a top cover plate. Among them, the Cu plating cavity 10, the Ni plating cavity 11, and the SnAg plating cavity 12 are connected end to end in sequence, and a top cover plate is provided on each cavity. The Cu plating cavity 10 at least includes one sub-chamber, the Ni plating cavity 11 at least includes one sub-chamber, the SnAg plating cavity 12 at least includes one sub-chamber, and a conductive pin 13 is fixed in each sub-chamber. When electroplating the wafer to be plated, the wafer to be plated will be pressed on the conductive pin 13 for fixation. As Figure 2 shown, the conductive pin 13 is composed of 4 metal sheets with an arc length of 236 mm, and a number of pins are evenly arranged on the metal sheet.

[0040] In step S2, please refer to Figure 1 , Figures 3 to 5, control the test control wafer to pass through the sub-chambers of the Cu plating chamber 10, the Ni plating chamber 11, and the SnAg plating chamber 12 in sequence, and obtain the marking information of the conductive pins 13 corresponding to the grooves of the test control wafer.

[0041] Specifically, in this embodiment, when electroplating the wafer to be plated, use a robotic arm to control the wafer to be plated into the Cu plating chamber 10. The wafer to be plated will press on the conductive pins 13 in the sub-chamber of the Cu plating chamber 10 to complete the electroplating process of the Cu film, and then enter the Ni plating chamber 11. The wafer to be plated will press on the conductive pins 13 in the sub-chamber of the Ni plating chamber 11 to complete the electroplating process of the Ni film. Finally, it enters the SnAg plating chamber 12. The wafer to be plated will press on the conductive pins 13 in the sub-chamber of the SnAg plating chamber 12 to complete the electroplating process of the SnAg film. In the embodiment of the present invention, since the groove positions of the test control wafer are the same as those of the wafer to be plated, first use a test control wafer with the same specifications as the wafer to be plated to enter the Cu plating chamber 10, the Ni plating chamber 11, and the SnAg plating chamber 12 in sequence, so as to mark the conductive pins 13 in the Cu plating chamber 10, the conductive pins 13 in the Ni plating chamber 11, and the conductive pins 13 in the SnAg plating chamber 12, and obtain the marking information corresponding to the grooves of the test control wafer. This marking information can indicate the positions of the conductive pins 13 at the positions corresponding to the grooves of the test control wafer in the sub-chambers of the Cu plating chamber 10, the Ni plating chamber 11, and the SnAg plating chamber 12. Through subsequent cutting, the marked conductive pins 13 are removed, so that when electroplating with the wafer to be plated, the conductive pins 13 at the positions corresponding to the grooves of the wafer to be plated will no longer affect the wafer to be plated.

[0042] As an example, the Cu plating chamber 10 includes a first sub-chamber 101, a second sub-chamber 102, a third sub-chamber 103, and a fourth sub-chamber 104 that are interconnected. The four sub-chambers are opened in sequence and control the test control wafer to pass through the first sub-chamber 101, the second sub-chamber 102, the third sub-chamber 103, and the fourth sub-chamber 104 in sequence to obtain the marking information corresponding to the grooves of the test control wafer.

[0043] Specifically, as Figure 3 shown, the Cu plating chamber 10 includes a first sub-chamber 101, a second sub-chamber 102, a third sub-chamber 103, and a fourth sub-chamber 104 that are interconnected. Among them, conductive pins 13 are provided in the first sub-chamber 101, the second sub-chamber 102, the third sub-chamber 103, and the fourth sub-chamber 104. The wafers to be plated are sequentially placed on the conductive pins 13 in the first sub-chamber 101, the second sub-chamber 102, the third sub-chamber 103, and the fourth sub-chamber 104 to complete the electroplating Cu process for the wafers to be plated.

[0044] In this embodiment, a robotic arm is used to operate the test control wafer to pass through the first sub-chamber 101, the second sub-chamber 102, the third sub-chamber 103, and the fourth sub-chamber 104 in sequence to obtain the marking information corresponding to the grooves of the test control wafer. And during the process of marking the conductive pins 13 in the first sub-chamber 101, the second sub-chamber 102, the third sub-chamber 103, and the fourth sub-chamber 104, it needs to be carried out step by step. That is, after the conductive pins 13 in the first sub-chamber 101 are marked, the robotic arm is used to operate the test control wafer to pass through the first sub-chamber 101 and enter the second sub-chamber 102. Specifically, when the first sub-chamber 101 is in the open state, the second sub-chamber 102, the third sub-chamber 103, and the fourth sub-chamber 104 are in the closed state; at this time, the robotic arm operates the test control wafer to only pass through the first sub-chamber 101 of the Cu plating cavity 10 and does not enter the second sub-chamber 102, the third sub-chamber 103, and the fourth sub-chamber 104, and the marking of the conductive pins 13 in the first sub-chamber 101 of the Cu plating cavity 10 is completed. When the second sub-chamber 102 is in the open state, the first sub-chamber 101 is in the open state, and the third sub-chamber 103 and the fourth sub-chamber 104 are in the closed state; at this time, the robotic arm operates the test control wafer to first pass through the first sub-chamber 101 of the Cu plating cavity 10 and then enter the second sub-chamber 102, and does not enter the third sub-chamber 103 and the fourth sub-chamber 104, and the marking of the conductive pins 13 in the second sub-chamber 102 of the Cu plating cavity 10 is completed. When the third sub-chamber 103 is in the open state, the first sub-chamber 101 and the second sub-chamber 102 are in the open state, and the fourth sub-chamber 104 is in the closed state; at this time, the robotic arm operates the test control wafer to pass through the first sub-chamber 101, the second sub-chamber 102 of the Cu plating cavity 10 in sequence, and then enter the third sub-chamber 103, and does not enter the fourth sub-chamber 104, and the marking of the conductive pins 13 in the third sub-chamber 103 of the Cu plating cavity 10 is completed. When the fourth sub-chamber 104 is in the open state, the first sub-chamber 101, the second sub-chamber 102, and the third sub-chamber 103 are all in the open state. At this time, the robotic arm operates the test control wafer to pass through the first sub-chamber 101, the second sub-chamber 102, the third sub-chamber 103, and the fourth sub-chamber 104 of the Cu plating cavity 10 in sequence, and the marking of the conductive pins 13 in the fourth sub-chamber 104 of the Cu plating cavity 10 is completed. Thus, the marking of all the conductive pins 13 provided in the sub-chambers within the Cu plating cavity 10 is completed using the test control wafer. Subsequently, the marked conductive pins 13 are removed through a trimming process, so that the shapes of all the conductive pins 13 provided in the sub-chambers within the Cu plating cavity 10 just fit the wafer to be plated.

[0045] As an example, the Ni-plated cavity 11 includes a fifth sub-chamber 111, a sixth sub-chamber 112, a seventh sub-chamber 113, and an eighth sub-chamber 114 that communicate with each other. The four sub-chambers are opened in sequence to control the test control sheet to pass through the fifth sub-chamber 111, the sixth sub-chamber 112, the seventh sub-chamber 113, and the eighth sub-chamber 114 in turn, so as to obtain the marking information corresponding to the grooves of the test control sheet.

[0046] Specifically, as Figure 4 shown, the Ni-plated cavity 11 includes a fifth sub-chamber 111, a sixth sub-chamber 112, a seventh sub-chamber 113, and an eighth sub-chamber 114 that communicate with each other. Conductive pins 13 are provided in the fifth sub-chamber 111, the sixth sub-chamber 112, the seventh sub-chamber 113, and the eighth sub-chamber 114. The wafer to be plated is placed on the conductive pins 13 of the fifth sub-chamber 111, the sixth sub-chamber 112, the seventh sub-chamber 113, and the eighth sub-chamber 114 in turn to complete the electroplating Ni process for the wafer to be plated.

[0047] In this embodiment, a robotic arm is used to operate the test control wafer to pass through the fifth sub-chamber 111, the sixth sub-chamber 112, the seventh sub-chamber 113, and the eighth sub-chamber 114 in sequence, so as to obtain the marking information corresponding to the grooves of the test control wafer. And in the process of marking the conductive pins 13 in the fifth sub-chamber 111, the sixth sub-chamber 112, the seventh sub-chamber 113, and the eighth sub-chamber 114, it needs to be carried out step by step. That is, after the conductive pins 13 in the fifth sub-chamber 111 are marked, the robotic arm is used to operate the test control wafer to pass through the fifth sub-chamber 111 and enter the sixth sub-chamber 112, and so on. Specifically, when the fifth sub-chamber 111 is in the open state, the sixth sub-chamber 112, the seventh sub-chamber 113, and the eighth sub-chamber 114 are in the closed state. At this time, the first sub-chamber 101, the second sub-chamber 102, the third sub-chamber 103, and the fourth sub-chamber 104 are all in the open state; the robotic arm is used to operate the test control wafer to pass through the first sub-chamber 101, the second sub-chamber 102, the third sub-chamber 103, and the fourth sub-chamber 104 of the Cu plating cavity 10 in sequence, and then enter the fifth sub-chamber 111 of the Ni plating cavity 11, without entering the sixth sub-chamber 112, the seventh sub-chamber 113, and the eighth sub-chamber 114, to complete the marking of the conductive pins 13 in the fifth sub-chamber 111 of the Ni plating cavity 11. When the sixth sub-chamber 112 is in the open state, at this time, the first sub-chamber 101, the second sub-chamber 102, the third sub-chamber 103, the fourth sub-chamber 104, and the fifth sub-chamber 111 are all in the open state, and the seventh sub-chamber 113 and the eighth sub-chamber 114 are in the closed state; the robotic arm is used to operate the test control wafer to pass through the first sub-chamber 101, the second sub-chamber 102, the third sub-chamber 103, and the fourth sub-chamber 104 of the Cu plating cavity 10 in sequence, and then pass through the fifth sub-chamber 111 and the sixth sub-chamber 112 of the Ni plating cavity 11 in sequence, without entering the seventh sub-chamber 113 and the eighth sub-chamber 114, to complete the marking of the conductive pins 13 in the sixth sub-chamber 112 of the Ni plating cavity 11. When the seventh sub-chamber 113 is in the open state, at this time, the first sub-chamber 101, the second sub-chamber 102, the third sub-chamber 103, the fourth sub-chamber 104, the fifth sub-chamber 111, and the sixth sub-chamber 112 are in the open state, and the eighth sub-chamber 114 is in the closed state; the robotic arm is used to operate the test control wafer to pass through the first sub-chamber 101, the second sub-chamber 102, the third sub-chamber 103, and the fourth sub-chamber 104 of the Cu plating cavity 10 in sequence, and then pass through the fifth sub-chamber 111, the sixth sub-chamber 112, and the seventh sub-chamber 113 of the Ni plating cavity 11 in sequence, without entering the eighth sub-chamber 114, to complete the marking of the conductive pins 13 in the seventh sub-chamber 113 of the Ni plating cavity 11.When the eighth sub-chamber 114 is in the open state, at this time, the first sub-chamber 101, the second sub-chamber 102, the third sub-chamber 103, the fourth sub-chamber 104, the fifth sub-chamber 111, the sixth sub-chamber 112, and the seventh sub-chamber 113 are all in the open state. Then, use a robotic arm to operate the test control piece to pass through the first sub-chamber 101, the second sub-chamber 102, the third sub-chamber 103, and the fourth sub-chamber 104 of the Cu plating chamber 10 in sequence, and then pass through the fifth sub-chamber 111, the sixth sub-chamber 112, the seventh sub-chamber 113, and the eighth sub-chamber 114 of the Ni plating chamber 11 in sequence, so as to complete the marking of the conductive pins 13 in the eighth sub-chamber 114 of the Ni plating chamber 11. Thus, using the test control piece, the marking of the conductive pins 13 provided in the fifth sub-chamber 111, the sixth sub-chamber 112, the seventh sub-chamber 113, and the eighth sub-chamber 114 in the Ni plating chamber 11 is completed. Subsequently, the marked conductive pins 13 are removed through a cutting process, so that the shapes of the conductive pins 13 provided in the fifth sub-chamber 111, the sixth sub-chamber 112, the seventh sub-chamber 113, and the eighth sub-chamber 114 in the Ni plating chamber 11 just fit the wafers to be plated.

[0048] As an example, the SnAg plating chamber 12 includes a ninth sub-chamber 121, a tenth sub-chamber 122, an eleventh sub-chamber 123, and a twelfth sub-chamber 124 that are interconnected. The four sub-chambers are opened in sequence and the test control piece is controlled to pass through the ninth sub-chamber 121, the tenth sub-chamber 122, the eleventh sub-chamber 123, and the twelfth sub-chamber 124 in sequence to obtain marking information corresponding to the grooves of the test control piece.

[0049] Specifically, as Figure 5 shown, the SnAg plating chamber 12 includes a ninth sub-chamber 121, a tenth sub-chamber 122, an eleventh sub-chamber 123, and a twelfth sub-chamber 124 that are interconnected. Among them, conductive pins 13 are provided in the ninth sub-chamber 121, the tenth sub-chamber 122, the eleventh sub-chamber 123, and the twelfth sub-chamber 124. The wafers to be plated are placed on the conductive pins 13 of the ninth sub-chamber 121, the tenth sub-chamber 122, the eleventh sub-chamber 123, and the twelfth sub-chamber 124 in sequence to complete the electroplating SnAg process for the wafers to be plated.

[0050] In this embodiment, a robotic arm is used to operate the test control piece to sequentially pass through the ninth sub-chamber 121, the tenth sub-chamber 122, the eleventh sub-chamber 123, and the twelfth sub-chamber 124 to obtain the marking information corresponding to the grooves of the test control piece. And in the process of marking the conductive pins 13 in the ninth sub-chamber 121, the tenth sub-chamber 122, the eleventh sub-chamber 123, and the twelfth sub-chamber 124, it needs to be carried out step by step. That is, after the conductive pins 13 in the ninth sub-chamber 121 are marked, the robotic arm is used to operate the test control piece to pass through the ninth sub-chamber 121 and enter the tenth sub-chamber 122, and so on. Specifically, when the ninth sub-chamber 121 is in the open state, the tenth sub-chamber 122, the eleventh sub-chamber 123, and the twelfth sub-chamber 124 are in the closed state. At this time, the first sub-chamber 101, the second sub-chamber 102, the third sub-chamber 103, the fourth sub-chamber 104, the fifth sub-chamber 111, the sixth sub-chamber 112, the seventh sub-chamber 113, and the eighth sub-chamber 114 are all in the open state; the robotic arm is used to operate the test control piece to sequentially pass through the first sub-chamber 101, the second sub-chamber 102, the third sub-chamber 103, and the fourth sub-chamber 104 of the Cu plating chamber 10, then sequentially pass through the fifth sub-chamber 111, the sixth sub-chamber 112, the seventh sub-chamber 113, and the eighth sub-chamber 114 of the Ni plating chamber 11, and finally enter the ninth sub-chamber 121 of the SnAg plating chamber 12 without entering the tenth sub-chamber 122, the eleventh sub-chamber 123, and the twelfth sub-chamber 124 to complete the marking of the conductive pins 13 in the ninth sub-chamber 121 of the SnAg plating chamber 12. When the tenth sub-chamber 122 is in the open state, at this time, the first sub-chamber 101, the second sub-chamber 102, the third sub-chamber 103, the fourth sub-chamber 104, the fifth sub-chamber 111, the sixth sub-chamber 112, the seventh sub-chamber 113, the eighth sub-chamber 114, and the ninth sub-chamber 121 are all in the open state, and the eleventh sub-chamber 123 and the twelfth sub-chamber 124 are in the closed state; the robotic arm is used to operate the test control piece to sequentially pass through the first sub-chamber 101, the second sub-chamber 102, the third sub-chamber 103, and the fourth sub-chamber 104 of the Cu plating chamber 10, then sequentially pass through the fifth sub-chamber 111, the sixth sub-chamber 112, the seventh sub-chamber 113, and the eighth sub-chamber 114 of the Ni plating chamber 11, and finally pass through the ninth sub-chamber 121 and the tenth sub-chamber 122 of the SnAg plating chamber 12 without entering the eleventh sub-chamber 123 and the twelfth sub-chamber 124 to complete the marking of the conductive pins 13 in the tenth sub-chamber 122 of the SnAg plating chamber 12.When the eleventh sub-chamber 123 is in the open state, at this time, the first sub-chamber 101, the second sub-chamber 102, the third sub-chamber 103, the fourth sub-chamber 104, the fifth sub-chamber 111, the sixth sub-chamber 112, the seventh sub-chamber 113, the eighth sub-chamber 114, the ninth sub-chamber 121 and the tenth sub-chamber 122 are in the open state, and the twelfth sub-chamber 124 is in the closed state; use a robotic arm to operate the test control chip to sequentially pass through the first sub-chamber 101, the second sub-chamber 102, the third sub-chamber 103 and the fourth sub-chamber 104 of the Cu plating chamber 10, then sequentially pass through the fifth sub-chamber 111, the sixth sub-chamber 112, the seventh sub-chamber 113 and the eighth sub-chamber 114 of the Ni plating chamber 11, and finally pass through the ninth sub-chamber 121, the tenth sub-chamber 122 and the eleventh sub-chamber 123 of the SnAg plating chamber 12 without entering the twelfth sub-chamber 124, to complete the marking of the conductive pins 13 in the eleventh sub-chamber 123 of the SnAg plating chamber 12. When the twelfth sub-chamber 124 is in the open state, at this time, the first sub-chamber 101, the second sub-chamber 102, the third sub-chamber 103, the fourth sub-chamber 104, the fifth sub-chamber 111, the sixth sub-chamber 112, the seventh sub-chamber 113, the eighth sub-chamber 114, the ninth sub-chamber 121, the tenth sub-chamber 122 and the eleventh sub-chamber 123 are all in the open state. Then, use a robotic arm to operate the test control chip to sequentially pass through the first sub-chamber 101, the second sub-chamber 102, the third sub-chamber 103 and the fourth sub-chamber 104 of the Cu plating chamber 10, then sequentially pass through the fifth sub-chamber 111, the sixth sub-chamber 112, the seventh sub-chamber 113 and the eighth sub-chamber 114 of the Ni plating chamber 11, and finally sequentially pass through the ninth sub-chamber 121, the tenth sub-chamber 122, the eleventh sub-chamber 123 and the twelfth sub-chamber 124 of the SnAg plating chamber 12, to complete the marking of the conductive pins 13 in the twelfth sub-chamber 124 of the SnAg plating chamber 12. Thus, using the test control chip, the marking of the conductive pins 13 provided in the ninth sub-chamber 121, the tenth sub-chamber 122, the eleventh sub-chamber 123 and the twelfth sub-chamber 124 in the SnAg plating chamber 12 is completed. Subsequently, the marked conductive pins 13 are removed through a trimming process, so that the shapes of the conductive pins 13 provided in the ninth sub-chamber 121, the tenth sub-chamber 122, the eleventh sub-chamber 123 and the twelfth sub-chamber 124 in the SnAg plating chamber 12 just fit the wafers to be plated.

[0051] In step S3, according to the marking information, determine the number of pins to be trimmed on the conductive pin 13, and complete the calibration of the electroplating process parameters.

[0052] Specifically, according to the marking information obtained in step S2, the number of pins that need to be trimmed on the conductive pins 13 in different sub-chambers of the Cu plating chamber 10, the Ni plating chamber 11 and the SnAg plating chamber 12 can be determined. At this point, the calibration of the electroplating process parameters is completed using a test control piece that is consistent with the size of the wafer to be plated, so that the subsequent wafers to be plated pass through the different sub-chambers of the Cu plating chamber 10, the Ni plating chamber 11 and the SnAg plating chamber 12 of the process machine without the risk of fragmentation.

[0053] In summary, the method of using a test control chip to calibrate the conductive pins corresponding to the grooves of the wafer to be plated of the present invention uses a test control chip with the same size as the wafer to be plated, and sequentially passes through different sub-chambers of the Cu plating chamber, the Ni plating chamber and the SnAg plating chamber of the process machine to mark the positions of the conductive pins corresponding to the grooves of the test control chip in different sub-chambers and cut the marked conductive pins, so that the conductive pins in different sub-chambers match the grooves of the wafer to be plated, so that when the wafer to be plated is subsequently electroplated, the edge of the groove of the wafer to be plated is no longer in direct contact with the conductive pins, and when the wafer to be plated enters and leaves the conductive pins of the sub-chamber, the pins of the conductive pins will not scratch the edge of the groove of the wafer to be plated when the top cover plate and the robot arm take away and transport the wafer, thereby greatly reducing the risk of fragmentation of the wafer to be plated, and reducing the use cost of the test control chip to a certain extent. Furthermore, since the conductive pins are cut, the metal bumps formed subsequently can maintain a suitable height, which is more conducive to the packaging of 2.5D products. Therefore, the present invention effectively overcomes various shortcomings in the prior art and has high industrial utilization value.

[0054] The above embodiments are merely illustrative of the principles and effects of the present invention, and are not intended to limit the present invention. Anyone familiar with the art may modify or alter the above embodiments without departing from the spirit and scope of the present invention. Therefore, all equivalent modifications or alterations made by a person of ordinary skill in the art without departing from the spirit and technical concept disclosed by the present invention shall still be covered by the claims of the present invention.

Claims

1. A method for calibrating conductive pins corresponding to grooves of a wafer to be plated by using a test control wafer, characterized in that, The method includes the following steps: Provide a test control chip and a processing machine tool. The processing machine tool at least includes a Cu plating cavity, a Ni plating cavity, a SnAg plating cavity, and a top cover plate. Wherein, the Cu plating cavity at least includes one sub-chamber, the Ni plating cavity at least includes one sub-chamber, the SnAg plating cavity at least includes one sub-chamber, and conductive pins are fixed in each sub-chamber; Control the test control chip to sequentially pass through the sub-chambers of the Cu plating cavity, the Ni plating cavity, and the SnAg plating cavity to obtain the marking information of the conductive pins corresponding to the grooves of the test control chip; According to the marking information, determine the number of pins to be cut on the conductive pins, and complete the calibration of the electroplating process parameters.

2. The method for calibrating conductive pins corresponding to the grooves of the wafer to be plated by using a test control chip according to claim 1, wherein: The Cu plating cavity includes a first sub-chamber, a second sub-chamber, a third sub-chamber, and a fourth sub-chamber that are interconnected. The four sub-chambers are sequentially opened and the test control chip is controlled to sequentially pass through the first sub-chamber, the second sub-chamber, the third sub-chamber, and the fourth sub-chamber to obtain the marking information corresponding to the grooves of the test control chip.

3. The method for calibrating the conductive pins corresponding to the grooves of the wafer to be plated by using the test control chip according to claim 2, wherein: When the first sub-chamber is in the open state, the second sub-chamber, the third sub-chamber, and the fourth sub-chamber are in the closed state; when the second sub-chamber is in the open state, the first sub-chamber is in the open state, and the third sub-chamber and the fourth sub-chamber are in the closed state; when the third sub-chamber is in the open state, the first sub-chamber and the second sub-chamber are in the open state, and the fourth sub-chamber is in the closed state; when the fourth sub-chamber is in the open state, the first sub-chamber, the second sub-chamber, and the third sub-chamber are all in the open state.

4. The method for calibrating conductive pins corresponding to grooves of a wafer to be plated by using a test control wafer according to claim 1, wherein: The Ni plating cavity includes a fifth sub-chamber, a sixth sub-chamber, a seventh sub-chamber, and an eighth sub-chamber. The four sub-chambers are sequentially opened and the test control chip is controlled to sequentially pass through the fifth sub-chamber, the sixth sub-chamber, the seventh sub-chamber, and the eighth sub-chamber to obtain the marking information corresponding to the grooves of the test control chip.

5. The method for calibrating conductive pins corresponding to the grooves of the wafer to be plated by using a test control wafer according to claim 4, wherein: When the fifth sub-chamber is in the open state, the sixth sub-chamber, the seventh sub-chamber, and the eighth sub-chamber are in the closed state; when the sixth sub-chamber is in the open state, the fifth sub-chamber is in the open state, and the seventh sub-chamber and the eighth sub-chamber are in the closed state; when the seventh sub-chamber is in the open state, the fifth sub-chamber and the sixth sub-chamber are in the open state, and the eighth sub-chamber is in the closed state; when the eighth sub-chamber is in the open state, the fifth sub-chamber, the sixth sub-chamber, and the seventh sub-chamber are all in the open state.

6. The method for calibrating conductive pins corresponding to the grooves of the wafer to be plated by using a test control wafer according to claim 5, wherein: When the fifth sub-chamber is in the open state, the first sub-chamber, the second sub-chamber, the third sub-chamber, and the fourth sub-chamber are all in the open state.

7. The method for calibrating the conductive pins corresponding to the grooves of the wafer to be plated by using a test control wafer according to claim 1, wherein: The SnAg-plated cavity includes a ninth sub-chamber, a tenth sub-chamber, an eleventh sub-chamber, and a twelfth sub-chamber. The four sub-chambers are sequentially opened to control the test control sheet to pass through the ninth sub-chamber, the tenth sub-chamber, the eleventh sub-chamber, and the twelfth sub-chamber in sequence to obtain the marking information corresponding to the groove of the test control sheet.

8. The method for calibrating conductive pins corresponding to the grooves of the wafer to be plated by using a test control wafer according to claim 7, wherein: When the ninth sub-chamber is in the open state, the tenth sub-chamber, the eleventh sub-chamber, and the twelfth sub-chamber are in the closed state; when the tenth sub-chamber is in the open state, the ninth sub-chamber is in the open state, and the eleventh sub-chamber and the twelfth sub-chamber are in the closed state; when the eleventh sub-chamber is in the open state, the ninth sub-chamber and the tenth sub-chamber are in the open state, and the twelfth sub-chamber is in the closed state; when the twelfth sub-chamber is in the open state, the ninth sub-chamber, the tenth sub-chamber, and the eleventh sub-chamber are all in the open state.

9. The method for calibrating the conductive pins corresponding to the grooves of the wafer to be plated by using a test control wafer according to claim 8, wherein: When the ninth sub-chamber is in the open state, the first sub-chamber, the second sub-chamber, the third sub-chamber, the fourth sub-chamber, the fifth sub-chamber, the sixth sub-chamber, the seventh sub-chamber, and the eighth sub-chamber are all in the open state.

10. The method for calibrating conductive pins corresponding to the grooves of the wafer to be plated by using a test control wafer according to any one of claims 1 to 9, characterized in that: The groove size of the test control sheet is 2 mm, and the groove size of the test control sheet is equal to that of the wafer to be plated.

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