S table generation method of Turbo internal interleaving algorithm and Turbo internal interleaving algorithm
By calculating the preliminary and final double-bit interleaving lengths to generate a flexible S table, the Turbo encoder's low efficiency and throughput limitation under fixed code block size is solved, and the Turbo interleaving algorithm adapted to any code block is realized, which improves system performance.
Patent Information
- Application Number
- CN202510455839.2
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- Filing Date
- 2025-04-11
- Publication Date
- 2025-07-25
- Estimated Expiration
- Not applicable · inactive patent
AI Technical Summary
The existing Turbo encoder only supports fixed code block size in the State Grid dual-mode HPLC/RF standard physical layer protocol, resulting in low encoding efficiency and limited system throughput, which is particularly obvious in short-frame data systems, and the interleaving parameter table and S lookup table are inflexible.
By calculating the preliminary double-bit interleaving length l according to the code block size PbSize, the S table length N is obtained, and the final double-bit interleaving lengths L and λ are calculated by M and N, an S lookup table adapted to any code block is generated, and a flexible S table is generated using recursive formulas and matrix permutations.
The Turbo interleaving algorithm is realized to adapt to any code block size, improve coding efficiency and system throughput, and enhance the flexibility and convenience of interleaving parameters.
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Figure CN120377939A_ABST
Abstract
Description
Technical Field
[0001] The present invention relates to the technical field of communication protocols, and specifically to a method for generating an S table of a Turbo inner interleaving algorithm and the algorithm. Background Art
[0002] The initial state of a conventional Turbo code encoder is 0. To ensure that the termination state is also 0, tail bits need to be added, thereby reducing the coding efficiency and the system throughput, which is particularly serious for systems using short-frame data. The cyclic recursive systematic convolutional code is based on a self-terminating mechanism, making the initial state and the termination state of the encoder the same, achieving a cycle in the state. Currently, the State Grid dual-mode HPLC / RF standard physical layer protocol uses this Turbo coding, but this protocol only supports five physical block sizes (PB16 (frame control), PB72, PB136, PB264, PB520), and the interleaving parameter table and S lookup table of the five physical blocks are both fixed, as Figures 1-6 shown), which is not flexible and convenient to use. Summary of the Invention
[0003] The technical problem to be solved by the present invention is to provide a method for generating an S table of a Turbo inner interleaving algorithm and the algorithm, and this solution is suitable for code blocks of any size and is convenient and flexible to use.
[0004] To solve the above problems, the following technical solutions are provided:
[0005] The method for generating an S table of the Turbo inner interleaving algorithm of the present invention is characterized by including the following steps:
[0006] The first step is to obtain a preliminary double-bit interleaving length l through the code block size PbSize;
[0007] The second step is to obtain the length N of the S table according to the preliminary double-bit interleaving length l;
[0008] The third step is to let M = N - 1, where M is the final double-bit interleaving length divided by the S table length. The final double-bit interleaving length L is obtained through M and N. When the final double-bit interleaving length L is greater than the preliminary double-bit interleaving length l, the insufficient code element part is supplemented with 0; λ is obtained through M;
[0009] The fourth step is to obtain an S lookup table according to N, λ, and L;
[0010] Among them, in the first step, the process of obtaining the preliminary double-bit interleaving length l through the code block size is:
[0011] l = PbSize * 8 / 2.
[0012] In the second step, the process of obtaining the length N of the Turbo inner interleaving table according to the preliminary double-bit interleaving length l is:
[0013] N×(N - 1)≥l
[0014] Wherein, N takes the smallest positive integer.
[0015] In the third step, the process of obtaining the final double - bit interleaving length L from M and N is as follows:
[0016] L = M * N.
[0017] In the third step, the principle of obtaining λ from M is: λ is selected as the largest integer not greater than and relatively prime to M.
[0018] In the fourth step, the process of obtaining the S lookup table based on N, λ, and L is as follows:
[0019] First, set the initial value S′(1)=0;
[0020] Next, according to the recurrence formula
[0021] S′(i)=mod(S′(i - 1)+N×λ + 1,L)
[0022] obtain the other elements of the S table, where i = 2,3,...,N;
[0023] Then, permute the first half and the second half of the matrix S′ to obtain the matrix
[0024] S″ is
[0025] Finally, swap every two adjacent elements of S″. If N is odd, the last element remains unchanged to obtain the final S table:
[0026]
[0027] A feature of a Turbo inner interleaving algorithm is that the algorithm is adaptable to code blocks of any size. The algorithm includes obtaining the S table and specifying the address mapping I(x) of the Turbo interleaving, wherein the S table is obtained in the above - mentioned manner.
[0028] Wherein, the address mapping I(x) of the specified Turbo interleaving is defined as follows:
[0029] I(x)=[S(x mod N)-(x div N)*N + L]mod L for x = 0,1,...,L - 1
[0030] Wherein, S(·) is a lookup table, N is the length of the S table, M is the double - bit interleaving length divided by the length of the S table, div represents integer division, and mod represents modulo operation;
[0031] The specific algorithm of the address mapping I(x) for Turbo interleaving is as follows:
[0032]
[0033] Among them, Data() represents the input of the interleaver, and IntData() represents the output of the interleaver. When the output address of the interleaver is even, the 0th and 1st bits of the corresponding interleaved information bit pair are exchanged.
[0034] Adopting the above scheme has the following advantages:
[0035] Since the method for generating the S table of the Turbo inner interleaving algorithm of the present invention first obtains the preliminary double-bit interleaving length through the code block size PbSize, then obtains the length N of the S table according to the preliminary double-bit interleaving length l, then sets M = N - 1, obtains the final double-bit interleaving length L and λ through M and N, and finally obtains the S lookup table according to N, λ, and L. The Turbo inner interleaving algorithm is implemented using the above S lookup table. Using this S table, the S lookup table corresponding to any code block can be generated, so that any code block can adopt the Turbo inner interleaving algorithm, which is flexible and convenient to use. Description of the Drawings
[0036] Figure 1 is the interleaving parameter table of 5 physical blocks in the background art;
[0037] Figure 2 is the S lookup table of PB16 in the background art;
[0038] Figure 3 is the S lookup table of PB72 in the background art;
[0039] Figure 4 is the S lookup table of PB136 in the background art;
[0040] Figure 5 is the S lookup table of PB264 in the background art;
[0041] Figure 6 is the S lookup table of PB520 in the background art;
[0042] Figure 7 is the comparison chart of the bit error rate curves of the Turbo inner interleaving algorithm in the background art and the Turbo inner interleaving algorithm of this solution in a multipath channel;
[0043] Figure 8 is the comparison chart of the bit error rate curves of the Turbo inner interleaving algorithm in the background art and the Turbo inner interleaving algorithm of this solution in an AWGN channel. Detailed Embodiments
[0044] The following further describes the present invention in detail with reference to the accompanying drawings and embodiments.
[0045] The method for generating the S table of the Turbo inner interleaving algorithm of the present invention includes the following steps:
[0046] In the first step, the preliminary double-bit interleaving length l is obtained through the code block size PbSize, specifically using the following formula:
[0047] l = PbSize * 8 / 2.
[0048] In the second step, the length N of the S table is obtained according to the preliminary double-bit interleaving length l, specifically using the following formula:
[0049] N×(N - 1) ≥ l
[0050] Among them, N takes the smallest positive integer.
[0051] In the third step, let M = N - 1, where M is the final double-bit interleaving length divided by the S table length. The final double-bit interleaving length L is obtained through M and N, specifically using the following formula:
[0052] L = M * N
[0053] When the final double-bit interleaving length L is greater than the preliminary double-bit interleaving length l, the insufficient symbol part is supplemented with 0;
[0054] λ is obtained through M, specifically in the following manner:
[0055] λ selects the largest integer not greater than and relatively prime to M;
[0056] In the fourth step, the S lookup table is obtained according to N, λ, and L. The specific process is as follows:
[0057] First, set the initial value S′(1) = 0;
[0058] Then, according to the recurrence formula
[0059] S′(i) = mod(S′(i - 1) + N×λ + 1, L)
[0060] Obtain the other elements of the S table, where i = 2, 3,..., N;
[0061] Then, permute the first half and the second half of the matrix S′ to obtain the matrix
[0062]
[0063] Finally, swap every two adjacent elements of S″. If N is odd, the last element remains unchanged to obtain the final S table:
[0064]
[0065] A Turbo inner interleaving algorithm, which can adapt to code blocks of any size. The algorithm includes obtaining an S table and specifying an address mapping I(x) for Turbo interleaving. Among them, the S table is obtained in the above manner, and the address mapping I(x) for specifying Turbo interleaving is defined as follows:
[0066] I(x) = [S(x mod N) - (x div N) * N + L] mod L for x = 0, 1,..., L - 1
[0067] Among them, S(·) is a lookup table, N is the length of the S table, M is the double-bit interleaving length divided by the length of the S table, div represents integer division, and mod represents modulo operation;
[0068] The specific algorithm of the address mapping I(x) for Turbo interleaving is as follows:
[0069]
[0070] Among them, Data() represents the input of the interleaver, and IntData() represents the output of the interleaver. Among them, when the output address of the interleaver is even, the 0th and 1st bits of the corresponding interleaved information bit pair are exchanged. Specific embodiment:
[0072] Suppose the code block size PbSize = 20, and the protocols of the prior art do not support this code block size, and Turbo coding cannot be used. The method proposed in this solution can generate an S table and complete interleaving. The specific implementation method is as follows:
[0073] In the first step, first, the initial double-bit interleaving length l = 20 * 8 / 2 = 80. Then, N × (N - 1) ≥ 80. Taking the smallest positive integer for N, then N = 10, M = 9. Then the final double-bit interleaving length L = N × M = 90. The final double-bit interleaving length L is greater than the initial double-bit interleaving length l, and 20 padding bits need to be added to make L = 90; after that, λ is selected as the largest integer not greater than and relatively prime to M, and λ = 4 can be obtained;
[0074] In the second step, according to the recurrence formula
[0075] S′(i) = mod(S′(i - 1) + N × λ + 1, L)
[0076] S′ = [041 82 33 74 25 66 17 58 9] is obtained;
[0077] Step 3: Permute the first half and the second half of matrix S′ to obtain matrix
[0078] S″ = [25 66 17 58 90 41 82 33 74];
[0079] Step 4: Swap every two adjacent elements of S″ to obtain the final
[0080] S = [66 25 58 17 90 82 41 74 33].
[0081] Step 5: Define the address mapping I(x) of Turbo interleaving as follows:
[0082] I(x) = [S(x mod N)-(x div N)*N+L]mod L for x = 0,1,...,L-1
[0083] where, is the lookup table obtained according to Step 2, N is the length of the S table, M is the double-bit interleaving length divided by the length of the S table, div represents integer division, and mod represents modulo operation. The specific algorithm of the address mapping I(x) for Turbo interleaving is as follows:
[0084]
[0085] where, Data() represents the input of the interleaver, IntData() represents the output of the interleaver. It should be noted that when the output address of the interleaver is even, the 0th and 1st bits of the corresponding interleaved information bit pair need to be swapped.
[0086] Performance Comparison
[0087] Select pbsize = 264, then L = 264*8 / 2 = 1056, N = 33, M = 32. Generate the S table by the above method, simulate the multipath channel and the Gaussian white noise channel, and compare the performance with the original S table. The bit error rate curves are as Figure 7 and Figure 8 shown. It can be seen that the performance of the newly generated S table is basically the same as that of the original S table.
Claims
1. A method for generating the S table of a Turbo inner interleaving algorithm, characterized in that, It includes the following steps: In the first step, the initial double-bit interleaving length l is obtained through the code block size PbSize; In the second step, the length N of the S table is obtained according to the initial double-bit interleaving length l; In the third step, let M = N - 1, where M is the quotient of the final double-bit interleaving length divided by the S table length. The final double-bit interleaving length L is obtained through M and N. When the final double-bit interleaving length L is greater than the initial double-bit interleaving length l, the insufficient symbol part is filled with 0; λ is obtained through M; In the fourth step, the S lookup table is obtained according to N, λ, and L.
2. The method for generating the S table of the Turbo inner interleaving algorithm according to claim 1, characterized in that, In the first step, the process of obtaining the initial double-bit interleaving length l through the code block size is: l = PbSize * 8 / 2.
3. The method for generating the S table of the Turbo inner interleaving algorithm according to claim 1, wherein, In the second step, the process of obtaining the length N of the Turbo inner interleaving table according to the initial double-bit interleaving length L is: N×(N - 1)≥l where N takes the smallest positive integer.
4. The method for generating the S table of the Turbo inner interleaving algorithm according to claim 1, wherein, In the third step, the process of obtaining the final double-bit interleaving length L through M and N is: L = M * N.
5. The method for generating the S table of the Turbo inner interleaving algorithm according to claim 1, wherein, In the third step, the principle for obtaining λ from M is that λ is selected as the largest integer not greater than and relatively prime to M.
6. The method for generating the S table of the Turbo inner interleaving algorithm according to claim 1, wherein, In the fourth step, the process of obtaining the S lookup table according to N, λ, and L is: First, set the initial value S′(1) = 0; Next, according to the recurrence formula S′(i) = mod(S′(i - 1)+N×λ + 1,L) the other elements of the S table are obtained, where i = 2,3,...,N; Then, the first half and the second half of the matrix S′ are permuted to obtain the matrix S″ is Finally, every two adjacent elements of S″ are swapped. If N is odd, the last element remains unchanged to obtain the final S table:
7. A Turbo inner interleaving algorithm, characterized in that, The algorithm is applicable to code blocks of any size. The algorithm includes obtaining the S table and specifying the address mapping I(x) of the Turbo interleaving, where the S table is obtained in the manner described in Claim 1.
8. The Turbo inner interleaving algorithm according to claim 7, wherein The address mapping I(x) of the specified Turbo interleaving is defined as follows: I(x)=[S(x mod N)-(x div N)*N + L]mod L for x = 0,1,...,L - 1 where S(·) is a lookup table, N is the length of the S table, M is the quotient of the double-bit interleaving length divided by the S table length, div represents integer division, and mod represents modulo operation; The specific algorithm of the address mapping I(x) for Turbo interleaving is as follows: where Data() represents the input of the interleaver, and IntData() represents the output of the interleaver. When the output address of the interleaver is even, the 0th and 1st bits of the corresponding interleaved information bit pair are swapped.