Polarization code distributed parity check SCLF decoding method based on error code distribution
By partitioning the polarized code and using distributed parity and cyclic redundancy checking methods, the error performance and complexity problems of polarized codes under medium and short code lengths are solved, and a more efficient decoding process is achieved.
Patent Information
- Application Number
- CN202510443674.7
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- Filing Date
- 2025-04-10
- Publication Date
- 2025-07-25
AI Technical Summary
The existing polarization coding decoding methods have severe error propagation under medium and short code lengths, poor code error performance, and high decoding complexity.
The polarized code is divided into multiple partitions according to the cumulative probability of the first error in the key set, and error detection and flip is used to use distributed parity codes and cyclic redundant check codes, combining path pruning and early termination of the decoding process to reduce the number of re-decoding times and decoding bits.
It improves the retention probability of the correct decoding path, reduces the decoding complexity, and improves the code error performance within a certain range.
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Figure CN120377941A_ABST
Abstract
Description
Technical Field
[0001] The present invention belongs to the technical field of channel coding, and relates to a successive cancellation list decoding algorithm for distributed parity check polar code based on error distribution (ED-PC-SCLF) in channel coding. According to the cumulative probability of the first error occurring in the indices of the critical set (CS), the polar code is divided into multiple partitions, and parity check (PC) codes are used for each partition to detect, identify, and flip the unfrozen bits with incorrect decoding. At the end of the decoding, cyclic redundancy check (CRC) codes are used to perform checksum and selection on all paths. In order to improve the competitiveness of the correct path, path pruning operations are also added during decoding, and the decoding process is terminated in advance to reduce the number of decoded bits. Background Art
[0002] Due to its good superiority, polar codes have been used as the coding standard for the control channel in the 5G enhanced mobile broadband scenario. The successive cancellation (SC) decoding method of polar codes can achieve the channel capacity when the code length is infinite. However, for the SC decoding method with medium and short code lengths, serious error propagation will occur during the decoding process, resulting in poor error performance.
[0003] To improve the polarization code decoding method, scholars have proposed the Cyclic Redundancy Check Aided SCL (CA-SCL) decoding method. In this method, a CRC code is concatenated at the end of the polarization code, and multiple candidate paths are verified by the CRC code, effectively improving the performance of the polarization code decoding method. To improve the error performance of the CA-SCL decoding method, scholars have further proposed the Successive Cancellation List Bit-Flip (SCLF) decoding method. This method combines the CA-SCL decoding method and the SCF decoding method well, and the error performance has also been greatly improved compared with CA-SCL and SCF. SCLF decoding is achieved by changing the path competition decision result of the flipped bits during the re-decoding process. To improve the performance of the initial SCLF decoding method, scholars have proposed an advanced Decision Post-Processing (DPost) flipping criterion, and based on this criterion, a high-order SCLF decoding method with multi-bit flipping has been proposed. Considering the problem of high complexity in the existing SCLF decoding methods, the present invention proposes a polarization code distributed parity check SCLF (SCLF Decoding Algorithm for Distributed Parity Check Polar Code Based on Error Distribution, ED-PC-SCLF) decoding method that can reduce the number of re-decodings and the number of decoded bits. This method reduces the complexity of SCLF decoding and improves the error performance within a certain range. Summary of the Invention
[0004] In view of this, the purpose of the present invention is to provide a polarization code distributed parity check SCLF decoding method based on error distribution. This method divides the polarization code into multiple partitions according to the cumulative probability of the first error occurring in the index in the CS, and uses the PC code to check, identify, and flip the error bits in each partition. At the end of the decoding, the CRC code is used to check and select all paths. In addition, to improve the competitiveness of the correct path, path pruning operations are added during decoding, and the early termination of the decoding process is used, effectively increasing the probability that the correct path is retained until the end of decoding, reducing unnecessary decoding processes, and thus reducing the decoding complexity.
[0005] To achieve the above purpose, the present invention provides the following technical solutions:
[0006] First, construct the CS according to the partial order relationship of the polarization channels. The CS consists of the indices of the worst polarization channels in the special node R1 code of the polarization code. The CS in the SCL decoding method contains most of the decoding error bits caused by channel noise. Let E denote the random variable describing the first error in the CS set in the SCL of the polarization code. Calculate the cumulative error probability F(k) of E. According to F(k), divide the information sequence into P partitions. After the partitioning is completed, the PC code is used to check the bits on the CS information bits and place the PC code on the most reliable channels in each partition.
[0007] Then, analyze the special relationship between adjacent R1 codes of different lengths and the occurrence of decoding errors. When there are two consecutive R1 code sub-blocks A and B, and B is larger, the probability of erasure errors occurring in B is greater than that in A, and the longer the length of B, the greater the probability of two or more errors occurring. Construct the initial flip set IFS according to this special relationship. The decoding process of the partitioned CRC polarization code will terminate prematurely in case of decoding failure, so not all position indices in the IFS are required. After the SCL decoding first reaches the bit at position index μ p of the information bits, only when no path satisfies the CRC check, the information bits belonging to partition p (1 ≤ p ≤ P) in the IFS are constructed into the partition flip set PFS of the ED-PC-SCLF decoding method.
[0008] Finally, perform SCL decoding on the P partitions in sequence. For the partition where a certain PC code is located, perform PC check after the decoding of this partition is completed. If there is a decoded sequence that passes the PC check, prune the paths that do not pass the PC check and only select and retain the path with the smallest path metric (PM) value that passes the PC check to continue the decoding of the next partition; if all sequences do not pass the PC check, terminate the decoding process prematurely. Subsequently, construct the flip set PFS and perform re-decoding. Flip the bits in the PFS in sequence. If the re-decoding process successfully passes the final CRC check, output the correct decoded path; otherwise, perform the next re-decoding. When the maximum number of flips is reached and the correct decoded sequence has not been obtained, declare the decoding failure.
[0009] The beneficial effects of the present invention are as follows:
[0010] The flip set and distributed PC structure constructed by the present invention can effectively narrow the search range of decoding error bits, pinpoint the positions of error bits accurately, improve the bit error performance, reduce the number of re - decoding times. At the same time, an early termination of the decoding process operation is incorporated during the decoding process, reducing the number of decoded bits and the decoding complexity. Moreover, the path pruning operation in the decoding method can effectively reduce the competition of incorrect paths for the correct path, increasing the probability that the correct path is retained until the end of decoding. The simulation results show that the ED - PC - SCLF decoding method proposed in the present invention can more accurately identify the first error bit caused by channel noise compared with the DPC - SCLF decoding method in the literature [1] "Yuan Jianguo, He Jingjie, Zhang Fengguo, et al. Low - complexity successive cancellation list decoding method of polar codes based on distributed parity - check codes [J]. Semiconductor Optoelectronics, 2023, 44(06): 931 - 937." The proposed distributed PC structure can better improve the checking ability of the parity - check code, thereby increasing the probability that the correct path is retained until the end of decoding and improving the bit error performance. Compared with the DPost - SCLF decoding method in the literature [2] "WANG Zhongxuan, PAN Yihan, LIN Yuheng. Post - processing for CRC - aided successive cancellation list decoding of polar codes [J]. IEEE Communications Letters. 2020, 24(7): 1395 - 1399.", the path pruning and early termination of the decoding process in the ED - PC - SCLF decoding method can effectively reduce unnecessary re - decoding processes and achieve lower complexity. Description of the Drawings
[0011] To make the objectives, technical solutions, and beneficial effects of the present invention clearer, the present invention provides the following drawings for illustration:
[0012] Figure 1 It is the technical roadmap of the method of the present invention;
[0013] Figure 2 It is the CS schematic diagram;
[0014] Figure 3 It is the different partition structures of the CA - SCL decoding method for parity - check codes
[0015] Figure 4 It is the cumulative error probability F(k) curve graph of the first error E occurring at the position within CS at different signal - to - noise ratios;
[0016] Figure 5 It is the bit - error rate curve graph of different decoding methods;
[0017] Figure 6 Average decoding times curve for different decoding methods Specific implementation mode
[0018] The preferred embodiments of the present invention will be described in detail below with reference to the accompanying drawings.
[0019] (1) Combined with the attached Figure 1 The specific implementation process of a polar code distributed parity check SCLF decoding method based on error distribution is as follows:[[]]END]]
[0020] Step 1: Construct CS according to the partial order relationship of the polarization channel. CS is composed of the indexes of the worst polarization channels in the special node R1 code of the polar code. The CS in the SCL decoding method contains most of the decoding error bits caused by channel noise. Let E be the random variable describing the first error in CS of the polar code. Assume that the length of the polar code is N = 2 n , the information length is K, and the SCL decoder with a list size of L is used for decoding. E only appears in positions. The cumulative density function (CDF) of E is expressed as F(k), and the definition of F(k) is shown in formula (1).
[0021]
[0022] There is a relationship shown in formula (2) between channels, where "<" represents statistical degradation. For example, W < Q, which is called that channel W is the statistical degradation of channel Q, and P e (W) ≥ P e (Q).
[0023]
[0024] Channel error probability is obtained from formula (3), where is the mean of the logarithm likelihood ratio (LLR) of channel .
[0025]
[0026] Among them erfc(x) is the complementary error function
[0027] In the Gaussian approximation (GA) construction, the source bits are modulated by binary phase shift keying (BPSK) S i= 1 - 2x i , assuming the source bits are all 0 bits, then the sequence transmitted by BPSK is all 1 sequence, and each received BPSK symbol is y i = 1 + n i , where n i is additive white Gaussian noise, with a mean of 0 and a variance of σ 2 , so y i is also a random variable y that follows a Gaussian distribution i ~ N(1, σ 2 ). When using BPSK modulation in an additive white Gaussian noise (AWGN) channel, the calculation formula of the i-th LLR is shown in formula (4).
[0028]
[0029] It is shown by formula (4) that the value of LLR is inversely proportional to the noise power σ 2 . When the noise power increases, the value of LLR decreases, the channel error probability increases, and the channel in CS becomes less reliable as the noise increases, and the error probability increases . The probability of the first error occurring earlier in
[0030] increases with the increase of noise. Monte Carlo simulation experiments are used to statistically calculate the first error probability of each element in CS and calculate the CDF F(k) of each position p (K p > 1) information bits, and combined with its own PC code of size C p . The number of information bits and the number of CRC bits are respectively and s p represents the number of non-frozen bits in the p-th partition, s p = K p + C p . The cumulative number of non-frozen bits is represented as S p . In the codeword sequence, the last index of each partition is stored in μ = {μ1, μ2,..., μ P}. If uniform partitioning is performed, it is represented as μ eq . The distributed PC structure design evenly distributes the partitions according to CDFF(k), and the partitioning rule is shown in formula (5).
[0031]
[0032] Step 3: After the polar code is partitioned, let \(p = \{p_1, p_2, \ldots, p\) P \} represent the PC code index set, and the partition set is represented as \(T = \{T_1, T_2, \ldots, T\) P \}. The value of the \(i\)-th PC code is shown by the calculation formula in Formula (6).
[0033]
[0034] According to Formula (2), the distributed PC code cannot be placed at the beginning of the R1 code, that is, the PC code cannot be placed at the CS position index. The choice of the placement position of the non-uniform-spacing parity-check code depends on the error probability of the channel, and the parity-check code is placed at the position with a low channel error probability.
[0035] Step 4: Assume that there are two consecutive R1 code sub-blocks A and B. Denote the event that the correct path on sub-block A is deleted as \(E\) A , and similarly, denote the event that the correct path on sub-block B is deleted as \(E\) B , and \(E\) A and \(E\) B have the relationship shown in Formula (7).
[0036]
[0037] where \(p\) α is an optimization probability function.
[0038] In SCL decoding, if the R1 code with a smaller block length is in front of sub-block A, due to the cumulative error, sub-block A is less reliable. Therefore, in SCL decoding, the probability of two or more errors occurring in the R1 code with a larger block length is very high. According to the channel partial order relationship of the polar code, if the length of the R1 code is greater than or equal to 8, the first, second, and third position indexes of the R1 code are added to the Initial Flip Set (IFS). When the length of the R1 code is less than 8, only the index of the first position needs to be added to the IFS. The decoding process of the partitioned CRC polar code will terminate prematurely when decoding fails, so it is not necessary to flip all the position indexes in the set. After the SCL decoding first reaches the bit at the position index \(\mu\) p , only when all paths do not satisfy the CRC check, the information bits belonging to the partition \(p\) (\(1\leq p\leq P\)) in the IFS are constructed into the Partitioned Flip set (PFS) of the ED-PC-SCLF decoding method. The construction of the PFS is shown in Formula (8).
[0039] PFS = \{i | IFS(i), \mu\) p-1 \(\leq i\leq\mu\) p \} (8)
[0040] Step 5: Since the distributed PC structure divides the information sequence into P partitions, the ED-PC-SCLF decoding process will be divided into P processes. Let p (1 ≤ p ≤ P) represent the decoding sequence of the p-th partition. This method sequentially performs SCL decoding on each partition. For the p-th partition, after the decoding of this partition is completed, PC check is performed. If there is a decoding sequence that passes the PC check, then the paths that do not pass the PC check are pruned, and only the path that passes the PC check and has the smallest PM value is selected to continue the decoding of the next partition; if all paths do not pass the PC check, the decoding process is terminated in advance, and then the flip set PFS is constructed for re-decoding. The bits in the PFS are flipped in the order of the positions in the PFS. If the re-decoding process successfully passes the final CRC check, the correct decoding path is output; otherwise, the next re-decoding is performed. When the correct decoding sequence has not been obtained after reaching the maximum number of flips, the decoding is declared to fail.
[0041] (2) Combine the attached Figure 2 to illustrate the construction method of CS:
[0042] CS is composed of the indices of the worst polarization channels corresponding to the R1 codes in the polar code. Figure 2 Shows a polar code with code length N = 8 and A = {4, 6, 7, 8}. The black nodes indicate that all its leaf nodes are information bits, the white nodes indicate that all its leaf nodes are frozen bits, the gray nodes indicate that its leaf nodes have both information bits and frozen bits, the solid rectangular frame represents a sub-polar code with a code rate of 1, and the bit indices in the dashed rectangular frame form CS, denoted as CS = {4, 6, 7}.
[0043] (3) Combine the attached Figure 3 to illustrate the different partition structures of the CA-SCL decoding method for parity-check codes:
[0044] Figure 3 In (a) and (b), the equidistant placement method is shown. The equidistant parity-check code divides the information bits equally and places the parity-check code behind each segment of information bits. Figure 3 In (c) and (d), the non-equidistant placement method is shown. The selection of the placement position of the non-equidistant parity-check code depends on the error probability of the channel. The parity-check code is placed at the position with a low error probability of the channel. Figure 3 In (e), a scheme using 2 PC codes for checking is shown. As the number of bits of the check code increases, its checking ability also increases accordingly. However, an overly long check code will increase the redundancy of the information. The present invention selects to use one PC code for checking in each partition.
[0045] (4) Combine the attached Figure 4 to illustrate the selection of the distributed PC structure scheme as described below:
[0046] Let \(E\) denote the random variable of the first error within the CS set in the SCL decoding method for polar codes. The CDF of \(E\) is denoted as \(F(k)\). Figure 4 shows the curve of \(F(k)\) when the list size \(L = 8\) and the signal-to-noise ratio \(E b / N0=\{1,1.5,2,2.5\}(dB). According to Figure 4 it shows that the probability of the first error occurring earlier in b increases with the increase of noise. The partition CRC design partitions uniformly according to the CDF \(F(k)\). When the signal-to-noise ratio is too small, the first error occurs concentrated in the first half of the CS. Conversely, when the signal-to-noise ratio is too large, the first error occurs concentrated in the first half of the CS. Selecting \(F(k)\) when the signal-to-noise ratio is too small or too large to partition the information sequence will lead to a situation where the partition contains extremely uneven information bits. Therefore, select the signal-to-noise ratio \(E
[0047] (5) Combining with Appendix Figure 5 , 6 illustrates the superiority of the method of the present invention. The simulation is as follows:
[0048] To verify the superiority of the method proposed in the present invention, the bit error performance and complexity of the ED-PC-SCLF decoding method are simulated and analyzed. The simulation conditions are: the polar code length \(N = 1024\), the code rate \(R = 0.5\), the list size \(L = 8\), the codeword is modulated by BPSK and transmitted in an AWGN channel, the Gaussian approximation construction method with a signal-to-noise ratio \(SNR = 2.5dB\) is adopted, the CRC check code length \(r = 16\), and the CRC check code generation polynomial is \(g 16 (x)=x 16 +x 15 +x 2 +1, the simulation iteration times is 10 6 , and the maximum number of flips for all decoding methods is set to \(T max = 50.
[0049] The ED-PC-SCLF decoding method proposed in the present invention is compared with the CA-SCL decoding method in the literature [3] "NIU Kai, CHEN Kai. CRC-aided decoding of polar codes[J]. IEEE Communications Letters, 2012, 16(10): 1668 - 1671.", the DPC-SCLF decoding method in the literature [1], and the DPost-SCLF decoding method in the literature [2], and the bit error rate and average decoding times of the above methods are analyzed.
[0050] The bit error performance of each decoding method is asFigure 5 As shown by Figure 5 it can be obtained that the bit error performance of the DPC-SCLF decoding method and the ED-PC-SCLF decoding method is comparable and superior to other decoding methods at low signal-to-noise ratios. In the case of medium and high signal-to-noise ratios, the ED-PC-SCLF decoding method has better bit error performance compared to other decoding methods. When the block error rate is 10 -4 , the ED-PC-SCLF decoding method has gains of 0.19 dB, 0.05 dB, 0.25 dB, and 0.09 dB compared to the DPost-SCLF decoding method, the DPC-SCLF decoding method, and the CA-SCL decoding methods with list sizes of L = 8 and 16, respectively.
[0051] The complexity of various decoding methods is represented by the average number of decoding times. Although the method will terminate decoding in advance when the CRC checks of all branches fail, it still occupies computing resources. Assuming that the decoding does not complete a full process, the number of decoding times is still counted once. Normalize the complexity when the list size L = 8 of CA-SCL to 1, and the complexity of each decoding method is as Figure 6 shown by Figure 6 it can be obtained that the proposed ED-PC-SCLF decoding method in this paper has lower complexity compared to other SCLF decoding methods. At a signal-to-noise ratio of 1 dB, the ED-PC-SCLF decoding method has a complexity 19.1% and 11.4% lower than that of the DPost-SCLF decoding method and the DPC-SCLF decoding method, respectively.
[0052] Therefore, the proposed ED-PC-SCLF decoding method of the present invention has low complexity and good error correction performance.
Claims
1. A polarization code distributed parity check SCLF (SCLF Decoding Algorithm for Distributed Parity Check Polar Code Based on Error Distribution, ED-PC-SCLF) decoding method. This method aims at the problem of high complexity of the polarization code SCLF decoding method. According to the cumulative probability of the first error occurring in the information bits in the critical set (CS), the polarization code is divided into multiple partitions. During the decoding process, the distributed parity check (PC) structure performs partition processing on the decoding sequence, enabling the PC code to fully verify the decoding path. Prune the paths that do not pass the PC check and only select and retain the path with the minimum path metric (PM) value that passes the PC check, improving the probability of the correct path being retained until the end of decoding. At the same time, an early termination of the decoding process operation is incorporated during the decoding process, terminating the decoding process of all paths that do not pass the PC check in advance, effectively reducing the number of decoded bits in the entire decoding process. The specific steps of this method are as follows: Step 1: Construct CS according to the partial order relationship of the polarization channel. CS is composed of the indices of the worst polarization channels in the special node R1 code of the polarization code. CS in the Successive Cancellation List (SCL) decoding method contains most of the decoding error bits caused by channel noise. Let E denote the random variable describing the first error in CS of the polarization code. Assume the length of the polarization code is N = 2 n , the information length is K, and it is decoded using an SCL decoder with a list size of L. E only appears in the positions of {i log2L+1 , i log2L+2 ,..., i K}. The cumulative density function (CDF) of E is denoted as F(k), and the definition of F(k) is shown in formula (1); There is a relationship shown in formula (2) between the channels, where Indicates statistical degradation, for example The channel W is said to be a statistical degradation of the channel Q, and P e (W) ≥ P e (Q); Channel error probability Obtained by formula (3), where is the channel mean of the Logarithm Likelihood Ratio (LLR); where erfc(x) is the complementary error function, In the Gaussian Approximation (GA) construction, the source bits are modulated by Binary Phase Shift Keying (BPSK) S i = 1 - 2x i , assuming that the source bits are all 0 bits, then the BPSK transmitted sequence is all 1 sequence, and each received BPSK symbol is y i = 1 + n i , where n i is additive white Gaussian noise, with a mean of 0 and a variance of σ 2 , so y i is also a random variable that follows a Gaussian distribution y i ~ N(1, σ 2 ), when using BPSK modulation in an Additive White Gaussian Noise (AWGN) channel, the calculation formula of the i-th LLR is shown in formula (4); As shown by Equation (4), the value of LLR is inversely proportional to the noise power σ 2 . When the noise power increases, the value of LLR decreases, the channel error probability increases, and the channel in CS becomes less reliable as the noise increases, and the error probability increases. The probability that the first error in [reference] appears earlier increases with the increase of noise. Monte Carlo simulation experiments are used to statistically analyze the first error probability of each element in CS, and the CDF F(k) of each position is calculated. Step 2: The polar codes with distributed PC check are divided into P (P>1) partitions, and each partition should contain K p (K p >1) information bits and are combined with their own PC codes of size C p . The number of information bits and the number of CRC bits are respectively and s p represents the number of non-frozen bits in the p-th partition, and s p =K p +C p . The cumulative number of non-frozen bits is denoted as S p . In the codeword sequence, the last index of each partition is stored in μ={μ1,μ2,...,μ P}. If uniform partitioning is performed, it is denoted as μ eq . The distributed PC structure design uniformly distributes the partitions according to CDFF(k), and the partitioning rule is shown in formula (5); Step 3: After the polar code is partitioned, let p = {p1, p2,..., p P} represent the PC code index set, and the partition set is represented as T = {T1, T2,..., T P}. The value of the i-th PC code is shown by the calculation formula in Formula (6); As can be seen from formula (2), the distributed PC code cannot be placed at the beginning of the R1 code, that is, the PC code cannot be placed at the CS position index. The selection of the placement position of the non-uniform-spacing parity check code depends on the error probability of the channel, and the parity check code is placed at the position with a low error probability of the channel. Step 4: Assume that there are two consecutive R1 code sub-blocks A and B, and denote the event that the correct path on sub-block A is deleted as E A , and similarly, denote the event that the correct path on sub-block B is deleted as E B , E A and E B have the relationship shown in formula (7); where p α is an optimization probability function; In SCL decoding, if the R1 code with a smaller block length is in front of sub-block A, due to cumulative errors, sub-block A is less reliable. Therefore, in SCL decoding, the probability of two or more errors occurring in the R1 code with a larger block length is very high. According to the channel partial order relationship of polar codes, if the length of the R1 code is greater than or equal to 8, the indices of the first, second, and third positions of the R1 code are added to the Initial Flip Set (IFS). When the length of the R1 code is less than 8, only the index of the first position needs to be added to the IFS. The decoding process of the partitioned CRC polar code will terminate prematurely in case of decoding failure, so it is not necessary to have all the position indices in the flip set. After the SCL decoding first reaches the bit at position index μ p and all paths do not satisfy the CRC check, the information bits belonging to partition p (1 ≤ p ≤ P) in the IFS are constructed into the Partitioned Flip set (PFS) of the ED-PC-SCLF decoding method. The construction of the PFS is shown in formula (8); PFS = {i | IFS(i), μ p-1 ≤ i ≤ μ p} (8) Step 5: Since the distributed PC structure divides the information sequence into P partitions, the ED-PC-SCLF decoding process will be divided into P processes. Let p (1 ≤ p ≤ P) represent the decoding sequence of the p-th partition. This method sequentially performs SCL decoding on each partition. For the p-th partition, after the decoding of this partition is completed, PC check is performed. If there is a decoding sequence that passes the PC check, prune the paths that do not pass the PC check and only select and retain the path with the minimum PM value that passes the PC check to continue the decoding of the next partition; if all paths do not pass the PC check, terminate the decoding process in advance, then construct a flip set PFS for re-decoding, flip the bits in the PFS in the order of the positions in the PFS. If the re-decoding process successfully passes the final CRC check, output the correct decoding path; otherwise, perform the next re-decoding. When the correct decoding sequence has not been obtained after reaching the maximum number of flips, declare the decoding failure.