Surface acoustic wave resonator, filter and electronic equipment
By optimizing the thickness and chamfer of the piezoelectric layer on different crystal planes of the silicon substrate, the problem of high-frequency bulk wave spurious emissions in traditional surface acoustic wave resonators was solved, and the Q value and electromechanical coupling coefficient were improved, making it suitable for the fabrication of wideband filters.
Patent Information
- Application Number
- CN202510547184.1
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- Filing Date
- 2025-04-28
- Publication Date
- 2025-08-01
AI Technical Summary
Traditional surface acoustic wave resonators are limited by high-frequency bulk wave spurs, resulting in low Q values and electromechanical coupling coefficients, making it difficult to meet the high-performance requirements of modern mobile communications for radio frequency devices.
By optimizing the thickness and chamfer of the piezoelectric layer on different crystal planes of the silicon substrate, high-frequency bulk wave spurious signals in the horizontal shear mode can be weakened or suppressed, thereby improving the Q value and electromechanical coupling coefficient of the device.
It effectively reduces or suppresses high-frequency bulk wave spurious emissions, improves the Q value and electromechanical coupling coefficient of surface acoustic wave resonators, and is suitable for the fabrication of wideband filters.
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Figure CN120415364A_ABST
Abstract
Description
Technical Field
[0001] The present application relates to the field of radio frequency technology, and in particular, to a surface acoustic wave resonator, a filter, and an electronic device. Background Art
[0002] A surface acoustic wave (SAW) resonator is a device widely used in the radio frequency field, which combines low insertion loss and good suppression performance, and has a small volume at the same time. It mainly uses the piezoelectric effect to convert electrical energy and mechanical energy into each other, and is used to combine the gating characteristics for signal transmission. There are various types of surface acoustic wave resonators. For example, a surface acoustic wave resonator with dummy fingers in the interdigital transducer, a surface acoustic wave resonator with reflection gratings arranged on both sides of the interdigital transducer, a temperature-compensation surface acoustic wave (TC-SAW) resonator, and a thin-film surface acoustic wave (Thin-Film SAW, TC-SAW) resonator, etc.
[0003] However, traditional surface acoustic wave resonators are restricted by high-frequency bulk wave spurs, resulting in low Q values and electromechanical coupling coefficients of the devices. The key performance indicators of various related radio frequency devices designed accordingly are also reduced, making it difficult to meet the requirements of modern mobile communication for high performance of related radio frequency devices. Summary of the Invention
[0004] To solve the above technical problems, embodiments of the present application provide a surface acoustic wave resonator, a filter, and an electronic device, so as to weaken or suppress high-frequency bulk wave spurs in the horizontal shear mode by optimizing the thickness and cut angle of the piezoelectric layer under different crystal planes of the silicon substrate, and improve the Q value and electromechanical coupling coefficient of the device.
[0005] To achieve the above object, embodiments of the present application provide the following technical solutions:
[0006] In a first aspect, embodiments of the present application provide a surface acoustic wave resonator, including:
[0007] A substrate, the substrate is a silicon crystal, and the crystal plane of the silicon crystal is (100) or (111); when the crystal plane of the silicon crystal is (100), the Euler angle corresponding to the silicon crystal is (0°, 0°, γ°); when the crystal plane of the silicon crystal is (111), the Euler angle corresponding to the silicon crystal is (135°, 54.74°; γ°); where γ is configured such that the direction of the positioning edge of the wafer to which the silicon crystal belongs is parallel to the propagation direction of the acoustic wave in the surface acoustic wave resonator;
[0008] A piezoelectric layer located on one side of the substrate, the piezoelectric layer is a lithium niobate layer cut at θ°Y-X, and the thickness of the piezoelectric layer is hLN ;
[0009] and an interdigital transducer located on a side of the piezoelectric layer away from the substrate;
[0010] wherein, when the crystal plane of the silicon crystal is (100), and h LN satisfies: 0.4λ ≤ h LN ≤ 0.8λ, θ° satisfies: 20° ≤ θ° ≤ 50°;
[0011] Or, when the crystal plane of the silicon crystal is (100), and h LN = 0.6λ, θ° satisfies: -30° ≤ θ° ≤ -20°;
[0012] Or, when the crystal plane of the silicon crystal is (100), and h LN = λ, θ° = 0° or θ° = 50°;
[0013] Or, when the crystal plane of the silicon crystal is (111), and h LN satisfies: 0.2λ ≤ h LN ≤ 0.4λ, θ° satisfies: 30° ≤ θ° ≤ 50°;
[0014] Or, when the crystal plane of the silicon crystal is (111), and h LN = 0.3λ, θ° satisfies: 20° ≤ θ° ≤ 35°;
[0015] Or, when the crystal plane of the silicon crystal is (111), and h LN = 0.4λ, θ° satisfies: 10° ≤ θ° ≤ 30°;
[0016] Or, when the crystal plane of the silicon crystal is (111), and h LN = 0.6λ, θ° satisfies: -35° ≤ θ° ≤ -25°, or θ° = 45°, or θ° = 50°;
[0017] Or, when the crystal plane of the silicon crystal is (111), and h LN = 0.7λ, θ° satisfies: 40° ≤ θ° ≤ 50°;
[0018] Or, when the crystal plane of the silicon crystal is (111), and h LN = 0.8λ, θ° satisfies: 20° ≤ θ° ≤ 50°;
[0019] λ is the wavelength of the acoustic wave propagating in the surface acoustic wave resonator.
[0020] Optionally, when the crystal plane of the silicon crystal is (100), and h LN satisfies: 0.4λ ≤ h LNWhen ≤ 0.8λ, θ° satisfies: 35° ≤ θ° ≤ 50°.
[0021] Optionally, the crystal plane of the silicon crystal is (100), and h LN = 0.6λ or h LN = 0.8λ, θ° satisfies: 25° ≤ θ° ≤ 35°.
[0022] Optionally, when the crystal plane of the silicon crystal is (111), and h LN satisfies: 0.2λ ≤ h LN ≤ 0.4λ, θ° satisfies: 35° ≤ θ° ≤ 50°.
[0023] Optionally, when the crystal plane of the silicon crystal is (111), and h LN = 0.3λ, θ° satisfies: 25° ≤ θ° ≤ 35°.
[0024] Optionally, the crystal plane of the silicon crystal is (111), and h LN = 0.8λ, θ° satisfies: 20° ≤ θ° ≤ 35°.
[0025] Optionally, the surface acoustic wave resonator further includes:
[0026] A silicon dioxide stack located between the substrate and the piezoelectric layer, the silicon dioxide stack includes a first silicon dioxide layer and a second silicon dioxide layer, the second silicon dioxide layer is closer to the piezoelectric layer than the first silicon dioxide layer, and the density of the second silicon dioxide layer is less than the density of the first silicon dioxide layer.
[0027] Optionally, the thickness of the silicon dioxide stack is 0.1λ, and the proportion of the thickness of the first silicon dioxide layer in the thickness of the silicon dioxide stack is 0.25.
[0028] In a second aspect, an embodiment of the present application provides a filter, including the above surface acoustic wave resonator.
[0029] In a third aspect, an embodiment of the present application provides an electronic device, including the above filter.
[0030] Compared with the prior art, the above technical solution has the following advantages:
[0031] The surface acoustic wave resonator provided by the embodiment of the present application includes a substrate, a piezoelectric layer located on one side of the substrate, and an interdigital transducer located on the side of the piezoelectric layer facing away from the substrate. Among them, the substrate is a silicon crystal, that is, the substrate is a silicon substrate, and the crystal plane of the silicon crystal is (100) or (111); when the crystal plane of the silicon crystal is (100), the Euler angle corresponding to the silicon crystal is (0°, 0°, γ°), and when the crystal plane of the silicon crystal is (111), the Euler angle corresponding to the silicon crystal is (135°, 54.74°; γ°), and γ is set so that the direction of the positioning edge of the wafer to which the silicon crystal belongs is parallel to the propagation direction of the acoustic wave in the surface acoustic wave resonator; the piezoelectric layer is a lithium niobate layer with a θ° Y-X cut; since part of the energy of the high-frequency bulk wave spurious in the surface acoustic wave resonator is concentrated in the piezoelectric layer and part leaks into the substrate, and the propagation mode is a leaky wave, and the thickness of the piezoelectric layer can change the waveguide width of the acoustic wave propagation (that is, the "channel size" of the acoustic wave propagation), the cut type of the piezoelectric layer and the orientation of the substrate can change the boundary conditions of the acoustic wave propagation (describing the propagation rules of the acoustic wave at the interface between the piezoelectric layer and the substrate, how the material interface constrains the acoustic wave), the waveguide width and the boundary conditions can jointly determine the energy distribution of the high-frequency bulk wave spurious, therefore, by optimizing the thickness h of the piezoelectric layer under different crystal planes (that is, the crystal plane is (100) or (111)) of the silicon substrate LN with the cut angle θ°, specifically the crystal plane of the silicon substrate and the thickness h of the piezoelectric layer LN And the combination of the cut angle θ° can be seen above. After simulation verification, it can weaken or suppress the high-frequency bulk wave spurious, reduce the energy dissipation, and improve the Q value and the electromechanical coupling coefficient of the device.
[0032] Other objects and advantages of the present application will be described in detail in the following embodiments in conjunction with the accompanying drawings. Description of the Drawings
[0033] In order to more clearly illustrate the technical solutions in the embodiments of the present application or the prior art, the following will briefly introduce the drawings required for use in the description of the embodiments or the prior art. Obviously, the following drawings are only some embodiments of the present application. For those of ordinary skill in the art, without creative efforts, other drawings can also be obtained based on these drawings.
[0034] Figure 1 It is a schematic cross-sectional structure diagram of a surface acoustic wave resonator provided by an embodiment of the present application;
[0035] Figure 2 It is a vibration mode diagram of the high-frequency bulk wave spurious in a horizontal shear mode in the surface acoustic wave resonator;
[0036] Figure 3a 、 Figure 3b and Figure 3c They are respectively displacement diagrams of three high-frequency bulk wave spurious in the surface acoustic wave resonator;
[0037] Figure 4 Schematic diagram of a piezoelectric layer cut in a direction where the cutting plane is rotated by an angle θ° around the X-axis perpendicular to the Y-axis of a lithium niobate crystal;
[0038] Figure 5 For the case where the substrate is a silicon crystal, the electromechanical coupling coefficient k of the horizontal shear mode of a surface acoustic wave resonator 2 Variation curve with the cut angle θ° of the piezoelectric layer;
[0039] Figure 6 For the case where the substrate is a silicon crystal, the crystal plane of the silicon crystal is (100), and the Euler angles corresponding to the silicon crystal are (0°, 0°, γ°), admittance-frequency curves of the surface acoustic wave resonator with piezoelectric layers of different thicknesses;
[0040] Figure 7a and Figure 7b For the case where the crystal plane of the silicon crystal of the substrate is (100), and the thickness h LN = 0.3λ of the piezoelectric layer, admittance-frequency curves of the surface acoustic wave resonator at different cut angles θ° of the piezoelectric layer;
[0041] Figure 8a and Figure 8b For the case where the crystal plane of the silicon crystal of the substrate is (100), and the thickness h LN = 0.6λ of the piezoelectric layer, admittance-frequency curves of the surface acoustic wave resonator at different cut angles θ° of the piezoelectric layer.
[0042] Reference numerals:
[0043] 10 - Substrate; 20 - Piezoelectric layer; 30 - Interdigital transducer; 31 - Electrode finger; 40 - Silicon dioxide stack; 41 - First silicon dioxide layer; 42 - Second silicon dioxide layer. Detailed implementation manners
[0044] Next, the technical solutions in the embodiments of the present application will be clearly and completely described in conjunction with the accompanying drawings in the embodiments of the present application. Obviously, the described embodiments are only a part of the embodiments of the present application, rather than all the embodiments. Based on the embodiments in the present application, all other embodiments obtained by those of ordinary skill in the art without creative efforts shall fall within the protection scope of the present application.
[0045] In the description, claims, and above-mentioned drawings of this application, terms such as "first" and "second" are used to distinguish similar objects and do not necessarily describe a specific order or sequence. It should be understood that such terms can be interchanged under appropriate circumstances, which is only a way of distinguishing objects with the same attributes when describing the embodiments of this application. In addition, the terms "comprising" and "having" and any variations thereof are intended to cover non-exclusive inclusion.
[0046] As described in the background art section, traditional surface acoustic wave resonators are restricted by high-frequency bulk wave spurs, resulting in lower Q values and electromechanical coupling coefficients of the devices. Consequently, the key performance indicators of various related radio frequency devices designed based on them also decrease, making it difficult to meet the high-performance requirements of modern mobile communications for related radio frequency devices.
[0047] In view of this, an embodiment of this application provides a surface acoustic wave resonator. Figure 1 The cross-sectional structure schematic diagram of a surface acoustic wave resonator provided by an embodiment of this application is shown. As Figure 1 shown, the surface acoustic wave resonator includes a substrate 10, a piezoelectric layer 20 on one side of the substrate 10, and an interdigital transducer 30 on the side of the piezoelectric layer 20 facing away from the substrate 10.
[0048] To better understand this application, Figure 2 the vibration mode diagram of high-frequency bulk wave spurs in a horizontal shear mode in the surface acoustic wave resonator is exemplified. As Figure 2 shown, the high-frequency bulk wave spurs in this horizontal shear mode vibrate along the extension direction of the electrode fingers 31 in the interdigital transducer 30. The high-frequency bulk wave spurs in the horizontal shear mode will generate additional resonance peaks outside the passband of the surface acoustic wave resonator, resulting in lower Q values and electromechanical coupling coefficients of the device.
[0049] Figure 3a , Figure 3b and Figure 3c respectively exemplify the displacement diagrams of three high-frequency bulk wave spurs in the surface acoustic wave resonator. It can be seen that Figure 3a the energy of the high-frequency bulk wave spurs in [diagram 1] is mainly concentrated in the piezoelectric layer 20 and less leaks into the substrate 10; Figure 3b the energy of the high-frequency bulk wave spurs in [diagram 2] is distributed in both the piezoelectric layer 20 and the substrate 10, and more is concentrated in the substrate 10; Figure 3c the energy of the high-frequency bulk wave spurs in [diagram 3] is distributed in both the piezoelectric layer 20 and the substrate 10, and more is concentrated in the piezoelectric layer 20. Thus, it can be known that the energy of the high-frequency bulk wave spurs in the surface acoustic wave resonator is partially concentrated in the piezoelectric layer 20 and partially leaks into the substrate 10, and the propagation mode is leaky wave.
[0050] The inventors' research found that the thickness of the piezoelectric layer can change the waveguide width of acoustic wave propagation. The waveguide width of acoustic wave propagation is the "channel size" of acoustic wave propagation. It can be understood that when the acoustic wave propagates in the piezoelectric layer 20, it is confined in a structure similar to a "pipe", and the width of this "pipe" is the waveguide width. The cut type of the piezoelectric layer and the orientation of the substrate can change the boundary conditions of acoustic wave propagation. The boundary conditions of acoustic wave propagation describe the propagation rules of acoustic waves at the interface between the piezoelectric layer and the substrate (such as reflection, projection, or mode conversion), reflecting how the material interface constrains acoustic waves. The waveguide width and boundary conditions of acoustic wave propagation can jointly determine the energy distribution of high-frequency bulk wave spurs. Therefore, by optimizing the orientation of the substrate 10, the cut type, and the thickness of the piezoelectric layer 20, the high-frequency bulk wave spurs can be weakened or suppressed, and the Q value and electromechanical coupling coefficient of the device can be improved.
[0051] In this application, the substrate 10 is a silicon crystal, that is, the substrate 10 is a silicon substrate. As we know, the crystal plane orientations of a silicon crystal are (100), (110), and (111). In this application, the crystal plane of the silicon crystal is selected as (100) or (111). And when the crystal plane of the silicon crystal is (100), the corresponding Euler angles of the silicon crystal are (0°, 0°, γ°); when the crystal plane of the silicon crystal is (111), the corresponding Euler angles of the silicon crystal are (135°, 54.74°; γ°). Among them, γ is configured such that the direction of the positioning edge of the wafer to which the silicon crystal belongs is parallel to the propagation direction of the acoustic wave in the surface acoustic wave resonator.
[0052] In addition, when the crystal plane of the silicon crystal is (110), the corresponding Euler angles of the silicon crystal are (135°, 90°, γ°). Similarly, γ is configured such that the direction of the positioning edge of the wafer to which the silicon crystal belongs is parallel to the propagation direction of the acoustic wave in the surface acoustic wave resonator. However, subsequent research by the inventors found that when the substrate 10 is a silicon crystal with a crystal plane of (110), it is impossible to combine the optimization of the cut type and thickness of the piezoelectric layer 20 to weaken or suppress high-frequency bulk wave spurs. Therefore, in this application, the substrate 10 is selected as a silicon crystal with a crystal plane of (100) or (111).
[0053] It can be understood that by setting the Euler angles of the silicon crystal serving as the substrate 10 under different crystal planes, the direction of the positioning edge of the wafer to which the silicon crystal belongs is parallel to the propagation direction of the acoustic wave in the surface acoustic wave resonator, so that after the surface acoustic wave resonator is fabricated, the acoustic wave propagates in a predetermined direction.
[0054] In this application, the piezoelectric layer 20 is a lithium niobate layer cut at θ°Y - X, thereby defining the cut type of the piezoelectric layer 20. Refer to Figure 4As shown, the piezoelectric layer 20 is a θ° Y-X cut lithium niobate layer. Specifically, the piezoelectric layer 20 is obtained by cutting in a direction where the cutting plane is perpendicular to the Y axis of the lithium niobate crystal and rotated by an angle θ° around the X axis, that is, the normal direction of the cutting plane points to the new Y axis after the lithium niobate crystal is rotated by an angle θ° around the X axis, and the propagation direction of the acoustic wave is along the original X axis (or the X axis that remains unchanged after rotation). That is to say, after the lithium niobate crystal is rotated by an angle θ° around the X axis, the piezoelectric layer 20 is obtained by cutting the lithium niobate crystal with the cutting plane perpendicular to the rotated new Y axis (the normal direction of the cutting plane is the direction of the rotated new Y axis), and the acoustic wave propagates along the X axis direction. Hereinafter, the angle θ° of the Y axis of the lithium niobate crystal rotated around the X axis will be simply referred to as the cut angle θ°.
[0055] In the present application, the thickness of the piezoelectric layer 20 is h LN .
[0056] Moreover, the inventor studied the electromechanical coupling coefficient k of the horizontally shearing mode of the surface acoustic wave resonator when the substrate 10 is a silicon crystal. 2 The variation with the cut angle θ° of the piezoelectric layer 20. Figure 5 Shows the electromechanical coupling coefficient k of the horizontally shearing mode of the surface acoustic wave resonator when the substrate 10 is a silicon crystal. 2 The variation curve graph with the cut angle θ° of the piezoelectric layer 20, as Figure 5 shown, when the cut angle θ° of the piezoelectric layer 20 is in the range of -35° to 50°, the electromechanical coupling coefficient k of the surface acoustic wave resonator 2 can exceed 15%. In particular, when the cut angle θ° of the piezoelectric layer 20 is 0°, the electromechanical coupling coefficient k of the surface acoustic wave resonator 2 can be as high as 35%, which is much larger than that of the traditional surface acoustic wave resonator based on tantalum lithium piezoelectric thin film (the electromechanical coupling coefficient k 2 is about 10%). Therefore, the present application limits the cut angle θ° of the piezoelectric layer 20 to be optimized in the range of -35° to 50°. In this way, the surface acoustic wave resonator provided by the embodiments of the present application is more suitable for the preparation of wide-band filters.
[0057] The inventor also studied the admittance-frequency curve graphs of the surface acoustic wave resonator when using piezoelectric layers 20 with different thicknesses under the condition that the substrate 10 is a silicon crystal, the crystal plane of the silicon crystal is (100), and the Euler angles corresponding to the silicon crystal are (0°, 0°, γ°). Figure 6 Shows the admittance-frequency curve graphs of the surface acoustic wave resonator when using piezoelectric layers 20 with different thicknesses under the condition that the substrate 10 is a silicon crystal, the crystal plane of the silicon crystal is (100), and the Euler angles corresponding to the silicon crystal are (0°, 0°, γ°), as Figure 6 shown, as the thickness h of the piezoelectric layer 20 LNAs it increases, specifically from 0.2λ to 1.6λ, the number of high-frequency bulk wave spurs in the surface acoustic wave resonator gradually increases. In particular, when the thickness h of the piezoelectric layer 20 LN is greater than λ, the number of high-frequency bulk wave spurs in the surface acoustic wave resonator significantly increases. Therefore, in this application, the thickness h of the piezoelectric layer 20 LN is not greater than λ, where λ is the wavelength of the acoustic wave propagating in the surface acoustic wave resonator.
[0058] Thus, in this application, by optimizing the thickness h of the piezoelectric layer 20 under different crystal planes (i.e., the crystal plane is (100) or (111)) of the silicon substrate (i.e., substrate 10, i.e., silicon crystal), LN and the cut angle θ°, combined with simulation verification, the high-frequency bulk wave spurs are weakened or suppressed, and the Q value and electromechanical coupling coefficient of the device are improved.
[0059] Figure 7a and Figure 7b show the admittance-frequency curve diagrams of the surface acoustic wave resonator at different cut angles θ° of the piezoelectric layer when the crystal plane of the silicon crystal of the substrate 10 is (100) and the thickness h of the piezoelectric layer 20 LN = 0.3λ. Figure 8a and Figure 8b show the admittance-frequency curve diagrams of the surface acoustic wave resonator at different cut angles θ° of the piezoelectric layer when the crystal plane of the silicon crystal of the substrate 10 is (100) and the thickness h of the piezoelectric layer 20 LN = 0.6λ. Referring to Figure 7a , Figure 7b , Figure 8a and Figure 8b , when the crystal plane of the silicon crystal of the substrate 10 is fixed, by optimizing the thickness h LN and the cut angle θ° of the piezoelectric layer 20, the high-frequency bulk wave spurs can be weakened or suppressed. Specifically, we use the admittance ratio to characterize the intensity of the high-frequency bulk wave spurs, and the calculation formula of the admittance ratio is:
[0060] Admittance ratio = (20 × log 10 |Y1|) - (20 × log 10 |Y2|) (1)
[0061] where Y1 is the admittance of the high-frequency bulk wave spur under the resonance peak, and Y2 is the admittance of the high-frequency bulk wave spur under the anti-resonance peak. It can be understood that the smaller the admittance ratio of the high-frequency bulk wave spur, the smaller the intensity of the high-frequency bulk wave spur. We hope that the admittance ratio of the high-frequency bulk wave spur is at least not more than 25 dB.
[0062] Table 1 summarizes the surface acoustic wave resonator at different thicknesses h of the piezoelectric layer when the crystal plane of the silicon crystal of the substrate 10 is (100) LNand the admittance ratio (in dB) of high-frequency bulk wave spurs at different chamfer angles θ° (in the range of 0° - 50°). Table 2 summarizes the case when the crystal plane of the silicon crystal of the substrate 10 is (100), and the surface acoustic wave resonator has different thicknesses h of the piezoelectric layer LN and the admittance ratio (in dB) of high-frequency bulk wave spurs at different chamfer angles θ° (in the range of -40° - 0°). It should be noted that in Tables 1 and 2, "-" indicates that the main mode of the surface acoustic wave resonator is Rayleigh parasitic spurs, or the main mode is severely interfered by Rayleigh parasitic spurs, specifically as Figure 7a shown. It should also be noted that in Tables 1 and 2, at a certain thickness h of the piezoelectric layer LN and a certain chamfer angle θ° of the piezoelectric layer, two admittance ratios may appear, indicating that there are two high-frequency bulk wave spurs in this case.
[0063] Table 1 When the crystal plane of the silicon crystal of the substrate 10 is (100), the surface acoustic wave resonator has different thicknesses h of the piezoelectric layer LN and the admittance ratio (in dB) of high-frequency bulk wave spurs at different chamfer angles θ° (in the range of 0° - 50°)
[0064]
[0065] Table 2 When the crystal plane of the silicon crystal of the substrate 10 is (100), the surface acoustic wave resonator has different thicknesses h of the piezoelectric layer LN and the admittance ratio (in dB) of high-frequency bulk wave spurs at different chamfer angles θ° (in the range of -40° - 0°)
[0066]
[0067] As can be seen from Table 1, when the crystal plane of the silicon crystal of the substrate 10 is (100), and the thickness h of the piezoelectric layer 20 LN satisfies: 0.4λ ≤ h LN ≤ 0.8λ, the chamfer angle θ° of the piezoelectric layer 20 can be selected to satisfy: 20° ≤ θ° ≤ 50°, so that the admittance ratio of the high-frequency bulk wave spurs does not exceed 25 dB, and the intensity of the high-frequency bulk wave spurs is small. For example, when the thickness h of the piezoelectric layer 20 LN = 0.4λ, and the chamfer angles θ° of the piezoelectric layer 20 are 20°, 25°, 30°, 35°, 40°, 45° and 50° respectively, the admittance ratios of the high-frequency bulk wave spurs are 24.6 dB, 22.5 dB, 21.6 dB, 20.2 dB, 18 dB, 16.2 dB and 15 dB respectively; when the thickness h of the piezoelectric layer 20 LN= 0.6λ, and when the cut angles θ° of the piezoelectric layer 20 are 20°, 25°, 30°, 35°, 40°, 45° and 50° respectively, the admittance ratios of the high-frequency bulk wave spurs are 22.9 dB, 20.6 dB, 18.3 dB, 15.8 dB, 13.4 dB, 11.2 dB and 9.9 dB respectively; when the thickness h of the piezoelectric layer 20 LN = 0.8λ, and when the cut angles θ° of the piezoelectric layer 20 are 20°, 25°, 30°, 35°, 40°, 45° and 50° respectively, the admittance ratios of the high-frequency bulk wave spurs are 23.6 dB, 18.6 dB, 15.1 dB, 12.6 dB, 10.5 dB, 8.5 dB and 7.2 dB respectively.
[0068] Further preferably, when the crystal plane of the silicon crystal of the substrate 10 is (100), and the thickness h of the piezoelectric layer 20 LN satisfies: 0.4λ ≤ h LN ≤ 0.8λ, the cut angle θ° of the piezoelectric layer 20 can be selected to satisfy: 35° ≤ θ° ≤ 50°, so that the admittance ratio of the high-frequency bulk wave spur does not exceed 21 dB, and the intensity of the high-frequency bulk wave spur is smaller. For example, when the thickness h of the piezoelectric layer 20 LN = 0.4λ, and the cut angles θ° of the piezoelectric layer 20 are 35°, 40°, 45° and 50° respectively, the admittance ratios of the high-frequency bulk wave spurs are 20.2 dB, 18 dB, 16.2 dB and 15 dB respectively; when the thickness h of the piezoelectric layer 20 LN = 0.6λ, and the cut angles θ° of the piezoelectric layer 20 are 35°, 40°, 45° and 50° respectively, the admittance ratios of the high-frequency bulk wave spurs are 15.8 dB, 13.4 dB, 11.2 dB and 9.9 dB respectively; when the thickness h of the piezoelectric layer 20 LN = 0.8λ, and the cut angles θ° of the piezoelectric layer 20 are 35°, 40°, 45° and 50° respectively, the admittance ratios of the high-frequency bulk wave spurs are 12.6 dB, 10.5 dB, 8.5 dB and 7.2 dB respectively.
[0069] Another further preferably, when the crystal plane of the silicon crystal of the substrate 10 is (100), and the thickness h of the piezoelectric layer 20 LN = 0.6λ or h LN = 0.8λ, the cut angle θ° of the piezoelectric layer 20 can be selected to satisfy: 25° ≤ θ° ≤ 35°, so that the admittance ratio of the high-frequency bulk wave spur does not exceed 21 dB, and the intensity of the high-frequency bulk wave spur is smaller. For example, when the thickness h of the piezoelectric layer 20 LN = 0.6λ, and the cut angles θ° of the piezoelectric layer 20 are 25°, 30° and 35° respectively, the admittance ratios of the high-frequency bulk wave spurs are 20.6 dB, 18.3 dB and 15.8 dB respectively; when the thickness h of the piezoelectric layer 20LN = 0.8λ, and when the cut angles θ° of the piezoelectric layer 20 are 25°, 30°, and 35° respectively, the admittance ratios of the high-frequency bulk wave spurs are 18.6 dB, 15.1 dB, and 12.6 dB respectively.
[0070] As can be seen from Table 2, when the crystal plane of the silicon crystal of the substrate 10 is (100), and the thickness h of the piezoelectric layer 20 LN = 0.6λ, the cut angle θ° of the piezoelectric layer 20 can be selected to satisfy: -30° ≤ θ° ≤ -20°, so that the admittance ratio of the high-frequency bulk wave spurs does not exceed 25 dB, and the intensity of the high-frequency bulk wave spurs is small. For example, when the thickness h of the piezoelectric layer 20 LN = 0.6λ, and the cut angles θ° of the piezoelectric layer 20 are -30°, -25°, and -20° respectively, the admittance ratios of the high-frequency bulk wave spurs are 3.8 dB, 8.5 dB, and 15 dB respectively.
[0071] As can be seen from Table 1, when the crystal plane of the silicon crystal of the substrate 10 is (100), and the thickness h of the piezoelectric layer 20 LN = λ, select the cut angle θ° of the piezoelectric layer 20 to be θ° = 0° or θ° = 50°, so that the admittance ratio of the high-frequency bulk wave spurs does not exceed 25 dB, and the intensity of the high-frequency bulk wave spurs is small. Specifically, the admittance ratio of the high-frequency bulk wave spur corresponding to θ° = 0° is 18.1 dB, and the admittance ratio of the high-frequency bulk wave spur corresponding to θ° = 50° is 23.2 dB. Among them, preferably, when the crystal plane of the silicon crystal of the substrate 10 is (100), and the thickness h of the piezoelectric layer 20 LN = λ, select the cut angle θ° of the piezoelectric layer 20 to be θ° = 0°, which can make the admittance ratio of the high-frequency bulk wave spurs not exceed 21 dB, and the intensity of the high-frequency bulk wave spurs is smaller.
[0072] Similarly, Table 3 summarizes the admittance ratios (in dB) of the high-frequency bulk wave spurs of the surface acoustic wave resonator when the crystal plane of the silicon crystal of the substrate 10 is (111) at different thicknesses h of the piezoelectric layer LN and different cut angles θ° (in the range of 0° - 50°), and Table 4 summarizes the admittance ratios (in dB) of the high-frequency bulk wave spurs of the surface acoustic wave resonator when the crystal plane of the silicon crystal of the substrate 10 is (111) at different thicknesses h of the piezoelectric layer LN and different cut angles θ° (in the range of -40° - 0°). It should be noted that in Table 3 and Table 4, "-" indicates that the main mode of the surface acoustic wave resonator is Rayleigh parasitic spurs, or the main mode is severely interfered by Rayleigh parasitic spurs. It should also be noted that in Table 3 and Table 4, at a certain piezoelectric layer thickness h LN and a certain piezoelectric layer cut angle θ°, two admittance ratios may appear, indicating that there are two high-frequency bulk wave spurs in this case.
[0073] Table 3 When the crystal plane of the silicon crystal of the substrate 10 is (111), the admittance ratio (in dB) of the high-frequency bulk wave spurious of the surface acoustic wave resonator at different thicknesses h of the piezoelectric layer LN and different cut angles θ° (in the range of 0° - 50°)
[0074]
[0075] It can be seen from Table 3 that when the crystal plane of the silicon crystal of the substrate 10 is (111), and the thickness h of the piezoelectric layer 20 LN satisfies: 0.2λ ≤ h LN ≤ 0.4λ, the cut angle θ° of the piezoelectric layer 20 can be selected to satisfy: 30° ≤ θ° ≤ 50°, so that the admittance ratio of the high-frequency bulk wave spurious does not exceed 25 dB, and the intensity of the high-frequency bulk wave spurious is small. For example, when the thickness h of the piezoelectric layer 20 LN = 0.2λ, and the cut angles θ° of the piezoelectric layer 20 are 30°, 35°, 40°, 45° and 50° respectively, the admittance ratios of the high-frequency bulk wave spurious are 21.3 dB, 12.9 dB, 19.2 dB, 17.2 dB and 7.9 dB respectively; when the thickness h of the piezoelectric layer 20 LN = 0.3λ, and the cut angles θ° of the piezoelectric layer 20 are 30°, 35°, 40°, 45° and 50° respectively, the admittance ratios of the high-frequency bulk wave spurious are 14.5 dB, 11 dB, 9.2 dB, 8.3 dB and 7.2 dB respectively; when the thickness h of the piezoelectric layer 20 LN = 0.4λ, and the cut angles θ° of the piezoelectric layer 20 are 30°, 35°, 40°, 45° and 50° respectively, the admittance ratios of the high-frequency bulk wave spurious are 20 dB, 19.3 dB, 17.7 dB, 15.4 dB and 12.5 dB respectively.
[0076] Further preferably, when the crystal plane of the silicon crystal of the substrate 10 is (111), and the thickness h of the piezoelectric layer 20 LN satisfies: 0.2λ ≤ h LN ≤ 0.4λ, the cut angle θ° of the piezoelectric layer 20 can be selected to satisfy: 35° ≤ θ° ≤ 50°, so that the admittance ratio of the high-frequency bulk wave spurious does not exceed 21 dB, and the intensity of the high-frequency bulk wave spurious is even smaller. For example, when the thickness h of the piezoelectric layer 20 LN = 0.2λ, and the cut angles θ° of the piezoelectric layer 20 are 35°, 40°, 45° and 50° respectively, the admittance ratios of the high-frequency bulk wave spurious are 12.9 dB, 19.2 dB, 17.2 dB and 7.9 dB respectively; when the thickness h of the piezoelectric layer 20 LN= 0.3λ, and when the cut angles θ° of the piezoelectric layer 20 are 35°, 40°, 45° and 50° respectively, the admittance ratios of the high-frequency bulk wave spurs are 11 dB, 9.2 dB, 8.3 dB and 7.2 dB respectively; when the thickness h of the piezoelectric layer 20 LN = 0.4λ, and when the cut angles θ° of the piezoelectric layer 20 are 35°, 40°, 45° and 50° respectively, the admittance ratios of the high-frequency bulk wave spurs are 19.3 dB, 17.7 dB, 15.4 dB and 12.5 dB respectively.
[0077] As can be seen from Table 3, when the crystal plane of the silicon crystal of the substrate 10 is (111), and the thickness h of the piezoelectric layer 20 LN = 0.3λ, the cut angle θ° of the piezoelectric layer 20 can be selected to satisfy: 20° ≤ θ° ≤ 35°, so that the admittance ratio of the high-frequency bulk wave spur does not exceed 25 dB, and the intensity of the high-frequency bulk wave spur is small. For example, when the thickness h of the piezoelectric layer 20 LN = 0.3λ, and the cut angles θ° of the piezoelectric layer 20 are 20°, 25°, 30° and 35° respectively, the admittance ratios of the high-frequency bulk wave spurs are 23.7 dB, 18.9 dB, 14.5 dB and 11 dB respectively.
[0078] Further preferably, when the crystal plane of the silicon crystal of the substrate 10 is (111), and the thickness h of the piezoelectric layer 20 LN = 0.3λ, the cut angle θ° of the piezoelectric layer 20 can be selected to satisfy: 25° ≤ θ° ≤ 35°, so that the admittance ratio of the high-frequency bulk wave spur does not exceed 21 dB, and the intensity of the high-frequency bulk wave spur is smaller. For example, when the thickness h of the piezoelectric layer 20 LN = 0.3λ, and the cut angles θ° of the piezoelectric layer 20 are 25°, 30° and 35° respectively, the admittance ratios of the high-frequency bulk wave spurs are 18.9 dB, 14.5 dB and 11 dB respectively.
[0079] As can be seen from Table 3, when the crystal plane of the silicon crystal of the substrate 10 is (111), and the thickness h of the piezoelectric layer 20 LN = 0.4λ, the cut angle θ° of the piezoelectric layer 20 can be selected to satisfy: 10° ≤ θ° ≤ 30°, so that the admittance ratio of the high-frequency bulk wave spur does not exceed 25 dB, and the intensity of the high-frequency bulk wave spur is small.
[0080] Moreover, as can be seen from Table 3, when the crystal plane of the silicon crystal of the substrate 10 is (111), and the thickness h of the piezoelectric layer 20 LN = 0.4λ, the cut angle θ° of the piezoelectric layer 20 can be selected to satisfy: 10° ≤ θ° ≤ 50°, so that the admittance ratio of the high-frequency bulk wave spur does not exceed 21 dB, and the intensity of the high-frequency bulk wave spur is smaller.
[0081] As can be seen from Table 3 and Table 4, when the crystal plane of the silicon crystal of the substrate 10 is (111), and the thickness h of the piezoelectric layer 20 LN = 0.6λ, the cut angle θ° of the piezoelectric layer 20 can be selected to satisfy: -35° ≤ θ° ≤ -25°, or the cut angle θ° of the piezoelectric layer 20 is selected to be 45°, or the cut angle θ° of the piezoelectric layer 20 is selected to be 50°, so that the admittance ratio of the high-frequency bulk wave spurious is not more than 25 dB, and the intensity of the high-frequency bulk wave spurious is small. For example, when the thickness h of the piezoelectric layer 20 LN = 0.6λ, and the cut angles θ° of the piezoelectric layer 20 are -35°, -30°, -25°, 45° and 50° respectively, the admittance ratios of the high-frequency bulk wave spurious are 7 dB, 11.2 dB, 18.3 dB, 23.5 dB and 15 dB respectively. Among them, further preferably, when the cut angle θ° of the piezoelectric layer 20 satisfies: -35° ≤ θ° ≤ -25°, or the cut angle θ° of the piezoelectric layer 20 is 50°, the admittance ratio of the high-frequency bulk wave spurious is not more than 21 dB, and the intensity of the high-frequency bulk wave spurious is smaller.
[0082] Table 4 When the crystal plane of the silicon crystal of the substrate 10 is (100), the admittance ratio (unit: dB) of the high-frequency bulk wave spurious of the surface acoustic wave resonator at different thicknesses h LN of the piezoelectric layer and different cut angles θ° (in the range of -40° - 0°)
[0083]
[0084] As can be seen from Table 3, when the crystal plane of the silicon crystal of the substrate 10 is (111), and the thickness h of the piezoelectric layer 20 LN = 0.7λ, the cut angle θ° of the piezoelectric layer 20 can be selected to satisfy: 40° ≤ θ° ≤ 50°, so that the admittance ratio of the high-frequency bulk wave spurious is not more than 25 dB, and the intensity of the high-frequency bulk wave spurious is small. For example, when the thickness h of the piezoelectric layer 20 LN = 0.7λ, and the cut angles θ° of the piezoelectric layer 20 are 40°, 45° and 50° respectively, the admittance ratios of the high-frequency bulk wave spurious are 21.3 dB, 23.9 dB and 11.9 dB respectively. Among them, further preferably, when the cut angle θ° of the piezoelectric layer 20 is 50°, the admittance ratio of the high-frequency bulk wave spurious is not more than 21 dB, and the intensity of the high-frequency bulk wave spurious is smaller.
[0085] As can be seen from Table 3, when the crystal plane of the silicon crystal of the substrate 10 is (111), and the thickness h of the piezoelectric layer 20 LN = 0.8λ, the cut angle θ° of the piezoelectric layer 20 can be selected to satisfy: 20° ≤ θ° ≤ 50°, so that the admittance ratio of the high-frequency bulk wave spurious is not more than 25 dB, and the intensity of the high-frequency bulk wave spurious is small. For example, when the thickness h of the piezoelectric layer 20 LN= 0.8λ, and when the cut angles θ° of the piezoelectric layer 20 are 20°, 25°, 30°, 35°, 40°, 45° and 50° respectively, the admittance ratios of the high-frequency bulk wave spurs are 9.5 dB, 13.8 dB, 17.8 dB, 21 dB, 24.5 dB, 24.7 dB and 11.9 dB respectively.
[0086] Further preferably, when the crystal plane of the silicon crystal of the substrate 10 is (111), and the thickness h of the piezoelectric layer 20 LN = 0.8λ, the cut angle θ° of the piezoelectric layer 20 can be selected to satisfy: 20° ≤ θ° ≤ 35°, so that the admittance ratio of the high-frequency bulk wave spurs does not exceed 21 dB, and the intensity of the high-frequency bulk wave spurs is smaller. For example, when the thickness h of the piezoelectric layer 20 LN = 0.8λ, and the cut angles θ° of the piezoelectric layer 20 are 20°, 25°, 30° and 35° respectively, the admittance ratios of the high-frequency bulk wave spurs are 9.5 dB, 13.8 dB, 17.8 dB and 21 dB respectively.
[0087] In addition, Table 5 summarizes the admittance ratios (in dB) of the high-frequency bulk wave spurs of the surface acoustic wave resonator when the crystal plane of the silicon crystal of the substrate 10 is (110) at different thicknesses h of the piezoelectric layer 20 LN and different cut angles θ° (in the range of -40° to 50°), where "-" indicates that the main mode of the surface acoustic wave resonator is Rayleigh parasitic spurs, or the main mode is severely interfered by Rayleigh parasitic spurs. It can be seen from Table 5 that when the crystal plane of the silicon crystal of the substrate 10 is (110), and the thickness h of the piezoelectric layer 20 LN is from 0.3λ to λ, the admittance ratios of the high-frequency bulk wave spurs are relatively large, greater than 25 dB, and it is impossible to suppress the high-frequency bulk wave spurs by optimizing the cut angle θ° of the piezoelectric layer 20, which further proves that the combination of the crystal plane of the silicon crystal of the above-mentioned substrate 10, the thickness h of the piezoelectric layer LN and the cut angle θ° can weaken or suppress the high-frequency bulk wave spurs.
[0088] Table 5 Admittance ratios (in dB) of the high-frequency bulk wave spurs of the surface acoustic wave resonator at different thicknesses h of the piezoelectric layer LN and different cut angles θ° (in the range of -40° to 50°) when the crystal plane of the silicon crystal of the substrate 10 is (110)
[0089]
[0090] In summary, in the present application, by optimizing the thickness h of the piezoelectric layer 20 under different crystal planes (i.e., the crystal plane is (100) or (111)) of the silicon substrate (i.e., the substrate 10 of the silicon crystal) LN and the cut angle θ°, the specific combination of the crystal plane of the silicon crystal of the substrate 10, the thickness h of the piezoelectric layer LN and the cut angle θ° is as follows:
[0091] When the crystal plane of the silicon crystal of the substrate 10 is (100), and the thickness h of the piezoelectric layer LN satisfies: 0.4λ ≤ h LN ≤ 0.8λ, θ° satisfies: 20° ≤ θ° ≤ 50°;
[0092] Or, when the crystal plane of the silicon crystal of the substrate 10 is (100), and the thickness h of the piezoelectric layer LN = 0.6λ, the cut angle θ° of the piezoelectric layer satisfies: -30° ≤ θ° ≤ -20°;
[0093] Or, when the crystal plane of the silicon crystal of the substrate 10 is (100), and the thickness h of the piezoelectric layer LN = λ, the cut angle θ° of the piezoelectric layer is θ° = 0° or θ° = 50°;
[0094] Or, when the crystal plane of the silicon crystal of the substrate 10 is (111), and the thickness h of the piezoelectric layer LN satisfies: 0.2λ ≤ h LN ≤ 0.4λ, the cut angle θ° of the piezoelectric layer satisfies: 30° ≤ θ° ≤ 50°;
[0095] Or, when the crystal plane of the silicon crystal of the substrate 10 is (111), and the thickness h of the piezoelectric layer LN = 0.3λ, the cut angle θ° of the piezoelectric layer satisfies: 20° ≤ θ° ≤ 35°;
[0096] Or, when the crystal plane of the silicon crystal of the substrate 10 is (111), and the thickness h of the piezoelectric layer LN = 0.4λ, the cut angle θ° of the piezoelectric layer satisfies: 10° ≤ θ° ≤ 30°;
[0097] Or, when the crystal plane of the silicon crystal of the substrate 10 is (111), and the thickness h of the piezoelectric layer LN = 0.6λ, the cut angle θ° of the piezoelectric layer satisfies: -35° ≤ θ° ≤ -25°, or θ° = 45°, or θ° = 50°;
[0098] Or, when the crystal plane of the silicon crystal of the substrate 10 is (111), and the thickness h of the piezoelectric layer LN = 0.7λ, the cut angle θ° of the piezoelectric layer satisfies: 40° ≤ θ° ≤ 50°;
[0099] Or, when the crystal plane of the silicon crystal of the substrate 10 is (111), and the thickness h of the piezoelectric layer LN = 0.8λ, the cut angle θ° of the piezoelectric layer satisfies: 20° ≤ θ° ≤ 50°;
[0100] After simulation verification, on the crystal plane of the silicon crystal of the substrate 10 and the thickness h of the piezoelectric layer LNIn the above combination of the chamfer angle θ°, high-frequency bulk wave spurs can be weakened or suppressed, energy dissipation can be reduced, the Q value and electromechanical coupling coefficient of the device can be increased, and the admittance ratio of high-frequency bulk wave spurs of the surface acoustic wave resonator can be made not to exceed 25 dB, and the electromechanical coupling coefficient k 2 exceeds 15%.
[0101] Based on any of the above embodiments, optionally, in some embodiments of the present application, as Figure 1 shown, the surface acoustic wave resonator provided by the embodiment of the present application may further include: a silicon dioxide stack 40 located between the substrate 10 and the piezoelectric layer 20. The silicon dioxide stack 40 includes a first silicon dioxide layer 41 and a second silicon dioxide layer 42. The second silicon dioxide layer 42 is closer to the piezoelectric layer 20 than the first silicon dioxide layer 41, and the density of the second silicon dioxide layer 42 is less than the density of the first silicon dioxide layer 41.
[0102] It can be understood that the silicon dioxide stack 40 located between the substrate 10 and the piezoelectric layer 20 has the function of temperature compensation. The temperature coefficient of the material lithium niobate LiNbO3 of the piezoelectric layer 20 is positive and relatively large, resulting in a significant change in the resonance frequency with temperature. The temperature coefficient of silicon dioxide is usually negative, that is, the frequency temperature coefficient of the silicon dioxide stack 40 is opposite to the polarity of the frequency temperature coefficient of the piezoelectric layer 20, and can form a complement with the positive temperature coefficient of the piezoelectric layer 20, so as to offset the frequency drift caused by temperature changes and improve the temperature stability of the resonator.
[0103] It can also be understood that the silicon dioxide stack 40 located between the substrate 10 and the piezoelectric layer 20 has the function of electrical isolation. The excellent insulation characteristics of the silicon dioxide stack 40 can effectively isolate the piezoelectric layer 20 and the substrate 10, avoid parasitic capacitance or leakage current between the piezoelectric layer 20 and the substrate 10, and ensure excellent electrical and acoustic properties.
[0104] It can also be understood that the sound velocity of the silicon dioxide stack 40 is less than that of the piezoelectric layer 30. Thus, when the acoustic wave propagates from the piezoelectric layer 20 to the silicon dioxide stack 40, the difference in sound velocity can cause the energy to be reflected back to the piezoelectric layer 50, thereby reducing the leakage of acoustic wave energy to the substrate 10, and further increasing the Q value of the resonator and reducing the insertion loss, etc.
[0105] It can further be understood that the silicon dioxide stack 40 located between the substrate 10 and the piezoelectric layer 20 has the function of mechanical stress buffering. The difference in the thermal expansion coefficients between the substrate 10 (silicon substrate) and the piezoelectric layer 20 is relatively large, and interface stress may be generated during temperature changes, resulting in device cracking or delamination. The thermal expansion coefficient of silicon dioxide is between that of silicon and piezoelectric materials. Therefore, the silicon dioxide stack 40 can also serve as a buffer layer to reduce thermal stress.
[0106] Moreover, the density of the second silicon dioxide layer 42 closer to the piezoelectric layer 20 in the silicon dioxide stack 40 is set to be less than the density of the first silicon dioxide layer 41 closer to the substrate 10, that is, the densities of the second silicon dioxide layer 42 and the first silicon dioxide layer 41 in the silicon dioxide stack 40 are different, forming a sound velocity gradient, which can better confine the energy in the piezoelectric layer 20 and improve the Q value of the resonator.
[0107] Since the silicon dioxide stack 40 is located between the substrate 10 and the piezoelectric layer 20, referring to Figure 2 and Figures 3a - 3c it can be known that the thickness of the silicon dioxide stack 40 will also determine the waveguide width of the acoustic wave propagation and affect the energy distribution of the high-frequency bulk wave spurious. Therefore, optionally, in some embodiments of the present application, the thickness of the silicon dioxide stack 40 is set to 0.1λ, where the proportion of the thickness of the first silicon dioxide layer 41 in the thickness of the silicon dioxide stack 40 is 0.25, which can weaken or suppress the high-frequency bulk wave spurious, reduce the energy dissipation, and improve the Q value and the electromechanical coupling coefficient of the device.
[0108] In addition, in the embodiments of the present application, the electrode material of the interdigital transducer 30 can be copper, and the thickness of the interdigital transducer 30 can be 5.6%λ.
[0109] Correspondingly, the embodiments of the present application further provide a filter, including the surface acoustic wave resonator provided in any of the above embodiments.
[0110] Furthermore, the embodiments of the present application further provide an electronic device, including the above filter.
[0111] Since the surface acoustic wave resonator has been described in detail in the foregoing embodiments, it will not be elaborated herein.
[0112] In this specification, each part is described in a combined manner of parallel and progressive. The key point of each part is to describe the differences from other parts. For the same or similar parts between each part, reference can be made to each other.
[0113] Regarding the above description of the disclosed embodiments, the features recorded in each embodiment in this specification can be replaced or combined with each other, so that those skilled in the art can implement or use the present application. Various modifications to these embodiments will be obvious to those skilled in the art. The general principles defined herein can be implemented in other embodiments without departing from the spirit or scope of the present application. Therefore, the present application will not be limited to the embodiments shown herein, but will conform to the widest scope consistent with the principles and novel features disclosed herein.
Claims
1. A surface acoustic wave resonator, characterized in that, Comprising: A substrate, the substrate being a silicon crystal, the crystal plane of the silicon crystal being (100) or (111); when the crystal plane of the silicon crystal is (100), the Euler angles corresponding to the silicon crystal are (0°, 0°, γ°); when the crystal plane of the silicon crystal is (111), the Euler angles corresponding to the silicon crystal are (135°, 54.74°, γ°); wherein γ is configured such that the direction of the positioning edge of the wafer to which the silicon crystal belongs is parallel to the propagation direction of the acoustic wave in the surface acoustic wave resonator; A piezoelectric layer located on one side of the substrate, the piezoelectric layer being a lithium niobate layer cut by θ°Y-X, and the thickness of the piezoelectric layer being h LN ; And an interdigital transducer located on the side of the piezoelectric layer away from the substrate; Wherein, when the crystal plane of the silicon crystal is (100), and h LN satisfies: 0.4λ ≤ h LN ≤ 0.8λ, θ° satisfies: 20° ≤ θ° ≤ 50°; Alternatively, when the crystal plane of the silicon crystal is (100) and h LN = 0.6λ, θ° satisfies: -30° ≤ θ° ≤ -20°; Alternatively, when the crystal plane of the silicon crystal is (100) and h LN = λ, θ° = 0° or θ° = 50°; Alternatively, when the crystal plane of the silicon crystal is (111), and h LN satisfies: 0.2λ ≤ h LN ≤ 0.4λ, θ° satisfies: 30° ≤ θ° ≤ 50°; Alternatively, when the crystal plane of the silicon crystal is (111) and h LN = 0.3λ, θ° satisfies: 20° ≤ θ° ≤ 35°; Alternatively, when the crystal plane of the silicon crystal is (111) and h LN = 0.4λ, θ° satisfies: 10° ≤ θ° ≤ 30°; Alternatively, when the crystal plane of the silicon crystal is (111) and h LN = 0.6λ, θ° satisfies: -35° ≤ θ° ≤ -25°, or θ° = 45°, or θ° = 50°; Alternatively, when the crystal plane of the silicon crystal is (111) and h LN = 0.7λ, θ° satisfies: 40° ≤ θ° ≤ 50°; Alternatively, when the crystal plane of the silicon crystal is (111) and h LN = 0.8λ, θ° satisfies: 20° ≤ θ° ≤ 50°; λ is the wavelength of the acoustic wave propagating in the surface acoustic wave resonator.
2. The surface acoustic wave resonator according to claim 1, wherein, When the crystal plane of the silicon crystal is (100) and h LN satisfies: 0.4λ ≤ h LN ≤ 0.8λ, θ° satisfies: 35° ≤ θ° ≤ 50°.
3. The surface acoustic wave resonator according to claim 1, wherein The crystal plane of the silicon crystal is (100), and when h LN = 0.6λ or h LN = 0.8λ, θ° satisfies: 25° ≤ θ° ≤ 35°.
4. The surface acoustic wave resonator according to claim 1, characterized in that, When the crystal plane of the silicon crystal is (111), and h LN satisfies: 0.2λ ≤ h LN ≤ 0.4λ, then θ° satisfies: 35° ≤ θ° ≤ 50°.
5. The surface acoustic wave resonator according to claim 1, characterized in that, When the crystal plane of the silicon crystal is (111) and h LN = 0.3λ, θ° satisfies: 25° ≤ θ° ≤ 35°.
6. The surface acoustic wave resonator according to claim 1, wherein The crystal plane of the silicon crystal is (111), and when h LN = 0.8λ, θ° satisfies: 20° ≤ θ° ≤ 35°.
7. The surface acoustic wave resonator according to any one of claims 1-6, characterized in that The surface acoustic wave resonator further comprises: A silicon dioxide stack located between the substrate and the piezoelectric layer, the silicon dioxide stack comprising a first silicon dioxide layer and a second silicon dioxide layer, the second silicon dioxide layer being closer to the piezoelectric layer than the first silicon dioxide layer, and the density of the second silicon dioxide layer being less than the density of the first silicon dioxide layer.
8. The surface acoustic wave resonator according to claim 7, characterized in that, The thickness of the silicon dioxide stack is 0.1λ, and the proportion of the thickness of the first silicon dioxide layer in the thickness of the silicon dioxide stack is 0.
25.
9. A filter, characterized in that, Comprising the surface acoustic wave resonator according to any one of claims 1-8.
10. An electronic device, characterized in that, Comprising the filter according to claim 9.