Back contact solar cell and laminated cell

Abstract

The invention relates to a back contact solar cell and a laminated cell, and relates to the field of photovoltaic technology. A back contact solar cell includes a substrate, a plurality of first doped conductive regions, and a plurality of second doped conductive regions. The substrate is provided with a first surface, and the first doped conductive regions are P-type doped and are arranged on the first surface at intervals; the second doped conductive regions are N-type doped and are arranged on the first surface at intervals, the second doped conductive regions and the first doped conductive regions are alternately distributed, and a spacer region is arranged between one first doped conductive region and one second doped conductive region which are adjacently distributed; the width of the first doped conductive region is smaller than or equal to that of the second doped conductive region, and the width of the spacer region is larger than or equal to that of the second doped conductive region. The open-circuit voltage of the cell can be improved, and the operation efficiency of the back contact solar cell is improved.

Description

Technical Field

[0001] The present application relates to the field of photovoltaic technology, and particularly to a back-contact solar cell and a tandem cell. Background Art

[0002] The biggest difference between a back-contact cell and other crystalline silicon cell routes is that: the emitter, surface field, and metal electrodes are all made on the back of the cell and are distributed in a cross-finger pattern, and there are no grid lines blocking on the front surface of the cell, maximizing the utilization of incident light, reducing optical losses, bringing more effective power generation area, having high conversion efficiency, and being more aesthetically pleasing in appearance. However, in related technologies, there is a problem of relatively small open-circuit voltage of the back-contact cell. Summary of the Invention

[0003] Based on this, in view of the problem of relatively small open-circuit voltage of the back-contact solar cell, it is necessary to provide a back-contact solar cell and a tandem cell.

[0004] To achieve the above object, the technical solution adopted in the present application is as follows:

[0005] In a first aspect, an embodiment of the present application provides a back-contact solar cell, including:

[0006] A substrate having a first surface;

[0007] A plurality of first doped conductive regions, each of the first doped conductive regions being P-type doped and spaced apart on the first surface;

[0008] A plurality of second doped conductive regions, each of the second doped conductive regions being N-type doped and spaced apart on the first surface, and being alternately distributed with each of the first doped conductive regions, and there is a spacer region between an adjacent first doped conductive region and an adjacent second doped conductive region;

[0009] The width of the first doped conductive region is less than or equal to the width of the second doped conductive region, and the width of the spacer region is greater than or equal to the width of the second doped conductive region.

[0010] In one embodiment of the first aspect, the substrate is a single-crystal silicon wafer with a resistivity of 10 Ω·cm - 50 Ω·cm and / or an oxygen content of less than 8 ppma.

[0011] In one embodiment of the first aspect, the width of the first doped conductive region is 100 μm - 200 μm.

[0012] In one embodiment of the first aspect, the width of the second doped conductive region is 100 μm - 300 μm.

[0013] In one embodiment of the first aspect, the width of the spacer is 100 um - 600 um.

[0014] In one embodiment of the first aspect, the substrate further has a second surface, which is disposed opposite to the first surface, and the second surface forms a plurality of pyramid structures;

[0015] The back-contact solar cell further includes a first passivation layer, and the first passivation layer is disposed on the second surface.

[0016] In one embodiment of the first aspect, the back-contact solar cell further includes a second passivation layer, and the second passivation layer is disposed on a side of the first passivation layer away from the substrate.

[0017] In one embodiment of the first aspect, the back-contact solar cell includes grid lines electrically connected to the first doped conductive region and the second doped conductive region, and the width of the grid lines is 20 um - 40 um.

[0018] In one embodiment of the first aspect, the doping concentration of the first doped conductive region is 10 19 cm -3 -10 20 cm -3 , and the doping concentration of the second doped conductive region is 10 19 cm -3 -6*10 20 cm -3 .

[0019] In a second aspect, an embodiment of the present application further provides a tandem cell, including the back-contact solar cell described in any of the above embodiments and a perovskite cell, and the back-contact solar cell and the perovskite cell are stacked.

[0020] In a third aspect, an embodiment of the present application further provides a method for manufacturing a back-contact solar cell, which is used to manufacture the back-contact solar cell described in any of the above embodiments, and the manufacturing method includes:

[0021] Polishing the substrate;

[0022] Doping is simultaneously performed on the first surface and the second surface of the substrate to form a first doped region;

[0023] The first doped region is patterned to form a plurality of grooves at intervals on the first surface of the substrate and expose a part of the first surface to the grooves;

[0024] Doping is performed along the side of the first doped region and the part of the first surface exposed to the grooves to form a second doped region;

[0025] Pattern the second doped region located at the groove so that a spacer region is formed between the second doped region on the first surface and the first doped region;

[0026] Remove the first doped region and the second doped region on the surface of the substrate to expose the second surface of the substrate, and retain the first doped polysilicon layer and the second doped polysilicon layer on the first surface to form the first doped conductive region and the second doped conductive region;

[0027] Perform a texturing treatment on the second surface, and sequentially deposit a first passivation layer and a second passivation layer;

[0028] Print grid lines on the first doped conductive region and the second doped conductive region to obtain the back-contact solar cell.

[0029] Compared with the related art, the beneficial effects of the present application are: a back-contact solar cell and a stacked cell, the back-contact solar cell includes a substrate and a first doped conductive region and a second doped conductive region disposed on the first surface of the substrate, and it is defined that the width of the first doped conductive region is less than or equal to the width of the second doped conductive region. In this way, by reducing the area ratio of the first doped conductive region, the open-circuit voltage of the battery is increased, and the operating efficiency of the back-contact solar cell is improved. At the same time, the width of the spacer region is greater than or equal to the width of the second doped conductive region, and the overall area ratio of the first doped conductive region and the second doped conductive region on the first surface is reduced, and the doped polysilicon absorbs less light, further improving the short-circuit current of the battery. BRIEF DESCRIPTION OF THE DRAWINGS

[0030] In order to more clearly illustrate the technical solutions in the embodiments of the present application or the prior art, the following will briefly introduce the drawings required for the description of the embodiments or the prior art. Obviously, the following drawings are only some embodiments of the present application. For those of ordinary skill in the art, other drawings can be obtained according to these drawings without creative efforts.

[0031] Figure 1 It is a schematic structural diagram of a back-contact solar cell in some embodiments of the present application;

[0032] Figure 2 It is a flowchart of a preparation method of a back-contact solar cell in some embodiments of the present application;

[0033] Figure 3 It is a schematic structural diagram of a substrate in some embodiments of the present application;

[0034] Figure 4 It is a schematic structural diagram of a first doped region in some embodiments of the present application;

[0035] Figure 5 Schematic diagram of the structure of the groove in some embodiments of the present application;

[0036] Figure 6 Schematic diagram of the structure of the second doped region in some embodiments of the present application;

[0037] Figure 7 Schematic diagram of the structure of the spacer region in some embodiments of the present application;

[0038] Figure 8 Schematic diagram of the structure of the front pyramid of the substrate in some embodiments of the present application;

[0039] Figure 9 Schematic diagram of the connection mode at both ends of the stacked battery in some embodiments of the present application;

[0040] Figure 10 Schematic diagram of the four-terminal connection mode of the stacked battery in some embodiments of the present application;

[0041] Figure 11 Schematic diagram of the three-terminal connection mode of the stacked battery in some embodiments of the present application.

[0042] Explanation of reference numerals:

[0043] 100, back-contact solar cell; 110, substrate; 120, first doped conductive region; 130, second doped conductive region; 140, spacer region; 150, first passivation layer; 160, second passivation layer;

[0044] 200, first doped region; 210, first doped polysilicon layer; 220, borosilicate glass layer; 230, groove;

[0045] 300, second doped region; 310, second doped polysilicon layer; 320, phosphosilicate glass layer. Detailed implementation manners

[0046] To make the above objects, features, and advantages of the present application more obvious and understandable, the following will describe the detailed implementation manners of the present application with reference to the accompanying drawings. Many specific details are set forth in the following description in order to fully understand the present application. However, the present application can be implemented in many other ways different from those described herein, and those skilled in the art can make similar improvements without departing from the connotation of the present application. Therefore, the present application is not limited by the specific embodiments disclosed below.

[0047] In the description of the present application, it should be understood that if there are terms such as "center", "longitudinal", "lateral", "length", "width", "thickness", "upper", "lower", "front", "rear", "left", "right", "vertical", "horizontal", "top", "bottom", "inner", "outer", "clockwise", "counterclockwise", "axial", "radial", "circumferential", etc., the orientation or positional relationship indicated by these terms is based on the orientation or positional relationship shown in the drawings. These are only for the convenience of describing the present application and simplifying the description, rather than indicating or implying that the device or element referred to must have a specific orientation, be constructed and operated in a specific orientation, and thus should not be construed as a limitation to the present application.

[0048] In addition, if there is a term "and / or", "and / or" is merely an associative relationship describing associated objects, indicating that three relationships can exist. For example, A and / or B can represent: A exists alone, A and B exist simultaneously, and B exists alone. Additionally, the character " / " in this text generally represents an "or" relationship between the associated objects before and after. If there are terms such as "first" and "second", these terms are only used for descriptive purposes and should not be construed as indicating or implying relative importance or implicitly specifying the quantity of the indicated technical features. Thus, features defined with "first" and "second" may explicitly or implicitly include at least one such feature. In the description of the present application, if there is a term "plurality", the meaning of "plurality" is at least two, such as two, three, etc., unless otherwise clearly and specifically defined.

[0049] In the present application, unless otherwise clearly specified and limited, if there are terms such as "installation", "connection", "attachment", "fixation", etc., these terms should be understood in a broad sense. For example, it can be a fixed connection, a detachable connection, or integrated; it can be a mechanical connection or an electrical connection; it can be directly connected or indirectly connected through an intermediate medium, and it can be the communication inside two elements or the interaction relationship between two elements, unless otherwise clearly limited. For those of ordinary skill in the art, the specific meanings of the above terms in the present application can be understood according to specific circumstances.

[0050] In the present application, unless otherwise clearly specified and limited, if there is a description such as a first feature being "on" or "under" a second feature, etc., its meaning can be that the first and second features are in direct contact, or the first and second features are in indirect contact through an intermediate medium. Moreover, the first feature being "above", "over", and "on top of" the second feature can mean that the first feature is directly above or obliquely above the second feature, or simply indicates that the first feature has a higher horizontal height than the second feature. The first feature being "under", "beneath", and "underneath" the second feature can be that the first feature is directly below or obliquely below the second feature, or simply indicates that the first feature has a lower horizontal height than the second feature.

[0051] It should be noted that if an element is referred to as "fixed to" or "disposed on" another element, it can be directly on the other element or there may also be an intermediate element. If an element is considered to be "connected to" another element, it can be directly connected to the other element or there may be an intermediate element at the same time. If present, the terms "vertical", "horizontal", "upper", "lower", "left", "right" and similar expressions used in this application are only for illustrative purposes and do not represent the only implementation.

[0052] The emitter, surface field and metal electrodes of the back-contact battery are all made on the back of the battery and are distributed in a finger-crossing manner. There is no grid line blocking on the front surface of the battery, maximizing the use of incident light, reducing optical losses, bringing more effective power generation area, having high conversion efficiency, and being more beautiful in appearance.

[0053] In the related art, the P-type doping region of the back-contact battery is inversely proportional to the open-circuit voltage of the battery. When the proportion of the P-type doping region is relatively large, the recombination current increases, resulting in a decrease in the open-circuit voltage, thereby affecting the conversion efficiency and output power of the battery.

[0054] Refer to Figure 1 As shown, to improve the above problems, an embodiment of the present application provides a back-contact solar cell 100 to increase the open-circuit voltage of the battery and improve the conversion efficiency and output power of the battery.

[0055] Specifically, the back-contact solar cell 100 includes a substrate 110, a plurality of first doped conductive regions 120 and a plurality of second doped conductive regions 130.

[0056] Among them, the substrate 110 is a silicon substrate, and the substrate 110 can be N-type or P-type doped silicon. When the substrate 110 is P-type doped silicon, it can be formed by doping at least one element such as boron, aluminum, gallium, etc. in the silicon substrate. When the substrate 110 is N-type doped silicon, it can be formed by doping at least one element such as phosphorus, arsenic, antimony, bismuth, etc. in the silicon substrate.

[0057] The substrate 110 has a first surface and a second surface that are oppositely arranged. It can be understood that in the embodiment of the present application, the first surface of the substrate 110 is the bottom for generating the doped conductive region. Correspondingly, the second surface is the top surface of the substrate 110 exposed to the environment and collects the energy of sunlight.

[0058] Exemplarily, the first doped conductive regions 120 are arranged at intervals on the first surface of the substrate 110, and the first doped conductive regions 120 are P-type doped. The first doped conductive region 120 is a P-type semiconductor formed by doping a trivalent element in a silicon substrate. In this specific embodiment, the doped trivalent element can be boron, and of course, in other embodiments, doping elements such as aluminum and gallium can also be used, and specific limitations are not made here.

[0059] Further, in the embodiment of the present application, the first doped conductive region 120 is a heavily doped P+-type semiconductor, and the doping concentration is 10 19 cm -3 -10 20 cm -3 . In this way, the carrier concentration of the first doped conductive region 120 is greatly increased, and heavy doping can provide a large number of holes. The first doped conductive region 120 serves as a hole collection layer, and the resistivity is significantly reduced, forming an ohmic contact with the back metal electrode and reducing the contact resistance.

[0060] Exemplarily, each second doped conductive region 130 is also arranged at intervals on the first surface of the substrate 110, and is alternately distributed with each first doped conductive region 120, and a spacer region 140 is provided between an adjacent first doped conductive region 120 and a second doped conductive region 130.

[0061] The second doped conductive region 130 is N-type doped, and the second doped conductive region 130 is an N-type semiconductor formed by doping a silicon substrate with a pentavalent element. In this specific embodiment, the doped pentavalent element can be phosphorus. Of course, in other embodiments, doping elements such as arsenic and antimony can also be used, and specific limitations are not required here.

[0062] Further, in the embodiment of the present application, the second doped conductive region 130 is a heavily doped N+-type semiconductor, and the doping concentration is 10 19 cm -3 -6*10 20 cm -3 . In this way, the carrier concentration of the second doped conductive region 130 is greatly increased, and heavy doping can provide a large number of free electrons. The second doped conductive region 130 serves as an electron collection layer, and the resistivity is significantly reduced, forming an ohmic contact with the back metal electrode and reducing the contact resistance.

[0063] Meanwhile, in the back-contact solar cell 100, the second doped conductive regions 130 and the first doped conductive regions 120 are alternately arranged in a finger-like manner to achieve efficient separation and collection of carriers. After the photo-generated carriers are generated in the substrate 110, the holes are collected by the first doped conductive regions 120, and the electrons are collected by the second doped conductive regions 130, and then the current is led out through the electrodes.

[0064] Furthermore, in the embodiment of the present application, the width of the first doped conductive region 120 is less than or equal to the width of the second doped conductive region 130.

[0065] It can be understood that when the size of the substrate 110 is fixed, since the width of the first doped conductive region 120 is smaller than that of the second doped conductive region 130, the area ratio of the first doped conductive region 120 on the first surface decreases. Thus, as the area ratio of the P+ region decreases, the recombination current of the battery decreases, the open-circuit voltage increases, and the conversion efficiency and output power of the battery are improved.

[0066] Furthermore, in the embodiments of the present application, the width of the spacer region 140 is greater than or equal to the width of the second doped conductive region 130.

[0067] It can be understood that when the size of the substrate 110 is fixed, since the width of the spacer region 140 is the largest, the overall area ratio of the first doped conductive region 120 and the second doped conductive region 130 on the first surface decreases. Thus, the doped polysilicon absorbs less light, the short-circuit current of the battery increases, and the bifaciality of the back-contact solar cell is greatly improved.

[0068] In some embodiments, the substrate 110 is a single-crystalline silicon wafer with a high resistivity, which has advantages such as a low carrier concentration, a high breakdown voltage, and a long minority carrier lifetime, and is suitable for scenarios with high requirements for voltage tolerance, high-frequency characteristics, or optoelectronic device efficiency.

[0069] In one embodiment, the resistivity of the substrate 110 is 10 Ω·cm - 50 Ω·cm. Thus, the substrate 110 has fewer defect states, a long carrier transport distance, and is more likely to collect current.

[0070] Exemplarily, the resistivity of the substrate 110 can be 10 Ω·cm, 13 Ω·cm, 18 Ω·cm, 20 Ω·cm, 25 Ω·cm, 30 Ω·cm, 34 Ω·cm, 37 Ω·cm, 40 Ω·cm, 42 Ω·cm, 49 Ω·cm, 50 Ω·cm, etc., and can be reasonably selected according to actual needs, and no specific limitation is made here.

[0071] In one embodiment, the oxygen content of the substrate 110 is less than 8 ppma, so as to reduce boron-oxygen complexes, inhibit thermal donors, improve minority carrier lifetime and high-temperature stability, and significantly improve the performance and reliability of the back-contact solar cell 100.

[0072] Exemplarily, the oxygen content of the substrate 110 can be 1 ppma, 1.5 ppma, 2 ppma, 2.5 ppma, 3 ppma, 3.5 ppma, 4 ppma, 4.5 ppma, 5 ppma, 5.5 ppma, 6 ppma, 6.5 ppma, 7 ppma, 7.5 ppma, 8 ppma, etc., and can be reasonably selected according to actual needs, and no specific limitation is made here.

[0073] In some embodiments, the width of the first doped conductive region 120 is 100 um - 200 um.

[0074] Exemplarily, the width of the first doped conductive region 120 is 100 um, 110 um, 120 um, 130 um, 140 um, 150 um, 160 um, 170 um, 180 um, 190 um, 200 um, etc. Specifically, it can be reasonably selected according to actual needs and is not specifically limited herein. Thus, by limiting the width of the first doped conductive region 120 within a smaller width range, the area ratio of the first doped conductive region 120 on the first surface is reduced, the open-circuit voltage of the battery is increased, and thus the conversion efficiency of the battery is improved.

[0075] In some embodiments, the width of the second doped conductive region 130 is 100 um - 300 um.

[0076] Exemplarily, the width of the first doped conductive region 120 is 100 um, 130 um, 150 um, 170 um, 190 um, 200 um, 220 um, 240 um, 260 um, 280 um, 300 um, etc. Specifically, it can be reasonably selected according to actual needs and is not specifically limited herein. Thus, by limiting the width of the second doped conductive region 130, the width of the first doped conductive region 120 is further restricted, and the area ratio of the first doped conductive region 120 on the first surface is reduced. At the same time, the overall ratio of the second doped conductive region 130 and the first doped conductive region 120 is small, the absorption of doped polysilicon is less, the short-circuit current of the battery is increased, and the bifaciality can reach 90%.

[0077] In some embodiments, the width of the spacer region 140 is 100 um - 600 um.

[0078] Exemplarily, the width of the spacer region 140 is 100 um, 150 um, 200 um, 250 um, 300 um, 350 um, 400 um, 450 um, 500 um, 550 um, 600 um, etc. Specifically, it can be reasonably selected according to actual needs and is not specifically limited herein. Thus, within a minimum electrode unit, the sum of the widths of the first doped conductive region 120, the second doped conductive region 130, and the spacer region 140 is small, the lateral transport distance of carriers is shortened, the fill factor of the battery is increased, and the open-circuit voltage of the battery is further increased.

[0079] In a set of control experiments, the width of the first doped conductive region in Comparative Example 1 is set to 200 um, the width of the second doped conductive region is 100 um, and the width of the spacer region is 100 um. The ratio of the three is 2:1:1. The width of the first doped conductive region in Example 1 is 100 um, the width of the second doped conductive region is 100 um, and the width of the spacer region is 200 um. The ratio of the three is 1:1:2. The width of the first doped conductive region in Example 2 is 100 um, the width of the second doped conductive region is 100 um, and the width of the spacer region is 100 um. The ratio of the three is 1:1:1. The width of the first doped conductive region in Example 3 is 100 um, the width of the second doped conductive region is 100 um, and the width of the spacer region is 600 um. The ratio of the three is 1:1:6. The width of the first doped conductive region in Example 4 is 100 um, the width of the second doped conductive region is 200 um, and the width of the spacer region is 300 um. The ratio of the three is 1:2:3. Among them, the first doped conductive region is a P+ doped conductive region, and the second doped conductive region is an N+ doped conductive region.

[0080] Under the condition that other conditions are the same, the Voc (open-circuit voltage), Isc (short-circuit current), FF (fill factor), and EFF (conversion efficiency) of each example are obtained respectively, as shown in Table 1 specifically.

[0081] Table 1

[0082]

[0083] It can be seen from Table 1 that taking the parameters of Comparative Example 1 as the reference value 1, in Examples 1 to 4, the proportion of the spacer region is relatively large, resulting in a relatively small proportion of the first doped conductive region and the second doped conductive region. Each parameter has been improved to a certain extent, and the open-circuit voltage, short-circuit current, and conversion efficiency of each example have been effectively improved, and the fill factor has no obvious decrease or increase, meeting the requirements of this application for improving the battery conversion efficiency and output power.

[0084] In some embodiments, the substrate 110 further has a second surface, which is located opposite to the first surface, and the second surface forms a plurality of pyramid structures. The back-contact solar cell 100 further includes a first passivation layer 150, and the first passivation layer 150 is disposed on the second surface.

[0085] Specifically, the pyramids are connected in sequence to form a wavy textured surface structure, which can reduce light reflection and increase the optical path length, thereby maximizing the generation of photo-generated carriers and improving the sunlight absorption efficiency of the surface of the substrate 110.

[0086] The first passivation layer 150 can be used to reduce the surface recombination rate of the back-contact solar cell 100, which is formed by depositing a passivation material on the second surface of the substrate 110. The passivation material should have both chemical passivation, field-effect passivation, and process compatibility. There are a large number of dangling bonds on the silicon-based surface, which become carrier recombination centers. The first passivation layer 150 neutralizes these defects through chemical or field-effect passivation, reducing the surface recombination rate.

[0087] Exemplarily, the first passivation layer 150 can be made of materials such as hydrogenated silicon nitride, aluminum oxide, silicon dioxide, etc., and can be reasonably selected according to actual needs, and no specific limitation is made here.

[0088] In some embodiments, the back-contact solar cell 100 further includes a second passivation layer 160, and the second passivation layer 160 is disposed on a side of the first passivation layer 150 away from the substrate 110.

[0089] Specifically, the second passivation layer 160 is used to reduce the light reflection of the back-contact solar cell 100. It also adopts a deposition process to deposit a passivation material on the surface of the first passivation layer 150. The refractive index of the second passivation layer 160 can be adjusted to form an antireflection coating with the silicon substrate 110, reducing the front reflectivity.

[0090] Exemplarily, the second passivation layer 160 can also be made of materials such as hydrogenated silicon nitride, silicon dioxide, aluminum oxide, etc., and corresponding passivation materials are selected according to the material of the first passivation layer 150 to form a laminated passivation structure with good performance, such as a silicon dioxide / silicon nitride laminate, an aluminum oxide / silicon nitride laminate, etc., and can be reasonably selected according to actual needs, and no specific limitation is made here.

[0091] In some embodiments, grid lines are printed on the first doped conductive region 120 and the second doped conductive region 130, and the width of the grid lines is 20 um - 40 um.

[0092] Specifically, the grid lines are current extraction channels of the back-contact solar cell 100. The grid lines are printed with corrosive paste, and by limiting the width of the grid lines within a small range, the collection of carriers under the main grid is enhanced, ensuring that the carrier transmission distance is further shortened.

[0093] Exemplarily, the grid lines can be printed with metal pastes such as aluminum paste and silver paste, and their widths can be 20 um, 22 um, 24 um, 26 um, 28 um, 30 um, 32 um, 34 um, 36 um, 38 um, 40 um, etc., and can be reasonably selected according to actual needs, and no specific limitation is made here.

[0094] Refer to Figure 2As shown in the figure, an embodiment of the present application further provides a method for manufacturing a back-contact solar cell 100, which is used to manufacture the back-contact solar cell 100 in any of the above embodiments.

[0095] In the embodiment of the present application, the manufacturing method includes:

[0096] S10, polish the substrate 110.

[0097] Continue to refer to Figure 3 As shown in the figure, exemplarily, the substrate 110 is a planar silicon substrate with a resistivity of 10 Ω·cm - 50 Ω·cm and an oxygen content of less than 8 ppma. After the substrate 110 is polished, a smooth surface is formed, reducing light reflection and improving the light absorption efficiency, which can ensure good electrical properties on the surface of the silicon wafer and provide a high-quality foundation for subsequent cell manufacturing processes.

[0098] Specifically, first place the substrate 110 in a cleaning tank containing a mixed solution of sodium hydroxide, hydrogen peroxide, etc. to remove organic substances, oil stains, and some metal impurities on the surface of the substrate 110. This step utilizes the strong alkalinity of sodium hydroxide and the oxidizing property of hydrogen peroxide to decompose organic substances and emulsify oil stains, thereby achieving the purpose of cleaning.

[0099] Then, pickle the substrate 110 with a mixed solution of hydrofluoric acid and nitric acid to remove the oxide layer and residual metal impurities on the surface of the substrate 110. Hydrofluoric acid can react with silicon dioxide to dissolve the oxide layer, while nitric acid plays a role in oxidizing and removing metal impurities. After pickling, the surface of the substrate 110 will become purer, which is beneficial to the subsequent polishing process.

[0100] Furthermore, the polishing liquid for the substrate 110 uses silicon dioxide as the abrasive, adds an appropriate amount of oxidant and pH regulator, etc., and polishes the surface of the substrate 110 using a polishing pad. The particle size of the silicon dioxide abrasive is generally between dozens of nanometers and hundreds of nanometers, and it is selected according to the surface quality requirements of the silicon wafer. The role of the oxidant is to form a thin oxide film on the surface of the silicon wafer, so that it is easier for the abrasive to remove the material on the surface of the silicon wafer under mechanical action to achieve planarization. The pH regulator is used to control the acidity and alkalinity of the polishing liquid to optimize the polishing effect.

[0101] Finally, rinse the polished substrate 110 with deionized water multiple times to remove the residual polishing liquid, abrasive particles, and other impurities on the surface. And use nitrogen blowing or centrifugal drying methods to remove the moisture on the surface of the silicon wafer.

[0102] S20, simultaneously dope the first surface and the second surface of the substrate 110 to form a first doped region 200.

[0103] Continue to refer to Figure 4As shown, specifically, the first doped region 200 includes a first doped polysilicon layer 210 and a borosilicate glass layer 220, and is distributed on the surface of the substrate 110. Among them, the first doped polysilicon layer is a heavily doped P+ type semiconductor, and the doping concentration is 10 19 cm -3 -10 20 cm -3 .

[0104] Exemplarily, the first doped region 200 is formed by a thermal diffusion doping process. The polished substrate 110 is placed in a high-temperature diffusion furnace. Under the condition that the temperature is greater than 800 °C, nitrogen is used as the carrier gas, boron trichloride is introduced, and an appropriate amount of oxygen can be introduced to adjust the reaction rate and promote boron diffusion. Among them, the flow rate of nitrogen is 1000 cm³ / min - 4000 cm³ / min, the flow rate of oxygen is 100 cm³ / min - 1000 cm³ / min, and the flow rate of boron trichloride is 100 cm³ / min - 500 cm³ / min. In a high-temperature environment, the boron source decomposes to generate boron atoms, and the boron atoms diffuse into the interior of the substrate 110, generating a first doped polysilicon layer 210 and a borosilicate glass layer 220 located outside the first doped polysilicon layer 210 on the surface of the substrate 110.

[0105] In other embodiments, boron tribromide can also be used to replace boron trichloride as the diffusion boron source, and the reaction conditions are basically the same, so no specific description will be given here.

[0106] S30, pattern the first doped region 200 to form a plurality of grooves 230 at intervals on the first surface of the substrate 110, and expose part of the first surface to the grooves 230.

[0107] Continue to refer to Figure 5 As shown, specifically, remove part of the first doped region 200 and the borosilicate glass along the back surface of the substrate 110 to form a plurality of grooves 230 at intervals. And control the slot spacing to be 400 - 800 um, and the width of the groove 230 to be 200 - 700 um, so as to facilitate the subsequent setting of the electrodes.

[0108] Exemplarily, the process for opening the grooves 230 can be any one of laser grooving, chemical etching, mechanical scribing, diamond cutting, etc., and can be reasonably selected according to actual needs, and no specific limitation will be given here.

[0109] S40, dope along the side of the first doped region 200 and the part of the first surface exposed to the grooves 230 to form a second doped region 300.

[0110] Continue to refer to Figure 6As shown, specifically, the second doped region 300 includes a second doped polysilicon layer 310 and a phosphosilicate glass layer 320. The second doped region 300 is distributed on the surface of the first doped region 200 and fills the groove 230 to contact the substrate 110. Among them, the second doped polysilicon layer is a heavily doped N+ type semiconductor, and the doping concentration is 10 19 cm -3 -6 * 10 20 cm -3 .

[0111] Exemplarily, the second doped region 300 is formed by a thermal diffusion doping process. After cleaning the substrate 110, the surface contaminants of the substrate 110 are removed, and then it is put into a high-temperature diffusion furnace again. Under the condition of 800 °C - 900 °C, using a mixed gas of nitrogen and oxygen as the carrier gas, phosphorus oxychloride is introduced. Among them, the flow rate of nitrogen is 500 cm³ / min - 2000 cm³ / min, the flow rate of oxygen is 200 cm³ / min - 1500 cm³ / min, and the flow rate of phosphorus oxychloride is 200 cm³ / min - 2000 cm³ / min. Under high-temperature conditions, phosphorus atoms diffuse into silicon to form the second doped polysilicon layer 310, and a phosphosilicate glass layer 320 is formed on the surface of the second doped polysilicon layer 310.

[0112] It should be noted that in other embodiments, the first doped region 200 and the second doped region 300 can also be formed by processes such as ion implantation, laser doping, and in-situ doping, which will not be specifically described here.

[0113] S50, pattern the second doped region 300 at the groove 230 so that a spacer region 140 is formed between the second doped region 300 on the first surface and the first doped region 200.

[0114] Continue to refer to Figure 7 As shown, specifically, a groove is formed between the first doped region 200 on the back surface of the substrate 110 and the first doped region 200, so that a spacer region 140 is formed between the first doped region 200 and the second doped region 300. And the width of the first doped region 200 at the bottom is defined as 100 um - 200 um, the width of the second doped region 300 is 100 um - 300 um, and the width of the spacer region 140 is 100 um - 600 um.

[0115] S60, remove the first doped region 200 and the second doped region 300 on the surface of the substrate 110 to expose the second surface of the substrate 110, and retain the first doped polysilicon layer 210 and the second doped polysilicon layer 310 on the first surface to form the first doped conductive region 120 and the second doped conductive region 130.

[0116] Continue to refer to Figure 8As shown in the figure, by using patterning processes such as etching or photolithography, the first doping region 200 and the second doping region 300 on the non-back surfaces of the substrate 110 are completely removed, and the first doped polysilicon layer 210 and the second doped polysilicon layer 310 on the back surface are removed. In this way, a first doped conductive region 120 and a second doped conductive region 130 for electrode setting are formed on the back surface of the substrate 110, and no electrode is set on the front surface of the substrate 110, so as to improve the absorption efficiency of solar energy.

[0117] S70, perform a texturing treatment on the second surface, and sequentially deposit and form a first passivation layer 150 and a second passivation layer 160.

[0118] Specifically, a chemical etching or laser etching process can be used to etch and form a plurality of continuous pyramid texturing structures on the front surface of the substrate 110, and through an excellent light-trapping structure, the reflection loss is reduced and the light absorption is enhanced.

[0119] S80, print grid lines on the first doped conductive region 120 and the second doped conductive region 130 to obtain a back-contact solar cell 100.

[0120] Specifically, the designed width of the grid lines is 20μm - 40μm. In the embodiments of the present application, a high-precision stainless steel screen printing plate is used, the mesh number can be 300 - 500, the opening width is about 1.1 times the designed width of the grid lines, and the alignment accuracy of the screen printing plate needs to be ≤ ±5μm to prevent the grid lines of the first doped conductive region 120 and the second doped conductive region 130 from short-circuiting. At the same time, a high-temperature silver paste is selected and cured under the condition of a temperature of 400°C - 800°C. The printing pressure is controlled at 50N - 100N, and the speed is 100mm / s - 300mm / s. Finally, pre-dry at 150°C to remove the organic solvents remaining in the grid lines.

[0121] The embodiments of the present application also provide a tandem cell, including the back-contact solar cell 100 in any of the above embodiments and a perovskite cell, and the back-contact solar cell 100 and the perovskite cell are stacked.

[0122] Specifically, the back-contact solar cell 100 is located at the bottom side, and the perovskite cell is stacked on the top side of the back-contact solar cell 100. By combining the back-contact solar cell 100 and the perovskite cell, when there is unutilized infrared and near-infrared light in the upper perovskite cell, the lower back-contact solar cell 100 can absorb the unutilized infrared and near-infrared light, broadening the absorption range of the solar spectrum. At the same time, the current output of the top perovskite cell and the bottom back-contact solar cell 100 is made close to avoid efficiency loss, thereby significantly improving the photoelectric conversion efficiency.

[0123] In addition, the back-contact solar cell 100 in this embodiment has the back-contact solar cell 100 in any of the above embodiments. Therefore, it has all the beneficial effects of the back-contact solar cell 100 in any of the above embodiments, and will not be elaborated here one by one.

[0124] Continuing to refer to Figure 9 As shown, in some embodiments, the back-contact solar cell 100 and the perovskite cell share the positive and negative electrodes. The overall structure is simple, without additional electrodes, and is suitable for standardized component packaging.

[0125] Continuing to refer to Figure 10 As shown, in some embodiments, the back-contact solar cell 100 and the perovskite cell each have two electrodes and are connected through an external circuit. The connection method between the two can be mechanical stacking or optical coupling. In this embodiment, there is no current matching limit for the stacked cells, and each sub-cell can work completely independently with high efficiency. It has wide compatibility and can combine back-contact solar cells 100 and perovskite cells with different technologies. The stability is easy to control, and the degradation of any one of the back-contact solar cell 100 and the perovskite cell does not affect the overall output.

[0126] Continuing to refer to Figure 11 As shown, in some embodiments, the back-contact solar cell 100 and the perovskite cell share one electrode and have two other independent electrodes, for a total of three ports. In this embodiment, compared with the two-terminal structure, the requirement for current matching is reduced, and the output mode can be adjusted through circuit design, such as high voltage or high current.

[0127] The technical features of the above-described embodiments can be combined arbitrarily. For the sake of brevity of description, not all possible combinations of the technical features in the above embodiments are described. However, as long as there is no contradiction in the combination of these technical features, it should be considered as the scope described in this specification.

[0128] The above-described embodiments merely represent several implementation manners of the present application. The description is relatively specific and detailed, but it should not be construed as a limitation on the scope of the patent application. It should be noted that for those of ordinary skill in the art, without departing from the concept of the present application, several modifications and improvements can be made, and these all belong to the protection scope of the present application. Therefore, the protection scope of the patent of the present application shall be subject to the appended claims.

Claims

1. A back-contact solar cell, characterized in that, Comprising: A substrate having a first surface; A plurality of first doped conductive regions, each of the first doped conductive regions being P-type doped and spaced apart on the first surface; A plurality of second doped conductive regions, each of the second doped conductive regions being N-type doped and spaced apart on the first surface, and alternatingly distributed with each of the first doped conductive regions, and a spacer region being provided between an adjacent first doped conductive region and an adjacent second doped conductive region; The width of the first doped conductive region is less than or equal to the width of the second doped conductive region, and the width of the spacer region is greater than or equal to the width of the second doped conductive region.

2. The back-contact solar cell according to claim 1, characterized in that, The substrate is a single crystal silicon wafer having a resistivity of 10 Ω·cm - 50 Ω·cm and / or an oxygen content of less than 8 ppma.

3. The back contact solar cell according to claim 1 or 2, characterized in that, The width of the first doped conductive region is 100 μm - 200 μm.

4. The back-contact solar cell according to claim 1 or 2, characterized in that, The width of the second doped conductive region is 100 μm - 300 μm.

5. The back contact solar cell according to claim 1 or 2, characterized in that, The width of the spacer region is 100 μm - 600 μm.

6. The back-contact solar cell according to claim 1 or 2, characterized in that, The substrate further has a second surface, the second surface being disposed opposite to the first surface, and the second surface forming a plurality of pyramid structures; The back contact solar cell further includes a first passivation layer disposed on the second surface.

7. The back contact solar cell according to claim 6, characterized in that, The back contact solar cell further includes a second passivation layer disposed on a side of the first passivation layer away from the substrate.

8. The back contact solar cell according to claim 1 or 2, characterized in that, Including grid lines electrically connected to the first doped conductive region and the second doped conductive region, the width of the grid lines being 20 μm - 40 μm.

9. The back contact solar cell according to claim 1 or 2, characterized in that, The doping concentration of the first doped conductive region is 10 19 cm -3 -10 20 cm -3 , and the doping concentration of the second doped conductive region is 10 19 cm -3 -6*10 20 cm -3 .

10. A stacked battery, characterized in that, Including the back contact solar cell according to any one of claims 1 to 8 and a perovskite cell, the back contact solar cell and the perovskite cell being stacked.

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