Back contact cell, preparation method of back contact cell and photovoltaic module

Abstract

The invention discloses a back contact cell, a preparation method of the back contact cell and a photovoltaic module. The back contact cell comprises a silicon substrate, a tunneling layer, a first semiconductor layer, a second semiconductor layer and an electrode, the tunneling layer is arranged on the back surface of the silicon substrate; the first semiconductor layer comprises a first non-metallization area and a first metallization area, the first non-metallization area is provided with a first semiconductor sub-layer, the first metallization area is provided with a second semiconductor sub-layer, the first semiconductor sub-layer contains nitrogen elements and / or oxygen elements, and the second semiconductor sub-layer contains carbon elements. The first semiconductor sub-layer contains a nitrogen element and / or an oxygen element, so that the passivation effect of the first semiconductor sub-layer is improved; in addition, the second semiconductor sub-layer contains the carbon element, so that the influence on the contact resistivity is small, the conductivity of the second semiconductor sub-layer is improved, and the conversion efficiency of the whole back contact battery is improved.

Description

Technical Field

[0001] The present invention belongs to the technical field of photovoltaic, and particularly relates to a back-contact battery, a preparation method of the back-contact battery, and a photovoltaic module. Background Art

[0002] A back-contact battery refers to a high-efficiency solar battery that sets the grid electrodes of a solar cell on the back of the battery to solve the problem that the conversion efficiency of the solar cell is reduced due to the front-side electrode blocking light, thereby improving the conversion efficiency of the solar cell. Among them, the TBC battery further improves the conversion efficiency of the back-contact battery by applying a tunneling passivation contact structure to the back-contact battery. In the prior art, the passivation performance is improved by doping oxygen elements into the doped polysilicon layer. However, the metallization region in contact with the electrode in the doped polysilicon layer requires better electrical conductivity. After adding oxygen elements, the contact resistance between the electrode and the doped polysilicon layer will increase, which is not conducive to the improvement of the efficiency of the back-contact battery. Summary of the Invention

[0003] One of the purposes of the present invention is to provide a back-contact battery, which solves the problems raised in the above background art.

[0004] To achieve the above purpose, the technical solution adopted by the present invention is: a back-contact battery, comprising: a silicon substrate, a tunneling layer, a first semiconductor layer, a second semiconductor layer, and an electrode;

[0005] The tunneling layer is disposed on the back of the silicon substrate;

[0006] The first semiconductor layer and the second semiconductor layer are alternately disposed on the side of the tunneling layer away from the silicon substrate. The polarity of the first semiconductor layer is opposite to that of the second semiconductor layer. The first semiconductor layer and the second semiconductor layer do not contact each other. The first semiconductor layer includes a first non-metallized region and a first metallized region. The first non-metallized region is provided with a first semiconductor sub-layer, and the first metallized region is provided with a second semiconductor sub-layer. The first semiconductor sub-layer contains nitrogen element and / or oxygen element, and the second semiconductor sub-layer contains carbon element;

[0007] The electrodes are respectively in contact with the second semiconductor sub-layer and the second semiconductor layer.

[0008] On the basis of the above solution and as a preferred solution of the above solution, the first semiconductor layer further includes a third semiconductor sub-layer, the third semiconductor sub-layer contains nitrogen element and / or oxygen element, the third semiconductor sub-layer is disposed in the first metallized region, the third semiconductor sub-layer and the second semiconductor sub-layer are sequentially arranged in the thickness direction of the silicon substrate, and the third semiconductor sub-layer is disposed on the side close to the tunneling layer.

[0009] Based on the above solutions and as a preferred solution of the above solutions, the second semiconductor layer includes a second non-metallized region and a second metallized region. The second non-metallized region is provided with a fourth semiconductor sub-layer, and the second metallized region is provided with a fifth semiconductor sub-layer. The fourth semiconductor sub-layer contains nitrogen element and / or oxygen element, and the fifth semiconductor sub-layer contains carbon element. The electrodes are in contact with the second semiconductor sub-layer and the fifth semiconductor sub-layer respectively.

[0010] Based on the above solutions and as a preferred solution of the above solutions, the second semiconductor layer further includes a sixth semiconductor sub-layer. The sixth semiconductor sub-layer contains nitrogen element and / or oxygen element. The sixth semiconductor sub-layer is disposed in the second metallized region. The sixth semiconductor sub-layer and the fifth semiconductor sub-layer are arranged in sequence in the thickness direction of the silicon substrate, and the sixth semiconductor sub-layer is disposed on the side close to the tunneling layer.

[0011] Based on the above solutions and as a preferred solution of the above solutions, the mass concentration of carbon element in the second semiconductor sub-layer and the fifth semiconductor sub-layer is 0.5% - 5%.

[0012] Based on the above solutions and as a preferred solution of the above solutions, the mass concentration of nitrogen element and / or oxygen element in the first semiconductor sub-layer, the third semiconductor sub-layer, the fourth semiconductor sub-layer and the sixth semiconductor sub-layer is 0.5% - 5%.

[0013] Based on the above solutions and as a preferred solution of the above solutions, the tunneling layer is one or more of silicon dioxide, silicon nitride, silicon oxynitride and aluminum oxide; the first semiconductor layer and the second semiconductor layer are one or more of polycrystalline silicon layer, microcrystalline silicon layer and nanocrystalline silicon layer.

[0014] Based on the above solutions and as a preferred solution of the above solutions, a passivation and antireflection layer is provided on the front surface of the silicon substrate, the surface of the first semiconductor layer and the surface of the second semiconductor layer.

[0015] The second object of the present invention is to provide a method for manufacturing a back contact battery, including the following steps:

[0016] Including the following steps:

[0017] S1. Texturize the silicon substrate, and prepare a tunneling layer and a first semiconductor sub-layer on the back surface of the silicon substrate. The first semiconductor sub-layer includes a first non-metallized region and a first metallized region; when preparing the first semiconductor sub-layer, introduce oxygen and / or nitrogen to make the first semiconductor sub-layer contain oxygen element and / or nitrogen element;

[0018] S2. Remove the first semiconductor sub-layer in the first metallized region;

[0019] S3. Prepare a second semiconductor sub-layer on the surface of the first semiconductor sub-layer; introduce carbon dioxide during the preparation of the second semiconductor sub-layer so that the second semiconductor sub-layer contains carbon elements;

[0020] S4. Remove the second semiconductor sub-layer in the first non-metallized region;

[0021] S5. Remove the first semiconductor layer covering the second semiconductor layer region;

[0022] S6. Prepare a fourth semiconductor sub-layer so that the fourth semiconductor sub-layer covers the first semiconductor layer and the tunneling layer. The fourth semiconductor sub-layer includes a second non-metallized region and a second metallized region; introduce oxygen and / or nitrogen during the preparation of the fourth semiconductor sub-layer so that the fourth semiconductor sub-layer contains oxygen elements and / or nitrogen elements;

[0023] S7. Remove the fourth semiconductor sub-layer in the second metallized region;

[0024] S8. Prepare a fifth semiconductor sub-layer on the surface of the fourth semiconductor sub-layer; introduce carbon dioxide during the preparation of the fifth semiconductor sub-layer so that the fifth semiconductor sub-layer contains carbon elements;

[0025] S9. Remove the fifth semiconductor sub-layer in the second non-metallized region;

[0026] S10. Remove the fourth semiconductor sub-layer covering the first semiconductor layer and separate the first semiconductor layer and the second semiconductor layer;

[0027] S11. Prepare a passivation and antireflection layer on the front surface of the silicon substrate, the surface of the first semiconductor layer and the surface of the second semiconductor layer respectively;

[0028] S12. Prepare electrodes so that the electrodes are in contact with the second semiconductor sub-layer and the fourth semiconductor sub-layer respectively.

[0029] The third object of the present invention is to provide a photovoltaic module, and the photovoltaic module includes the back contact battery as described above.

[0030] The beneficial effects of the present invention are as follows:

[0031] 1. The first semiconductor sub-layer and the fourth semiconductor sub-layer that are not in contact with the electrodes contain nitrogen elements and / or oxygen elements, which increases the passivation effect of the first semiconductor sub-layer and the fourth semiconductor sub-layer. At the same time, a large short-circuit current gain can be obtained; the second semiconductor sub-layer and the fifth semiconductor sub-layer that are in contact with the electrodes contain carbon elements, which have little influence on the contact resistivity and improve the conductivity of the second semiconductor sub-layer and the fifth semiconductor sub-layer, thereby improving the conversion efficiency of the entire back contact battery.

[0032] 2. The second semiconductor sub-layer and the fifth semiconductor sub-layer contain carbon elements, which improves the acid and alkali corrosion resistance of the second semiconductor sub-layer and the fifth semiconductor sub-layer. When the first semiconductor sub-layer, the second semiconductor sub-layer, the fourth semiconductor sub-layer and the fifth semiconductor sub-layer are simultaneously subjected to acid and alkali corrosion under the same conditions, the thickness of the first semiconductor sub-layer can be made smaller than that of the second semiconductor sub-layer, and the thickness of the fourth semiconductor sub-layer can be made smaller than that of the fifth semiconductor sub-layer, facilitating the reduction of the thickness of the first semiconductor sub-layer and the fourth semiconductor sub-layer.

[0033] 3. A third semiconductor sub-layer is provided between the second semiconductor sub-layer and the silicon substrate, and a sixth semiconductor sub-layer is provided between the fifth semiconductor sub-layer and the silicon substrate. The second semiconductor sub-layer and the fifth semiconductor sub-layer do not directly contact the silicon substrate, which can increase the conductivity between the first semiconductor layer, the second semiconductor layer and the electrode without reducing the passivation performance between the first semiconductor layer, the second semiconductor layer and the silicon substrate. BRIEF DESCRIPTION OF THE DRAWINGS

[0034] In order to more clearly illustrate the technical solutions of the embodiments of the present invention, the following will briefly introduce the drawings required for the description of the embodiments. Obviously, the drawings in the following description are only some embodiments of the present invention. For those of ordinary skill in the art, other drawings can be obtained based on these drawings without creative efforts.

[0035] Figure 1 It is a schematic structural diagram of step S1 of Embodiment 1 of the present invention.

[0036] Figure 2 It is a schematic structural diagram of step S2 of Embodiment 1 of the present invention.

[0037] Figure 3 It is a schematic structural diagram of step S3 of Embodiment 1 of the present invention.

[0038] Figure 4 It is a schematic structural diagram of step S4 of Embodiment 1 of the present invention.

[0039] Figure 5 It is a schematic structural diagram of step S5 of Embodiment 1 of the present invention.

[0040] Figure 6 It is a schematic structural diagram of step S6 of Embodiment 1 of the present invention.

[0041] Figure 7 It is a schematic structural diagram of step S7 of Embodiment 1 of the present invention.

[0042] Figure 8 It is a schematic structural diagram of step S8 of Embodiment 1 of the present invention.

[0043] Figure 9It is a schematic structural diagram of step S9 in Embodiment 1 of the present invention.

[0044] Figure 10 It is a schematic structural diagram of step S10 in Embodiment 1 of the present invention.

[0045] Figure 11 It is a schematic structural diagram of step S11 in Embodiment 1 of the present invention.

[0046] Figure 12 It is a schematic structural diagram of step S12 in Embodiment 1 of the present invention.

[0047] Figure 13 It is a schematic structural diagram of Embodiment 2 of the present invention.

[0048] The reference numerals are as follows:

[0049] 1, silicon substrate; 2, tunneling layer; 3, first semiconductor layer; 31, first semiconductor sub-layer; 32, second semiconductor sub-layer; 33, third semiconductor sub-layer; 4, second semiconductor layer; 41, fourth semiconductor sub-layer; 42, fifth semiconductor sub-layer; 43, sixth semiconductor sub-layer; 5, electrode; 6, passivation antireflection layer. Detailed implementation manners

[0050] To make the objectives, technical solutions and advantages of the embodiments of the present invention clearer, the technical solutions in the embodiments of the present invention will be clearly and completely described below with reference to the accompanying drawings in the embodiments of the present invention. Apparently, the described embodiments are some, but not all, of the embodiments of the present invention. All other embodiments obtained by those of ordinary skill in the art based on the embodiments of the present invention without creative efforts shall fall within the protection scope of the present invention.

[0051] In the description of the present invention, it should be understood that the orientation or positional relationship indicated by the terms "upper", "lower", "front", "rear", "left", "right", etc. is based on the orientation or positional relationship shown in the accompanying drawings, and is only for the convenience of describing the present invention and simplifying the description, rather than indicating or implying that the device or element referred to must have a specific orientation, be constructed and operated in a specific orientation, and thus should not be construed as a limitation of the present invention.

[0052] Embodiment 1

[0053] As shown in the attached Figure 1 to the attached Figure 12 As shown, a back-contact battery includes: a silicon substrate 1, a tunneling layer 2, a first semiconductor layer 3, a second semiconductor layer 4, and an electrode 5;

[0054] The tunneling layer 2 is disposed on the back surface of the silicon substrate 1;

[0055] The first semiconductor layer 3 and the second semiconductor layer 4 are alternately disposed on one side of the tunneling layer 2 away from the silicon substrate 1. The polarity of the first semiconductor layer 3 is opposite to that of the second semiconductor layer 4. The first semiconductor layer 3 and the second semiconductor layer 4 do not contact each other. The first semiconductor layer 3 includes a first non-metallized region and a first metallized region. The first non-metallized region is provided with a first semiconductor sub-layer 31, and the first metallized region is provided with a second semiconductor sub-layer 32. The first semiconductor sub-layer 31 contains nitrogen element and / or oxygen element, and the second semiconductor sub-layer 32 contains carbon element;

[0056] The second semiconductor layer 4 includes a second non-metallized region and a second metallized region. The second non-metallized region is provided with a fourth semiconductor sub-layer 41, and the second metallized region is provided with a fifth semiconductor sub-layer 42. The fourth semiconductor sub-layer 41 contains nitrogen element and / or oxygen element, and the fifth semiconductor sub-layer 42 contains carbon element;

[0057] The electrode 5 is in contact with the second semiconductor sub-layer 32 and the fifth semiconductor sub-layer 42 respectively.

[0058] The mass concentration of carbon element in the second semiconductor sub-layer 32 and the fifth semiconductor sub-layer 42 is 0.5% - 5%.

[0059] The mass concentration of nitrogen element and / or oxygen element in the first semiconductor sub-layer 31, the third semiconductor sub-layer 33, the fourth semiconductor sub-layer 41 and the sixth semiconductor sub-layer 43 is 0.5% - 5%.

[0060] The tunneling layer 2 is one or more of silicon dioxide, silicon nitride, silicon oxynitride and aluminum oxide; the first semiconductor layer 3 and the second semiconductor layer 4 are one or more of polycrystalline silicon layer, microcrystalline silicon layer and nanocrystalline silicon layer.

[0061] The front surface of the silicon substrate 1, the surfaces of the first semiconductor layer 3 and the second semiconductor layer 4 are all provided with a passivation and antireflection layer 6.

[0062] A method for manufacturing a back-contact battery, characterized by comprising the following steps:

[0063] S1. Texturize the silicon substrate 1, and prepare a tunneling layer 2 and a first semiconductor sub-layer 31 on the back surface of the silicon substrate 1. The first semiconductor sub-layer 31 includes a first non-metallized region and a first metallized region; when preparing the first semiconductor sub-layer 31, introduce oxygen and / or nitrogen to make the first semiconductor sub-layer 31 contain oxygen element and / or nitrogen element;

[0064] S2. Remove the first semiconductor sub-layer 31 in the first metallized region;

[0065] S3. Prepare a second semiconductor sub-layer 32 on the surface of the first semiconductor sub-layer 31; introduce carbon dioxide during the preparation of the second semiconductor sub-layer 32 so that the second semiconductor sub-layer 32 contains carbon elements;

[0066] S4. Remove the second semiconductor sub-layer 32 in the first non-metallized region;

[0067] S5. Remove the first semiconductor layer 3 covering the second semiconductor layer 4 region;

[0068] S6. Prepare a fourth semiconductor sub-layer 41 so that the fourth semiconductor sub-layer 41 covers the first semiconductor layer 3 and the tunneling layer 2, and the fourth semiconductor sub-layer 41 includes a second non-metallized region and a second metallized region; introduce oxygen and / or nitrogen during the preparation of the fourth semiconductor sub-layer 41 so that the fourth semiconductor sub-layer 41 contains oxygen elements and / or nitrogen elements;

[0069] S7. Remove the fourth semiconductor sub-layer 41 in the second metallized region;

[0070] S8. Prepare a fifth semiconductor sub-layer 42 on the surface of the fourth semiconductor sub-layer 41; introduce carbon dioxide during the preparation of the fifth semiconductor sub-layer 42 so that the fifth semiconductor sub-layer 42 contains carbon elements;

[0071] S9. Remove the fifth semiconductor sub-layer 42 in the second non-metallized region;

[0072] S10. Remove the fourth semiconductor sub-layer 41 covering the first semiconductor layer 3 and separate the first semiconductor layer 3 and the second semiconductor layer 4;

[0073] S11. Prepare a passivation and antireflection layer 6 on the front surface of the silicon substrate 1, the surface of the first semiconductor layer 3 and the second semiconductor layer 4 respectively;

[0074] S12. Prepare electrodes 5 so that the electrodes 5 are in contact with the second semiconductor sub-layer 32 and the fourth semiconductor sub-layer 41 respectively.

[0075] The local removal methods of the first semiconductor sub-layer, the second semiconductor sub-layer, the third semiconductor sub-layer and the fourth semiconductor sub-layer involved above can adopt laser scanning etching, or can adopt a mask to cover the regions that are not to be removed, and use wet chemical etching for the regions that are not needed.

[0076] The first semiconductor sub-layer and the fourth semiconductor sub-layer that are not in contact with the electrodes contain nitrogen elements and / or oxygen elements, which increases the passivation effect of the first semiconductor sub-layer and the fourth semiconductor sub-layer, and at the same time, a large short-circuit current gain can be obtained; the second semiconductor sub-layer and the fifth semiconductor sub-layer that are in contact with the electrodes contain carbon elements, which have little influence on the contact resistivity, improve the conductivity of the second semiconductor sub-layer and the fifth semiconductor sub-layer, and thus improve the conversion efficiency of the entire back-contact battery.

[0077] The second semiconductor sub-layer and the fifth semiconductor sub-layer contain carbon elements, which improves the acid and alkali corrosion resistance of the second semiconductor sub-layer and the fifth semiconductor sub-layer. When the first semiconductor sub-layer, the second semiconductor sub-layer, the fourth semiconductor sub-layer and the fifth semiconductor sub-layer are simultaneously subjected to acid and alkali corrosion under the same conditions, the thickness of the first semiconductor sub-layer can be made smaller than that of the second semiconductor sub-layer, and the thickness of the fourth semiconductor sub-layer can be made smaller than that of the fifth semiconductor sub-layer, which is convenient for reducing the thickness of the first semiconductor sub-layer and the fourth semiconductor sub-layer.

[0078] Example 2

[0079] As shown in the appendix Figure 13 As shown, on the basis of Example 1, further, the first semiconductor layer 3 further includes a third semiconductor sub-layer 33, the third semiconductor sub-layer 33 contains nitrogen element and / or oxygen element, the third semiconductor sub-layer 33 is disposed in the first metallization region, the third semiconductor sub-layer 33 and the second semiconductor sub-layer 32 are sequentially arranged in the thickness direction of the silicon substrate 1, and the third semiconductor sub-layer 33 is disposed on the side close to the tunneling layer 2. The second semiconductor layer 4 further includes a sixth semiconductor sub-layer 43, the sixth semiconductor sub-layer 43 contains nitrogen element and / or oxygen element, the sixth semiconductor sub-layer 43 is disposed in the second metallization region, the sixth semiconductor sub-layer 43 and the fifth semiconductor sub-layer 42 are sequentially arranged in the thickness direction of the silicon substrate 1, and the sixth semiconductor sub-layer 43 is disposed on the side close to the tunneling layer 2.

[0080] A third semiconductor sub-layer is provided between the second semiconductor sub-layer and the silicon substrate, and a sixth semiconductor sub-layer is provided between the fifth semiconductor sub-layer and the silicon substrate. The second semiconductor sub-layer and the fifth semiconductor sub-layer do not directly contact the silicon substrate, which can increase the conductivity between the first semiconductor layer, the second semiconductor layer and the electrode without reducing the passivation performance between the first semiconductor layer, the second semiconductor layer and the silicon substrate.

[0081] A photovoltaic module, the photovoltaic module includes the back contact battery as described above.

[0082] The above description of the disclosed embodiments enables those skilled in the art to implement or use the present invention. Various modifications to these embodiments will be apparent to those skilled in the art, and the general principles defined herein can be implemented in other embodiments without departing from the spirit or scope of the present invention. Therefore, the present invention will not be limited to these embodiments shown herein, but rather to the widest scope consistent with the principles and novel features disclosed herein.

Claims

1. A back-contact battery, characterized in that, Comprising: A silicon substrate (1), a tunneling layer (2), a first semiconductor layer (3), a second semiconductor layer (4), and an electrode (5); The tunneling layer (2) is disposed on the back surface of the silicon substrate (1); The first semiconductor layer (3) and the second semiconductor layer (4) are alternately disposed on the side of the tunneling layer (2) away from the silicon substrate (1). The polarity of the first semiconductor layer (3) is opposite to that of the second semiconductor layer (4). The first semiconductor layer (3) and the second semiconductor layer (4) do not contact each other. The first semiconductor layer (3) includes a first non-metallized region and a first metallized region. The first non-metallized region is provided with a first semiconductor sub-layer (31), and the first metallized region is provided with a second semiconductor sub-layer (32). The first semiconductor sub-layer (31) contains nitrogen element and / or oxygen element, and the second semiconductor sub-layer (32) contains carbon element; The electrode (5) is in contact with the second semiconductor sub-layer (32) and the second semiconductor layer (4) respectively.

2. The back-contact battery according to claim 1, characterized in that: The first semiconductor layer (3) further includes a third semiconductor sub-layer (33). The third semiconductor sub-layer (33) contains nitrogen element and / or oxygen element. The third semiconductor sub-layer (33) is disposed in the first metallized region. The third semiconductor sub-layer (33) and the second semiconductor sub-layer (32) are arranged in sequence in the thickness direction of the silicon substrate (1), and the third semiconductor sub-layer (33) is disposed on the side close to the tunneling layer (2).

3. A back-contact battery according to claim 1 or 2, characterized in that: The second semiconductor layer (4) includes a second non-metallized region and a second metallized region. The second non-metallized region is provided with a fourth semiconductor sub-layer (41), and the second metallized region is provided with a fifth semiconductor sub-layer (42). The fourth semiconductor sub-layer (41) contains nitrogen element and / or oxygen element, and the fifth semiconductor sub-layer (42) contains carbon element. The electrode (5) is in contact with the second semiconductor sub-layer (32) and the fifth semiconductor sub-layer (42) respectively.

4. The back-contact battery according to claim 3, wherein: The second semiconductor layer (4) further includes a sixth semiconductor sub-layer (43). The sixth semiconductor sub-layer (43) contains nitrogen element and / or oxygen element. The sixth semiconductor sub-layer (43) is disposed in the second metallized region. The sixth semiconductor sub-layer (43) and the fifth semiconductor sub-layer (42) are arranged in sequence in the thickness direction of the silicon substrate (1), and the sixth semiconductor sub-layer (43) is disposed on the side close to the tunneling layer (2).

5. The back-contact battery according to claim 4, wherein: The mass concentration of carbon element in the second semiconductor sub-layer (32) and the fifth semiconductor sub-layer (42) is 0.5% to 5%.

6. The back-contact battery according to claim 4, wherein: The mass concentration of nitrogen element and / or oxygen element in the first semiconductor sub-layer (31), the third semiconductor sub-layer (33), the fourth semiconductor sub-layer (41), and the sixth semiconductor sub-layer (43) is 0.5% to 5%.

7. A back-contact battery according to claim 1, characterized in that: The tunneling layer (2) is one or more of silicon dioxide, silicon nitride, silicon oxynitride, and aluminum oxide; the first semiconductor layer (3) and the second semiconductor layer (4) are one or more of polycrystalline silicon layer, microcrystalline silicon layer, and nanocrystalline silicon layer.

8. A back-contact battery according to claim 1, characterized in that: A passivation and antireflection layer (6) is provided on the front surface of the silicon substrate (1), the surface of the first semiconductor layer (3), and the surface of the second semiconductor layer (4).

9. A method for preparing a back-contact battery, characterized in that, It includes the following steps: S1. Texturize the silicon substrate (1), and prepare a tunneling layer (2) and a first semiconductor sub-layer (31) on the back surface of the silicon substrate (1). The first semiconductor sub-layer (31) includes a first non-metallized region and a first metallized region; oxygen and / or nitrogen are introduced during the preparation of the first semiconductor sub-layer (31) so that the first semiconductor sub-layer (31) contains oxygen element and / or nitrogen element; S2. Remove the first semiconductor sub-layer (31) in the first metallized region. S3. Prepare a second semiconductor sub-layer (32) on the surface of the first semiconductor sub-layer (31); carbon dioxide is introduced during the preparation of the second semiconductor sub-layer (32) so that the second semiconductor sub-layer (32) contains carbon element; S4. Remove the second semiconductor sub-layer (32) in the first non-metallized region. S5. Remove the first semiconductor layer (3) covering the second semiconductor layer (4) region. S6. Prepare a fourth semiconductor sub-layer (41) so that the fourth semiconductor sub-layer (41) covers the first semiconductor layer (3) and the tunneling layer (2). The fourth semiconductor sub-layer (41) includes a second non-metallized region and a second metallized region; oxygen and / or nitrogen are introduced during the preparation of the fourth semiconductor sub-layer (41) so that the fourth semiconductor sub-layer (41) contains oxygen element and / or nitrogen element; S7. Remove the fourth semiconductor sub-layer (41) in the second metallized region. S8. Prepare a fifth semiconductor sub-layer (42) on the surface of the fourth semiconductor sub-layer (41); carbon dioxide is introduced during the preparation of the fifth semiconductor sub-layer (42) so that the fifth semiconductor sub-layer (42) contains carbon element; S9. Remove the fifth semiconductor sub-layer (42) in the second non-metallized region. S10. Remove the fourth semiconductor sub-layer (41) covering the first semiconductor layer (3), and separate the first semiconductor layer (3) and the second semiconductor layer (4); S11. Prepare a passivation and antireflection layer (6) on the front surface of the silicon substrate (1), the surface of the first semiconductor layer (3), and the surface of the second semiconductor layer (4) respectively; S12. Prepare electrodes (5) so that the electrodes (5) are in contact with the second semiconductor sub-layer (32) and the fourth semiconductor sub-layer (41) respectively.

10. A photovoltaic module, characterized in that: The photovoltaic module includes the back contact battery according to any one of claims 1 to 8.

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