Wire cut electrical discharge machining wire loss compensation system for regulating and controlling inter-pulse floating voltage

Abstract

The invention discloses an inter-pulse floating voltage regulation and control wire cut electrical discharge machining wire loss compensation system which comprises a discharge module and an FPGA controller, the output positive electrode of the discharge module is connected with a workpiece electrode, the output negative electrode of the discharge module is connected with an electrode wire, and the discharge module comprises a pulse width high-voltage circuit, a control system and an inter-pulse voltage regulation circuit; the first input end of the FPGA controller is connected with the output end of a current sensor, the input end of the current sensor is connected to a negative wire of the discharging module in a bridging mode in a surrounding mode, and the ratio of a voltage signal to a current signal serves as the quantitative basis of loss compensation of the electrode wire. The electrodeposition efficiency is improved by adjusting the amplitude of the inter-pulse voltage, and the operability of loss compensation of the electrode wire is improved. Metal ions come from a workpiece electrode material, and pollution of foreign metal ions does not exist.

Description

Technical Field

[0001] The present invention relates to the technical field of special machining, and in particular to an electric spark wire cutting wire loss compensation system with inter-pulse floating voltage regulation. Background Art

[0002] Electrospark machining (EDM) utilizes high-frequency electrical and thermal energy to micro-remove material, with countless discharge craters forming the final surface. Wire EDM (Wire Cutting) is a key branch of EDM technology. However, due to the material removal mechanism, the EDM discharge channel also erodes the tool electrode surface, causing wear. Over long machining cycles, this wear accumulates, severely reducing machining stability and surface quality.

[0003] Furthermore, if the tool electrode is a wire used in wire EDM, there is a serious risk of wire breakage, reducing machining sustainability and efficiency. Furthermore, a melted and solidified layer exists on the machined surface, rich in microcracks and pores, and in poor contact with the base metal. This layer is prone to detachment under conditions of high temperature, high pressure, and alternating loads, significantly impacting the service performance and reliability of the part. Due to the polarity effect, while the workpiece material is being eroded, the tool electrode is also partially removed by the high-energy-density discharge channel.

[0004] Electrolytic machining is based on anodic ion dissolution and cathodic ion deposition, and there is no wear and tear on the cathode tool electrode during machining. Electrospark electrolytic cutting can theoretically eliminate the melt-solidified layer during machining and reduce tool electrode wear, fully leveraging the advantages of both.

[0005] However, the traditional combination of electric spark and electrolysis usually requires an increase in the inter-electrode gap to meet the conditions of electric spark electrolysis composite machining, which makes it difficult to effectively monitor and compensate for the loss of tool electrodes, thereby affecting the service life of the electrode wire and reducing machining stability and surface quality.

[0006] In view of the above analysis, a wire loss compensation system for wire-cutting electrospark machining with inter-pulse floating voltage regulation is proposed. Summary of the Invention

[0007] The object of the present invention is to provide a wire loss compensation system for wire-cut electric discharge machining with pulse-to-pulse floating voltage regulation, so as to solve the problems raised in the above-mentioned background technology.

[0008] To achieve the above objectives, the present invention provides the following technical solutions: a wire loss compensation system for wire-cut electric discharge machining with interpulse floating voltage regulation, comprising a discharge module and an FPGA controller, wherein the positive output of the discharge module is connected to a workpiece electrode, and the negative output of the discharge module is connected to an electrode wire, and the discharge module comprises a pulse width high-voltage circuit, a control system, and an interpulse voltage regulation circuit;

[0009] The first input terminal of the FPGA controller is connected to the output terminal of the current sensor, and the input terminal of the current sensor is connected across the negative electrode wire of the discharge module in a looped manner;

[0010] The second input end of the FPGA controller is connected to the middle tap of a variable resistor, and the two ends of the variable resistor are respectively connected to the workpiece electrode and the electrode wire;

[0011] The third input terminal of the FPGA controller is connected to the output terminal of the control system to transmit a synchronization signal Sync for synchronizing the pulse width and the order of the pulses.

[0012] The output end of the FPGA controller is connected to the pulse-to-pulse voltage regulation circuit via a two-core cable to transmit a switching signal SWITCH and a voltage regulation signal PWM.

[0013] Preferably: the output of the pulse width high voltage circuit and the interpulse voltage regulation circuit is positively connected to the workpiece electrode, the output of the pulse width high voltage circuit and the interpulse voltage regulation circuit is negatively connected to the electrode wire, and the control system controls the output state of the pulse width high voltage circuit by outputting a drive signal.

[0014] Preferably, the output voltage amplitude of the pulse width high voltage circuit is 0-200V, the pulse width duration is 0.5-200μs, and the driving signal is a 3.3V square wave signal;

[0015] The output voltage amplitude of the inter-pulse voltage regulation circuit is 0-30V, the voltage amplitude is controlled by the voltage regulation signal, and the inter-pulse duration is 4-15 times the pulse width duration.

[0016] Preferably: the inter-pulse voltage regulation circuit includes a DAC output circuit, a DC-DC step-down circuit and an inter-pulse voltage chopping circuit;

[0017] The DAC output circuit includes a main control chip U2, pin 6 of the main control chip U2 is connected to a diode D2 and one end of a resistor R3, pins 5 and 7 of the main control chip U2 are grounded, and pin 3 of the main control chip U2 is connected to the FPGA controller to convert the voltage regulation signal PWM of the FPGA controller into a voltage output of 0 to 5V.

[0018] Preferably: the DC-DC step-down circuit includes a main control chip U1;

[0019] Pin 4 of the main control chip U1 is connected to the other end of the resistor R3, and pin 1 of the main control chip U1 is connected to the input voltage terminal VIN, one end of the capacitor C1, and one end of the polarized capacitor C2. The other end of the capacitor C1 and the other end of the polarized capacitor C2 are grounded;

[0020] Pin 2 of the main control chip U1 is connected to one end of the diode D1 and one end of the inductor L1, respectively. The other end of the inductor L1 is connected to one end of the resistor R1, one end of the capacitor C3, one end of the capacitor C4, and one end of the polarity capacitor C5, and is connected to the output terminal VOUT+. The other end of the resistor R1 is connected to the resistor R2. The resistor R1, the resistor R2, and the capacitor C3 are also connected to pin 4 of the main control chip U1.

[0021] The other end of the diode D1 , the other end of the capacitor C4 , and the other end of the polarity capacitor C5 are connected to the output terminal VOUT−.

[0022] Preferably: the inter-pulse voltage chopping circuit includes an optocoupler U3; pin 2 of the optocoupler U3 is connected to a resistor R7 and is connected to the FPGA controller, pin 6 of the optocoupler U3 is respectively connected to one end of a resistor R6 and one end of a resistor R8, the other end of the resistor R6 is connected to pin 8 of the optocoupler U3, the other end of the resistor R8 is connected to the base of a transistor Q3, the collector of the transistor Q3 is connected to one end of a resistor R4 and one end of a capacitor C7, the other end of the capacitor C7 is respectively connected to the bases of a transistor Q1 and a transistor Q4, the emitter of the transistor Q3 is connected to the emitter of the transistor Q4, and the other end of the resistor R4 is connected to the collector of the transistor Q1.

[0023] Preferably, one end of a capacitor C6 and one end of a resistor R9 are connected between the emitter of the transistor Q1 and the collector of the transistor Q4, respectively; the other end of the capacitor C6 and the other end of the resistor R9 are connected to one end of a diode D4, one end of a resistor R10, and the gate of the field-effect transistor Q2; the other end of the diode D4 is connected to one end of a diode D5; the other end of the diode D5, the other end of the resistor R10, and the source of the field-effect transistor Q2 are connected to the output terminal VOUT-.

[0024] Preferably: the drain of the field effect transistor Q2 is connected to the output terminal OUT- and one end of the diode D3, the other end of the diode D3 is connected to the output terminal VOUT+, one end of the diode D6 and one end of the polarity capacitor C8, the other end of the polarity capacitor C8 is connected to the output terminal VOUT-, and the other end of the diode D6 is connected to the output terminal OUT+.

[0025] Compared with the prior art, the present invention has the following beneficial effects:

[0026] 1. The ratio of the voltage signal to the current signal is used as the quantitative basis for electrode wire loss compensation. By adjusting the inter-pulse voltage amplitude, the efficiency of electrode deposition is improved, and the operability of electrode wire loss compensation is increased. The metal ions are derived from the workpiece electrode material, and there is no contamination from foreign metal ions.

[0027] 2. An adaptive floating voltage is introduced between pulses. This voltage is lower than the maintenance voltage of traditional EDM discharge. Without affecting traditional EDM, the melted solidified layer can be thinned or removed through composite electrolytic machining, and the machining efficiency can be improved.

[0028] 3. The system of the present invention exists in the form of a modular circuit, has strong portability, and has good engineering application value. BRIEF DESCRIPTION OF THE DRAWINGS

[0029] Figure 1 Schematic diagram of the system framework of the present invention;

[0030] Figure 2 This is a schematic diagram of the inter-pulse voltage regulation circuit of the present invention;

[0031] Figure 3 This is a framework diagram of the FPGA controller of the present invention.

[0032] In the figure: 1. Discharge module; 2. Workpiece electrode; 3. Spark discharge; 4. Electrode wire; 5. Electrochemical reaction; 6. Working medium; 7. Current sensor; 8. FPGA controller; 9. Rheostat. DETAILED DESCRIPTION

[0033] The technical solutions in the embodiments of the present invention will be described clearly and completely below with reference to the accompanying drawings in the embodiments of the present invention.

[0034] See also Figure 1-3 The present invention provides a technical solution: a wire loss compensation system for electric spark wire cutting with inter-pulse floating voltage regulation, comprising a discharge module 1 and an FPGA controller 8, wherein the discharge module 1 comprises a pulse width high voltage circuit, a control system and an inter-pulse voltage regulation circuit, wherein the outputs of the pulse width high voltage circuit and the inter-pulse voltage regulation circuit are positively connected to the workpiece electrode 2, and the outputs of the pulse width high voltage circuit and the inter-pulse voltage regulation circuit are negatively connected to the electrode wire 4, and the control system controls the output state of the pulse width high voltage circuit by outputting a drive signal.

[0035] The first input terminal of the FPGA controller 8 is connected to the output terminal of the current sensor 7, and the input terminal of the current sensor 7 is connected across the negative electrode wire of the discharge module 1 in a looped manner;

[0036] The second input terminal of the FPGA controller 8 is connected to the middle tap of the rheostat 9, which acts as a voltage sensor. The two ends of the rheostat 9 are respectively connected to the workpiece electrode 2 and the electrode wire 4;

[0037] The third input terminal of the FPGA controller 8 is connected to the output terminal of the control system and is used to synchronize the pulse width and the order of the pulses.

[0038] The output end of the FPGA controller 8 is connected to the pulse-to-pulse voltage regulation circuit via a two-core cable to transmit the switching signal SWITCH and the voltage regulation signal PWM.

[0039] The pulse width high voltage circuit provides the energy required for the spark discharge 3 , and the inter-pulse voltage regulation circuit provides the current and voltage required for the electrochemical reaction 5 (ie, electrolysis reaction). The spark discharge 3 and the electrochemical reaction 5 are carried out in the working medium 6 .

[0040] The output voltage amplitude of the pulse width high voltage circuit is 0-200V, the pulse width duration is 0.5-200μs, and the driving signal is a 3.3V square wave signal;

[0041] The output voltage amplitude of the inter-pulse voltage regulation circuit is 0 to 30V, the specific voltage amplitude is controlled by the voltage regulation signal, and the inter-pulse duration is 4 to 15 times the pulse width duration.

[0042] The switching signal SWITCH controls a field effect tube. When the signal is on, the electric spark discharge 3 and the electrochemical reaction 5 are combined. When the signal is off, only the electric spark discharge 3 occurs between the workpiece electrode 2 and the electrode wire 4.

[0043] The FPGA controller 8 processes the output signals of the rheostat 9 and the current sensor 7 to calculate the resistance between the workpiece electrode 2 and the electrode wire 4. The resistance is used to measure the amount of electrode wire loss and serves as a comparison value for wire loss compensation.

[0044] The working medium 6 has an electrical conductivity of 1 to 15 mS / cm and can be a water-based working fluid or an aqueous solution prepared by an electrolyte and water. The electrolyte can be a common strong electrolyte or weak electrolyte.

[0045] The diameter of the electrode wire 4 is 50-300 μm, and the material can be molybdenum alloy or copper.

[0046] The workpiece electrode 2 is a metal or metal alloy that can undergo anodic dissolution.

[0047] Working principle:

[0048] 1. Prepare an unused wire electrode as the tool electrode. The wire diameter is 0.18mm. Use a multimeter to measure the resistance of a one-meter-long wire electrode, record it as Res0, and calculate the resistivity. When the wire diameter loss exceeds 20μm, it is considered necessary to replace the wire electrode. That is, 0.16mm is the safe diameter value of the wire electrode. Based on the resistivity, calculate the resistance per unit length of the safe diameter of the wire electrode, record it as Res1. Install the workpiece electrode on the workbench of the wire EDM machine, parallel to the workpiece electrode surface to be processed, and leave a gap of 5-10mm between the two.

[0049] 2. The control system within the wire EDM electrical cabinet is connected to the pulse-width high-voltage circuit via electronic wires. Both the control system and the pulse-width high-voltage circuit are built-in features of the wire EDM machine. The drive signal within controls the voltage output of the pulse-width high-voltage circuit. The positive and negative electrodes of the pulse-width high-voltage circuit are connected to the workpiece electrode 2 and wire electrode 4, respectively.

[0050] The inter-pulse voltage regulation circuit consists of a DAC output circuit, a DC-DC step-down circuit and an inter-pulse voltage chopping circuit. Figure 2 As shown, the main control chip U2 of the DAC output circuit, model GPS8500, can convert the FPGA's voltage regulation signal PWM into a voltage output of 0~5V. This voltage is used as the feedback voltage of the DC-DC step-down main control chip U1, model LM2596-Adj. The voltage output by the DAC is used to regulate the input voltage VIN40V to an output less than 30V required for the inter-pulse floating voltage. The output terminals are VOUT+ and VOUT-, and are filtered by polarized capacitors C5 and C8 and capacitor C4 to reduce high-frequency interference and output ripple.

[0051] Under the control of the SWITCH signal, the regulated voltage is chopped into a square wave interpulse voltage by field-effect transistor Q2, model IRF540N, with outputs OUT+ and OUT-. U3 in this circuit is an optocoupler, model 6N137. It isolates the FPGA controller 8 from the interpulse voltage regulation circuitry for protection. Q1 and Q4 form a push-pull circuit, model SS8050 and SS8550, respectively, with output voltage amplitudes of +9V and -5V, ensuring reliable switching on and off of Q2. Diode D3, model SS14, is unidirectional and isolates VOUT+ and VOUT-.

[0052] In addition, in order to prevent the pulse width high voltage circuit from charging the inter-pulse voltage regulation circuit, it is separated by diode D6, model SF54 is selected, VOUT+ is connected to the input end of diode D6, the output end of diode D6 is connected to OUT+, and then connected to the workpiece electrode 2, and the negative pole of the inter-pulse voltage in the form of a square wave is connected to the electrode wire 4; the peak repetitive reverse voltage of diode D6 is 200~300V.

[0053] The current sensor is a Hall current sensor, model WCS1800. The output value of the Hall current sensor serves as the current input signal Current of the FPGA controller; the variable resistor 9 outputs a voltage signal less than 5V after voltage division by the intermediate tap, which serves as the voltage input signal Voltage of the FPGA controller 8; the ratio Res of the voltage signal and the current signal serves as the feedback signal for adjusting the inter-pulse voltage amplitude and duration.

[0054] 3. The water-based working fluid is diluted with tap water or purified water. Electrolytes can also be added during the dilution process according to actual conditions. The conductivity of the prepared working medium is 1 to 15 mS / cm.

[0055] 4. Inject working medium 6 into the space between the workpiece electrode 2 and the electrode wire 4 through a water pump, with the spray pressure being 0.1-0.6 MPa.

[0056] 5. Start the high-frequency button of the control system, output the drive signal to control the on and off of the pulse width high-voltage circuit, and apply voltage between the workpiece electrode 2 and the electrode wire 4.

[0057] 6. Slowly move the handwheel of the workbench to generate spark discharge between the wire electrode 4 and the workpiece electrode 2. Use an oscilloscope to capture the voltage waveform and current waveform of the spark discharge 3. Calculate the inter-electrode resistance at the beginning of machining from the volt-ampere characteristics, and use this data to correct Res0 and Res1.

[0058] 7. Start the automatic feed function of the EDM wire cutting machine, and the EDM wire cutting wire loss compensation system with inter-pulse floating voltage regulation starts working. Steps for electrode wire loss compensation:

[0059] S1, FPGA controller 8 calculates the inter-electrode resistance Res during the machining process, and calculates the difference △Res=Res-Res0;

[0060] S2. When △Res>0 and Res<Res1, the larger the difference, the greater the voltage and duration of the pulse output;

[0061] S3. When Res>Res1, stop processing and replace the electrode wire.

[0062] While embodiments of the present invention have been shown and described, it will be appreciated by those skilled in the art that various changes, modifications, substitutions, and variations may be made to these embodiments without departing from the principles and spirit of the invention, and that the scope of the invention is defined by the appended claims and their equivalents.

Claims

1. A wire loss compensation system for wire-cutting electric discharge machining with pulse-to-pulse floating voltage regulation, comprising a discharge module (1) and an FPGA controller (8), characterized in that: The positive output of the discharge module (1) is connected to a workpiece electrode (2), the negative output of the discharge module (1) is connected to an electrode wire (4), and the discharge module (1) comprises a pulse width high voltage circuit, a control system, and an inter-pulse voltage regulation circuit; The first input end of the FPGA controller (8) is connected to the output end of the current sensor (7), and the input end of the current sensor (7) is connected across the negative electrode wire of the discharge module (1) in a looped manner; The second input end of the FPGA controller (8) is connected to the middle tap of a variable resistor (9), and the two ends of the variable resistor (9) are respectively connected to the workpiece electrode (2) and the electrode wire (4); The third input terminal of the FPGA controller (8) is connected to the output terminal of the control system to transmit a synchronization signal Sync for synchronizing the pulse width and the order of the pulses. The output end of the FPGA controller (8) is connected to the pulse-to-pulse voltage regulation circuit via a two-core cable to transmit a switching signal SWITCH and a voltage regulation signal PWM.

2. The wire loss compensation system for wire-cut electric discharge machining with pulse-to-pulse floating voltage control according to claim 1, characterized in that: The outputs of the pulse width high voltage circuit and the inter-pulse voltage regulation circuit are positively connected to the workpiece electrode (2), and the outputs of the pulse width high voltage circuit and the inter-pulse voltage regulation circuit are negatively connected to the electrode wire (4). The control system controls the output state of the pulse width high voltage circuit by outputting a driving signal.

3. The wire loss compensation system for wire-cut electric discharge machining with pulse-to-pulse floating voltage control according to claim 1, characterized in that: The output voltage amplitude of the pulse width high voltage circuit is 0-200V, the pulse width duration is 0.5-200μs, and the driving signal is a 3.3V square wave signal; The output voltage amplitude of the inter-pulse voltage regulation circuit is 0-30V, the voltage amplitude is controlled by the voltage regulation signal, and the inter-pulse duration is 4-15 times the pulse width duration.

4. The wire loss compensation system for wire-cut electric discharge machining with pulse-to-pulse floating voltage control according to claim 1, characterized in that: The inter-pulse voltage regulation circuit includes a DAC output circuit, a DC-DC step-down circuit and an inter-pulse voltage chopping circuit; The DAC output circuit includes a main control chip U2, wherein pin 6 of the main control chip U2 is connected to a diode D2 and one end of a resistor R3, pins 5 and 7 of the main control chip U2 are grounded, and pin 3 of the main control chip U2 is connected to an FPGA controller (8) to convert a voltage regulation signal PWM of the FPGA controller (8) into a voltage output of 0 to 5V.

5. The wire loss compensation system for wire-cut electric discharge machining with pulse-to-pulse floating voltage control according to claim 4, characterized in that: The DC-DC step-down circuit includes a main control chip U1; Pin 4 of the main control chip U1 is connected to the other end of the resistor R3, and pin 1 of the main control chip U1 is connected to the input voltage terminal VIN, one end of the capacitor C1, and one end of the polarized capacitor C2. The other end of the capacitor C1 and the other end of the polarized capacitor C2 are grounded; Pin 2 of the main control chip U1 is connected to one end of the diode D1 and one end of the inductor L1, respectively. The other end of the inductor L1 is connected to one end of the resistor R1, one end of the capacitor C3, one end of the capacitor C4, and one end of the polarity capacitor C5, and is connected to the output terminal VOUT+. The other end of the resistor R1 is connected to the resistor R2. The resistor R1, the resistor R2, and the capacitor C3 are also connected to pin 4 of the main control chip U1. The other end of the diode D1 , the other end of the capacitor C4 , and the other end of the polarity capacitor C5 are connected to the output terminal VOUT−.

6. The wire loss compensation system for wire-cut electric discharge machining with pulse-to-pulse floating voltage control according to claim 1, characterized in that: The inter-pulse voltage chopping circuit includes an optocoupler U3; pin 2 of the optocoupler U3 is connected to a resistor R7 and is connected to an FPGA controller (8); pin 6 of the optocoupler U3 is connected to one end of a resistor R6 and one end of a resistor R8, respectively; the other end of the resistor R6 is connected to pin 8 of the optocoupler U3; the other end of the resistor R8 is connected to the base of a transistor Q3; the collector of the transistor Q3 is connected to one end of a resistor R4 and one end of a capacitor C7; the other end of the capacitor C7 is connected to the bases of the transistors Q1 and Q4, respectively; the emitter of the transistor Q3 is connected to the emitter of the transistor Q4; and the other end of the resistor R4 is connected to the collector of the transistor Q1.

7. The wire loss compensation system for wire-cut electric discharge machining with pulse-to-pulse floating voltage control according to claim 6, characterized in that: One end of a capacitor C6 and one end of a resistor R9 are connected between the emitter of the transistor Q1 and the collector of the transistor Q4, respectively. The other end of the capacitor C6 and the other end of the resistor R9 are connected to one end of a diode D4, one end of a resistor R10, and the gate of the field-effect transistor Q2. The other end of the diode D4 is connected to one end of a diode D5. The other end of the diode D5, the other end of the resistor R10, and the source of the field-effect transistor Q2 are connected to the output terminal VOUT-.

8. The wire loss compensation system for wire-cut electric discharge machining with pulse-to-pulse floating voltage control according to claim 7, characterized in that: The drain of the field effect transistor Q2 is connected to the output terminal OUT- and one end of the diode D3, the other end of the diode D3 is connected to the output terminal VOUT+, one end of the diode D6 and one end of the polarity capacitor C8, the other end of the polarity capacitor C8 is connected to the output terminal VOUT-, and the other end of the diode D6 is connected to the output terminal OUT+.

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