Display device and method of manufacturing same

Abstract

The invention relates to a display device and a method of manufacturing the same. The display device includes: a light emitting element layer; an optical functional layer including a plurality of optical functional patterns disposed on the light emitting element layer and a plurality of banks disposed between the plurality of optical functional patterns; a color filter layer disposed on the optical functional layer and including a plurality of color filters overlapping the plurality of optical functional patterns in a plan view; and a lens array disposed between the optical functional layer and the color filter layer. The lens array includes: a plurality of partition walls disposed on a bottom surface of the color filter layer adjacent to the optical functional layer; and a low refractive layer covering the plurality of partition walls and the bottom surface of the color filter layer.

Description

[0001] CROSS-REFERENCE TO RELATED APPLICATIONS

[0002] This application claims priority from Korean Patent Application No. 10-2024-0017560, filed on February 5, 2024, which is hereby incorporated by reference in its entirety. Technical Field

[0003] The present disclosure generally relates to a display device and a method of manufacturing a display device. Background Art

[0004] With the development of multimedia, the importance of display devices has increased. Therefore, various types of display devices, such as organic light emitting display (OLED) devices and liquid crystal display (LCD) devices, are used.

[0005] The display device includes a display panel such as an organic light emitting display panel (OLED panel) or a liquid crystal display panel (LCD panel) as a device for displaying an image. The OLED panel may cause the light generated in the light emitting layer to be emitted not only in the front direction but also in the side direction. The light efficiency can be determined relative to the light emitted in the front direction. In other words, as used herein, "light efficiency" can be defined as the ratio of the amount of light emitted in the front direction to the total amount of light emitted. That is, the light emitted in the side direction may cause a degradation of the light efficiency. Therefore, it is desirable to increase the light emitted in the front direction in the display device, thereby improving the light efficiency.

[0006] The above information disclosed in this Background section is only for enhancement of understanding of the background of the disclosure and therefore the above information may contain information that does not form the prior art that is already known in this country to a person of ordinary skill in the art. Summary of the Invention

[0007] The embodiment provides a display device having improved light efficiency and a method of manufacturing the display device having improved light efficiency.

[0008] According to one aspect of the present disclosure, a display device is provided, comprising: a light-emitting element layer; an optical function layer comprising a plurality of optical function patterns arranged on the light-emitting element layer and a plurality of embankments arranged between the plurality of optical function patterns; a color filter layer arranged on the optical function layer, the color filter layer comprising a plurality of color filters overlapping with the plurality of optical function patterns in a plan view; and a lens array arranged between the optical function layer and the color filter layer, wherein the lens array comprises: a plurality of partition walls arranged on a bottom surface of the color filter layer adjacent to the optical function layer; and a low refractive layer covering the plurality of partition walls and the bottom surface of the color filter layer.

[0009] The plurality of partition walls may have a refractive index higher than that of the low-refractive layer.

[0010] The plurality of partition walls may have a light transmittance of 95% or more.

[0011] The low-refractive layer may have a refractive index of 1 to 1.5.

[0012] Each of the plurality of optical functional patterns may overlap with at least one of the plurality of partition walls in the plan view.

[0013] A bottom surface of the low-refractive layer adjacent to the optical function layer may include a plurality of concave portions recessed toward the bottom surface of the color filter layer.

[0014] Each of the plurality of optical functional patterns may overlap with at least two of the plurality of concave portions in the plan view.

[0015] The lens array may further include a plurality of lenses disposed between the optical function layer and the low-refractive layer.

[0016] Each of the plurality of lenses may have a refractive index higher than the refractive index of the low-refractive layer.

[0017] Each of the plurality of lenses may have a shape complementary to a shape of a portion of the low-refractive layer facing the plurality of lenses.

[0018] Each of the plurality of lenses may have a first thickness at the partition wall and a second thickness at the bottom surface of the color filter layer between the plurality of partition walls. The first thickness may be thinner than the second thickness.

[0019] The plurality of color filters may include a first color filter and a second color filter, the first color filter and the second color filter being arranged in a specific direction. The plurality of partition walls may include: an outer partition wall overlapping the plurality of embankments; and at least one inner partition wall overlapping each of the first color filter and the second color filter in the plan view.

[0020] The outer partition wall may be provided along an edge of each of the first color filter and the second color filter in the plan view.

[0021] The outer partition wall may comprise a light absorbing material.

[0022] The thickness of the low-refractive layer may increase in a direction toward the plurality of partition walls.

[0023] One of the plurality of partition walls may have a top surface adjacent to the color filter layer, a bottom surface opposite to the top surface, and a first side surface and a second side surface connecting the top surface and the bottom surface to each other. The low-refractive layer may be in contact with the first side surface, the second side surface, and the bottom surface and partially surround the plurality of partition walls.

[0024] According to another aspect of the present disclosure, a display device is provided, comprising: a light-emitting element layer; an optical function layer comprising a plurality of optical function patterns arranged on the light-emitting element layer and a plurality of embankments arranged between the plurality of optical function patterns; a color filter layer arranged on the optical function layer, the color filter layer comprising a plurality of color filters overlapping with the plurality of optical function patterns in a plan view; and a lens array arranged between the optical function layer and the color filter layer, wherein the lens array comprises: a plurality of lenses arranged on the optical function layer, the plurality of lenses having at least two convex shapes overlapping with each of the plurality of optical function patterns in the plan view; and a low refractive layer covering the plurality of lenses and a bottom surface of the color filter layer adjacent to the optical function layer.

[0025] The low-refractive layer may have a property of being capable of a low-temperature process of 100 degrees or less.

[0026] According to another aspect of the present disclosure, a method for manufacturing a display device is provided, the method comprising: forming a light-emitting element layer on a first substrate; forming an optical functional layer on the light-emitting element layer, the optical functional layer comprising a plurality of optical functional patterns and a plurality of dams arranged between the plurality of optical functional patterns; forming a color filter layer on a second substrate, the color filter layer comprising a plurality of color filters overlapping with the plurality of optical functional patterns; forming a plurality of partition walls on the color filter layer; forming a low-refractive layer, the low-refractive layer covering the plurality of partition walls and the color filter layer; and bonding the first substrate and the second substrate to each other with a filler member interposed between the first substrate and the second substrate. BRIEF DESCRIPTION OF THE DRAWINGS

[0027] Example embodiments will now be described more fully hereinafter with reference to the accompanying drawings; however, example embodiments may be embodied in different forms and should not be construed as limited to the embodiments set forth herein. Rather, these embodiments are provided so that this disclosure will be thorough and complete, and will fully convey the scope of the example embodiments to those skilled in the art.

[0028] In the accompanying drawings, dimensions may be exaggerated for clarity of illustration. It will be understood that when an element is referred to as being "between" two elements, the element can be the only element between the two elements, or one or more intervening elements may be present. Like reference numerals always represent like elements.

[0029] Figure 1 is a block diagram illustrating an embodiment of a display device of the present disclosure.

[0030] Figure 2 It shows Figure 1 A block diagram of an embodiment of any one of the multiple sub-pixels shown in FIG.

[0031] Figure 3 It shows Figure 1 A plan view of an embodiment of a display panel is shown in FIG.

[0032] Figure 4 It shows Figure 1 sectional view of an embodiment of a display panel shown in .

[0033] Figure 5 It shows Figure 3 A plan view of an embodiment of any one of the plurality of pixels shown in FIG.

[0034] Figure 6 It is along Figure 5 A cross-sectional view taken along line II' shown in FIG.

[0035] Figure 7 It shows Figure 6 A cross-sectional view of portion A shown in FIG.

[0036] Figure 8 It shows the settings Figure 3 1 is a plan view of an embodiment of a partition wall in one of a plurality of pixels shown in FIG.

[0037] Figure 9 is a plan view illustrating a pixel according to another embodiment of the present disclosure.

[0038] Figure 10 It shows the manufacturing Figure 6 A flow chart of an embodiment of a method of displaying a device is shown in FIG.

[0039] Figure 11 yes Figure 10 , a cross-sectional view of the display device in step S1020 is shown in FIG.

[0040] Figure 12 yes Figure 10 , a cross-sectional view of the display device in step S1040 is shown in FIG.

[0041] Figure 13 It shows Figure 10 FIG. 1 is a flow chart of an embodiment of step S1030 shown in FIG.

[0042] Figure 14 yes Figure 13 A cross-sectional view of the display device in step S1032 is shown in FIG.

[0043] Figure 15 yes Figure 13 A cross-sectional view of the display device in step S1033 is shown in FIG.

[0044] Figure 16 is a cross-sectional view showing another embodiment of a display device. DETAILED DESCRIPTION

[0045] Hereinafter, embodiments of the present disclosure will be described in more detail with reference to the accompanying drawings. In order not to unnecessarily obscure the subject matter of the present disclosure, in the following description, only the necessary parts for understanding the operation according to the present disclosure are described, and the description of other parts is omitted. In addition, the present disclosure is not limited to the exemplary embodiments described herein, but can be implemented in various different forms. On the contrary, the exemplary embodiments described herein are provided to thoroughly and completely describe the disclosed content and fully convey the ideas of the present disclosure to those of ordinary skill in the art.

[0046] Throughout this specification, when an element is referred to as being "connected" or "coupled" to another element, the element may be directly connected or directly coupled to the other element, or indirectly connected or indirectly coupled to the other element with one or more intervening elements between the element and the other element. The technical terms used herein are only used to illustrate the purpose of a specific embodiment and are not intended to limit the embodiment. It will be understood that when a component "includes" an element, unless there is another description to the contrary, it should be understood that the component does not exclude another element, but may also include another element. The terms used herein are only for the purpose of describing a specific embodiment and are not intended to be restrictive. Unless the context clearly indicates otherwise, as used herein, "one", "one (kind / person)", "the (said)" and "at least one (kind / person)" do not represent a limit to quantity and are intended to include both the singular and the plural. For example, unless the context clearly indicates otherwise, "an element" has the same meaning as "at least one element". "At least one (kind / person)" should not be interpreted as limiting "one" or "one (kind / person)". "Or" means "and / or". As used herein, the term "and / or" includes any and all combinations of one or more of the relevant listed items. It will be understood that, for the purposes of this disclosure, "at least one of X, Y, and Z" may be interpreted as only X, only Y, only Z, or any combination of two or more of X, Y, and Z (e.g., XYZ, XY, YZ, XZ). Similarly, for the purposes of this disclosure, "at least one selected from the group consisting of X, Y, and Z" may be interpreted as only X, only Y, only Z, or any combination of two or more of X, Y, and Z (e.g., XYZ, XY, YZ, XZ).

[0047] It will be understood that although the terms "first," "second," etc. may be used herein to describe various elements, these elements should not be limited by these terms. These terms are merely used to distinguish one element from another. Thus, the "first" element discussed below may also be referred to as the "second" element without departing from the teachings of the present disclosure.

[0048] For ease of description, spatially relative terms such as "below" and "above" may be used herein to describe the relationship of one element to another element as shown in the accompanying drawings. It will be understood that the spatially relative terms and the configurations shown are intended to cover different orientations of the device in use or operation in addition to the orientations described herein and depicted in the accompanying drawings. For example, if the device in the accompanying drawings is turned over, elements described as "below" or "beneath" other elements or features will subsequently be oriented as "above" the other elements or features. Thus, the exemplary term "above" can cover both above and below orientations. The device may be oriented otherwise (e.g., rotated 90 degrees or at other orientations), and the spatially relative descriptors used herein interpreted accordingly.

[0049] Furthermore, embodiments of the present disclosure are described herein with reference to schematic illustrations of idealized embodiments (and intermediate structures) of the present disclosure, such that variations from the illustrated shapes due to, for example, manufacturing techniques and / or tolerances are to be expected. Thus, embodiments of the present disclosure should not be limited to the specific shapes of regions illustrated herein but are to include deviations in shapes resulting from, for example, manufacturing techniques. The regions illustrated in the figures are schematic in nature and their shapes are not intended to represent the actual shapes of regions of a device and are not intended to limit the scope of the present disclosure.

[0050] Figure 1 is a block diagram illustrating an embodiment of a display device of the present disclosure.

[0051] Reference Figure 1 , the display device 100 may include a display panel 110 , a gate driver 120 , a data driver 130 , a voltage generator 140 , and a controller 150 .

[0052] The display panel 110 may include subpixels SP. The subpixels SP may be connected to the gate driver 120 through first to m-th gate lines GL1 to GLm, where m is an integer greater than or equal to 1. The subpixels SP may be connected to the data driver 130 through first to n-th data lines DL1 to DLn, where n is an integer greater than or equal to 1.

[0053] Each of the plurality of sub-pixels SP may include at least one light-emitting element configured to generate light. Therefore, each of the plurality of sub-pixels SP may generate light of a specific color (such as red, green, blue, cyan, magenta, or yellow). Two or more sub-pixels among the plurality of sub-pixels SP may constitute a pixel PXL. For example, Figure 1 As shown in FIG, three sub-pixels SP may constitute one pixel PXL.

[0054] The gate driver 120 may be connected to the sub-pixels SP arranged in a row direction through the first to m-th gate lines GL1 to GLm. The gate driver 120 may output gate signals to the first to m-th gate lines GL1 to GLm in response to a gate control signal GCS. In an embodiment, the gate control signal GCS may include a start signal indicating the start of each frame and a horizontal synchronization signal for outputting a gate signal in synchronization with the timing of applying a data signal.

[0055] In an embodiment, first to m-th emission control lines EL1 to ELm connected to the sub-pixels SP in the row direction may be further provided. The gate driver 120 may include an emission control driver configured to control the first to m-th emission control lines EL1 to ELm, and the emission control driver may operate under the control of the controller 150.

[0056] The gate driver 120 may be provided on one side of the display panel 110. However, implementations are not limited thereto. For another example, the gate driver 120 may be divided into two or more drivers that are physically and / or logically separated, and these drivers may be provided on one side of the display panel 110 and on the other side of the display panel 110 opposite to the one side. Thus, in some embodiments, the gate driver 120 may be provided at the periphery of the display panel 110 in various forms.

[0057] The data driver 130 can be connected to the sub-pixels SP arranged in the column direction through the first data line DL1 to the nth data line DLn. The data driver 130 receives image data DATA and a data control signal DCS from the controller 150. The data driver 130 can operate in response to the data control signal DCS. In an embodiment, the data control signal DCS may include a source start pulse, a source shift clock, a source output enable signal, and the like.

[0058] The data driver 130 can apply data signals having grayscale voltages corresponding to the image data DATA to the first to nth data lines DL1 to DLn using voltages from the voltage generator 140. When a gate signal is applied to each of the first to mth gate lines GL1 to GLm, the data signals corresponding to the image data DATA can be applied to the data lines DL1 to DLm. Consequently, the corresponding subpixels SP can generate light corresponding to the data signals. Thus, an image can be displayed on the display panel 110.

[0059] In an embodiment, the gate driver 120 and the data driver 130 may include complementary metal oxide semiconductor (CMOS) circuit elements.

[0060] The voltage generator 140 may operate in response to a voltage control signal VCS from the controller 150. The voltage generator 140 may be configured to generate a plurality of voltages and provide the generated plurality of voltages to components of the display device 100. For example, the voltage generator 140 may be configured to generate the plurality of voltages by receiving an input voltage from outside the display device 100, adjusting the received voltage, and regulating the adjusted voltage.

[0061] The voltage generator 140 may generate a first power supply voltage VDD and a second power supply voltage VSS, and the generated first power supply voltage VDD and second power supply voltage VSS may be provided to the subpixel SP. The first power supply voltage VDD may have a relatively high voltage level, and the second power supply voltage VSS may have a voltage level lower than the voltage level of the first power supply voltage VDD. In other embodiments, the first power supply voltage VDD or the second power supply voltage VSS may be provided by an external device of the display device 100.

[0062] In addition, the voltage generator 140 can generate various voltages. For example, the voltage generator 140 can generate an initialization voltage applied to the sub-pixel SP. For example, in a sensing operation for sensing electrical characteristics of a transistor and / or a light-emitting element of the sub-pixel SP, a predetermined reference voltage can be applied to the first to nth data lines DL1 to DLn, and the voltage generator 140 can generate the reference voltage.

[0063] The controller 150 may control the overall operation of the display device 100. The controller 150 may receive input image data IMG and a control signal CTRL for controlling the display of the input image data IMG from the outside. The controller 150 may provide a gate control signal GCS, a data control signal DCS, and a voltage control signal VCS in response to the control signal CTRL.

[0064] The controller 150 may convert the input image data IMG into data suitable for the display device 100 or the display panel 110, thereby outputting the image data DATA. In an embodiment, the controller 150 may calibrate the input image data IMG to be suitable for sub-pixels SP in a row unit, thereby outputting the image data DATA.

[0065] Two or more components among the data driver 130, the voltage generator 140, and the controller 150 may be mounted in one integrated circuit. Figure 1As shown in FIG, the data driver 130, the voltage generator 140, and the controller 150 may be included in a driver integrated circuit DIC. The data driver 130, the voltage generator 140, and the controller 150 may be functionally divided components in one driver integrated circuit DIC. In other embodiments, at least one of the data driver 130, the voltage generator 140, and the controller 150 may be provided as a component separate from the driver integrated circuit DIC.

[0066] Figure 2 It shows Figure 1 A block diagram of an embodiment of any one of the plurality of sub-pixels shown in FIG. Figure 2 In the example, it is shown Figure 1 The sub-pixel SPij arranged in the i-th row (i is an integer greater than or equal to 1 and less than or equal to m) and the j-th column (j is an integer greater than or equal to 1 and less than or equal to n) among the sub-pixels SP shown in .

[0067] Reference Figure 2 , the sub-pixel SPij may include a sub-pixel circuit SPC and a light emitting element LD.

[0068] The light emitting element LD may be connected between a first power supply voltage node VDDN and a second power supply voltage node VSSN. The first power supply voltage node VDDN may be a transmission voltage node. Figure 1 The first power supply voltage VDD node shown in FIG, and the second power supply voltage node VSSN can be a transmission Figure 1 Node of the second power supply voltage VSS shown in .

[0069] The anode electrode AE of the light-emitting element LD may be connected to the first power supply voltage node VDDN through the sub-pixel circuit SPC, and the cathode electrode CE of the light-emitting element LD may be connected to the second power supply voltage node VSSN. For example, the anode electrode AE of the light-emitting element LD may be connected to the first power supply voltage node VDDN through one or more transistors included in the sub-pixel circuit SPC.

[0070] The sub-pixel circuit SPC can be connected to Figure 1 The i-th gate line GLi, the m-th gate line GLm, and the Figure 1 The i-th emission control line ELi among the first to m-th emission control lines EL1 to ELm shown in FIG, and Figure 1 The j-th data line DLj among the first to n-th data lines DL1 to DLn is shown in FIG. The sub-pixel circuit SPC may be configured to control the light emitting element LD according to signals received through the signal lines.

[0071] The sub-pixel circuit SPC may operate in response to a gate signal received through the i-th gate line GLi. The i-th gate line GLi may include one or more sub-gate lines. Figure 2 As shown in , the i-th gate line GLi may include a first sub-gate line SGL1 and a second sub-gate line SGL2. The sub-pixel circuit SPC may operate in response to a gate signal received through the first sub-gate line SGL1 and the second sub-gate line SGL2. Thus, when the i-th gate line GLi includes two or more sub-gate lines, the sub-pixel circuit SPC may operate in response to a gate signal received through the corresponding sub-gate line.

[0072] The sub-pixel circuit SPC may operate in response to an emission control signal received through the i-th emission control line ELi. In an embodiment, the i-th emission control line ELi may include one or more sub-emission control lines. When the i-th emission control line ELi includes two or more sub-emission control lines, the sub-pixel circuit SPC may operate in response to an emission control signal received through the corresponding sub-emission control line.

[0073] The sub-pixel circuit SPC can receive a data signal via the j-th data line DLj. The sub-pixel circuit SPC can store a voltage corresponding to the data signal in response to at least one of the gate signals received via the first sub-gate line SGL1 and the second sub-gate line SGL2. The sub-pixel circuit SPC can control a current flowing from the first power supply voltage node VDDN to the second power supply voltage node VSSN through the light-emitting element LD according to the stored voltage in response to the emission control signal received via the i-th emission control line ELi. Consequently, the light-emitting element LD can generate light having a brightness corresponding to the data signal.

[0074] Figure 3 It shows Figure 1 As used herein, a “plan view” is a view in the thickness direction (ie, the third direction DR3 ) of the substrate SUB.

[0075] Reference Figure 3 , Figure 1 The display panel 110 shown in FIG. 1 may include a display area DA and a non-display area NDA. The display panel 110 may display an image through the display area DA. The non-display area NDA may be provided at the periphery of the display area DA.

[0076] The display panel 110 may include a substrate SUB, sub-pixels SP, and pads PD.

[0077] The sub-pixels SP may be arranged in the display area DA on the substrate SUB. The sub-pixels SP may be arranged in a matrix along a first direction DR1 and a second direction DR2 intersecting the first direction DR1. However, the embodiment is not limited thereto. For another example, the sub-pixels SP may be arranged in a zigzag pattern along the first direction DR1 and the second direction DR2. For example, the sub-pixels SP may be arranged in a zigzag pattern along the first direction DR1 and the second direction DR2. The first direction DR1 may be a row direction, and the second direction DR2 may be a column direction.

[0078] Two or more sub-pixels among the sub-pixels SP may constitute one pixel PXL.

[0079] Components for controlling the sub-pixels SP may be provided in the non-display area NDA on the substrate SUB. For example, lines connected to the sub-pixels SP (such as Figure 1 The first to m-th gate lines GL1 to GLm and the first to n-th data lines DL1 to DLn shown in FIG. 5 may be disposed in the non-display area NDA.

[0080] Figure 1 At least one of the gate driver 120, the data driver 130, the voltage generator 140, and the controller 150 shown in FIG may be integrated in the non-display area NDA of the display panel 110. In an embodiment, Figure 1 The gate driver 120 shown in FIG. 1 is mounted on the display panel 110 and may be disposed in the non-display area NDA. In other embodiments, the gate driver 120 may be implemented as an integrated circuit separate from the display panel 110.

[0081] The pad PD may be provided in the non-display area NDA on the substrate SUB. The pad PD may be electrically connected to the sub-pixel SP through a line. For example, the pad PD may be connected to the sub-pixel SP through the first to nth data lines DL1 to DLn.

[0082] Reference Figure 1 and Figure 3 The pads PD can connect the display panel 110 to other components of the display device 100. In an embodiment, the pads PD can be used to connect the display panel 110 to other components of the display device 100. Figure 1 The driver integrated circuit DIC shown in FIG. 1 provides voltages and signals for operating components included in the display panel 110. For example, the first to nth data lines DL1 to DLn can be connected to the driver integrated circuit DIC via pads PD. For example, a first power supply voltage VDD and a second power supply voltage VSS can be received from the driver integrated circuit DIC via pads PD. When the gate driver 120 is installed in the display panel 110, a gate control signal GCS can be transmitted from the driver integrated circuit DIC to the gate driver 120 via pads PD.

[0083] In an embodiment, the circuit board may be electrically connected to the pad PD using a conductive adhesive member such as an anisotropic conductive film. The circuit board may be a flexible printed circuit board (FPCB) or a flexible film having a flexible material. The driver integrated circuit DIC may be mounted on the circuit board to be electrically connected to the pad PD.

[0084] In embodiments, the display area DA may have various shapes. The display area DA may have a closed loop shape including straight edges and / or curved edges. For example, the display area DA may have shapes such as polygonal, circular, semicircular, and elliptical.

[0085] In an embodiment, the display panel 110 may have a flat display surface. In other embodiments, the display panel 110 may have a rounded display surface at least in part. In an embodiment, the display panel 110 may be bendable, foldable, or rollable. The display panel 110 and / or the substrate SUB may include a flexible material.

[0086] Figure 4 It shows Figure 1 sectional view of an embodiment of a display panel shown in .

[0087] Reference Figure 4 , the display panel 110 may include a substrate SUB, a pixel circuit layer PCL, a light emitting element layer LDL, an optical function layer OFL, and a color filter layer CFL.

[0088] The pixel circuit layer PCL may be disposed on the substrate SUB. The pixel circuit layer PCL may include a pixel circuit (see Figure 2 ) and at least one insulating layer positioned between the circuit elements. The circuit elements may include a plurality of transistors and signal lines connected to the transistors. In an example, each of the plurality of transistors may be a metal oxide semiconductor field effect transistor (MOSFET), but the present disclosure is not limited thereto. In addition, each of the plurality of transistors may have a form in which a semiconductor layer, a gate electrode, and a source electrode / drain electrode are sequentially stacked with an insulating layer interposed therebetween.

[0089] The above-described substrate SUB and pixel circuit layer PCL may be formed by applying semiconductor processes and equipment, but the present disclosure is not limited thereto.

[0090] The light emitting element layer LDL may include a light emitting element LD (see Figure 6 The light emitting elements LD may be provided in the first to third sub-pixels SP1 to SP3 (see FIG. Figure 6In the embodiment, the light emitting elements LD can emit light of the same color. Due to the different color filters CF (see Figure 6 ), the first to third sub-pixels SP1 to SP3 can emit light of different colors. In another embodiment, the light-emitting elements LD can emit light of different colors. However, the color and type of the light-emitting elements LD of the light-emitting element layer LDL are not limited.

[0091] The optical function layer OFL can be provided on the light emitting element layer LDL. The optical function layer OFL can use quantum dots to change the wavelength (or color) of light emitted from the light emitting element layer LDL. The optical function layer OFL can be formed on the substrate surface provided by the light emitting element layer LDL through a continuous process.

[0092] However, the optical functional layer OFL is described as being provided separately from the light-emitting element layer LDL. However, the present disclosure is not limited thereto. For another example, the light-emitting element provided in the light-emitting element layer LDL may be implemented as a light-emitting element (quantum dot display element) that emits light by changing the wavelength of the emitted light using quantum dots.

[0093] The color filter layer CFL may be provided on the optical function layer OFL. The color filter layer CFL may allow light emitted from each light emitting element LD to pass through the color filter layer CFL to be displayed on the display device 100 (see FIG. Figure 1 ) is selectively transmitted in the image display direction (or front direction). However, the present disclosure is not limited thereto.

[0094] The color filter layer CFL may include a color filter CF that selectively transmits light of one color therethrough. That is, the color filter layer CFL may selectively transmit light emitted from the light emitting element LD in an image display direction (or front direction) of the display panel 110 through the color filter layer CFL.

[0095] Despite Figure 4 , but a lens array LA may be provided between the optical function layer OFL and the color filter layer CFL (see FIG. Figure 6 ). The lens array LA may include at least two lenses with respect to each sub-pixel SP. The lens array LA may be used to improve the extraction efficiency (ie, light efficiency) of light emitted from the light emitting element LD.

[0096] Figure 5 It shows Figure 3 A plan view of an embodiment of any one of the plurality of pixels shown in FIG. Figure 5 For the sake of clarity and brevity, Figure 3Any one of the plurality of pixels PXL shown in FIG is schematically shown as a first pixel PXL1 . The other pixels PXL may be configured identically to the first pixel PXL1 .

[0097] Reference Figure 5 , the first pixel PXL1 may include first to third sub-pixels SP1 to SP3 arranged in the first direction DR1.

[0098] The first sub-pixel SP1 may include a first emission area EMA1 and a non-emission area NEMA at the periphery of the first emission area EMA1. The second sub-pixel SP2 may include a second emission area EMA2 and a non-emission area NEMA at the periphery of the second emission area EMA2. The third sub-pixel SP3 may include a third emission area EMA3 and a non-emission area NEMA at the periphery of the third emission area EMA3.

[0099] The first emission area EMA1 may be an area where light is emitted by an optical functional pattern corresponding to the first sub-pixel SP1. The second emission area EMA2 may be an area where light is emitted by an optical functional pattern corresponding to the second sub-pixel SP2. The third emission area EMA3 may be an area where light is emitted by an optical functional pattern corresponding to the third sub-pixel SP3. Figure 5 As described, each emission region may be understood as a region overlapping with the optical functional patterns corresponding to the first to third sub-pixels SP1 to SP3 .

[0100] Figure 6 It is along Figure 5 sectional view taken along line II' shown in FIG.

[0101] Reference Figure 6 The first pixel PXL1 may include a first substrate SUB1, a pixel circuit layer PCL, a light emitting element layer LDL, a thin film encapsulation layer TFE, an optical function layer OFL, a lens array LA, a color filter layer CFL, and a second substrate SUB2.

[0102] A light emitting element layer LDL including first to third light emitting elements LD1 to LD3 may be disposed on the first substrate SUB1. In addition, a pixel circuit layer PCL may be disposed between the first substrate SUB1 and the light emitting element layer LDL.

[0103] The pixel circuit layer PCL may include various driving elements and lines for driving the first to third light emitting elements LD1 to LD3. For example, the pixel circuit layer PCL may include a transistor and a storage capacitor, which are included in the sub-pixel circuit SPC of each of the first to third sub-pixels SP1 to SP3 (see Figure 2For example, the pixel circuit layer PCL may further include a circuit connected to each pixel PXL (see Figure 3 ). In addition, the pixel circuit layer PCL may include various components, but the embodiment is not limited thereto.

[0104] The light emitting element layer LDL may include a first light emitting element LD1 positioned in the first sub-pixel SP1, a second light emitting element LD2 positioned in the second sub-pixel SP2, and a third light emitting element LD3 positioned in the third sub-pixel SP3. In some embodiments, each of the first to third light emitting elements LD1 to LD3 may include a self-emitting element such as an organic light emitting diode. For example, each of the first to third light emitting elements LD1 to LD3 may have an anode electrode AE (see Figure 2 ), hole transport layer, organic light emitting layer, electron transport layer and cathode electrode CE (see Figure 2 ) are sequentially stacked, but the present disclosure is not limited thereto. For another example, each of the first to third light-emitting elements LD1 to LD3 may include an inorganic light-emitting element including an inorganic light-emitting material.

[0105] In some embodiments, the anode electrode AE may be formed by patterning each of the first to third sub-pixels SP1 to SP3. Since the anode electrode AE supplies holes to the organic light-emitting layer, the anode electrode AE may be made of a transparent conductive material having a high work function. For example, the anode electrode AE may be made of a material such as tin oxide (SnO x ), zinc oxide (ZnO), indium tin oxide (ITO), indium zinc oxide (IZO) or indium tin zinc oxide (ITZO), but the present disclosure is not limited thereto.

[0106] The organic light emitting layer may be provided between the anode electrode AE and the cathode electrode CE. The organic light emitting layer may emit light when electrons and holes supplied from the anode electrode AE and the cathode electrode CE are recombined in the organic light emitting layer.

[0107] The cathode electrode CE may be provided on the organic light emitting layer. The cathode electrode CE may be formed as a layer extending over the front surface of the first substrate SUB1. The cathode electrodes CE of the first to third sub-pixels SP1 to SP3 may be connected to each other to form an integral body. Since the cathode electrode CE supplies electrons to the organic light emitting layer, the cathode electrode CE may include a conductive material having a low work function. For example, the cathode electrode CE may be made of a conductive material such as tin oxide (SnO x), zinc oxide (ZnO), indium tin oxide (ITO), indium zinc oxide (IZO), or indium tin zinc oxide (ITZO) transparent conductive material or ytterbium alloy. In addition, the cathode electrode CE may be made of a metal material such as silver (Ag), copper (Cu), or magnesium-silver (Mg-Ag) alloy, or a metal material having a very thin thickness, but the present disclosure is not limited thereto.

[0108] The thin film encapsulation layer TFE may be provided on the light emitting element layer LDL. The thin film encapsulation layer TFE may be an encapsulation substrate or have the form of an encapsulation layer provided as a multilayer. When the thin film encapsulation layer TFE has the form of an encapsulation layer, the thin film encapsulation layer TFE may include an inorganic layer and / or an organic layer. For example, the thin film encapsulation layer TFE may have a form in which an inorganic layer, an organic layer, and an inorganic layer are stacked sequentially. The thin film encapsulation layer TFE may prevent external air and moisture from penetrating into the light emitting element layer LDL and the pixel circuit layer PCL. However, in another embodiment, the thin film encapsulation layer TFE may be omitted.

[0109] The optical function layer OFL may be disposed on the thin film encapsulation layer TFE. The optical function layer OFL may include optical function patterns CCP and banks BNK disposed between the optical function patterns CCP. In addition, the optical function layer OFL may further include light scattering patterns LSP including scatterers SCT.

[0110] The bank BNK may be disposed on the thin film encapsulation layer TFE, may be in contact with the thin film encapsulation layer TFE, and may protrude from the thin film encapsulation layer TFE in a thickness direction (eg, third direction DR3) of the first substrate SUB1.

[0111] In addition, the bank BNK may include at least one of an organic material, an inorganic material, and a metal. In an example, the bank BNK may include a material including silicon nitride (SiN x ) or silicon oxide (SiO x Alternatively, the bank BNK may include various types of organic materials or a combination of organic and inorganic materials. For example, the bank BNK may include niobium oxide (Nb2O5), silicon nitride (SiN x ), tantalum pentoxide (Ta2O5), zirconium dioxide (ZrO2), titanium dioxide (TiO2), aluminum (Al), titanium (Ti), and silver (Ag), etc. However, the present disclosure is not limited thereto. That is, the material constituting the bank BNK can be variously changed.

[0112] In an embodiment, the bank BNK may define first to third emission areas EMA1 to EMA3. The bank BNK may define an opening OP between the bank BNK. For example, the opening OP may be formed by etching the bank BNK. In addition, an optical functional pattern CCP and a light scattering pattern LSP may be provided in the opening OP. For example, by using inkjet printing technology, a first optical functional pattern CCP1 may be provided and formed in the first emission area EMA1, a second optical functional pattern CCP2 may be provided and formed in the second emission area EMA2, and a light scattering pattern LSP may be provided and formed in the third emission area EMA3.

[0113] As such, the first and second optical functional patterns CCP1 and CCP2 according to respective colors and the light scattering pattern LSP may be respectively disposed in the openings OP overlapping the first to third emission areas EMA1 to EMA3 .

[0114] The first optical functional pattern CCP1, the second optical functional pattern CCP2, and the light scattering pattern LSP may be arranged on the light emitting element layer LDL. The first optical functional pattern CCP1, the second optical functional pattern CCP2, and the light scattering pattern LSP may be arranged below the color filter CF. The first optical functional pattern CCP1, the second optical functional pattern CCP2, and the light scattering pattern LSP may be arranged below the lens array LA. That is, the first optical functional pattern CCP1, the second optical functional pattern CCP2, and the light scattering pattern LSP may be arranged between the light emitting element layer LDL and the lens array LA. In addition, the first optical functional pattern CCP1, the second optical functional pattern CCP2, and the light scattering pattern LSP may be arranged (or patterned) while being surrounded by the embankment BNK.

[0115] The first optical functional pattern CCP1 and the second optical functional pattern CCP2 may be configured to change the wavelength of light. The first optical functional pattern CCP1 and the second optical functional pattern CCP2 may include quantum dots QD. In an embodiment, the first light-emitting element LD1 to the third light-emitting element LD3 may be configured to emit blue light. The first optical functional pattern CCP1 may include first light conversion particles that convert light of a third color (e.g., blue) emitted from the blue light emitting layer of the first light-emitting element LD1 into light of a first color (e.g., red). For example, the first optical functional pattern CCP1 may include a plurality of first quantum dots QD1 dispersed in a matrix material (such as a matrix resin). The first quantum dots QD1 may absorb blue light and emit red light by converting the wavelength of the blue light according to energy transition.

[0116] The second optical functional pattern CCP2 may include second light conversion particles that convert light of a third color (e.g., blue) emitted from the blue light emitting layer of the second light emitting element LD2 into light of a second color (e.g., green). For example, the second optical functional pattern CCP2 may include a plurality of second quantum dots QD2 dispersed in a matrix material (e.g., a matrix resin). The second quantum dots QD2 may absorb blue light and emit green light by converting the wavelength of the blue light according to energy transition.

[0117] In this way, blue light having a relatively short wavelength in the visible light band is incident on each of the first quantum dot QD1 and the second quantum dot QD2, so that the absorption coefficient of the first quantum dot QD1 and the second quantum dot QD2 can be increased. Therefore, the efficiency of light emitted from the first pixel PXL1 and the second pixel PXL2 (i.e., light efficiency) can be improved, and excellent color reproduction can be ensured.

[0118] A light scattering pattern LSP may be provided to effectively output the third color (or blue) light emitted from the blue light emitting layer of the third light emitting element LD3. For example, the light scattering pattern LSP may include a scatterer SCT. In an example, the scatterer SCT of the light scattering pattern LSP may include various light scattering particles or light scattering materials. For example, the scatterer SCT may include silicon dioxide (SiO x ) (for example, silica beads or hollow silica, etc.), titanium oxide (TiO x ), zirconium oxide (ZrO x ), aluminum oxide (Al x O y ), indium oxide (In x O y ), zinc oxide (ZnO x ), tin oxide (SnO x ) and antimony oxide (Sb x O y However, the present disclosure is not limited thereto.

[0119] The scatterer SCT may also be selectively included inside the first optical functional pattern CCP1 or the second optical functional pattern CCP2. In addition, the scatterer SCT may be omitted so that a light scattering pattern LSP configured with a transparent polymer is provided.

[0120] The lens array LA may be disposed on the optical function layer OFL. The lens array LA may be disposed between the optical function layer OFL and the color filter layer CFL. The lens array LA may collect light emitted from the light emitting element layer LDL to pass through the optical function layer OFL. For example, the lens array LA may refract light passing through the optical function layer OFL (e.g., Figure 7The lens array LA can be used to improve the extraction efficiency (ie, light efficiency) of light emitted from the first to third light emitting elements LD1 to LD3.

[0121] The lens array LA may include a partition wall WL and a low-refractive layer LR. The partition wall WL may be arranged on the bottom surface of the color filter layer CFL adjacent to the optical function layer OFL. In addition, the low-refractive layer LR may cover the partition wall WL and the bottom surface of the color filter layer CFL.

[0122] At least one of the plurality of partition walls WL may be disposed on each of the plurality of openings OP defined between the embankments BNK. The partition wall WL may overlap with the first and second optical functional patterns CCP1 and CCP2 and the light scattering pattern LSP in a plan view. In an example, at least one of the plurality of partition walls WL may be disposed so as to overlap with the first optical functional pattern CCP1. At least one of the plurality of partition walls WL may be disposed so as to overlap with the second optical functional pattern CCP2. At least one of the plurality of partition walls WL may be disposed so as to overlap with the light scattering pattern LSP. At least one of the plurality of partition walls WL may be disposed so as to overlap with the boundary between the first and second optical functional patterns CCP1 and CCP2 in a plan view. At least one of the plurality of partition walls WL may be disposed so as to overlap with the boundary between the second optical functional pattern CCP2 and the light scattering pattern LSP in a plan view.

[0123] The low refractive layer LR may be disposed between the first color filter CF1 and the first optical functional pattern CCP1 , between the second color filter CF2 and the second optical functional pattern CCP2 , and between the third color filter CF3 and the light scattering pattern LSP.

[0124] The bottom surface of the low-refractive layer LR adjacent to the optical functional layer OFL may include a concave portion CNC that is recessed toward the bottom surface of the color filter layer CFL (for example, in the third direction DR3). The concave portion CNC may overlap with the first optical functional pattern CCP1, the second optical functional pattern CCP2, and the light scattering pattern LSP in a plan view. In an example, at least two of the plurality of concave portions CNC may be arranged to overlap with the first optical functional pattern CCP1. At least two of the plurality of concave portions CNC may be arranged to overlap with the second optical functional pattern CCP2. At least two of the plurality of concave portions CNC may be arranged to overlap with the light scattering pattern LSP. When x partition walls WL overlap with each of the first optical functional pattern CCP1, the second optical functional pattern CCP2, and the light scattering pattern LSP, (x+1) concave portions CNC may overlap with each of the first optical functional pattern CCP1, the second optical functional pattern CCP2, and the light scattering pattern LSP in a plan view (x is an integer greater than or equal to 1).

[0125] The low-refractive layer LR can be configured to refract or completely reflect corresponding light according to the incident angle of the light. For example, the low-refractive layer LR can provide a portion of the light that has passed through the first optical functional pattern CCP1 to the first optical functional pattern CCP1 again, so that the portion of the light can be provided to the low-refractive layer LR again. Therefore, the low-refractive layer LR can improve the light efficiency of the first optical functional pattern CCP1.

[0126] In an embodiment, the low-refractive layer LR may be provided to partially surround the partition wall WL (e.g., surround a portion of the partition wall WL). The low-refractive layer LR may be provided to other surfaces of the partition wall WL except for one surface in contact with the color filter layer CFL. The low-refractive layer LR may have a refractive index of 1 to 1.5. In addition, the partition wall WL may have a refractive index higher than that of the low-refractive layer LR and have a light transmittance of 95% or higher. Specifically, a plurality of partition walls WL may be provided to be spaced apart from each other in the low-refractive layer LR and to have a refractive deviation from the low-refractive layer LR. Therefore, total reflection may effectively occur at the side surface of the partition wall WL (e.g., Figure 7 The optical path L2 in the figure).

[0127] The lens array LA may further include a lens LS disposed between the optical function layer OFL and the low refractive layer LR. The lens LS may be formed by bonding the low refractive layer LR surrounding the partition wall WL as a filler member to the optical function layer OFL. For example, the lens LS may be formed by a filler member.

[0128] Each of the plurality of lenses LS may have a first thickness D1 at the partition wall WL and a second thickness D2 at the bottom surface of the color filter layer CFL between the partition walls WL. The first thickness D1 may be the thickness of the filler member overlapping the partition wall WL in the third direction DR3. The second thickness D2 may be the thickness of the filler member overlapping the concave portion CNC in the third direction DR3. The first thickness D1 may be thinner than the second thickness D2.

[0129] The lens LS may have a refractive index higher than that of the low-refractive layer LR. The lens LS may have a shape complementary to that of the low-refractive layer LR. The lens LS may have a convex shape on one surface facing the low-refractive layer LR that is complementary to the shape of the concave portion CNC of the low-refractive layer LR. The convex shape of the lens LS may be arranged to correspond to the concave portion CNC of the low-refractive layer LR.

[0130] In this way, the optical distance between the low-refractive layer LR formed along the partition wall WL and the optical function layer OFL is reduced, making it possible to improve the light extraction efficiency of the light from the front surface. In addition, the shape of the lens LS formed along the concave portion CNC of the low-refractive layer LR can be changed more freely, making it possible to optimize light efficiency.

[0131] The color filter layer CFL may be provided on the lens array LA. In embodiments, the color filter layer CFL may be separately manufactured and bonded to the optical function layer OFL via a filler member. For example, the optical function layer OFL formed on the first substrate SUB1 and the color filter layer CFL formed on the second substrate SUB2 may be bonded to each other via the color filter CF. However, before the optical function layer OFL and the color filter layer CFL are bonded to each other, the second substrate SUB2 may include at least one partition wall WL and a low-refractive layer LR relative to each of the first to third color filters CF1 to CF3.

[0132] The color filter layer CFL may include first to third color filters CF1 to CF3 arranged in the first direction DR1. The first color filter CF1 may be disposed in the first subpixel SP1, the second color filter CF2 may be disposed in the second subpixel SP2, and the third color filter CF3 may be disposed in the third subpixel SP3.

[0133] In an example, the first color filter CF1 may overlap the first light emitting element LD1 in a plan view on the first optical functional pattern CCP1. The second color filter CF2 may overlap the second light emitting element LD2 in a plan view on the second optical functional pattern CCP2. The third color filter CF3 may overlap the third light emitting element LD3 in a plan view on the light scattering pattern LSP.

[0134] The colors of the first to third color filters CF1 to CF3 may correspond to the colors of light emitted from the first to third subpixels SP1 to SP3, respectively. For example, the first color filter CF1 is a red color filter and may include a red color filter material (e.g., a pigment or dye, etc.). The second color filter CF2 is a green color filter and may include a green color filter material (e.g., a pigment or dye, etc.). The third color filter CF3 is a blue color filter and may include a blue color filter material (e.g., a pigment or dye, etc.).

[0135] The color filter layer CFL may include a light-blocking pattern LBP disposed between the color filters CF. It will be appreciated that the emission area (or light-emitting area) EMA and the non-emission area NEMA of the first to third sub-pixels SP1 to SP3 are defined by the light-blocking pattern LBP. The area corresponding to the light-blocking pattern LBP may correspond to the non-emission area NEMA. The area that does not overlap with the light-blocking pattern LBP in a plan view may correspond to the emission area EMA.

[0136] In an embodiment, the light-blocking pattern LBP may include at least one of various light-blocking materials. In an embodiment, each of the plurality of light-blocking patterns LBP may be provided in the form of a multilayer structure that overlaps at least two of the first to third color filters CF1 to CF3 in a plan view. For example, each of the plurality of light-blocking patterns LBP may be formed as a multilayer structure that overlaps the first to third color filters CF1 to CF3 in a plan view. In another example, the light-blocking pattern LBP between the first and second color filters CF1 and CF2 may be formed as a multilayer structure that overlaps the first and second color filters CF1 and CF2 in a plan view, and the light-blocking pattern LBP between the second and third color filters CF2 and CF3 may be formed as a multilayer structure that overlaps the second and third color filters CF2 and CF3 in a plan view. The light-blocking pattern LBP between the first color filter CF1 and the third color filter CF3 of an adjacent pixel may be formed as a multilayer structure that overlaps the first and third color filters CF1 and CF3 in a plan view. As such, each of the first to third color filters CF1 to CF3 may extend to the non-emission area NEMA to form the light blocking pattern LBP.

[0137] Will refer to it later Figures 10 to 15 A method of manufacturing the lens array LA is described.

[0138] Figure 7 It shows Figure 6 A cross-sectional view of portion A shown in FIG.

[0139] Reference Figure 6 and Figure 7, partition walls WL may be provided on one surface of the color filter layer CFL that is opposite to the second substrate SUB2 so as to be spaced apart from each other in the first direction DR1. Hereinafter, although a partition wall WL overlapping the second color filter CF2 is described, this may also apply to a partition wall WL overlapping the first color filter CF1 and the third color filter CF3 in a plan view. In an embodiment, the partition wall WL may include an outer partition wall EWL and an inner partition wall IWL. The outer partition wall EWL may include a first outer partition wall EWL1 provided between the first color filter CF1 and the second color filter CF2 and a second outer partition wall EWL2 provided between the second color filter CF2 and the third color filter CF3. The inner partition wall IWL may include a first inner partition wall IWL1 and a second inner partition wall IWL2, and the first inner partition wall IWL1 and the second inner partition wall IWL2 are provided between the first outer partition wall EWL1 and the second outer partition wall EWL2 so as to overlap the second color filter CF2 in a plan view.

[0140] The low-refractive layer LR may be provided to cover the first to third color filters CF1 to CF3 and the partition wall WL. The low-refractive layer LR may be provided on the one surface of the color filter layer CFL that is opposite to the second substrate SUB2, and may be in contact with the first to third color filters CF1 to CF3 and the partition wall WL. In some embodiments, the first inner partition wall IWL1 may have a top surface US adjacent to the second color filter CF2, a bottom surface BS opposite to the top surface US, and a first side surface S1 and a second side surface S2 connecting the top surface US and the bottom surface BS to each other. In addition, the low-refractive layer LR may be in contact with the first side surface S1, the second side surface S2, and the bottom surface BS of the first inner partition wall IWL1, and may partially surround the first inner partition wall IWL1.

[0141] The low refractive layer LR may include a concave portion CNC recessed toward the bottom surface of the second color filter CF in the third direction DR3. The concave portion CNC may be formed between the first outer partition wall EWL1 and the first inner partition wall IWL1, between the first inner partition wall IWL1 and the second inner partition wall IWL2, and between the second inner partition wall IWL2 and the second outer partition wall EWL2. Figure 7 , three concave portions CNC are shown formed at the bottom surface of the second color filter CF2 to correspond to the second emission area EMA2. However, the present disclosure is not limited thereto. For another example, the low-refractive layer LR may include two or more concave portions CNC at the bottom surface of the second color filter CF2.

[0142] The thickness of the low-refractive layer LR may increase in the direction toward the partition wall WL. The thickness of the low-refractive layer LR may increase from the center CT of each of the plurality of concave portions CNC in the direction toward the partition wall WL. In other words, the thickness of the low-refractive layer LR measured on the one surface of the color filter layer CFL in a direction opposite to the third direction DR3 may increase as it approaches the partition wall WL. For example, the low-refractive layer LR may have a maximum thickness t1 at a portion adjacent to the first side surface S1 and the second side surface S2 of the first inner partition wall IWL1.

[0143] Meanwhile, the low refractive layer LR may have a minimum thickness t2 at the bottom surface BS of the first inner partition wall IWL1. Therefore, the optical distance between the low refractive layer LR and the optical function layer OFL is reduced by the partition wall WL, thereby improving light efficiency.

[0144] Figure 8 It shows the settings Figure 3 1 is a plan view of an embodiment of a partition wall in one of a plurality of pixels shown in FIG.

[0145] Reference Figure 8 The first pixel PXL1 may include first to third subpixels SP1 to SP3 arranged in the first direction DR1. In addition, the first to third subpixels SP1 to SP3 may include first to third color filters CF1 to CF3, respectively.

[0146] The first subpixel SP1 may include a first color filter CF1 and a light-blocking pattern LBP at the periphery of the first color filter CF1. The second subpixel SP2 may include a second color filter CF2 and a light-blocking pattern LBP at the periphery of the second color filter CF2. The third subpixel SP3 may include a third color filter CF3 and a light-blocking pattern LBP at the periphery of the third color filter CF3.

[0147] The first color filter CF1 may be disposed in a region corresponding to the first emission area EMA1 (see Figure 6 ) in an area overlapped with the bank BNK (see FIG. 2 ). The outer partition wall EWL may be provided along an edge of the first color filter CF1. The outer partition wall EWL may overlap with the bank BNK (see FIG. 2 ) in a plan view. Figure 6 ) overlap. In addition, the internal partition wall IWL may be provided to overlap with the first color filter CF1. In some embodiments, two internal partition walls IWL may be provided in the first color filter CF1. Since the two internal partition walls IWL are provided to be spaced apart from each other in the second direction DR2, three lenses LS arranged in the second direction DR2 may be formed in the first emission area EMA1 (see FIG. Figure 6 ).

[0148] The second color filter CF2 may be disposed in a region corresponding to the second emission area EMA2 (see FIG. Figure 6 ) in an area overlapping with the second color filter CF2. The external partition wall EWL may be provided along the edge of the second color filter CF2. In addition, the internal partition wall IWL may be provided so as to overlap with the second color filter CF2 in a plan view. In some embodiments, one internal partition wall IWL may be provided in the second color filter CF2. Since one internal partition wall IWL is provided to extend in the first direction DR1, two lenses LS arranged in the second direction DR2 may be formed in the second emission area EMA2.

[0149] The third color filter CF3 may be disposed in a plan view in parallel with the third emission area EMA3 (see FIG. 1 ) in which light is emitted in the third sub-pixel SP3. Figure 6 ) in the overlapping area. The external partition wall EWL may be provided along the edge of the third color filter CF3. In some embodiments, no internal partition wall IWL may be provided in the third color filter CF3. Since no internal partition wall IWL is provided, only one lens LS may be formed in the third emission area EMA3.

[0150] However, this is merely illustrative, and the present disclosure is not limited thereto. For another example, three or more inner partition walls IWL may be provided in the first to third color filters CF1 to CF3.

[0151] In some embodiments, the inner partition wall IWL may include a material having high transmittance characteristics, and the outer partition wall EWL may include a light-absorbing material. In an example, the outer partition wall EWL may include a black colorant. The black colorant may include a black pigment and a black dye. The black colorant of the outer partition wall EWL may include carbon black, a metal such as chromium, or a metal oxide, but the present disclosure is not limited thereto. The outer partition wall EWL includes a light-absorbing material so that reflection caused by external light incident from the outside can be reduced.

[0152] Figure 9 is a plan view illustrating a pixel according to another embodiment of the present disclosure.

[0153] Reference Figure 9 , the first pixel PXL1' may include first to third sub-pixels SP1' to SP3'. In addition, the first to third sub-pixels SP1' to SP3' may include first to third color filters CF1' to CF3' corresponding thereto, respectively. Hereinafter, the description of the first to third sub-pixels SP1' to SP3' will be omitted. Figure 8 The description shown in the description is repeated.

[0154] The first subpixel SP1′ may include a first color filter CF1′ and a light-blocking pattern LBP′ at a periphery of the first color filter CF1′. The second subpixel SP2′ may include a second color filter CF2′ and a light-blocking pattern LBP′ at a periphery of the second color filter CF2′. The third subpixel SP3′ may include a third color filter CF3′ and a light-blocking pattern LBP′ at a periphery of the third color filter CF3′.

[0155] Figure 1 and Figure 3 The pixel PXL included in the display panel 110 shown in FIG may include sub-pixels having various arrangements. For example, the display panel 110 may include Figure 9 . In the first pixel PXL1', the first subpixel SP1' and the second subpixel SP2' may be arranged in the second direction DR2. In the first pixel PXL1', the third subpixel SP3' may be disposed in the first direction DR1 relative to each of the first subpixel SP1' and the second subpixel SP2'. Therefore, the first color filter CF1' and the second color filter CF2' may be arranged in the second direction DR2. The third color filter CF3' may be disposed in the first direction DR1 relative to each of the first color filter CF1' and the second color filter CF2'.

[0156] The second subpixel SP2 ′ may have an area larger than that of the first subpixel SP1 ′, and the third subpixel SP3 ′ may have an area larger than that of the second subpixel SP2 ′.

[0157] Therefore, the second color filter CF2' may have an area larger than that of the first color filter CF1', and the third color filter CF3' may have an area larger than that of the second color filter CF2'. However, implementation is not limited thereto. For another example, the first subpixel SP1' and the second subpixel SP2' may have substantially the same area, and the third subpixel SP3' may have an area larger than that of each of the first subpixel SP1' and the second subpixel SP2'. In this way, the areas of the first to third subpixels SP1' to SP3' may be variously changed in some embodiments. Therefore, the areas of the first to third color filters CF1' to CF3' may also be variously changed depending on the first to third subpixels SP1' to SP3'.

[0158] In some embodiments, the inner partition walls IWL' may be arranged in a grid shape. Two inner partition walls IWL' may be arranged in the second color filter CF2'. For example, one of the inner partition walls IWL' may extend in the first direction DR1, and the other of the inner partition walls IWL' may extend in the second direction DR2. Since the two inner partition walls IWL' are arranged to intersect each other, the second emission area EMA2 (see FIG. Figure 6 ) to form four lenses LS (see Figure 6 ).

[0159] Five internal partition walls IWL' may be provided in the third color filter CF3'. For example, three of the internal partition walls IWL' may extend in the first direction DR1 and be provided to be spaced apart from each other in the second direction DR2. The other two of the internal partition walls IWL' may extend in the second direction DR2 and be provided to be spaced apart from each other in the first direction DR1. Since the five internal partition walls IWL' are provided to intersect with each other, the third emission area EMA3 (see FIG. Figure 6 ) forms twelve lenses LS (see Figure 6 ).

[0160] In this manner, the lens LS is formed using at least one partition wall WL with respect to each of the first to third color filters CF1 to CF3, so that regardless of the sub-pixel SP (see FIG. Figure 3 ) is large or small, the shape of the lens LS can be freely realized. Therefore, the shape of the lens LS can be freely changed in a multi-lens structure, making it possible to optimize light efficiency.

[0161] Figure 10 It shows the manufacturing Figure 6 A flow chart of an embodiment of a method of displaying a device is shown in FIG. Figure 11 yes Figure 10 , a cross-sectional view of the display device in step S1020 is shown in FIG. Figure 12 yes Figure 10 sectional view of the display device in step S1040 shown in FIG. Display device 100 (see FIG. Figure 1 ) can be combined with Figure 6 The components of the above-described embodiments shown in FIG. 1 are configured identically.

[0162] First, refer to Figure 10According to an embodiment of the present disclosure, the method for manufacturing a display device 100 may include a step S1010 of forming a light-emitting element layer on a first substrate, a step S1020 of forming an optical function layer on the light-emitting element layer, a step S1030 of forming a lens array on a second substrate, and a step S1040 of bonding the first substrate and the second substrate to each other with a filler member interposed between the first substrate and the second substrate.

[0163] Reference Figure 10 and Figure 11 In step S1010, a light emitting element layer LDL including first to third light emitting elements LD1 to LD3 may be formed on a first substrate SUB1. First, a pixel circuit layer PCL may be formed on the first substrate SUB1, and then, a light emitting element layer LDL may be formed on the pixel circuit layer PCL.

[0164] First to third light-emitting elements LD1 to LD3 may be formed at positions corresponding to the first to third subpixels SP1 to SP3, respectively. In an embodiment, the first to third light-emitting elements LD1 to LD3 may include organic light-emitting diodes and / or inorganic light-emitting elements. However, the types of the first to third light-emitting elements LD1 to LD3 are not limited thereto.

[0165] In addition, a thin film encapsulation layer TFE may be formed on the light emitting element layer LDL. However, in some embodiments, the thin film encapsulation layer TFE may be omitted.

[0166] Reference Figure 10 and Figure 11 In step S1020, an optical function layer OFL including optical function patterns CCP, light scattering patterns LSP, and banks BNK disposed between the optical function patterns CCP may be formed on the light emitting element layer LDL. The optical function patterns CCP may include first and second optical function patterns CCP1 and CCP2.

[0167] More specifically, the first emission area EMA1 (see FIG. 1 ) may be defined on the thin film encapsulation layer TFE by etching the bank BNK. Figure 6 ) corresponding to the first opening OP1, and the second emission area EMA2 (see Figure 6 ) corresponding to the second opening OP2 and the third emission area EMA3 (see Figure 6 ) corresponds to the third opening OP3.

[0168] The first optical function pattern CCP1 may be formed inside the first opening OP1, and the second optical function pattern CCP2 may be formed inside the second opening OP2. The light scattering pattern LSP may be formed inside the third opening OP3.

[0169] In some embodiments, the first optical functional pattern CCP1 and the second optical functional pattern CCP2 and the light scattering pattern LSP can be formed using inkjet printing technology. In the example, a liquid-based resin including the first quantum dot QD1 can be provided inside the first opening OP1, and a liquid-based resin including the second quantum dot QD2 can be provided inside the second opening OP2. The first quantum dot QD1 and the second quantum dot QD2 may include materials with different luminous wavelengths. A liquid-based resin including a scatterer SCT can be provided inside the third opening OP3. After providing the materials corresponding to the first opening OP1 to the third opening OP3, the first optical functional pattern CCP1 and the second optical functional pattern CCP2 and the light scattering pattern LSP can be formed by curing.

[0170] Reference Figure 10 and Figure 12 In step S1030, a lens array LA including partition walls WL and a low-refractive layer LR covering the partition walls WL may be formed on the second substrate SUB2 (see Figure 6 ). However, we will refer to Figures 13 to 15 Step S1030 is described. In addition, in step S1040, the first substrate SUB1 and the second substrate SUB2 may be bonded to each other with the filler member FLL interposed therebetween. Since the first substrate SUB1 and the second substrate SUB2 are bonded to each other, a lens LS may be formed by the filler member FLL (see FIG. Figure 6 ).

[0171] More specifically, the second substrate SUB2 on which the partition walls WL and the low-refractive layer LR covering the partition walls WL are formed can be arranged so that the top and bottom of the second substrate SUB2 are reversed. As the second substrate SUB2 is reversed, the low-refractive layer LR on the second substrate SUB2 can be arranged to face the optical functional layer OFL on the first substrate SUB1. In addition, a filler member FLL can be provided to fill the separation space between the first substrate SUB1 and the second substrate SUB2. The filler member FLL can be filled in the concave portion CNC between the partition walls WL within the separation space between the first substrate SUB1 and the second substrate SUB2. That is, the filler member FLL can have a refractive index higher than that of the low-refractive layer LR and be filled in a convex shape corresponding to the concave portion CNC. Therefore, at least two lenses LS having a convex shape can be formed in each of the first optical functional pattern CCP1, the second optical functional pattern CCP2, and the light scattering pattern LSP.

[0172] Figure 13 It shows Figure 10 FIG. 1 is a flow chart of an embodiment of step S1030 shown in FIG. Figure 14yes Figure 13 A cross-sectional view of the display device in step S1032 is shown in FIG. Figure 15 yes Figure 13 A cross-sectional view of the display device in step S1033 is shown in FIG.

[0173] First, refer to Figure 13 , Figure 10 The step S1030 of forming a lens array on the second substrate shown in FIG may include a step S1031 of forming a color filter layer on the second substrate, a step S1032 of forming partition walls on the color filter layer, and a step S1033 of forming a low-refractive layer on the color filter layer and the partition walls.

[0174] Reference Figure 13 and Figure 14 In step S1031, a color filter layer CFL including first to third color filters CF1 to CF3 and a light blocking pattern LBP may be formed on the second substrate SUB2. The first to third color filters CF1 to CF3 may be disposed to overlap the first to third sub-pixels SP1 to SP3, respectively, in a plan view.

[0175] In step S1032, partition walls WL spaced apart from each other in the first direction DR1 may be formed on the color filter layer CFL. The partition walls WL may be arranged to overlap with the boundary between the first sub-pixel SP1 and the second sub-pixel SP2 and the boundary between the second sub-pixel SP2 and the third sub-pixel SP3 in a plan view. The partition walls WL may be arranged to surround each of the first to third sub-pixels SP1 to SP3. In addition, at least one partition wall WL may be arranged to overlap each of the first to third sub-pixels SP1 to SP3.

[0176] Reference Figure 13 and Figure 15 In step S1033 , a low-refractive layer LR covering the partition wall WL and one surface of the color filter layer CFL on which the partition wall WL is disposed may be formed on the second substrate SUB2 .

[0177] More specifically, a material having a refractive index of 1 to 1.5 may be applied on the entire second substrate SUB2. Thus, the low refractive layer LR may be formed over the partition walls WL and the one surface of the color filter layer CFL between the partition walls WL.

[0178] In an embodiment, the low-refractive layer LR may partially surround the partition wall WL and partially contact the first to third color filters CF1 to CF3. Since the partition walls WL are arranged to be spaced apart from each other, the low-refractive layer LR may include a concave portion CNC that is recessed toward the bottom surface of the color filter layer CFL. The thickness of the low-refractive layer LR may increase from the center of each of the plurality of concave portions CNC toward the partition wall WL. In addition, the low-refractive layer LR may have a minimum thickness at a surface of each of the plurality of partition walls WL that faces away from the color filter layer CFL.

[0179] Figure 16 is a cross-sectional view showing another embodiment of a display device.

[0180] Reference Figure 16 , a first substrate SUB1, a pixel circuit layer PCL, a first light emitting element LD1 of the first subpixel SP1", a second light emitting element LD2 of the second subpixel SP2", a third light emitting element LD3 of the third subpixel SP3", a light emitting element layer LDL, a thin film encapsulation layer TFE, an optical function layer OFL, a first color filter CF1 to a third color filter CF3, a light blocking pattern LBP, a color filter layer CFL and a second substrate SUB2 can be provided.

[0181] The first substrate SUB1, the pixel circuit layer PCL, the first light emitting element LD1, the second light emitting element LD2, the third light emitting element LD3, the light emitting element layer LDL, the thin film encapsulation layer TFE, the optical function layer OFL, the first to third color filters CF1 to CF3, the light blocking pattern LBP, the color filter layer CFL and the second substrate SUB2 may be as follows Figure 6 The embodiment shown in FIG will be described in the same manner. Figure 6 With respect to the embodiment shown in FIG, repeated description will be omitted, and portions different from those of the above-described embodiment will be mainly described.

[0182] In the lens array LA', a partition wall WL' having a lens shape may be provided on the optical function layer OFL. The partition wall WL' may be Figure 6 The partition walls WL shown in FIG include the same material. The partition walls WL' may have a light transmittance of 95% or more. In addition, the partition walls WL' may be formed in the form of at least one of an engraved pattern and an embossed pattern. Figure 16 , the partition wall WL' is shown as an embossed pattern. However, the present disclosure is not limited thereto. For another example, the partition wall WL' may be an engraved pattern.

[0183] At least two partition walls WL' may be disposed along the first direction DR1 to overlap the first and second optical function patterns CCP1 and CCP2 and the light scattering pattern LSP. The partition walls WL' may have a convex shape having the same height in a third direction DR3 perpendicular to the first direction DR1. Figure 16 , it is shown that the number of partition walls WL' provided in the first sub-pixel SP1" to the third sub-pixel SP3" is the same. However, the present disclosure is not limited thereto. For another example, the first sub-pixel SP1" may have four partition walls WL'. In addition, each of the second sub-pixel SP2" and the third sub-pixel SP3" may include partition walls WL' the number of which is less than or greater than four.

[0184] The low-refractive layer LR' may be disposed over the partition wall WL'. In some embodiments, the low-refractive layer LR' may have a property that allows a low-temperature process of 100 degrees or less. Therefore, the low-refractive layer LR' may form a lens directly on the optical function layer OFL through a low-temperature process.

[0185] The bottom surface of the low-refractive layer LR' adjacent to the optical function layer OFL may be in contact with the top surface US' of the partition wall WL'. Therefore, the top surface of the low-refractive layer LR' may have a concave shape that complements the convex shape of the partition wall WL'. On the other hand, the top surface of the low-refractive layer LR' adjacent to the color filter layer CFL may be a flat surface.

[0186] In a display device and method for manufacturing a display device according to an embodiment of the present disclosure, a multi-lens structure is formed using at least one partition wall WL and a low-refractive layer LR relative to each of the first to third color filters CF1 to CF3. This reduces the optical distance between the low-refractive layer LR and the optical function layer OFL, thereby improving light efficiency. Furthermore, the shape of the lens LS can be freely realized by the partition wall WL regardless of the size of the sub-pixel, making it possible to optimize light efficiency by changing the shape of the lens LS.

[0187] According to the present disclosure, a display device having improved light efficiency and a method of manufacturing the display device may be provided.

[0188] The embodiment provides a display device with improved light efficiency. For example, in the display device, a lens is formed using a partition wall and a low-refractive layer, so that light efficiency can be improved by increasing light emitted in a front direction.

[0189] Example embodiments have been disclosed herein, and although specific terms are employed, they are used and interpreted in a generic and descriptive sense only and not for purposes of limitation. In some cases, as will be apparent to one of ordinary skill in the art at the time of filing this application, features, characteristics, and / or elements described in conjunction with a particular embodiment may be used alone or in combination with features, characteristics, and / or elements described in conjunction with other embodiments, unless otherwise specifically stated. Accordingly, it will be understood by those skilled in the art that various changes in form and details may be made without departing from the spirit and scope of the present disclosure as set forth in the appended claims.

Claims

1. A display device, wherein: The display device includes: a light-emitting element layer; an optical function layer comprising a plurality of optical function patterns arranged on the light emitting element layer and a plurality of banks provided between the plurality of optical function patterns; a color filter layer disposed on the optical function layer, the color filter layer including a plurality of color filters overlapping the plurality of optical function patterns in a plan view; and a lens array, disposed between the optical function layer and the color filter layer, Wherein, the lens array comprises: a plurality of partition walls arranged on a bottom surface of the color filter layer adjacent to the optical function layer; and A low-refractive layer covers the plurality of partition walls and the bottom surface of the color filter layer.

2. The display device according to claim 1, wherein The plurality of partition walls have a refractive index higher than that of the low-refractive layer.

3. The display device according to claim 1, wherein The plurality of partition walls have a light transmittance of 95% or higher.

4. The display device according to claim 1, wherein The low-refractive layer has a refractive index of 1 to 1.

5.

5. The display device according to claim 1, wherein Each of the plurality of optical functional patterns overlaps with at least one of the plurality of partition walls in the plan view. The display device according to claim 1 , wherein: A bottom surface of the low-refractive layer adjacent to the optical function layer includes a plurality of concave portions recessed toward the bottom surface of the color filter layer.

7. The display device according to claim 6, wherein: Each of the plurality of optical functional patterns overlaps with at least two of the plurality of concave portions in the plan view.

8. The display device according to claim 1, wherein The lens array further includes a plurality of lenses disposed between the optical function layer and the low-refractive layer.

9. The display device according to claim 8, wherein Each of the plurality of lenses has a refractive index higher than that of the low-refractive layer.

10. The display device according to claim 8, wherein Each of the plurality of lenses has a shape complementary to a shape of a portion of the low-refractive layer facing the plurality of lenses.

11. The display device according to claim 8, wherein Each of the plurality of lenses has a first thickness at the partition wall and has a second thickness at the bottom surface of the color filter layer between the plurality of partition walls, and Wherein, the first thickness is thinner than the second thickness.

12. The display device according to claim 1, wherein The plurality of color filters include a first color filter and a second color filter, the first color filter and the second color filter are arranged in a specific direction, and Wherein, the plurality of partition walls include: an outer partition wall overlapping the plurality of banks; and At least one inner partition wall overlaps each of the first color filter and the second color filter in the plan view.

13. The display device according to claim 12, wherein: The outer partition wall is disposed along an edge of each of the first color filter and the second color filter in the plan view.

14. The display device according to claim 12, wherein: The outer partition wall includes a light absorbing material.

15. The display device according to claim 1, wherein The thickness of the low-refractive layer increases in a direction toward the plurality of partition walls.

16. The display device according to claim 1, wherein One of the plurality of partition walls has a top surface adjacent to the color filter layer, a bottom surface opposite to the top surface, and a first side surface and a second side surface connecting the top surface and the bottom surface to each other, and The low-refractive layer is in contact with the first side surface, the second side surface, and the bottom surface and partially surrounds the plurality of partition walls.

17. A display device, wherein: The display device includes: a light-emitting element layer; an optical function layer comprising a plurality of optical function patterns arranged on the light emitting element layer and a plurality of banks provided between the plurality of optical function patterns; a color filter layer disposed on the optical function layer, the color filter layer including a plurality of color filters overlapping the plurality of optical function patterns in a plan view; and a lens array, disposed between the optical function layer and the color filter layer, Wherein, the lens array comprises: a plurality of lenses provided on the optical function layer, the plurality of lenses having at least two convex shapes overlapping with each of the plurality of optical function patterns in the plan view; and A low-refractive layer covers the plurality of lenses and a bottom surface of the color filter layer adjacent to the optical function layer.

18. The display device according to claim 17, wherein: The low-refractive layer has a property of enabling a low-temperature process of 100 degrees or less.

19. A method for manufacturing a display device, wherein: The method comprises: forming a light-emitting element layer on the first substrate; forming an optical function layer on the light emitting element layer, the optical function layer comprising a plurality of optical function patterns and a plurality of banks disposed between the plurality of optical function patterns; forming a color filter layer on the second substrate, the color filter layer including a plurality of color filters overlapping the plurality of optical functional patterns; forming a plurality of partition walls on the color filter layer; forming a low-refractive layer covering the plurality of partition walls and the color filter layer; and The first substrate and the second substrate are bonded to each other with a filler member interposed therebetween.

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